diff options
Diffstat (limited to 'test/CodeGen/Generic')
-rw-r--r-- | test/CodeGen/Generic/2011-02-12-shuffle.ll | 32 | ||||
-rw-r--r-- | test/CodeGen/Generic/promote-integers.ll | 15 | ||||
-rw-r--r-- | test/CodeGen/Generic/zero-sized-array.ll | 81 |
3 files changed, 96 insertions, 32 deletions
diff --git a/test/CodeGen/Generic/2011-02-12-shuffle.ll b/test/CodeGen/Generic/2011-02-12-shuffle.ll deleted file mode 100644 index b4d56d1..0000000 --- a/test/CodeGen/Generic/2011-02-12-shuffle.ll +++ /dev/null @@ -1,32 +0,0 @@ -; RUN: llc < %s -; PR9165 - -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" -target triple = "i686-pc-win32" - -define void @m_387() nounwind { -entry: - br i1 undef, label %if.end, label %UnifiedReturnBlock - -if.end: ; preds = %entry - %tmp1067 = load <16 x i32> addrspace(1)* null, align 64 - %tmp1082 = shufflevector <16 x i32> <i32 0, i32 0, i32 0, i32 undef, i32 undef, i32 0, i32 0, i32 undef, i32 0, i32 0, i32 undef, i32 undef, i32 0, i32 undef, i32 undef, i32 undef>, - <16 x i32> %tmp1067, - <16 x i32> <i32 0, i32 1, i32 2, i32 undef, i32 26, i32 5, i32 6, i32 undef, i32 8, i32 9, i32 31, i32 30, i32 12, i32 undef, i32 undef, i32 undef> - - %tmp1100 = shufflevector <16 x i32> %tmp1082, - <16 x i32> %tmp1067, - <16 x i32> <i32 0, i32 1, i32 2, i32 undef, i32 4, i32 5, i32 6, i32 18, i32 8, i32 9, i32 10, i32 11, i32 12, i32 25, i32 undef, i32 17> - - %tmp1112 = shufflevector <16 x i32> %tmp1100, - <16 x i32> %tmp1067, - <16 x i32> <i32 0, i32 1, i32 2, i32 24, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 18, i32 15> - - store <16 x i32> %tmp1112, <16 x i32> addrspace(1)* undef, align 64 - - ret void - -UnifiedReturnBlock: ; preds = %entry - ret void -} - diff --git a/test/CodeGen/Generic/promote-integers.ll b/test/CodeGen/Generic/promote-integers.ll new file mode 100644 index 0000000..5812592 --- /dev/null +++ b/test/CodeGen/Generic/promote-integers.ll @@ -0,0 +1,15 @@ +; Test that vectors are scalarized/lowered correctly. +; RUN: llc -march=x86 -promote-elements < %s | FileCheck %s + +; This test is the poster-child for integer-element-promotion. +; Until this feature is complete, we mark this test as expected to fail. +; XFAIL: * +; CHECK: vector_code +; CHECK: ret +define <4 x float> @vector_code(<4 x i64> %A, <4 x i64> %B, <4 x float> %R0, <4 x float> %R1 ) { + %C = icmp eq <4 x i64> %A, %B + %K = xor <4 x i1> <i1 1, i1 1, i1 1, i1 1>, %C + %D = select <4 x i1> %K, <4 x float> %R1, <4 x float> %R0 + ret <4 x float> %D +} + diff --git a/test/CodeGen/Generic/zero-sized-array.ll b/test/CodeGen/Generic/zero-sized-array.ll new file mode 100644 index 0000000..280ba00 --- /dev/null +++ b/test/CodeGen/Generic/zero-sized-array.ll @@ -0,0 +1,81 @@ +; RUN: llc < %s +; PR9900 + +%zero = type [0 x i8] +%foobar = type { i32, %zero } + +define void @f(%foobar %arg) { + %arg1 = extractvalue %foobar %arg, 0 + %arg2 = extractvalue %foobar %arg, 1 + call i32 @f2(%zero %arg2, i32 5, i32 42) + ret void +} + +define i32 @f2(%zero %x, i32 %y, i32 %z) { + ret i32 %y +} + +define void @f3(%zero %x, i32 %y) { + call i32 @f2(%zero %x, i32 5, i32 %y) + ret void +} + +define void @f4(%zero %z) { + insertvalue %foobar undef, %zero %z, 1 + ret void +} + +define void @f5(%foobar %x) { +allocas: + %y = extractvalue %foobar %x, 1 + br label %b1 + +b1: + %insert120 = insertvalue %foobar undef, %zero %y, 1 + ret void +} + +define void @f6(%zero %x, %zero %y) { +b1: + br i1 undef, label %end, label %b2 + +b2: + br label %end + +end: + %z = phi %zero [ %y, %b1 ], [ %x, %b2 ] + call void @f4(%zero %z) + ret void +} + +%zero2 = type {} + +define i32 @g1(%zero2 %x, i32 %y, i32 %z) { + ret i32 %y +} + +define void @g2(%zero2 %x, i32 %y) { + call i32 @g1(%zero2 %x, i32 5, i32 %y) + ret void +} + +%zero2r = type {%zero2} + +define i32 @h1(%zero2r %x, i32 %y, i32 %z) { + ret i32 %y +} + +define void @h2(%zero2r %x, i32 %y) { + call i32 @h1(%zero2r %x, i32 5, i32 %y) + ret void +} + +%foobar2 = type { i32, %zero2r } + +define void @h3(%foobar2 %arg) { + %arg1 = extractvalue %foobar2 %arg, 0 + %arg2 = extractvalue %foobar2 %arg, 1 + %arg21 = extractvalue %zero2r %arg2, 0 + call void @g2(%zero2 %arg21, i32 5) + ret void +} |