diff options
Diffstat (limited to 'test/CodeGen/CellSPU')
| -rw-r--r-- | test/CodeGen/CellSPU/jumptable.ll | 21 | ||||
| -rw-r--r-- | test/CodeGen/CellSPU/sub_ops.ll | 26 |
2 files changed, 47 insertions, 0 deletions
diff --git a/test/CodeGen/CellSPU/jumptable.ll b/test/CodeGen/CellSPU/jumptable.ll new file mode 100644 index 0000000..d7d1ef4 --- /dev/null +++ b/test/CodeGen/CellSPU/jumptable.ll @@ -0,0 +1,21 @@ +;RUN: llc --march=cellspu %s -o - | FileCheck %s +; This is to check that emitting jumptables doesn't crash llc +define i32 @test(i32 %param) { +entry: +;CHECK: ai $4, $3, -1 +;CHECK: clgti $5, $4, 3 +;CHECK: brnz $5,.LBB0_2 + switch i32 %param, label %bb1 [ + i32 1, label %bb3 + i32 2, label %bb2 + i32 3, label %bb3 + i32 4, label %bb1 + ] + +bb1: + ret i32 1 +bb2: + ret i32 2 +bb3: + ret i32 3 +} diff --git a/test/CodeGen/CellSPU/sub_ops.ll b/test/CodeGen/CellSPU/sub_ops.ll new file mode 100644 index 0000000..f0c40d3 --- /dev/null +++ b/test/CodeGen/CellSPU/sub_ops.ll @@ -0,0 +1,26 @@ +; RUN: llc < %s -march=cellspu | FileCheck %s + +define i32 @subword( i32 %param1, i32 %param2) { +; Check ordering of registers ret=param1-param2 -> rt=rb-ra +; CHECK-NOT: sf $3, $3, $4 +; CHECK: sf $3, $4, $3 + %1 = sub i32 %param1, %param2 + ret i32 %1 +} + +define i16 @subhword( i16 %param1, i16 %param2) { +; Check ordering of registers ret=param1-param2 -> rt=rb-ra +; CHECK-NOT: sfh $3, $3, $4 +; CHECK: sfh $3, $4, $3 + %1 = sub i16 %param1, %param2 + ret i16 %1 +} + +define float @subfloat( float %param1, float %param2) { +; Check ordering of registers ret=param1-param2 -> rt=ra-rb +; (yes this is reverse of i32 instruction) +; CHECK-NOT: fs $3, $4, $3 +; CHECK: fs $3, $3, $4 + %1 = fsub float %param1, %param2 + ret float %1 +} |
