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Diffstat (limited to 'test/CodeGen/CellSPU/loads.ll')
-rw-r--r-- | test/CodeGen/CellSPU/loads.ll | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/test/CodeGen/CellSPU/loads.ll b/test/CodeGen/CellSPU/loads.ll index 8e5422c..d40217d 100644 --- a/test/CodeGen/CellSPU/loads.ll +++ b/test/CodeGen/CellSPU/loads.ll @@ -18,3 +18,23 @@ entry: ret <4 x float> %tmp1 ; CHECK: lqd $3, 16($3) } + + +declare <4 x i32>* @getv4f32ptr() +define <4 x i32> @func() { + ;CHECK: brasl + ; we need to have some instruction to move the result to safety. + ; which instruction (lr, stqd...) depends on the regalloc + ;CHECK: {{.*}} + ;CHECK: brasl + %rv1 = call <4 x i32>* @getv4f32ptr() + %rv2 = call <4 x i32>* @getv4f32ptr() + %rv3 = load <4 x i32>* %rv1 + ret <4 x i32> %rv3 +} + +define <4 x float> @load_undef(){ + ; CHECK: lqd $3, 0($3) + %val = load <4 x float>* undef + ret <4 x float> %val +} |