diff options
Diffstat (limited to 'test/CodeGen/ARM/vmov.ll')
| -rw-r--r-- | test/CodeGen/ARM/vmov.ll | 58 |
1 files changed, 22 insertions, 36 deletions
diff --git a/test/CodeGen/ARM/vmov.ll b/test/CodeGen/ARM/vmov.ll index e4368d6..f803018 100644 --- a/test/CodeGen/ARM/vmov.ll +++ b/test/CodeGen/ARM/vmov.ll @@ -2,141 +2,127 @@ define <8 x i8> @v_movi8() nounwind { ;CHECK: v_movi8: -;CHECK: vmov.i8 +;CHECK: vmov.i8 d0, #0x8 ret <8 x i8> < i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8 > } define <4 x i16> @v_movi16a() nounwind { ;CHECK: v_movi16a: -;CHECK: vmov.i16 +;CHECK: vmov.i16 d0, #0x10 ret <4 x i16> < i16 16, i16 16, i16 16, i16 16 > } -; 0x1000 = 4096 define <4 x i16> @v_movi16b() nounwind { ;CHECK: v_movi16b: -;CHECK: vmov.i16 +;CHECK: vmov.i16 d0, #0x1000 ret <4 x i16> < i16 4096, i16 4096, i16 4096, i16 4096 > } define <2 x i32> @v_movi32a() nounwind { ;CHECK: v_movi32a: -;CHECK: vmov.i32 +;CHECK: vmov.i32 d0, #0x20 ret <2 x i32> < i32 32, i32 32 > } -; 0x2000 = 8192 define <2 x i32> @v_movi32b() nounwind { ;CHECK: v_movi32b: -;CHECK: vmov.i32 +;CHECK: vmov.i32 d0, #0x2000 ret <2 x i32> < i32 8192, i32 8192 > } -; 0x200000 = 2097152 define <2 x i32> @v_movi32c() nounwind { ;CHECK: v_movi32c: -;CHECK: vmov.i32 +;CHECK: vmov.i32 d0, #0x200000 ret <2 x i32> < i32 2097152, i32 2097152 > } -; 0x20000000 = 536870912 define <2 x i32> @v_movi32d() nounwind { ;CHECK: v_movi32d: -;CHECK: vmov.i32 +;CHECK: vmov.i32 d0, #0x20000000 ret <2 x i32> < i32 536870912, i32 536870912 > } -; 0x20ff = 8447 define <2 x i32> @v_movi32e() nounwind { ;CHECK: v_movi32e: -;CHECK: vmov.i32 +;CHECK: vmov.i32 d0, #0x20FF ret <2 x i32> < i32 8447, i32 8447 > } -; 0x20ffff = 2162687 define <2 x i32> @v_movi32f() nounwind { ;CHECK: v_movi32f: -;CHECK: vmov.i32 +;CHECK: vmov.i32 d0, #0x20FFFF ret <2 x i32> < i32 2162687, i32 2162687 > } -; 0xff0000ff0000ffff = 18374687574888349695 define <1 x i64> @v_movi64() nounwind { ;CHECK: v_movi64: -;CHECK: vmov.i64 +;CHECK: vmov.i64 d0, #0xFF0000FF0000FFFF ret <1 x i64> < i64 18374687574888349695 > } define <16 x i8> @v_movQi8() nounwind { ;CHECK: v_movQi8: -;CHECK: vmov.i8 +;CHECK: vmov.i8 q0, #0x8 ret <16 x i8> < i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8 > } define <8 x i16> @v_movQi16a() nounwind { ;CHECK: v_movQi16a: -;CHECK: vmov.i16 +;CHECK: vmov.i16 q0, #0x10 ret <8 x i16> < i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16 > } -; 0x1000 = 4096 define <8 x i16> @v_movQi16b() nounwind { ;CHECK: v_movQi16b: -;CHECK: vmov.i16 +;CHECK: vmov.i16 q0, #0x1000 ret <8 x i16> < i16 4096, i16 4096, i16 4096, i16 4096, i16 4096, i16 4096, i16 4096, i16 4096 > } define <4 x i32> @v_movQi32a() nounwind { ;CHECK: v_movQi32a: -;CHECK: vmov.i32 +;CHECK: vmov.i32 q0, #0x20 ret <4 x i32> < i32 32, i32 32, i32 32, i32 32 > } -; 0x2000 = 8192 define <4 x i32> @v_movQi32b() nounwind { ;CHECK: v_movQi32b: -;CHECK: vmov.i32 +;CHECK: vmov.i32 q0, #0x2000 ret <4 x i32> < i32 8192, i32 8192, i32 8192, i32 8192 > } -; 0x200000 = 2097152 define <4 x i32> @v_movQi32c() nounwind { ;CHECK: v_movQi32c: -;CHECK: vmov.i32 +;CHECK: vmov.i32 q0, #0x200000 ret <4 x i32> < i32 2097152, i32 2097152, i32 2097152, i32 2097152 > } -; 0x20000000 = 536870912 define <4 x i32> @v_movQi32d() nounwind { ;CHECK: v_movQi32d: -;CHECK: vmov.i32 +;CHECK: vmov.i32 q0, #0x20000000 ret <4 x i32> < i32 536870912, i32 536870912, i32 536870912, i32 536870912 > } -; 0x20ff = 8447 define <4 x i32> @v_movQi32e() nounwind { ;CHECK: v_movQi32e: -;CHECK: vmov.i32 +;CHECK: vmov.i32 q0, #0x20FF ret <4 x i32> < i32 8447, i32 8447, i32 8447, i32 8447 > } -; 0x20ffff = 2162687 define <4 x i32> @v_movQi32f() nounwind { ;CHECK: v_movQi32f: -;CHECK: vmov.i32 +;CHECK: vmov.i32 q0, #0x20FFFF ret <4 x i32> < i32 2162687, i32 2162687, i32 2162687, i32 2162687 > } -; 0xff0000ff0000ffff = 18374687574888349695 define <2 x i64> @v_movQi64() nounwind { ;CHECK: v_movQi64: -;CHECK: vmov.i64 +;CHECK: vmov.i64 q0, #0xFF0000FF0000FFFF ret <2 x i64> < i64 18374687574888349695, i64 18374687574888349695 > } ; Check for correct assembler printing for immediate values. %struct.int8x8_t = type { <8 x i8> } -define arm_apcscc void @vdupn128(%struct.int8x8_t* noalias nocapture sret %agg.result) nounwind { +define void @vdupn128(%struct.int8x8_t* noalias nocapture sret %agg.result) nounwind { entry: ;CHECK: vdupn128: ;CHECK: vmov.i8 d0, #0x80 @@ -145,7 +131,7 @@ entry: ret void } -define arm_apcscc void @vdupnneg75(%struct.int8x8_t* noalias nocapture sret %agg.result) nounwind { +define void @vdupnneg75(%struct.int8x8_t* noalias nocapture sret %agg.result) nounwind { entry: ;CHECK: vdupnneg75: ;CHECK: vmov.i8 d0, #0xB5 |
