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-rw-r--r--test/CodeGen/ARM/lsr-on-unrolled-loops.ll28
1 files changed, 15 insertions, 13 deletions
diff --git a/test/CodeGen/ARM/lsr-on-unrolled-loops.ll b/test/CodeGen/ARM/lsr-on-unrolled-loops.ll
index 2ac4084..25cf135 100644
--- a/test/CodeGen/ARM/lsr-on-unrolled-loops.ll
+++ b/test/CodeGen/ARM/lsr-on-unrolled-loops.ll
@@ -4,14 +4,14 @@
; constant offset addressing, so that each of the following stores
; uses the same register.
-; CHECK: vstr.32 s0, [r12, #-128]
-; CHECK: vstr.32 s0, [r12, #-96]
-; CHECK: vstr.32 s0, [r12, #-64]
-; CHECK: vstr.32 s0, [r12, #-32]
-; CHECK: vstr.32 s0, [r12]
-; CHECK: vstr.32 s0, [r12, #32]
-; CHECK: vstr.32 s0, [r12, #64]
-; CHECK: vstr.32 s0, [r12, #96]
+; CHECK: vstr.32 s0, [r9, #-128]
+; CHECK: vstr.32 s0, [r9, #-96]
+; CHECK: vstr.32 s0, [r9, #-64]
+; CHECK: vstr.32 s0, [r9, #-32]
+; CHECK: vstr.32 s0, [r9]
+; CHECK: vstr.32 s0, [r9, #32]
+; CHECK: vstr.32 s0, [r9, #64]
+; CHECK: vstr.32 s0, [r9, #96]
target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
@@ -40,7 +40,7 @@ target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-
%22 = type { void (%0*)*, void (%0*, i8***, i32, i8**, i32)* }
%23 = type { void (%0*, i32)*, void (%0*, i8**, i8**, i32)*, void (%0*)*, void (%0*)* }
-define arm_apcscc void @test(%0* nocapture %a0, %11* nocapture %a1, i16* nocapture %a2, i8** nocapture %a3, i32 %a4) nounwind {
+define void @test(%0* nocapture %a0, %11* nocapture %a1, i16* nocapture %a2, i8** nocapture %a3, i32 %a4) nounwind {
bb:
%t = alloca [64 x float], align 4
%t5 = getelementptr inbounds %0* %a0, i32 0, i32 65
@@ -393,7 +393,7 @@ bb295:
%struct.z_stream = type { i8*, i32, i32, i8*, i32, i32, i8*, %struct.internal_state*, i8* (i8*, i32, i32)*, void (i8*, i8*)*, i8*, i32, i32, i32 }
%union.anon = type { i16 }
-define arm_apcscc i32 @longest_match(%struct.internal_state* %s, i32 %cur_match) nounwind optsize {
+define i32 @longest_match(%struct.internal_state* %s, i32 %cur_match) nounwind optsize {
entry:
%0 = getelementptr inbounds %struct.internal_state* %s, i32 0, i32 31 ; <i32*> [#uses=1]
%1 = load i32* %0, align 4 ; <i32> [#uses=2]
@@ -626,9 +626,11 @@ bb24: ; preds = %bb23
; LSR should use count-down iteration to avoid requiring the trip count
; in a register, and it shouldn't require any reloads here.
-; CHECK: sub.w r9, r9, #1
-; CHECK-NEXT: cmp.w r9, #0
-; CHECK-NEXT: bne.w
+; CHECK: @ %bb24
+; CHECK-NEXT: @ in Loop: Header=BB1_1 Depth=1
+; CHECK-NEXT: sub{{.*}} [[REGISTER:r[0-9]+]], #1
+; CHECK-NEXT: cmp{{.*}} [[REGISTER]], #0
+; CHECK-NEXT: bne.w
%92 = icmp eq i32 %tmp81, %indvar78 ; <i1> [#uses=1]
%indvar.next79 = add i32 %indvar78, 1 ; <i32> [#uses=1]
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