diff options
Diffstat (limited to 'test/Bitcode')
-rw-r--r-- | test/Bitcode/AutoUpgradeGlobals.ll | 4 | ||||
-rw-r--r-- | test/Bitcode/AutoUpgradeGlobals.ll.bc | bin | 312 -> 0 bytes | |||
-rw-r--r-- | test/Bitcode/dg.exp | 3 | ||||
-rw-r--r-- | test/Bitcode/lit.local.cfg | 1 | ||||
-rw-r--r-- | test/Bitcode/null-type.ll | 4 | ||||
-rw-r--r-- | test/Bitcode/shuffle.ll | 31 | ||||
-rw-r--r-- | test/Bitcode/sse42_crc32.ll | 28 | ||||
-rw-r--r-- | test/Bitcode/sse42_crc32.ll.bc | bin | 480 -> 0 bytes | |||
-rw-r--r-- | test/Bitcode/ssse3_palignr.ll | 82 | ||||
-rw-r--r-- | test/Bitcode/ssse3_palignr.ll.bc | bin | 1504 -> 0 bytes |
10 files changed, 116 insertions, 37 deletions
diff --git a/test/Bitcode/AutoUpgradeGlobals.ll b/test/Bitcode/AutoUpgradeGlobals.ll deleted file mode 100644 index a5af2b8..0000000 --- a/test/Bitcode/AutoUpgradeGlobals.ll +++ /dev/null @@ -1,4 +0,0 @@ -; This isn't really an assembly file. It just runs test on bitcode to ensure -; it is auto-upgraded. -; RUN: llvm-dis < %s.bc | FileCheck %s -; CHECK-NOT: {i32 @\\.llvm\\.eh} diff --git a/test/Bitcode/AutoUpgradeGlobals.ll.bc b/test/Bitcode/AutoUpgradeGlobals.ll.bc Binary files differdeleted file mode 100644 index 1abe968..0000000 --- a/test/Bitcode/AutoUpgradeGlobals.ll.bc +++ /dev/null diff --git a/test/Bitcode/dg.exp b/test/Bitcode/dg.exp deleted file mode 100644 index f200589..0000000 --- a/test/Bitcode/dg.exp +++ /dev/null @@ -1,3 +0,0 @@ -load_lib llvm.exp - -RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]] diff --git a/test/Bitcode/lit.local.cfg b/test/Bitcode/lit.local.cfg new file mode 100644 index 0000000..19eebc0 --- /dev/null +++ b/test/Bitcode/lit.local.cfg @@ -0,0 +1 @@ +config.suffixes = ['.ll', '.c', '.cpp'] diff --git a/test/Bitcode/null-type.ll b/test/Bitcode/null-type.ll index 5d3dfab..b972753 100644 --- a/test/Bitcode/null-type.ll +++ b/test/Bitcode/null-type.ll @@ -1,2 +1,4 @@ -; RUN: not llvm-dis < %s.bc > /dev/null |& grep "Invalid MODULE_CODE_FUNCTION record" +; RUN: not llvm-dis < %s.bc > /dev/null |& FileCheck %s ; PR8494 + +; CHECK: Invalid MODULE_CODE_FUNCTION record diff --git a/test/Bitcode/shuffle.ll b/test/Bitcode/shuffle.ll new file mode 100644 index 0000000..c3c01c6 --- /dev/null +++ b/test/Bitcode/shuffle.ll @@ -0,0 +1,31 @@ +; RUN: llvm-as < %s | llvm-dis + +; <rdar://problem/8622574> +; tests the bitcodereader can handle the case where the reader will initially +; create shuffle with a place holder mask. + + +define <4 x float> @test(<2 x double> %d2) { +entry: + %call20.i = tail call <4 x float> @cmp(<2 x double> %d2, + <2 x double> bitcast ( + <4 x float> shufflevector ( + <3 x float> shufflevector ( + <4 x float> shufflevector ( + <3 x float> bitcast ( + i96 trunc ( + i128 bitcast (<2 x double> bitcast ( + <4 x i32> <i32 0, i32 0, i32 0, i32 undef> to <2 x double>) + to i128) to i96) + to <3 x float>), + <3 x float> undef, + <4 x i32> <i32 0, i32 1, i32 2, i32 undef>), + <4 x float> undef, + <3 x i32> <i32 0, i32 1, i32 2>), + <3 x float> undef, + <4 x i32> <i32 0, i32 1, i32 2, i32 undef>) + to <2 x double>)) + ret <4 x float> %call20.i +} + +declare <4 x float> @cmp(<2 x double>, <2 x double>) diff --git a/test/Bitcode/sse42_crc32.ll b/test/Bitcode/sse42_crc32.ll deleted file mode 100644 index 1c371c3..0000000 --- a/test/Bitcode/sse42_crc32.ll +++ /dev/null @@ -1,28 +0,0 @@ -; Check to make sure old CRC32 intrinsics are auto-upgraded -; correctly. -; -; Rdar: 9472944 -; -; RUN: llvm-dis < %s.bc | FileCheck %s - -; crc32.8 should upgrade to crc32.32.8 -; CHECK: i32 @llvm.x86.sse42.crc32.32.8( -; CHECK-NOT: i32 @llvm.x86.sse42.crc32.8( - -; crc32.16 should upgrade to crc32.32.16 -; CHECK: i32 @llvm.x86.sse42.crc32.32.16( -; CHECK-NOT: i32 @llvm.x86.sse42.crc32.16( - -; crc32.32 should upgrade to crc32.32.32 -; CHECK: i32 @llvm.x86.sse42.crc32.32.32( -; CHECK-NOT: i32 @llvm.x86.sse42.crc32.32( - -; crc64.8 should upgrade to crc32.64.8 -; CHECK: i64 @llvm.x86.sse42.crc32.64.8( -; CHECK-NOT: i64 @llvm.x86.sse42.crc64.8( - -; crc64.64 should upgrade to crc32.64.64 -; CHECK: i64 @llvm.x86.sse42.crc32.64.64( -; CHECK-NOT: i64 @llvm.x86.sse42.crc64.64( - - diff --git a/test/Bitcode/sse42_crc32.ll.bc b/test/Bitcode/sse42_crc32.ll.bc Binary files differdeleted file mode 100644 index d895fad..0000000 --- a/test/Bitcode/sse42_crc32.ll.bc +++ /dev/null diff --git a/test/Bitcode/ssse3_palignr.ll b/test/Bitcode/ssse3_palignr.ll index f62ca11..90b4394 100644 --- a/test/Bitcode/ssse3_palignr.ll +++ b/test/Bitcode/ssse3_palignr.ll @@ -1,2 +1,82 @@ -; RUN: llvm-dis < %s.bc | FileCheck %s +; RUN: opt < %s -S | FileCheck %s ; CHECK-NOT: {@llvm\\.palign} + +define <4 x i32> @align1(<4 x i32> %a, <4 x i32> %b) nounwind readnone ssp { +entry: + %0 = bitcast <4 x i32> %b to <2 x i64> ; <<2 x i64>> [#uses=1] + %1 = bitcast <4 x i32> %a to <2 x i64> ; <<2 x i64>> [#uses=1] + %2 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %1, <2 x i64> %0, i8 15) ; <<2 x i64>> [#uses=1] + %3 = bitcast <2 x i64> %2 to <4 x i32> ; <<4 x i32>> [#uses=1] + ret <4 x i32> %3 +} + +define double @align8(<2 x i32> %a, <2 x i32> %b) nounwind readnone ssp { +entry: + %0 = bitcast <2 x i32> %b to <1 x i64> ; <<1 x i64>> [#uses=1] + %1 = bitcast <2 x i32> %a to <1 x i64> ; <<1 x i64>> [#uses=1] + %2 = tail call <1 x i64> @llvm.x86.ssse3.palign.r(<1 x i64> %1, <1 x i64> %0, i8 7) ; <<1 x i64>> [#uses=1] + %3 = extractelement <1 x i64> %2, i32 0 ; <i64> [#uses=1] + %retval12 = bitcast i64 %3 to double ; <double> [#uses=1] + ret double %retval12 +} + +declare <1 x i64> @llvm.x86.ssse3.palign.r(<1 x i64>, <1 x i64>, i8) nounwind readnone + +define double @align7(<2 x i32> %a, <2 x i32> %b) nounwind readnone ssp { +entry: + %0 = bitcast <2 x i32> %b to <1 x i64> ; <<1 x i64>> [#uses=1] + %1 = bitcast <2 x i32> %a to <1 x i64> ; <<1 x i64>> [#uses=1] + %2 = tail call <1 x i64> @llvm.x86.ssse3.palign.r(<1 x i64> %1, <1 x i64> %0, i8 16) ; <<1 x i64>> [#uses=1] + %3 = extractelement <1 x i64> %2, i32 0 ; <i64> [#uses=1] + %retval12 = bitcast i64 %3 to double ; <double> [#uses=1] + ret double %retval12 +} + +define double @align6(<2 x i32> %a, <2 x i32> %b) nounwind readnone ssp { +entry: + %0 = bitcast <2 x i32> %b to <1 x i64> ; <<1 x i64>> [#uses=1] + %1 = bitcast <2 x i32> %a to <1 x i64> ; <<1 x i64>> [#uses=1] + %2 = tail call <1 x i64> @llvm.x86.ssse3.palign.r(<1 x i64> %1, <1 x i64> %0, i8 9) ; <<1 x i64>> [#uses=1] + %3 = extractelement <1 x i64> %2, i32 0 ; <i64> [#uses=1] + %retval12 = bitcast i64 %3 to double ; <double> [#uses=1] + ret double %retval12 +} + +define double @align5(<2 x i32> %a, <2 x i32> %b) nounwind readnone ssp { +entry: + %0 = bitcast <2 x i32> %b to <1 x i64> ; <<1 x i64>> [#uses=1] + %1 = bitcast <2 x i32> %a to <1 x i64> ; <<1 x i64>> [#uses=1] + %2 = tail call <1 x i64> @llvm.x86.ssse3.palign.r(<1 x i64> %1, <1 x i64> %0, i8 8) ; <<1 x i64>> [#uses=1] + %3 = extractelement <1 x i64> %2, i32 0 ; <i64> [#uses=1] + %retval12 = bitcast i64 %3 to double ; <double> [#uses=1] + ret double %retval12 +} + +define <4 x i32> @align4(<4 x i32> %a, <4 x i32> %b) nounwind readnone ssp { +entry: + %0 = bitcast <4 x i32> %b to <2 x i64> ; <<2 x i64>> [#uses=1] + %1 = bitcast <4 x i32> %a to <2 x i64> ; <<2 x i64>> [#uses=1] + %2 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %1, <2 x i64> %0, i8 32) ; <<2 x i64>> [#uses=1] + %3 = bitcast <2 x i64> %2 to <4 x i32> ; <<4 x i32>> [#uses=1] + ret <4 x i32> %3 +} + +declare <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64>, <2 x i64>, i8) nounwind readnone + +define <4 x i32> @align3(<4 x i32> %a, <4 x i32> %b) nounwind readnone ssp { +entry: + %0 = bitcast <4 x i32> %b to <2 x i64> ; <<2 x i64>> [#uses=1] + %1 = bitcast <4 x i32> %a to <2 x i64> ; <<2 x i64>> [#uses=1] + %2 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %1, <2 x i64> %0, i8 17) ; <<2 x i64>> [#uses=1] + %3 = bitcast <2 x i64> %2 to <4 x i32> ; <<4 x i32>> [#uses=1] + ret <4 x i32> %3 +} + +define <4 x i32> @align2(<4 x i32> %a, <4 x i32> %b) nounwind readnone ssp { +entry: + %0 = bitcast <4 x i32> %b to <2 x i64> ; <<2 x i64>> [#uses=1] + %1 = bitcast <4 x i32> %a to <2 x i64> ; <<2 x i64>> [#uses=1] + %2 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %1, <2 x i64> %0, i8 16) ; <<2 x i64>> [#uses=1] + %3 = bitcast <2 x i64> %2 to <4 x i32> ; <<4 x i32>> [#uses=1] + ret <4 x i32> %3 +} diff --git a/test/Bitcode/ssse3_palignr.ll.bc b/test/Bitcode/ssse3_palignr.ll.bc Binary files differdeleted file mode 100644 index 3fc9cdf..0000000 --- a/test/Bitcode/ssse3_palignr.ll.bc +++ /dev/null |