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-rw-r--r--sys/amd64/amd64/initcpu.c14
-rw-r--r--sys/amd64/include/pmap.h8
-rw-r--r--sys/cam/scsi/scsi_all.c13
-rw-r--r--sys/cam/scsi/scsi_all.h1
-rw-r--r--sys/cddl/contrib/opensolaris/uts/common/fs/zfs/arc.c244
-rw-r--r--sys/cddl/contrib/opensolaris/uts/common/fs/zfs/vdev_geom.c7
-rw-r--r--sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_znode.c10
-rw-r--r--sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zio.c10
-rw-r--r--sys/cddl/contrib/opensolaris/uts/common/sys/fs/zfs.h4
-rw-r--r--sys/cddl/dev/dtrace/x86/dis_tables.c4
-rw-r--r--sys/dev/aic7xxx/aic79xx.c20
-rw-r--r--sys/dev/aic7xxx/aic79xx.h6
-rw-r--r--sys/dev/aic7xxx/aic79xx.reg24
-rw-r--r--sys/dev/aic7xxx/aic79xx.seq16
-rw-r--r--sys/dev/aic7xxx/aic79xx_inline.h4
-rw-r--r--sys/dev/aic7xxx/aic79xx_pci.c6
-rw-r--r--sys/dev/aic7xxx/aic7xxx.c22
-rw-r--r--sys/dev/aic7xxx/aic7xxx.h6
-rw-r--r--sys/dev/aic7xxx/aic7xxx.reg2
-rw-r--r--sys/dev/aic7xxx/aic7xxx.seq4
-rw-r--r--sys/dev/aic7xxx/aic7xxx_inline.h2
-rw-r--r--sys/dev/aic7xxx/aic7xxx_pci.c6
-rw-r--r--sys/dev/aic7xxx/aicasm/aicasm.c2
-rw-r--r--sys/dev/aic7xxx/aicasm/aicasm_gram.y6
-rw-r--r--sys/dev/ciss/ciss.c6
-rw-r--r--sys/dev/drm2/radeon/radeon_fb.c2
-rw-r--r--sys/dev/drm2/ttm/ttm_bo_vm.c2
-rw-r--r--sys/dev/hptiop/hptiop.c2
-rw-r--r--sys/dev/hwpmc/hwpmc_mod.c14
-rw-r--r--sys/dev/isci/scil/scic_phy.h2
-rw-r--r--sys/dev/isci/scil/scic_sds_phy.c36
-rw-r--r--sys/dev/kbd/kbd.c2
-rw-r--r--sys/dev/mpr/mpi/mpi2.h79
-rw-r--r--sys/dev/mpr/mpi/mpi2_cnfg.h181
-rw-r--r--sys/dev/mpr/mpi/mpi2_hbd.h8
-rw-r--r--sys/dev/mpr/mpi/mpi2_history.txt151
-rw-r--r--sys/dev/mpr/mpi/mpi2_init.h42
-rw-r--r--sys/dev/mpr/mpi/mpi2_ioc.h158
-rw-r--r--sys/dev/mpr/mpi/mpi2_ra.h8
-rw-r--r--sys/dev/mpr/mpi/mpi2_raid.h8
-rw-r--r--sys/dev/mpr/mpi/mpi2_sas.h13
-rw-r--r--sys/dev/mpr/mpi/mpi2_targ.h21
-rw-r--r--sys/dev/mpr/mpi/mpi2_tool.h10
-rw-r--r--sys/dev/mpr/mpi/mpi2_type.h8
-rw-r--r--sys/dev/mpr/mpr.c89
-rw-r--r--sys/dev/mpr/mpr_config.c2
-rw-r--r--sys/dev/mpr/mpr_ioctl.h2
-rw-r--r--sys/dev/mpr/mpr_mapping.c2
-rw-r--r--sys/dev/mpr/mpr_mapping.h2
-rw-r--r--sys/dev/mpr/mpr_pci.c12
-rw-r--r--sys/dev/mpr/mpr_sas.c136
-rw-r--r--sys/dev/mpr/mpr_sas.h2
-rw-r--r--sys/dev/mpr/mpr_sas_lsi.c61
-rw-r--r--sys/dev/mpr/mpr_table.c5
-rw-r--r--sys/dev/mpr/mpr_user.c59
-rw-r--r--sys/dev/mpr/mprvar.h26
-rw-r--r--sys/dev/pccbb/pccbb_pci.c2
-rw-r--r--sys/dev/wbwd/wbwd.c2
-rw-r--r--sys/dev/wtap/if_wtap.c2
-rw-r--r--sys/dev/wtap/if_wtap_module.c4
-rw-r--r--sys/dev/wtap/plugins/visibility.c2
-rw-r--r--sys/fs/nfsclient/nfs_clport.c23
-rw-r--r--sys/fs/nfsclient/nfs_clvnops.c33
-rw-r--r--sys/kern/uipc_syscalls.c3
-rw-r--r--sys/kern/vfs_hash.c36
-rw-r--r--sys/netinet/tcp_syncache.c23
-rw-r--r--sys/sys/ata.h4
-rw-r--r--sys/sys/buf.h2
-rw-r--r--sys/sys/buf_ring.h4
-rw-r--r--sys/sys/iconv.h2
-rw-r--r--sys/sys/imgact_binmisc.h2
-rw-r--r--sys/sys/imgact_elf.h2
-rw-r--r--sys/sys/ipc.h2
-rw-r--r--sys/sys/ipmi.h2
-rw-r--r--sys/sys/linker.h2
-rw-r--r--sys/sys/memrange.h2
-rw-r--r--sys/sys/param.h2
-rw-r--r--sys/sys/pmc.h4
-rw-r--r--sys/sys/priority.h2
-rw-r--r--sys/sys/priv.h2
-rw-r--r--sys/sys/proc.h2
-rw-r--r--sys/sys/procctl.h2
-rw-r--r--sys/sys/shm.h2
-rw-r--r--sys/sys/sockio.h2
-rw-r--r--sys/sys/soundcard.h4
-rw-r--r--sys/sys/sx.h2
-rw-r--r--sys/sys/sysctl.h4
-rw-r--r--sys/sys/user.h2
-rw-r--r--sys/sys/vnode.h8
89 files changed, 1206 insertions, 578 deletions
diff --git a/sys/amd64/amd64/initcpu.c b/sys/amd64/amd64/initcpu.c
index 36f2d0f..8868cd3 100644
--- a/sys/amd64/amd64/initcpu.c
+++ b/sys/amd64/amd64/initcpu.c
@@ -89,6 +89,7 @@ SYSCTL_UINT(_hw, OID_AUTO, via_feature_xcrypt, CTLFLAG_RD,
static void
init_amd(void)
{
+ uint64_t msr;
/*
* Work around Erratum 721 for Family 10h and 12h processors.
@@ -111,6 +112,19 @@ init_amd(void)
wrmsr(0xc0011029, rdmsr(0xc0011029) | 1);
break;
}
+
+ /*
+ * BIOS may fail to set InitApicIdCpuIdLo to 1 as it should per BKDG.
+ * So, do it here or otherwise some tools could be confused by
+ * Initial Local APIC ID reported with CPUID Function 1 in EBX.
+ */
+ if (CPUID_TO_FAMILY(cpu_id) == 0x10) {
+ if ((cpu_feature2 & CPUID2_HV) == 0) {
+ msr = rdmsr(MSR_NB_CFG1);
+ msr |= (uint64_t)1 << 54;
+ wrmsr(MSR_NB_CFG1, msr);
+ }
+ }
}
/*
diff --git a/sys/amd64/include/pmap.h b/sys/amd64/include/pmap.h
index ebf32c6..2096e12 100644
--- a/sys/amd64/include/pmap.h
+++ b/sys/amd64/include/pmap.h
@@ -280,9 +280,13 @@ extern pt_entry_t pg_nx;
struct pv_entry;
struct pv_chunk;
+/*
+ * Locks
+ * (p) PV list lock
+ */
struct md_page {
- TAILQ_HEAD(,pv_entry) pv_list;
- int pv_gen;
+ TAILQ_HEAD(, pv_entry) pv_list; /* (p) */
+ int pv_gen; /* (p) */
int pat_mode;
};
diff --git a/sys/cam/scsi/scsi_all.c b/sys/cam/scsi/scsi_all.c
index 3a073ee..12be402 100644
--- a/sys/cam/scsi/scsi_all.c
+++ b/sys/cam/scsi/scsi_all.c
@@ -5626,6 +5626,19 @@ scsi_devid_is_lun_name(uint8_t *bufp)
return 1;
}
+int
+scsi_devid_is_port_naa(uint8_t *bufp)
+{
+ struct scsi_vpd_id_descriptor *descr;
+
+ descr = (struct scsi_vpd_id_descriptor *)bufp;
+ if ((descr->id_type & SVPD_ID_ASSOC_MASK) != SVPD_ID_ASSOC_PORT)
+ return 0;
+ if ((descr->id_type & SVPD_ID_TYPE_MASK) != SVPD_ID_TYPE_NAA)
+ return 0;
+ return 1;
+}
+
struct scsi_vpd_id_descriptor *
scsi_get_devid_desc(struct scsi_vpd_id_descriptor *desc, uint32_t len,
scsi_devid_checkfn_t ck_fn)
diff --git a/sys/cam/scsi/scsi_all.h b/sys/cam/scsi/scsi_all.h
index 615a42a..b394eea 100644
--- a/sys/cam/scsi/scsi_all.h
+++ b/sys/cam/scsi/scsi_all.h
@@ -3659,6 +3659,7 @@ int scsi_devid_is_lun_eui64(uint8_t *bufp);
int scsi_devid_is_lun_naa(uint8_t *bufp);
int scsi_devid_is_lun_name(uint8_t *bufp);
int scsi_devid_is_lun_t10(uint8_t *bufp);
+int scsi_devid_is_port_naa(uint8_t *bufp);
struct scsi_vpd_id_descriptor *
scsi_get_devid(struct scsi_vpd_device_id *id, uint32_t len,
scsi_devid_checkfn_t ck_fn);
diff --git a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/arc.c b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/arc.c
index 6d99a79..226233e 100644
--- a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/arc.c
+++ b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/arc.c
@@ -565,6 +565,7 @@ typedef struct arc_stats {
kstat_named_t arcstat_l2_compress_successes;
kstat_named_t arcstat_l2_compress_zeros;
kstat_named_t arcstat_l2_compress_failures;
+ kstat_named_t arcstat_l2_padding_needed;
kstat_named_t arcstat_l2_write_trylock_fail;
kstat_named_t arcstat_l2_write_passed_headroom;
kstat_named_t arcstat_l2_write_spa_mismatch;
@@ -666,6 +667,7 @@ static arc_stats_t arc_stats = {
{ "l2_compress_successes", KSTAT_DATA_UINT64 },
{ "l2_compress_zeros", KSTAT_DATA_UINT64 },
{ "l2_compress_failures", KSTAT_DATA_UINT64 },
+ { "l2_padding_needed", KSTAT_DATA_UINT64 },
{ "l2_write_trylock_fail", KSTAT_DATA_UINT64 },
{ "l2_write_passed_headroom", KSTAT_DATA_UINT64 },
{ "l2_write_spa_mismatch", KSTAT_DATA_UINT64 },
@@ -839,7 +841,7 @@ typedef struct l1arc_buf_hdr {
refcount_t b_refcnt;
arc_callback_t *b_acb;
- /* temporary buffer holder for in-flight compressed data */
+ /* temporary buffer holder for in-flight compressed or padded data */
void *b_tmp_cdata;
} l1arc_buf_hdr_t;
@@ -1100,6 +1102,7 @@ typedef struct l2arc_read_callback {
zbookmark_phys_t l2rcb_zb; /* original bookmark */
int l2rcb_flags; /* original flags */
enum zio_compress l2rcb_compress; /* applied compress */
+ void *l2rcb_data; /* temporary buffer */
} l2arc_read_callback_t;
typedef struct l2arc_write_callback {
@@ -1130,7 +1133,7 @@ static uint32_t arc_bufc_to_flags(arc_buf_contents_t);
static boolean_t l2arc_write_eligible(uint64_t, arc_buf_hdr_t *);
static void l2arc_read_done(zio_t *);
-static boolean_t l2arc_compress_buf(arc_buf_hdr_t *);
+static boolean_t l2arc_transform_buf(arc_buf_hdr_t *, boolean_t);
static void l2arc_decompress_zio(zio_t *, arc_buf_hdr_t *, enum zio_compress);
static void l2arc_release_cdata_buf(arc_buf_hdr_t *);
@@ -2217,6 +2220,8 @@ arc_buf_data_free(arc_buf_t *buf, void (*free_func)(void *, size_t))
static void
arc_buf_l2_cdata_free(arc_buf_hdr_t *hdr)
{
+ size_t align, asize, len;
+
ASSERT(HDR_HAS_L2HDR(hdr));
ASSERT(MUTEX_HELD(&hdr->b_l2hdr.b_dev->l2ad_mtx));
@@ -2238,16 +2243,15 @@ arc_buf_l2_cdata_free(arc_buf_hdr_t *hdr)
}
/*
- * The header does not have compression enabled. This can be due
- * to the buffer not being compressible, or because we're
- * freeing the buffer before the second phase of
- * l2arc_write_buffer() has started (which does the compression
- * step). In either case, b_tmp_cdata does not point to a
- * separately compressed buffer, so there's nothing to free (it
- * points to the same buffer as the arc_buf_t's b_data field).
+ * The bufer has been chosen for writing to L2ARC, but it's
+ * not being written just yet. In other words,
+ * b_tmp_cdata points to exactly the same buffer as b_data,
+ * l2arc_transform_buf hasn't been called.
*/
- if (hdr->b_l2hdr.b_compress == ZIO_COMPRESS_OFF) {
- hdr->b_l1hdr.b_tmp_cdata = NULL;
+ if (hdr->b_l2hdr.b_daddr == L2ARC_ADDR_UNSET) {
+ ASSERT3P(hdr->b_l1hdr.b_tmp_cdata, ==,
+ hdr->b_l1hdr.b_buf->b_data);
+ ASSERT3U(hdr->b_l2hdr.b_compress, ==, ZIO_COMPRESS_OFF);
return;
}
@@ -2260,12 +2264,18 @@ arc_buf_l2_cdata_free(arc_buf_hdr_t *hdr)
return;
}
- ASSERT(L2ARC_IS_VALID_COMPRESS(hdr->b_l2hdr.b_compress));
-
- arc_buf_free_on_write(hdr->b_l1hdr.b_tmp_cdata,
- hdr->b_size, zio_data_buf_free);
+ /*
+ * Nothing to do if the temporary buffer was not required.
+ */
+ if (hdr->b_l1hdr.b_tmp_cdata == NULL)
+ return;
ARCSTAT_BUMP(arcstat_l2_cdata_free_on_write);
+ len = hdr->b_size;
+ align = (size_t)1 << hdr->b_l2hdr.b_dev->l2ad_vdev->vdev_ashift;
+ asize = P2ROUNDUP(len, align);
+ arc_buf_free_on_write(hdr->b_l1hdr.b_tmp_cdata, asize,
+ zio_data_buf_free);
hdr->b_l1hdr.b_tmp_cdata = NULL;
}
@@ -4528,6 +4538,7 @@ top:
!HDR_L2_WRITING(hdr) && !HDR_L2_EVICTED(hdr) &&
!(l2arc_noprefetch && HDR_PREFETCH(hdr))) {
l2arc_read_callback_t *cb;
+ void* b_data;
DTRACE_PROBE1(l2arc__hit, arc_buf_hdr_t *, hdr);
ARCSTAT_BUMP(arcstat_l2_hits);
@@ -4540,6 +4551,14 @@ top:
cb->l2rcb_zb = *zb;
cb->l2rcb_flags = zio_flags;
cb->l2rcb_compress = b_compress;
+ if (b_asize > hdr->b_size) {
+ ASSERT3U(b_compress, ==,
+ ZIO_COMPRESS_OFF);
+ b_data = zio_data_buf_alloc(b_asize);
+ cb->l2rcb_data = b_data;
+ } else {
+ b_data = buf->b_data;
+ }
ASSERT(addr >= VDEV_LABEL_START_SIZE &&
addr + size < vd->vdev_psize -
@@ -4552,6 +4571,7 @@ top:
* was squashed to zero size by compression.
*/
if (b_compress == ZIO_COMPRESS_EMPTY) {
+ ASSERT3U(b_asize, ==, 0);
rzio = zio_null(pio, spa, vd,
l2arc_read_done, cb,
zio_flags | ZIO_FLAG_DONT_CACHE |
@@ -4560,7 +4580,7 @@ top:
ZIO_FLAG_DONT_RETRY);
} else {
rzio = zio_read_phys(pio, vd, addr,
- b_asize, buf->b_data,
+ b_asize, b_data,
ZIO_CHECKSUM_OFF,
l2arc_read_done, cb, priority,
zio_flags | ZIO_FLAG_DONT_CACHE |
@@ -6045,6 +6065,32 @@ l2arc_read_done(zio_t *zio)
ASSERT3P(hash_lock, ==, HDR_LOCK(hdr));
/*
+ * If the data was read into a temporary buffer,
+ * move it and free the buffer.
+ */
+ if (cb->l2rcb_data != NULL) {
+ ASSERT3U(hdr->b_size, <, zio->io_size);
+ ASSERT3U(cb->l2rcb_compress, ==, ZIO_COMPRESS_OFF);
+ if (zio->io_error == 0)
+ bcopy(cb->l2rcb_data, buf->b_data, hdr->b_size);
+
+ /*
+ * The following must be done regardless of whether
+ * there was an error:
+ * - free the temporary buffer
+ * - point zio to the real ARC buffer
+ * - set zio size accordingly
+ * These are required because zio is either re-used for
+ * an I/O of the block in the case of the error
+ * or the zio is passed to arc_read_done() and it
+ * needs real data.
+ */
+ zio_data_buf_free(cb->l2rcb_data, zio->io_size);
+ zio->io_size = zio->io_orig_size = hdr->b_size;
+ zio->io_data = zio->io_orig_data = buf->b_data;
+ }
+
+ /*
* If the buffer was compressed, decompress it first.
*/
if (cb->l2rcb_compress != ZIO_COMPRESS_OFF)
@@ -6328,6 +6374,7 @@ l2arc_write_buffers(spa_t *spa, l2arc_dev_t *dev, uint64_t target_sz,
kmutex_t *hash_lock;
uint64_t buf_sz;
uint64_t buf_a_sz;
+ size_t align;
if (arc_warm == B_FALSE)
hdr_prev = multilist_sublist_next(mls, hdr);
@@ -6365,7 +6412,8 @@ l2arc_write_buffers(spa_t *spa, l2arc_dev_t *dev, uint64_t target_sz,
* disk block size.
*/
buf_sz = hdr->b_size;
- buf_a_sz = vdev_psize_to_asize(dev->l2ad_vdev, buf_sz);
+ align = (size_t)1 << dev->l2ad_vdev->vdev_ashift;
+ buf_a_sz = P2ROUNDUP(buf_sz, align);
if ((write_asize + buf_a_sz) > target_sz) {
full = B_TRUE;
@@ -6469,26 +6517,15 @@ l2arc_write_buffers(spa_t *spa, l2arc_dev_t *dev, uint64_t target_sz,
mutex_enter(&dev->l2ad_mtx);
/*
- * Note that elsewhere in this file arcstat_l2_asize
- * and the used space on l2ad_vdev are updated using b_asize,
- * which is not necessarily rounded up to the device block size.
- * Too keep accounting consistent we do the same here as well:
- * stats_size accumulates the sum of b_asize of the written buffers,
- * while write_asize accumulates the sum of b_asize rounded up
- * to the device block size.
- * The latter sum is used only to validate the corectness of the code.
- */
- uint64_t stats_size = 0;
- write_asize = 0;
-
- /*
* Now start writing the buffers. We're starting at the write head
* and work backwards, retracing the course of the buffer selector
* loop above.
*/
+ write_asize = 0;
for (hdr = list_prev(&dev->l2ad_buflist, head); hdr;
hdr = list_prev(&dev->l2ad_buflist, hdr)) {
uint64_t buf_sz;
+ boolean_t compress;
/*
* We rely on the L1 portion of the header below, so
@@ -6507,22 +6544,26 @@ l2arc_write_buffers(spa_t *spa, l2arc_dev_t *dev, uint64_t target_sz,
*/
hdr->b_l2hdr.b_daddr = dev->l2ad_hand;
- if ((HDR_L2COMPRESS(hdr)) &&
- hdr->b_l2hdr.b_asize >= buf_compress_minsz) {
- if (l2arc_compress_buf(hdr)) {
- /*
- * If compression succeeded, enable headroom
- * boost on the next scan cycle.
- */
- *headroom_boost = B_TRUE;
- }
+ /*
+ * Save a pointer to the original buffer data we had previously
+ * stashed away.
+ */
+ buf_data = hdr->b_l1hdr.b_tmp_cdata;
+
+ compress = HDR_L2COMPRESS(hdr) &&
+ hdr->b_l2hdr.b_asize >= buf_compress_minsz;
+ if (l2arc_transform_buf(hdr, compress)) {
+ /*
+ * If compression succeeded, enable headroom
+ * boost on the next scan cycle.
+ */
+ *headroom_boost = B_TRUE;
}
/*
- * Pick up the buffer data we had previously stashed away
- * (and now potentially also compressed).
+ * Get the new buffer size that accounts for compression
+ * and padding.
*/
- buf_data = hdr->b_l1hdr.b_tmp_cdata;
buf_sz = hdr->b_l2hdr.b_asize;
/*
@@ -6534,8 +6575,12 @@ l2arc_write_buffers(spa_t *spa, l2arc_dev_t *dev, uint64_t target_sz,
/* Compression may have squashed the buffer to zero length. */
if (buf_sz != 0) {
- uint64_t buf_a_sz;
-
+ /*
+ * If the data was padded or compressed, then it
+ * it is in a new buffer.
+ */
+ if (hdr->b_l1hdr.b_tmp_cdata != NULL)
+ buf_data = hdr->b_l1hdr.b_tmp_cdata;
wzio = zio_write_phys(pio, dev->l2ad_vdev,
dev->l2ad_hand, buf_sz, buf_data, ZIO_CHECKSUM_OFF,
NULL, NULL, ZIO_PRIORITY_ASYNC_WRITE,
@@ -6545,14 +6590,8 @@ l2arc_write_buffers(spa_t *spa, l2arc_dev_t *dev, uint64_t target_sz,
zio_t *, wzio);
(void) zio_nowait(wzio);
- stats_size += buf_sz;
-
- /*
- * Keep the clock hand suitably device-aligned.
- */
- buf_a_sz = vdev_psize_to_asize(dev->l2ad_vdev, buf_sz);
- write_asize += buf_a_sz;
- dev->l2ad_hand += buf_a_sz;
+ write_asize += buf_sz;
+ dev->l2ad_hand += buf_sz;
}
}
@@ -6562,8 +6601,8 @@ l2arc_write_buffers(spa_t *spa, l2arc_dev_t *dev, uint64_t target_sz,
ARCSTAT_BUMP(arcstat_l2_writes_sent);
ARCSTAT_INCR(arcstat_l2_write_bytes, write_asize);
ARCSTAT_INCR(arcstat_l2_size, write_sz);
- ARCSTAT_INCR(arcstat_l2_asize, stats_size);
- vdev_space_update(dev->l2ad_vdev, stats_size, 0, 0);
+ ARCSTAT_INCR(arcstat_l2_asize, write_asize);
+ vdev_space_update(dev->l2ad_vdev, write_asize, 0, 0);
/*
* Bump device hand to the device start if it is approaching the end.
@@ -6582,12 +6621,18 @@ l2arc_write_buffers(spa_t *spa, l2arc_dev_t *dev, uint64_t target_sz,
}
/*
- * Compresses an L2ARC buffer.
+ * Transforms, possibly compresses and pads, an L2ARC buffer.
* The data to be compressed must be prefilled in l1hdr.b_tmp_cdata and its
* size in l2hdr->b_asize. This routine tries to compress the data and
* depending on the compression result there are three possible outcomes:
- * *) The buffer was incompressible. The original l2hdr contents were left
- * untouched and are ready for writing to an L2 device.
+ * *) The buffer was incompressible. The buffer size was already ashift aligned.
+ * The original hdr contents were left untouched except for b_tmp_cdata,
+ * which is reset to NULL. The caller must keep a pointer to the original
+ * data.
+ * *) The buffer was incompressible. The buffer size was not ashift aligned.
+ * b_tmp_cdata was replaced with a temporary data buffer which holds a padded
+ * (aligned) copy of the data. Once writing is done, invoke
+ * l2arc_release_cdata_buf on this hdr to free the temporary buffer.
* *) The buffer was all-zeros, so there is no need to write it to an L2
* device. To indicate this situation b_tmp_cdata is NULL'ed, b_asize is
* set to zero and b_compress is set to ZIO_COMPRESS_EMPTY.
@@ -6601,10 +6646,11 @@ l2arc_write_buffers(spa_t *spa, l2arc_dev_t *dev, uint64_t target_sz,
* buffer was incompressible).
*/
static boolean_t
-l2arc_compress_buf(arc_buf_hdr_t *hdr)
+l2arc_transform_buf(arc_buf_hdr_t *hdr, boolean_t compress)
{
void *cdata;
- size_t csize, len, rounded;
+ size_t align, asize, csize, len, rounded;
+
ASSERT(HDR_HAS_L2HDR(hdr));
l2arc_buf_hdr_t *l2hdr = &hdr->b_l2hdr;
@@ -6613,14 +6659,19 @@ l2arc_compress_buf(arc_buf_hdr_t *hdr)
ASSERT(hdr->b_l1hdr.b_tmp_cdata != NULL);
len = l2hdr->b_asize;
- cdata = zio_data_buf_alloc(len);
+ align = (size_t)1 << l2hdr->b_dev->l2ad_vdev->vdev_ashift;
+ asize = P2ROUNDUP(len, align);
+ cdata = zio_data_buf_alloc(asize);
ASSERT3P(cdata, !=, NULL);
- csize = zio_compress_data(ZIO_COMPRESS_LZ4, hdr->b_l1hdr.b_tmp_cdata,
- cdata, l2hdr->b_asize);
+ if (compress)
+ csize = zio_compress_data(ZIO_COMPRESS_LZ4,
+ hdr->b_l1hdr.b_tmp_cdata, cdata, len);
+ else
+ csize = len;
if (csize == 0) {
/* zero block, indicate that there's nothing to write */
- zio_data_buf_free(cdata, len);
+ zio_data_buf_free(cdata, asize);
l2hdr->b_compress = ZIO_COMPRESS_EMPTY;
l2hdr->b_asize = 0;
hdr->b_l1hdr.b_tmp_cdata = NULL;
@@ -6628,8 +6679,8 @@ l2arc_compress_buf(arc_buf_hdr_t *hdr)
return (B_TRUE);
}
- rounded = P2ROUNDUP(csize,
- (size_t)1 << l2hdr->b_dev->l2ad_vdev->vdev_ashift);
+ rounded = P2ROUNDUP(csize, align);
+ ASSERT3U(rounded, <=, asize);
if (rounded < len) {
/*
* Compression succeeded, we'll keep the cdata around for
@@ -6646,11 +6697,32 @@ l2arc_compress_buf(arc_buf_hdr_t *hdr)
return (B_TRUE);
} else {
/*
- * Compression failed, release the compressed buffer.
- * l2hdr will be left unmodified.
+ * Compression did not save space.
*/
- zio_data_buf_free(cdata, len);
- ARCSTAT_BUMP(arcstat_l2_compress_failures);
+ if (P2PHASE(len, align) != 0) {
+ /*
+ * Use compression buffer for a copy of data padded to
+ * the proper size. Compression algorithm remains set
+ * to ZIO_COMPRESS_OFF.
+ */
+ ASSERT3U(len, <, asize);
+ bcopy(hdr->b_l1hdr.b_tmp_cdata, cdata, len);
+ bzero((char *)cdata + len, asize - len);
+ l2hdr->b_asize = asize;
+ hdr->b_l1hdr.b_tmp_cdata = cdata;
+ ARCSTAT_BUMP(arcstat_l2_padding_needed);
+ } else {
+ ASSERT3U(len, ==, asize);
+ /*
+ * The original buffer is good as is,
+ * release the compressed buffer.
+ * l2hdr will be left unmodified except for b_tmp_cdata.
+ */
+ zio_data_buf_free(cdata, asize);
+ hdr->b_l1hdr.b_tmp_cdata = NULL;
+ }
+ if (compress)
+ ARCSTAT_BUMP(arcstat_l2_compress_failures);
return (B_FALSE);
}
}
@@ -6719,44 +6791,30 @@ l2arc_decompress_zio(zio_t *zio, arc_buf_hdr_t *hdr, enum zio_compress c)
/*
* Releases the temporary b_tmp_cdata buffer in an l2arc header structure.
- * This buffer serves as a temporary holder of compressed data while
+ * This buffer serves as a temporary holder of compressed or padded data while
* the buffer entry is being written to an l2arc device. Once that is
* done, we can dispose of it.
*/
static void
l2arc_release_cdata_buf(arc_buf_hdr_t *hdr)
{
- ASSERT(HDR_HAS_L2HDR(hdr));
+ size_t align, asize, len;
enum zio_compress comp = hdr->b_l2hdr.b_compress;
+ ASSERT(HDR_HAS_L2HDR(hdr));
ASSERT(HDR_HAS_L1HDR(hdr));
ASSERT(comp == ZIO_COMPRESS_OFF || L2ARC_IS_VALID_COMPRESS(comp));
- if (comp == ZIO_COMPRESS_OFF) {
- /*
- * In this case, b_tmp_cdata points to the same buffer
- * as the arc_buf_t's b_data field. We don't want to
- * free it, since the arc_buf_t will handle that.
- */
+ if (hdr->b_l1hdr.b_tmp_cdata != NULL) {
+ ASSERT(comp != ZIO_COMPRESS_EMPTY);
+ len = hdr->b_size;
+ align = (size_t)1 << hdr->b_l2hdr.b_dev->l2ad_vdev->vdev_ashift;
+ asize = P2ROUNDUP(len, align);
+ zio_data_buf_free(hdr->b_l1hdr.b_tmp_cdata, asize);
hdr->b_l1hdr.b_tmp_cdata = NULL;
- } else if (comp == ZIO_COMPRESS_EMPTY) {
- /*
- * In this case, b_tmp_cdata was compressed to an empty
- * buffer, thus there's nothing to free and b_tmp_cdata
- * should have been set to NULL in l2arc_write_buffers().
- */
- ASSERT3P(hdr->b_l1hdr.b_tmp_cdata, ==, NULL);
} else {
- /*
- * If the data was compressed, then we've allocated a
- * temporary buffer for it, so now we need to release it.
- */
- ASSERT(hdr->b_l1hdr.b_tmp_cdata != NULL);
- zio_data_buf_free(hdr->b_l1hdr.b_tmp_cdata,
- hdr->b_size);
- hdr->b_l1hdr.b_tmp_cdata = NULL;
+ ASSERT(comp == ZIO_COMPRESS_OFF || comp == ZIO_COMPRESS_EMPTY);
}
-
}
/*
diff --git a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/vdev_geom.c b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/vdev_geom.c
index 3748614..0ac5fb7 100644
--- a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/vdev_geom.c
+++ b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/vdev_geom.c
@@ -241,9 +241,6 @@ vdev_geom_attach(struct g_provider *pp, vdev_t *vd)
cp->private = vd;
vd->vdev_tsd = cp;
- /* Fetch initial physical path information for this device. */
- vdev_geom_attrchanged(cp, "GEOM::physpath");
-
cp->flags |= G_CF_DIRECT_SEND | G_CF_DIRECT_RECEIVE;
return (cp);
}
@@ -796,6 +793,10 @@ vdev_geom_open(vdev_t *vd, uint64_t *psize, uint64_t *max_psize,
}
}
+ /* Fetch initial physical path information for this device. */
+ if (cp != NULL)
+ vdev_geom_attrchanged(cp, "GEOM::physpath");
+
g_topology_unlock();
PICKUP_GIANT();
if (cp == NULL) {
diff --git a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_znode.c b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_znode.c
index 964b453..431a05d 100644
--- a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_znode.c
+++ b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_znode.c
@@ -1341,7 +1341,7 @@ zfs_rezget(znode_t *zp)
* recycled when the last vnode reference is dropped.
*/
vp = ZTOV(zp);
- if (vp != NULL && vp->v_type != IFTOVT((mode_t)zp->z_mode)) {
+ if (vp->v_type != IFTOVT((mode_t)zp->z_mode)) {
zfs_znode_dmu_fini(zp);
ZFS_OBJ_HOLD_EXIT(zfsvfs, obj_num);
return (EIO);
@@ -1349,11 +1349,9 @@ zfs_rezget(znode_t *zp)
zp->z_unlinked = (zp->z_links == 0);
zp->z_blksz = doi.doi_data_block_size;
- if (vp != NULL) {
- vn_pages_remove(vp, 0, 0);
- if (zp->z_size != size)
- vnode_pager_setsize(vp, zp->z_size);
- }
+ vn_pages_remove(vp, 0, 0);
+ if (zp->z_size != size)
+ vnode_pager_setsize(vp, zp->z_size);
ZFS_OBJ_HOLD_EXIT(zfsvfs, obj_num);
diff --git a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zio.c b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zio.c
index b089ce1..616aa79 100644
--- a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zio.c
+++ b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zio.c
@@ -2810,11 +2810,13 @@ zio_vdev_io_start(zio_t *zio)
ASSERT0(P2PHASE(zio->io_size, align));
} else {
/*
- * For physical writes, we allow 512b aligned writes and assume
- * the device will perform a read-modify-write as necessary.
+ * For the physical io we allow alignment
+ * to a logical block size.
*/
- ASSERT0(P2PHASE(zio->io_offset, SPA_MINBLOCKSIZE));
- ASSERT0(P2PHASE(zio->io_size, SPA_MINBLOCKSIZE));
+ uint64_t log_align =
+ 1ULL << vd->vdev_top->vdev_logical_ashift;
+ ASSERT0(P2PHASE(zio->io_offset, log_align));
+ ASSERT0(P2PHASE(zio->io_size, log_align));
}
VERIFY(zio->io_type == ZIO_TYPE_READ || spa_writeable(spa));
diff --git a/sys/cddl/contrib/opensolaris/uts/common/sys/fs/zfs.h b/sys/cddl/contrib/opensolaris/uts/common/sys/fs/zfs.h
index 7c25ddd..de94fe7 100644
--- a/sys/cddl/contrib/opensolaris/uts/common/sys/fs/zfs.h
+++ b/sys/cddl/contrib/opensolaris/uts/common/sys/fs/zfs.h
@@ -57,6 +57,10 @@ typedef enum {
ZFS_TYPE_BOOKMARK = (1 << 4)
} zfs_type_t;
+/*
+ * NB: lzc_dataset_type should be updated whenever a new objset type is added,
+ * if it represents a real type of a dataset that can be created from userland.
+ */
typedef enum dmu_objset_type {
DMU_OST_NONE,
DMU_OST_META,
diff --git a/sys/cddl/dev/dtrace/x86/dis_tables.c b/sys/cddl/dev/dtrace/x86/dis_tables.c
index aabbf71..184d4f7 100644
--- a/sys/cddl/dev/dtrace/x86/dis_tables.c
+++ b/sys/cddl/dev/dtrace/x86/dis_tables.c
@@ -1182,7 +1182,7 @@ const instable_t dis_op0F38[256] = {
/* [78] */ INVALID, INVALID, INVALID, INVALID,
/* [7C] */ INVALID, INVALID, INVALID, INVALID,
-/* [80] */ TNSy("invept", RM_66r), TNSy("invvpid", RM_66r),INVALID, INVALID,
+/* [80] */ TNSy("invept", RM_66r), TNSy("invvpid", RM_66r),TNSy("invpcid", RM_66r),INVALID,
/* [84] */ INVALID, INVALID, INVALID, INVALID,
/* [88] */ INVALID, INVALID, INVALID, INVALID,
/* [8C] */ INVALID, INVALID, INVALID, INVALID,
@@ -1931,7 +1931,7 @@ const instable_t dis_distable[16][16] = {
/* [9,0] */ TNS("nop",NORM), TS("xchg",RA), TS("xchg",RA), TS("xchg",RA),
/* [9,4] */ TS("xchg",RA), TS("xchg",RA), TS("xchg",RA), TS("xchg",RA),
/* [9,8] */ TNS("cXtX",CBW), TNS("cXtX",CWD), TNSx("lcall",SO), TNS("fwait",NORM),
-/* [9,C] */ TSZy("pushf",IMPLMEM,4),TSZy("popf",IMPLMEM,4), TNSx("sahf",NORM), TNSx("lahf",NORM),
+/* [9,C] */ TSZy("pushf",IMPLMEM,4),TSZy("popf",IMPLMEM,4), TNS("sahf",NORM), TNS("lahf",NORM),
}, {
/* [A,0] */ TNS("movb",OA), TS("mov",OA), TNS("movb",AO), TS("mov",AO),
/* [A,4] */ TNSZ("movsb",SD,1), TS("movs",SD), TNSZ("cmpsb",SD,1), TS("cmps",SD),
diff --git a/sys/dev/aic7xxx/aic79xx.c b/sys/dev/aic7xxx/aic79xx.c
index c403c09..347d8ef 100644
--- a/sys/dev/aic7xxx/aic79xx.c
+++ b/sys/dev/aic7xxx/aic79xx.c
@@ -1209,7 +1209,7 @@ ahd_handle_seqint(struct ahd_softc *ahd, u_int intstat)
* that requires host assistance for completion.
* While handling the message phase(s), we will be
* notified by the sequencer after each byte is
- * transfered so we can track bus phase changes.
+ * transferred so we can track bus phase changes.
*
* If this is the first time we've seen a HOST_MSG_LOOP
* interrupt, initialize the state of the host message
@@ -1623,7 +1623,7 @@ ahd_handle_scsiint(struct ahd_softc *ahd, u_int intstat)
/*
* Although the driver does not care about the
* 'Selection in Progress' status bit, the busy
- * LED does. SELINGO is only cleared by a sucessfull
+ * LED does. SELINGO is only cleared by a successful
* selection, so we must manually clear it to insure
* the LED turns off just incase no future successful
* selections occur (e.g. no devices on the bus).
@@ -2699,7 +2699,7 @@ ahd_clear_critical_section(struct ahd_softc *ahd)
ahd_outb(ahd, SEQCTL0, ahd_inb(ahd, SEQCTL0) & ~STEP);
ahd_outb(ahd, SIMODE1, simode1);
/*
- * SCSIINT seems to glitch occassionally when
+ * SCSIINT seems to glitch occasionally when
* the interrupt masks are restored. Clear SCSIINT
* one more time so that only persistent errors
* are seen as a real interrupt.
@@ -3029,7 +3029,7 @@ ahd_validate_width(struct ahd_softc *ahd, struct ahd_initiator_tinfo *tinfo,
/*
* Update the bitmask of targets for which the controller should
- * negotiate with at the next convenient oportunity. This currently
+ * negotiate with at the next convenient opportunity. This currently
* means the next time we send the initial identify messages for
* a new transaction.
*/
@@ -3380,7 +3380,7 @@ ahd_update_neg_table(struct ahd_softc *ahd, struct ahd_devinfo *devinfo,
/*
* During packetized transfers, the target will
- * give us the oportunity to send command packets
+ * give us the opportunity to send command packets
* without us asserting attention.
*/
if ((tinfo->ppr_options & MSG_EXT_PPR_IU_REQ) == 0)
@@ -4845,7 +4845,7 @@ ahd_handle_msg_reject(struct ahd_softc *ahd, struct ahd_devinfo *devinfo)
/*
* Requeue all tagged commands for this target
- * currently in our posession so they can be
+ * currently in our possession so they can be
* converted to untagged commands.
*/
ahd_search_qinfifo(ahd, SCB_GET_TARGET(ahd, scb),
@@ -5498,7 +5498,7 @@ ahd_shutdown(void *arg)
/*
* Reset the controller and record some information about it
* that is only available just after a reset. If "reinit" is
- * non-zero, this reset occured after initial configuration
+ * non-zero, this reset occurred after initial configuration
* and the caller requests that the chip be fully reinitialized
* to a runable state. Chip interrupts are *not* enabled after
* a reinitialization. The caller must enable interrupts via
@@ -5751,7 +5751,7 @@ ahd_init_scbdata(struct ahd_softc *ahd)
}
/*
- * Note that we were successfull
+ * Note that we were successful
*/
return (0);
@@ -8794,7 +8794,7 @@ ahd_check_patch(struct ahd_softc *ahd, struct patch **start_patch,
cur_patch += cur_patch->skip_patch;
} else {
/* Accepted this patch. Advance to the next
- * one and wait for our intruction pointer to
+ * one and wait for our instruction pointer to
* hit this point.
*/
cur_patch++;
@@ -9673,7 +9673,7 @@ ahd_write_seeprom(struct ahd_softc *ahd, uint16_t *buf,
return (error);
/*
- * Write the data. If we don't get throught the loop at
+ * Write the data. If we don't get through the loop at
* least once, the arguments were invalid.
*/
retval = EINVAL;
diff --git a/sys/dev/aic7xxx/aic79xx.h b/sys/dev/aic7xxx/aic79xx.h
index f59d774..93811ef 100644
--- a/sys/dev/aic7xxx/aic79xx.h
+++ b/sys/dev/aic7xxx/aic79xx.h
@@ -478,7 +478,7 @@ struct hardware_scb {
* each S/G element is expired, its datacnt field is checked to see
* if the LAST_SEG flag is set. If so, SG_LIST_NULL is set in the
* residual sg ptr and the transfer is considered complete. If the
- * sequencer determines that there is a residual in the tranfer, or
+ * sequencer determines that there is a residual in the transfer, or
* there is non-zero status, it will set the SG_STATUS_VALID flag in
* sgptr and dma the scb back into host memory. To sumarize:
*
@@ -486,7 +486,7 @@ struct hardware_scb {
* o A residual has occurred if SG_FULL_RESID is set in sgptr,
* or residual_sgptr does not have SG_LIST_NULL set.
*
- * o We are transfering the last segment if residual_datacnt has
+ * o We are transferring the last segment if residual_datacnt has
* the SG_LAST_SEG flag set.
*
* Host:
@@ -529,7 +529,7 @@ struct hardware_scb {
*/
/*
- * Definition of a scatter/gather element as transfered to the controller.
+ * Definition of a scatter/gather element as transferred to the controller.
* The aic7xxx chips only support a 24bit length. We use the top byte of
* the length to store additional address bits and a flag to indicate
* that a given segment terminates the transfer. This gives us an
diff --git a/sys/dev/aic7xxx/aic79xx.reg b/sys/dev/aic7xxx/aic79xx.reg
index 86a86a9..96242fd 100644
--- a/sys/dev/aic7xxx/aic79xx.reg
+++ b/sys/dev/aic7xxx/aic79xx.reg
@@ -283,7 +283,7 @@ register HS_MAILBOX {
}
/*
- * Sequencer Interupt Status
+ * Sequencer Interrupt Status
*/
register SEQINTSTAT {
address 0x00C
@@ -643,7 +643,7 @@ register DCHRXMSG0 {
}
/*
- * CMC Recieve Message 0
+ * CMC Receive Message 0
*/
register CMCRXMSG0 {
address 0x090
@@ -654,7 +654,7 @@ register CMCRXMSG0 {
}
/*
- * Overlay Recieve Message 0
+ * Overlay Receive Message 0
*/
register OVLYRXMSG0 {
address 0x090
@@ -690,7 +690,7 @@ register DCHRXMSG1 {
}
/*
- * CMC Recieve Message 1
+ * CMC Receive Message 1
*/
register CMCRXMSG1 {
address 0x091
@@ -700,7 +700,7 @@ register CMCRXMSG1 {
}
/*
- * Overlay Recieve Message 1
+ * Overlay Receive Message 1
*/
register OVLYRXMSG1 {
address 0x091
@@ -735,7 +735,7 @@ register DCHRXMSG2 {
}
/*
- * CMC Recieve Message 2
+ * CMC Receive Message 2
*/
register CMCRXMSG2 {
address 0x092
@@ -745,7 +745,7 @@ register CMCRXMSG2 {
}
/*
- * Overlay Recieve Message 2
+ * Overlay Receive Message 2
*/
register OVLYRXMSG2 {
address 0x092
@@ -774,7 +774,7 @@ register DCHRXMSG3 {
}
/*
- * CMC Recieve Message 3
+ * CMC Receive Message 3
*/
register CMCRXMSG3 {
address 0x093
@@ -784,7 +784,7 @@ register CMCRXMSG3 {
}
/*
- * Overlay Recieve Message 3
+ * Overlay Receive Message 3
*/
register OVLYRXMSG3 {
address 0x093
@@ -1192,7 +1192,7 @@ register TARGPCISTAT {
/*
* LQ Packet In
- * The last LQ Packet recieved
+ * The last LQ Packet received
*/
register LQIN {
address 0x020
@@ -2424,7 +2424,7 @@ register IOPDNCTL {
}
/*
- * Shaddow Host Address.
+ * Shadow Host Address.
*/
register SHADDR {
address 0x060
@@ -3726,7 +3726,7 @@ scratch_ram {
/*
* The maximum amount of time to wait, when interrupt coalescing
- * is enabled, before issueing a CMDCMPLT interrupt for a completed
+ * is enabled, before issuing a CMDCMPLT interrupt for a completed
* command.
*/
INT_COALESCING_TIMER {
diff --git a/sys/dev/aic7xxx/aic79xx.seq b/sys/dev/aic7xxx/aic79xx.seq
index 76be089..2ea2b36 100644
--- a/sys/dev/aic7xxx/aic79xx.seq
+++ b/sys/dev/aic7xxx/aic79xx.seq
@@ -217,7 +217,7 @@ BEGIN_CRITICAL;
scbdma_tohost_done:
test CCSCBCTL, CCARREN jz fill_qoutfifo_dmadone;
/*
- * An SCB has been succesfully uploaded to the host.
+ * An SCB has been successfully uploaded to the host.
* If the SCB was uploaded for some reason other than
* bad SCSI status (currently only for underruns), we
* queue the SCB for normal completion. Otherwise, we
@@ -960,7 +960,7 @@ p_status_okay:
* This is done to allow the host to send messages outside of an identify
* sequence while protecting the seqencer from testing the MK_MESSAGE bit
* on an SCB that might not be for the current nexus. (For example, a
- * BDR message in responce to a bad reselection would leave us pointed to
+ * BDR message in response to a bad reselection would leave us pointed to
* an SCB that doesn't have anything to do with the current target).
*
* Otherwise, treat MSG_OUT as a 1 byte message to send (abort, abort tag,
@@ -1507,7 +1507,7 @@ service_fifo:
* If the other FIFO needs loading, then it
* must not have claimed the S/G cache yet
* (SG_CACHE_AVAIL would have been cleared in
- * the orginal FIFO mode and we test this above).
+ * the original FIFO mode and we test this above).
* Return to the idle loop so we can process the
* FIFO not currently on the bus first.
*/
@@ -1551,7 +1551,7 @@ idle_sg_avail:
test DFSTATUS, PRELOAD_AVAIL jz return;
/*
* On the A, preloading a segment before HDMAENACK
- * comes true can clobber the shaddow address of the
+ * comes true can clobber the shadow address of the
* first segment in the S/G FIFO. Wait until it is
* safe to proceed.
*/
@@ -2004,10 +2004,10 @@ pkt_handle_xfer:
* Defer handling of this NONPACKREQ until we
* can be sure it pertains to this FIFO. SAVEPTRS
* will not be asserted if the NONPACKREQ is for us,
- * so we must simulate it if shaddow is valid. If
- * shaddow is not valid, keep running this FIFO until we
+ * so we must simulate it if shadow is valid. If
+ * shadow is not valid, keep running this FIFO until we
* have satisfied the transfer by loading segments and
- * waiting for either shaddow valid or last_seg_done.
+ * waiting for either shadow valid or last_seg_done.
*/
test MDFFSTAT, SHVALID jnz pkt_saveptrs;
pkt_service_fifo:
@@ -2171,7 +2171,7 @@ pkt_status_check_nonpackreq:
/*
* The unexpected nonpkt phase handler assumes that any
* data channel use will have a FIFO reference count. It
- * turns out that the status handler doesn't need a refernce
+ * turns out that the status handler doesn't need a references
* count since the status received flag, and thus completion
* processing, cannot be set until the handler is finished.
* We increment the count here to make the nonpkt handler
diff --git a/sys/dev/aic7xxx/aic79xx_inline.h b/sys/dev/aic7xxx/aic79xx_inline.h
index 064a5e8..96acb83 100644
--- a/sys/dev/aic7xxx/aic79xx_inline.h
+++ b/sys/dev/aic7xxx/aic79xx_inline.h
@@ -417,7 +417,7 @@ ahd_targetcmd_offset(struct ahd_softc *ahd, u_int index)
- (uint8_t *)ahd->qoutfifo);
}
-/*********************** Miscelaneous Support Functions ***********************/
+/********************** Miscellaneous Support Functions ***********************/
static __inline void ahd_complete_scb(struct ahd_softc *ahd,
struct scb *scb);
static __inline void ahd_update_residual(struct ahd_softc *ahd,
@@ -534,7 +534,7 @@ static __inline void
ahd_outw(struct ahd_softc *ahd, u_int port, u_int value)
{
/*
- * Write low byte first to accomodate registers
+ * Write low byte first to accommodate registers
* such as PRGMCNT where the order maters.
*/
ahd_outb(ahd, port, value & 0xFF);
diff --git a/sys/dev/aic7xxx/aic79xx_pci.c b/sys/dev/aic7xxx/aic79xx_pci.c
index 18ddc00..6099c28 100644
--- a/sys/dev/aic7xxx/aic79xx_pci.c
+++ b/sys/dev/aic7xxx/aic79xx_pci.c
@@ -491,7 +491,7 @@ ahd_pci_test_register_access(struct ahd_softc *ahd)
* Next create a situation where write combining
* or read prefetching could be initiated by the
* CPU or host bridge. Our device does not support
- * either, so look for data corruption and/or flaged
+ * either, so look for data corruption and/or flagged
* PCI errors. First pause without causing another
* chip reset.
*/
@@ -1013,7 +1013,7 @@ ahd_aic790X_setup(struct ahd_softc *ahd)
| AHD_FAINT_LED_BUG;
/*
- * IO Cell paramter setup.
+ * IO Cell parameter setup.
*/
AHD_SET_PRECOMP(ahd, AHD_PRECOMP_CUTBACK_29);
@@ -1034,7 +1034,7 @@ ahd_aic790X_setup(struct ahd_softc *ahd)
| AHD_BUSFREEREV_BUG;
/*
- * IO Cell paramter setup.
+ * IO Cell parameter setup.
*/
AHD_SET_PRECOMP(ahd, AHD_PRECOMP_CUTBACK_29);
AHD_SET_SLEWRATE(ahd, AHD_SLEWRATE_DEF_REVB);
diff --git a/sys/dev/aic7xxx/aic7xxx.c b/sys/dev/aic7xxx/aic7xxx.c
index e1428e9..fbabdb6 100644
--- a/sys/dev/aic7xxx/aic7xxx.c
+++ b/sys/dev/aic7xxx/aic7xxx.c
@@ -116,7 +116,7 @@ static const u_int num_phases = NUM_ELEMENTS(ahc_phase_table) - 1;
/*
* Valid SCSIRATE values. (p. 3-17)
- * Provides a mapping of tranfer periods in ns to the proper value to
+ * Provides a mapping of transfer periods in ns to the proper value to
* stick in the scsixfer reg.
*/
static struct ahc_syncrate ahc_syncrates[] =
@@ -682,7 +682,7 @@ ahc_handle_seqint(struct ahc_softc *ahc, u_int intstat)
* that requires host assistance for completion.
* While handling the message phase(s), we will be
* notified by the sequencer after each byte is
- * transfered so we can track bus phase changes.
+ * transferred so we can track bus phase changes.
*
* If this is the first time we've seen a HOST_MSG_LOOP
* interrupt, initialize the state of the host message
@@ -925,7 +925,7 @@ ahc_handle_seqint(struct ahc_softc *ahc, u_int intstat)
scbptr, ahc_inb(ahc, ARG_1),
ahc->scb_data->hscbs[scbptr].tag);
ahc_dump_card_state(ahc);
- panic("for saftey");
+ panic("for safety");
break;
}
case OUT_OF_RANGE:
@@ -1171,7 +1171,7 @@ ahc_handle_scsiint(struct ahc_softc *ahc, u_int intstat)
/*
* Although the driver does not care about the
* 'Selection in Progress' status bit, the busy
- * LED does. SELINGO is only cleared by a sucessfull
+ * LED does. SELINGO is only cleared by a successful
* selection, so we must manually clear it to insure
* the LED turns off just incase no future successful
* selections occur (e.g. no devices on the bus).
@@ -1381,7 +1381,7 @@ ahc_handle_scsiint(struct ahc_softc *ahc, u_int intstat)
if (lastphase != P_BUSFREE) {
/*
* Renegotiate with this device at the
- * next oportunity just in case this busfree
+ * next opportunity just in case this busfree
* is due to a negotiation mismatch with the
* device.
*/
@@ -1857,7 +1857,7 @@ ahc_validate_width(struct ahc_softc *ahc, struct ahc_initiator_tinfo *tinfo,
/*
* Update the bitmask of targets for which the controller should
- * negotiate with at the next convenient oportunity. This currently
+ * negotiate with at the next convenient opportunity. This currently
* means the next time we send the initial identify messages for
* a new transaction.
*/
@@ -3627,7 +3627,7 @@ ahc_handle_msg_reject(struct ahc_softc *ahc, struct ahc_devinfo *devinfo)
/*
* Requeue all tagged commands for this target
- * currently in our posession so they can be
+ * currently in our possession so they can be
* converted to untagged commands.
*/
ahc_search_qinfifo(ahc, SCB_GET_TARGET(ahc, scb),
@@ -4138,7 +4138,7 @@ ahc_shutdown(void *arg)
/*
* Reset the controller and record some information about it
* that is only available just after a reset. If "reinit" is
- * non-zero, this reset occured after initial configuration
+ * non-zero, this reset occurred after initial configuration
* and the caller requests that the chip be fully reinitialized
* to a runable state. Chip interrupts are *not* enabled after
* a reinitialization. The caller must enable interrupts via
@@ -4460,7 +4460,7 @@ ahc_init_scbdata(struct ahc_softc *ahc)
ahc->next_queued_scb = ahc_get_scb(ahc);
/*
- * Note that we were successfull
+ * Note that we were successful
*/
return (0);
@@ -6549,7 +6549,7 @@ ahc_check_patch(struct ahc_softc *ahc, struct patch **start_patch,
cur_patch += cur_patch->skip_patch;
} else {
/* Accepted this patch. Advance to the next
- * one and wait for our intruction pointer to
+ * one and wait for our instruction pointer to
* hit this point.
*/
cur_patch++;
@@ -7253,7 +7253,7 @@ bus_reset:
ahc_outb(ahc, SCBPTR, saved_scbptr);
aic_scb_timer_reset(scb, 2 * 1000);
} else {
- /* Go "immediatly" to the bus reset */
+ /* Go "immediately" to the bus reset */
/* This shouldn't happen */
ahc_set_recoveryscb(ahc, scb);
ahc_print_path(ahc, scb);
diff --git a/sys/dev/aic7xxx/aic7xxx.h b/sys/dev/aic7xxx/aic7xxx.h
index 3eefb57..a673bb5 100644
--- a/sys/dev/aic7xxx/aic7xxx.h
+++ b/sys/dev/aic7xxx/aic7xxx.h
@@ -448,7 +448,7 @@ struct hardware_scb {
* each S/G element is expired, its datacnt field is checked to see
* if the LAST_SEG flag is set. If so, SG_LIST_NULL is set in the
* residual sg ptr and the transfer is considered complete. If the
- * sequencer determines that there is a residual in the tranfer, it
+ * sequencer determines that there is a residual in the transfer, it
* will set the SG_RESID_VALID flag in sgptr and dma the scb back into
* host memory. To sumarize:
*
@@ -456,7 +456,7 @@ struct hardware_scb {
* o A residual has occurred if SG_FULL_RESID is set in sgptr,
* or residual_sgptr does not have SG_LIST_NULL set.
*
- * o We are transfering the last segment if residual_datacnt has
+ * o We are transferring the last segment if residual_datacnt has
* the SG_LAST_SEG flag set.
*
* Host:
@@ -510,7 +510,7 @@ struct hardware_scb {
*/
/*
- * Definition of a scatter/gather element as transfered to the controller.
+ * Definition of a scatter/gather element as transferred to the controller.
* The aic7xxx chips only support a 24bit length. We use the top byte of
* the length to store additional address bits and a flag to indicate
* that a given segment terminates the transfer. This gives us an
diff --git a/sys/dev/aic7xxx/aic7xxx.reg b/sys/dev/aic7xxx/aic7xxx.reg
index 5042c50..7a15b56 100644
--- a/sys/dev/aic7xxx/aic7xxx.reg
+++ b/sys/dev/aic7xxx/aic7xxx.reg
@@ -329,7 +329,7 @@ register SSTAT2 {
address 0x00d
access_mode RO
field OVERRUN 0x80
- field SHVALID 0x40 /* Shaddow Layer non-zero */
+ field SHVALID 0x40 /* Shadow Layer non-zero */
field EXP_ACTIVE 0x10 /* SCSI Expander Active */
field CRCVALERR 0x08 /* CRC doesn't match (U3 only) */
field CRCENDERR 0x04 /* No terminal CRC packet (U3 only) */
diff --git a/sys/dev/aic7xxx/aic7xxx.seq b/sys/dev/aic7xxx/aic7xxx.seq
index 227bcc7..e1bf960 100644
--- a/sys/dev/aic7xxx/aic7xxx.seq
+++ b/sys/dev/aic7xxx/aic7xxx.seq
@@ -60,7 +60,7 @@ PREFIX = "ahc_"
* use byte 27 of the SCB as a psuedo-next pointer and to thread a list
* of SCBs that are awaiting selection. Since 0-0xfe are valid SCB indexes,
* SCB_LIST_NULL is 0xff which is out of range. An entry is also added to
- * this list everytime a request sense occurs or after completing a non-tagged
+ * this list every time a request sense occurs or after completing a non-tagged
* command for which a second SCB has been queued. The sequencer will
* automatically consume the entries.
*/
@@ -1489,7 +1489,7 @@ p_status_okay:
* This is done to allow the host to send messages outside of an identify
* sequence while protecting the seqencer from testing the MK_MESSAGE bit
* on an SCB that might not be for the current nexus. (For example, a
- * BDR message in responce to a bad reselection would leave us pointed to
+ * BDR message in response to a bad reselection would leave us pointed to
* an SCB that doesn't have anything to do with the current target).
*
* Otherwise, treat MSG_OUT as a 1 byte message to send (abort, abort tag,
diff --git a/sys/dev/aic7xxx/aic7xxx_inline.h b/sys/dev/aic7xxx/aic7xxx_inline.h
index c4a37b5..256caeb 100644
--- a/sys/dev/aic7xxx/aic7xxx_inline.h
+++ b/sys/dev/aic7xxx/aic7xxx_inline.h
@@ -229,7 +229,7 @@ ahc_name(struct ahc_softc *ahc)
return (ahc->name);
}
-/*********************** Miscelaneous Support Functions ***********************/
+/********************** Miscellaneous Support Functions ***********************/
static __inline void ahc_update_residual(struct ahc_softc *ahc,
struct scb *scb);
diff --git a/sys/dev/aic7xxx/aic7xxx_pci.c b/sys/dev/aic7xxx/aic7xxx_pci.c
index 73df372..ce941c7 100644
--- a/sys/dev/aic7xxx/aic7xxx_pci.c
+++ b/sys/dev/aic7xxx/aic7xxx_pci.c
@@ -865,7 +865,7 @@ ahc_pci_config(struct ahc_softc *ahc, struct ahc_pci_identity *entry)
ahc->bus_suspend = ahc_pci_suspend;
ahc->bus_resume = ahc_pci_resume;
- /* Remeber how the card was setup in case there is no SEEPROM */
+ /* Remember how the card was setup in case there is no SEEPROM */
if ((ahc_inb(ahc, HCNTRL) & POWRDN) == 0) {
ahc_pause(ahc);
if ((ahc->features & AHC_ULTRA2) != 0)
@@ -936,7 +936,7 @@ ahc_pci_config(struct ahc_softc *ahc, struct ahc_pci_identity *entry)
}
/*
- * We cannot perform ULTRA speeds without the presense
+ * We cannot perform ULTRA speeds without the presence
* of the external precision resistor.
*/
if ((ahc->features & AHC_ULTRA) != 0) {
@@ -1054,7 +1054,7 @@ ahc_pci_config(struct ahc_softc *ahc, struct ahc_pci_identity *entry)
}
/*
- * Test for the presense of external sram in an
+ * Test for the presence of external sram in an
* "unshared" configuration.
*/
static int
diff --git a/sys/dev/aic7xxx/aicasm/aicasm.c b/sys/dev/aic7xxx/aicasm/aicasm.c
index b5e1592..6a78802 100644
--- a/sys/dev/aic7xxx/aicasm/aicasm.c
+++ b/sys/dev/aic7xxx/aicasm/aicasm.c
@@ -668,7 +668,7 @@ check_patch(patch_t **start_patch, unsigned int start_instr,
cur_patch = STAILQ_NEXT(cur_patch, links);
} else {
/* Accepted this patch. Advance to the next
- * one and wait for our intruction pointer to
+ * one and wait for our instruction pointer to
* hit this point.
*/
cur_patch = STAILQ_NEXT(cur_patch, links);
diff --git a/sys/dev/aic7xxx/aicasm/aicasm_gram.y b/sys/dev/aic7xxx/aicasm/aicasm_gram.y
index 5c28f3b..87fe1a2 100644
--- a/sys/dev/aic7xxx/aicasm/aicasm_gram.y
+++ b/sys/dev/aic7xxx/aicasm/aicasm_gram.y
@@ -1286,8 +1286,8 @@ code:
;
/*
- * This grammer differs from the one in the aic7xxx
- * reference manual since the grammer listed there is
+ * This grammar differs from the one in the aic7xxx
+ * reference manual since the grammar listed there is
* ambiguous and causes a shift/reduce conflict.
* It also seems more logical as the "immediate"
* argument is listed as the second arg like the
@@ -1753,7 +1753,7 @@ format_3_instr(int opcode, symbol_ref_t *src,
instr = seq_alloc();
f3_instr = &instr->format.format3;
if (address->symbol == NULL) {
- /* 'dot' referrence. Use the current instruction pointer */
+ /* 'dot' reference. Use the current instruction pointer */
addr = instruction_ptr + address->offset;
} else if (address->symbol->type == UNINITIALIZED) {
/* forward reference */
diff --git a/sys/dev/ciss/ciss.c b/sys/dev/ciss/ciss.c
index 00a4e77..cafb6e7 100644
--- a/sys/dev/ciss/ciss.c
+++ b/sys/dev/ciss/ciss.c
@@ -464,7 +464,7 @@ ciss_attach(device_t dev)
ciss_initq_notify(sc);
/*
- * Initalize device sysctls.
+ * Initialize device sysctls.
*/
ciss_init_sysctl(sc);
@@ -619,7 +619,7 @@ ciss_init_pci(struct ciss_softc *sc)
/*
* XXX Big hammer, masks/unmasks all possible interrupts. This should
* work on all hardware variants. Need to add code to handle the
- * "controller crashed" interupt bit that this unmasks.
+ * "controller crashed" interrupt bit that this unmasks.
*/
sqmask = ~0;
}
@@ -4499,7 +4499,7 @@ ciss_name_ldrive_org(int org)
case CISS_LDRIVE_RAIDADG:
return("RAID ADG");
}
- return("unkown");
+ return("unknown");
}
/************************************************************************
diff --git a/sys/dev/drm2/radeon/radeon_fb.c b/sys/dev/drm2/radeon/radeon_fb.c
index d4bd7b2..2e33d22 100644
--- a/sys/dev/drm2/radeon/radeon_fb.c
+++ b/sys/dev/drm2/radeon/radeon_fb.c
@@ -228,7 +228,7 @@ static int radeonfb_create(struct radeon_fbdev *rfbdev,
ret = radeon_framebuffer_init(rdev->ddev, &rfbdev->rfb, &mode_cmd, gobj);
if (ret) {
- DRM_ERROR("failed to initalise framebuffer %d\n", ret);
+ DRM_ERROR("failed to initialise framebuffer %d\n", ret);
goto out_unref;
}
diff --git a/sys/dev/drm2/ttm/ttm_bo_vm.c b/sys/dev/drm2/ttm/ttm_bo_vm.c
index 5d72d97..9c98448 100644
--- a/sys/dev/drm2/ttm/ttm_bo_vm.c
+++ b/sys/dev/drm2/ttm/ttm_bo_vm.c
@@ -299,7 +299,7 @@ ttm_bo_vm_ctor(void *handle, vm_ooffset_t size, vm_prot_t prot,
* acquired either in ttm_bo_mmap() or ttm_bo_vm_open(). It's
* then released in ttm_bo_vm_close().
*
- * Here, this function is called during mmap() intialization.
+ * Here, this function is called during mmap() initialization.
* Thus, the reference acquired in ttm_bo_mmap_single() is
* sufficient.
*/
diff --git a/sys/dev/hptiop/hptiop.c b/sys/dev/hptiop/hptiop.c
index 6b83774..5fabe9b 100644
--- a/sys/dev/hptiop/hptiop.c
+++ b/sys/dev/hptiop/hptiop.c
@@ -2405,7 +2405,7 @@ static void hptiop_post_req_itl(struct hpt_iop_hba *hba,
iop_req32 = BUS_SPACE_RD4_ITL(inbound_queue);
if (iop_req32 == IOPMU_QUEUE_EMPTY) {
- device_printf(hba->pcidev, "invaild req offset\n");
+ device_printf(hba->pcidev, "invalid req offset\n");
ccb->ccb_h.status = CAM_BUSY;
bus_dmamap_unload(hba->io_dmat, srb->dma_map);
hptiop_free_srb(hba, srb);
diff --git a/sys/dev/hwpmc/hwpmc_mod.c b/sys/dev/hwpmc/hwpmc_mod.c
index c8a8526..753b2f0 100644
--- a/sys/dev/hwpmc/hwpmc_mod.c
+++ b/sys/dev/hwpmc/hwpmc_mod.c
@@ -1128,7 +1128,7 @@ pmc_detach_one_process(struct proc *p, struct pmc *pm, int flags)
pmclog_process_pmcdetach(pm, p->p_pid);
/*
- * If there are no PMCs targetting this process, we remove its
+ * If there are no PMCs targeting this process, we remove its
* descriptor from the target hash table and unset the P_HWPMC
* flag in the struct proc.
*/
@@ -1237,7 +1237,7 @@ pmc_process_csw_in(struct thread *td)
p->p_pid, p->p_comm, pp);
KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
- ("[pmc,%d] wierd CPU id %d", __LINE__, cpu));
+ ("[pmc,%d] weird CPU id %d", __LINE__, cpu));
pc = pmc_pcpu[cpu];
@@ -1382,7 +1382,7 @@ pmc_process_csw_out(struct thread *td)
p->p_pid, p->p_comm, pp);
KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
- ("[pmc,%d wierd CPU id %d", __LINE__, cpu));
+ ("[pmc,%d weird CPU id %d", __LINE__, cpu));
pc = pmc_pcpu[cpu];
@@ -1912,7 +1912,7 @@ pmc_hook_handler(struct thread *td, int function, void *arg)
/*
* Log the exec event to all monitoring owners. Skip
- * owners who have already recieved the event because
+ * owners who have already received the event because
* they had system sampling PMCs active.
*/
for (ri = 0; ri < md->pmd_npmc; ri++)
@@ -1938,7 +1938,7 @@ pmc_hook_handler(struct thread *td, int function, void *arg)
/*
* If the newly exec()'ed process has a different credential
* than before, allow it to be the target of a PMC only if
- * the PMC's owner has sufficient priviledge.
+ * the PMC's owner has sufficient privilege.
*/
for (ri = 0; ri < md->pmd_npmc; ri++)
@@ -4424,7 +4424,7 @@ pmc_process_exit(void *arg __unused, struct proc *p)
* process, we would have context switched IN at some prior
* point. However, with PREEMPTION, kernel mode context
* switches may happen any time, so we want to disable a
- * context switch OUT till we get any PMCs targetting this
+ * context switch OUT till we get any PMCs targeting this
* process off the hardware.
*
* We also need to atomically remove this process'
@@ -4527,7 +4527,7 @@ pmc_process_exit(void *arg __unused, struct proc *p)
/*
* Unlink this process from the PMCs that are
- * targetting it. This will send a signal to
+ * targeting it. This will send a signal to
* all PMC owner's whose PMCs are orphaned.
*
* Log PMC value at exit time if requested.
diff --git a/sys/dev/isci/scil/scic_phy.h b/sys/dev/isci/scil/scic_phy.h
index 754cf5d..75b11d4 100644
--- a/sys/dev/isci/scil/scic_phy.h
+++ b/sys/dev/isci/scil/scic_phy.h
@@ -308,7 +308,7 @@ SCI_STATUS scic_sas_phy_get_properties(
/**
* @brief This method will enable the user to retrieve information
- * specific to a SATA phy, such as: the recieved signature
+ * specific to a SATA phy, such as: the received signature
* FIS, if a port selector is present, etc.
*
* @param[in] phy this parameter specifies the phy for which to
diff --git a/sys/dev/isci/scil/scic_sds_phy.c b/sys/dev/isci/scil/scic_sds_phy.c
index a893e29..a7755c3 100644
--- a/sys/dev/isci/scil/scic_sds_phy.c
+++ b/sys/dev/isci/scil/scic_sds_phy.c
@@ -749,7 +749,7 @@ SCI_STATUS scic_sds_phy_initialize(
this_phy, link_layer_registers
));
- // Perfrom the initialization of the TL hardware
+ // Perform the initialization of the TL hardware
scic_sds_phy_transport_layer_initialization(this_phy, transport_layer_registers);
// Perofrm the initialization of the PE hardware
@@ -1029,7 +1029,7 @@ SCI_STATUS scic_sds_phy_reset(
}
/**
- * @brief This method will process the event code recieved.
+ * @brief This method will process the event code received.
*
* @param[in] this_phy
* @param[in] event_code
@@ -1052,7 +1052,7 @@ SCI_STATUS scic_sds_phy_event_handler(
}
/**
- * @brief This method will process the frame index recieved.
+ * @brief This method will process the frame index received.
*
* @param[in] this_phy
* @param[in] frame_index
@@ -1754,7 +1754,7 @@ SCI_STATUS scic_sds_phy_default_frame_handler(
SCIC_LOG_WARNING((
sci_base_object_get_logger(this_phy),
SCIC_LOG_OBJECT_PHY,
- "SCIC Phy 0x%08x recieved unexpected frame data %d while in state %d\n",
+ "SCIC Phy 0x%08x received unexpected frame data %d while in state %d\n",
this_phy, frame_index,
sci_base_state_machine_get_state(&this_phy->parent.state_machine)
));
@@ -1866,7 +1866,7 @@ SCI_STATUS scic_sds_phy_stopped_state_start_handler(
* This method takes the SCIC_SDS_PHY from a stopped state and destroys it.
* - This function takes no action.
*
- * @todo Shouldnt this function transition the SCI_BASE_PHY::state_machine to
+ * @todo Shouldn't this function transition the SCI_BASE_PHY::state_machine to
* the SCI_BASE_PHY_STATE_FINAL?
*
* @param[in] phy This is the SCI_BASE_PHY object which is cast into a
@@ -1964,7 +1964,7 @@ SCI_STATUS scic_sds_phy_ready_state_reset_handler(
* - decoded event is a link failure
* - transition the SCIC_SDS_PHY back to the SCI_BASE_PHY_STATE_STARTING
* state.
- * - any other event recived will report a warning message
+ * - any other event received will report a warning message
*
* @param[in] phy This is the SCIC_SDS_PHY object which has received the
* event.
@@ -2020,7 +2020,7 @@ SCI_STATUS scic_sds_phy_ready_state_event_handler(
SCIC_LOG_WARNING((
sci_base_object_get_logger(this_phy),
SCIC_LOG_OBJECT_PHY | SCIC_LOG_OBJECT_RECEIVED_EVENTS,
- "SCIC PHY 0x%x ready state machine recieved unexpected event_code %x\n",
+ "SCIC PHY 0x%x ready state machine received unexpected event_code %x\n",
this_phy, event_code
));
result = SCI_FAILURE_INVALID_STATE;
@@ -2066,7 +2066,7 @@ SCI_STATUS scic_sds_phy_resetting_state_event_handler(
SCIC_LOG_WARNING((
sci_base_object_get_logger(this_phy),
SCIC_LOG_OBJECT_PHY | SCIC_LOG_OBJECT_RECEIVED_EVENTS,
- "SCIC PHY 0x%x resetting state machine recieved unexpected event_code %x\n",
+ "SCIC PHY 0x%x resetting state machine received unexpected event_code %x\n",
this_phy, event_code
));
@@ -2691,7 +2691,7 @@ SCI_STATUS scic_sds_phy_starting_substate_await_ossp_event_handler(
SCIC_LOG_WARNING((
sci_base_object_get_logger(this_phy),
SCIC_LOG_OBJECT_PHY | SCIC_LOG_OBJECT_RECEIVED_EVENTS,
- "PHY starting substate machine recieved unexpected event_code %x\n",
+ "PHY starting substate machine received unexpected event_code %x\n",
event_code
));
@@ -2772,7 +2772,7 @@ SCI_STATUS scic_sds_phy_starting_substate_await_sas_phy_speed_event_handler(
SCIC_LOG_WARNING((
sci_base_object_get_logger(this_phy),
SCIC_LOG_OBJECT_PHY | SCIC_LOG_OBJECT_RECEIVED_EVENTS,
- "PHY starting substate machine recieved unexpected event_code %x\n",
+ "PHY starting substate machine received unexpected event_code %x\n",
event_code
));
@@ -2834,7 +2834,7 @@ SCI_STATUS scic_sds_phy_starting_substate_await_iaf_uf_event_handler(
SCIC_LOG_WARNING((
sci_base_object_get_logger(this_phy),
SCIC_LOG_OBJECT_PHY | SCIC_LOG_OBJECT_RECEIVED_EVENTS,
- "PHY starting substate machine recieved unexpected event_code %x\n",
+ "PHY starting substate machine received unexpected event_code %x\n",
event_code
));
@@ -2879,7 +2879,7 @@ SCI_STATUS scic_sds_phy_starting_substate_await_sas_power_event_handler(
SCIC_LOG_WARNING((
sci_base_object_get_logger(this_phy),
SCIC_LOG_OBJECT_PHY | SCIC_LOG_OBJECT_RECEIVED_EVENTS,
- "PHY starting substate machine recieved unexpected event_code %x\n",
+ "PHY starting substate machine received unexpected event_code %x\n",
event_code
));
@@ -2935,7 +2935,7 @@ SCI_STATUS scic_sds_phy_starting_substate_await_sata_power_event_handler(
SCIC_LOG_WARNING((
sci_base_object_get_logger(this_phy),
SCIC_LOG_OBJECT_PHY | SCIC_LOG_OBJECT_RECEIVED_EVENTS,
- "PHY starting substate machine recieved unexpected event_code %x\n",
+ "PHY starting substate machine received unexpected event_code %x\n",
event_code
));
@@ -3003,7 +3003,7 @@ SCI_STATUS scic_sds_phy_starting_substate_await_sata_phy_event_handler(
SCIC_LOG_WARNING((
sci_base_object_get_logger(this_phy),
SCIC_LOG_OBJECT_PHY | SCIC_LOG_OBJECT_RECEIVED_EVENTS,
- "PHY starting substate machine recieved unexpected event_code %x\n",
+ "PHY starting substate machine received unexpected event_code %x\n",
event_code
));
@@ -3090,7 +3090,7 @@ SCI_STATUS scic_sds_phy_starting_substate_await_sata_speed_event_handler(
SCIC_LOG_WARNING((
sci_base_object_get_logger(this_phy),
SCIC_LOG_OBJECT_PHY | SCIC_LOG_OBJECT_RECEIVED_EVENTS,
- "PHY starting substate machine recieved unexpected event_code %x\n",
+ "PHY starting substate machine received unexpected event_code %x\n",
event_code
));
@@ -3147,7 +3147,7 @@ SCI_STATUS scic_sds_phy_starting_substate_await_sig_fis_event_handler(
SCIC_LOG_WARNING((
sci_base_object_get_logger(this_phy),
SCIC_LOG_OBJECT_PHY | SCIC_LOG_OBJECT_RECEIVED_EVENTS,
- "PHY starting substate machine recieved unexpected event_code %x\n",
+ "PHY starting substate machine received unexpected event_code %x\n",
event_code
));
@@ -3246,7 +3246,7 @@ SCI_STATUS scic_sds_phy_starting_substate_await_iaf_uf_frame_handler(
SCIC_LOG_WARNING((
sci_base_object_get_logger(this_phy),
SCIC_LOG_OBJECT_PHY | SCIC_LOG_OBJECT_UNSOLICITED_FRAMES,
- "PHY starting substate machine recieved unexpected frame id %x\n",
+ "PHY starting substate machine received unexpected frame id %x\n",
frame_index
));
}
@@ -3332,7 +3332,7 @@ SCI_STATUS scic_sds_phy_starting_substate_await_sig_fis_frame_handler(
SCIC_LOG_WARNING((
sci_base_object_get_logger(this_phy),
SCIC_LOG_OBJECT_PHY | SCIC_LOG_OBJECT_UNSOLICITED_FRAMES,
- "PHY starting substate machine recieved unexpected frame id %x\n",
+ "PHY starting substate machine received unexpected frame id %x\n",
frame_index
));
}
diff --git a/sys/dev/kbd/kbd.c b/sys/dev/kbd/kbd.c
index 8036762..f1a1b29 100644
--- a/sys/dev/kbd/kbd.c
+++ b/sys/dev/kbd/kbd.c
@@ -996,7 +996,7 @@ genkbd_commonioctl(keyboard_t *kbd, u_long cmd, caddr_t arg)
splx(s);
return (error);
}
- kbd->kb_fkeytab[fkeyp->keynum].len = imin(fkeyp->flen, MAXFK);
+ kbd->kb_fkeytab[fkeyp->keynum].len = min(fkeyp->flen, MAXFK);
bcopy(fkeyp->keydef, kbd->kb_fkeytab[fkeyp->keynum].str,
kbd->kb_fkeytab[fkeyp->keynum].len);
break;
diff --git a/sys/dev/mpr/mpi/mpi2.h b/sys/dev/mpr/mpi/mpi2.h
index 42fdec2..7084a85 100644
--- a/sys/dev/mpr/mpi/mpi2.h
+++ b/sys/dev/mpr/mpi/mpi2.h
@@ -1,6 +1,6 @@
/*-
* Copyright (c) 2012-2015 LSI Corp.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -34,7 +34,8 @@
/*
* Copyright (c) 2000-2015 LSI Corporation.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
+ * All rights reserved.
*
*
* Name: mpi2.h
@@ -43,7 +44,7 @@
* scatter/gather formats.
* Creation Date: June 21, 2006
*
- * mpi2.h Version: 02.00.33
+ * mpi2.h Version: 02.00.42
*
* NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
* prefix are for use only on MPI v2.5 products, and must not be used
@@ -125,6 +126,22 @@
* 04-17-13 02.00.31 Bumped MPI2_HEADER_VERSION_UNIT.
* 08-19-13 02.00.32 Bumped MPI2_HEADER_VERSION_UNIT.
* 12-05-13 02.00.33 Bumped MPI2_HEADER_VERSION_UNIT.
+ * 01-08-14 02.00.34 Bumped MPI2_HEADER_VERSION_UNIT.
+ * 06-13-14 02.00.35 Bumped MPI2_HEADER_VERSION_UNIT.
+ * 11-18-14 02.00.36 Updated copyright information.
+ * Bumped MPI2_HEADER_VERSION_UNIT.
+ * 03-16-15 02.00.37 Updated for MPI v2.6.
+ * Bumped MPI2_HEADER_VERSION_UNIT.
+ * Added Scratchpad registers to
+ * MPI2_SYSTEM_INTERFACE_REGS.
+ * Added MPI2_DIAG_SBR_RELOAD.
+ * Added MPI2_IOCSTATUS_INSUFFICIENT_POWER.
+ * 03-19-15 02.00.38 Bumped MPI2_HEADER_VERSION_UNIT.
+ * 05-25-15 02.00.39 Bumped MPI2_HEADER_VERSION_UNIT
+ * 08-25-15 02.00.40 Bumped MPI2_HEADER_VERSION_UNIT.
+ * Added V7 HostDiagnostic register defines
+ * 12-15-15 02.00.41 Bumped MPI_HEADER_VERSION_UNIT
+ * 01-01-16 02.00.42 Bumped MPI_HEADER_VERSION_UNIT
* --------------------------------------------------------------------------
*/
@@ -160,8 +177,15 @@
#define MPI2_VERSION_02_05 (0x0205)
+/* minor version for MPI v2.6 compatible products */
+#define MPI26_VERSION_MINOR (0x06)
+#define MPI26_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) | \
+ MPI26_VERSION_MINOR)
+#define MPI2_VERSION_02_06 (0x0206)
+
+
/* Unit and Dev versioning for this MPI header set */
-#define MPI2_HEADER_VERSION_UNIT (0x21)
+#define MPI2_HEADER_VERSION_UNIT (0x2A)
#define MPI2_HEADER_VERSION_DEV (0x00)
#define MPI2_HEADER_VERSION_UNIT_MASK (0xFF00)
#define MPI2_HEADER_VERSION_UNIT_SHIFT (8)
@@ -217,7 +241,8 @@ typedef volatile struct _MPI2_SYSTEM_INTERFACE_REGS
U32 HCBSize; /* 0x74 */
U32 HCBAddressLow; /* 0x78 */
U32 HCBAddressHigh; /* 0x7C */
- U32 Reserved6[16]; /* 0x80 */
+ U32 Reserved6[12]; /* 0x80 */
+ U32 Scratchpad[4]; /* 0xB0 */
U32 RequestDescriptorPostLow; /* 0xC0 */
U32 RequestDescriptorPostHigh; /* 0xC4 */
U32 Reserved7[14]; /* 0xC8 */
@@ -261,10 +286,17 @@ typedef volatile struct _MPI2_SYSTEM_INTERFACE_REGS
*/
#define MPI2_HOST_DIAGNOSTIC_OFFSET (0x00000008)
+#define MPI2_DIAG_SBR_RELOAD (0x00002000)
+
#define MPI2_DIAG_BOOT_DEVICE_SELECT_MASK (0x00001800)
#define MPI2_DIAG_BOOT_DEVICE_SELECT_DEFAULT (0x00000000)
#define MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW (0x00000800)
+/* Defines for V7A/V7R HostDiagnostic Register */
+#define MPI26_DIAG_BOOT_DEVICE_SELECT_FLASH64 (0x00000000)
+#define MPI26_DIAG_BOOT_DEVICE_SELECT_HCDW64 (0x00000800)
+#define MPI26_DIAG_BOOT_DEVICE_SELECT_FLASH32 (0x00001000)
+#define MPI26_DIAG_BOOT_DEVICE_SELECT_HCDW32 (0x00001800)
#define MPI2_DIAG_CLEAR_FLASH_BAD_SIG (0x00000400)
#define MPI2_DIAG_FORCE_HCB_ON_RESET (0x00000200)
#define MPI2_DIAG_HCB_MODE (0x00000100)
@@ -335,7 +367,15 @@ typedef volatile struct _MPI2_SYSTEM_INTERFACE_REGS
#define MPI2_HCB_ADDRESS_HIGH_OFFSET (0x0000007C)
/*
- * Offsets for the Request Queue
+ * Offsets for the Scratchpad registers
+ */
+#define MPI26_SCRATCHPAD0_OFFSET (0x000000B0)
+#define MPI26_SCRATCHPAD1_OFFSET (0x000000B4)
+#define MPI26_SCRATCHPAD2_OFFSET (0x000000B8)
+#define MPI26_SCRATCHPAD3_OFFSET (0x000000BC)
+
+/*
+ * Offsets for the Request Descriptor Post Queue
*/
#define MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET (0x000000C0)
#define MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET (0x000000C4)
@@ -367,7 +407,8 @@ typedef struct _MPI2_DEFAULT_REQUEST_DESCRIPTOR
Mpi2DefaultRequestDescriptor_t, MPI2_POINTER pMpi2DefaultRequestDescriptor_t;
/* defines for the RequestFlags field */
-#define MPI2_REQ_DESCRIPT_FLAGS_TYPE_MASK (0x0E)
+#define MPI2_REQ_DESCRIPT_FLAGS_TYPE_MASK (0x1E)
+#define MPI2_REQ_DESCRIPT_FLAGS_TYPE_RSHIFT (1) /* use carefully; values below are pre-shifted left */
#define MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO (0x00)
#define MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET (0x02)
#define MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY (0x06)
@@ -455,6 +496,10 @@ typedef union _MPI2_REQUEST_DESCRIPTOR_UNION
Mpi2RequestDescriptorUnion_t, MPI2_POINTER pMpi2RequestDescriptorUnion_t;
+
+/* for the RequestFlags field, use the same defines as MPI2_DEFAULT_REQUEST_DESCRIPTOR */
+
+
/* Reply Descriptors */
/* Default Reply Descriptor */
@@ -603,7 +648,8 @@ typedef union _MPI2_REPLY_DESCRIPTORS_UNION
#define MPI2_FUNCTION_TOOLBOX (0x17) /* Toolbox */
#define MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR (0x18) /* SCSI Enclosure Processor */
#define MPI2_FUNCTION_SMP_PASSTHROUGH (0x1A) /* SMP Passthrough */
-#define MPI2_FUNCTION_SAS_IO_UNIT_CONTROL (0x1B) /* SAS IO Unit Control */
+#define MPI2_FUNCTION_SAS_IO_UNIT_CONTROL (0x1B) /* SAS IO Unit Control */ /* for MPI v2.5 and earlier */
+#define MPI2_FUNCTION_IO_UNIT_CONTROL (0x1B) /* IO Unit Control */ /* for MPI v2.6 and later */
#define MPI2_FUNCTION_SATA_PASSTHROUGH (0x1C) /* SATA Passthrough */
#define MPI2_FUNCTION_DIAG_BUFFER_POST (0x1D) /* Diagnostic Buffer Post */
#define MPI2_FUNCTION_DIAG_RELEASE (0x1E) /* Diagnostic Release */
@@ -646,6 +692,7 @@ typedef union _MPI2_REPLY_DESCRIPTORS_UNION
#define MPI2_IOCSTATUS_INVALID_FIELD (0x0007)
#define MPI2_IOCSTATUS_INVALID_STATE (0x0008)
#define MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED (0x0009)
+#define MPI2_IOCSTATUS_INSUFFICIENT_POWER (0x000A) /* MPI v2.6 and later */
/****************************************************************************
* Config IOCStatus values
@@ -1123,7 +1170,7 @@ typedef union _MPI2_IEEE_SGE_CHAIN_UNION
} MPI2_IEEE_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_CHAIN_UNION,
Mpi2IeeeSgeChainUnion_t, MPI2_POINTER pMpi2IeeeSgeChainUnion_t;
-/* MPI25_IEEE_SGE_CHAIN64 is for MPI v2.5 products only */
+/* MPI25_IEEE_SGE_CHAIN64 is for MPI v2.5 and later */
typedef struct _MPI25_IEEE_SGE_CHAIN64
{
U64 Address;
@@ -1181,16 +1228,23 @@ typedef union _MPI25_SGE_IO_UNION
#define MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT (0x00)
#define MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT (0x80)
+/* Next Segment Format */
+
+#define MPI26_IEEE_SGE_FLAGS_NSF_MASK (0x1C)
+#define MPI26_IEEE_SGE_FLAGS_NSF_MPI_IEEE (0x00)
+
/* Data Location Address Space */
#define MPI2_IEEE_SGE_FLAGS_ADDR_MASK (0x03)
-#define MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR (0x00) /* for MPI v2.0, use in IEEE Simple Element only; for MPI v2.5, use in IEEE Simple or Chain element */
+#define MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR (0x00) /* for MPI v2.0, use in IEEE Simple Element only; for MPI v2.5 and later, use in IEEE Simple or Chain element */
#define MPI2_IEEE_SGE_FLAGS_IOCDDR_ADDR (0x01) /* use in IEEE Simple Element only */
#define MPI2_IEEE_SGE_FLAGS_IOCPLB_ADDR (0x02)
#define MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR (0x03) /* for MPI v2.0, use in IEEE Simple Element only; for MPI v2.5, use in IEEE Simple or Chain element */
#define MPI2_IEEE_SGE_FLAGS_SYSTEMPLBPCI_ADDR (0x03) /* use in MPI v2.0 IEEE Chain Element only */
#define MPI2_IEEE_SGE_FLAGS_SYSTEMPLBCPI_ADDR (MPI2_IEEE_SGE_FLAGS_SYSTEMPLBPCI_ADDR) /* typo in name */
+#define MPI26_IEEE_SGE_FLAGS_IOCCTL_ADDR (0x02) /* for MPI v2.6 only */
+
/****************************************************************************
* IEEE SGE operation Macros
****************************************************************************/
@@ -1246,8 +1300,9 @@ typedef union _MPI2_SGE_IO_UNION
#define MPI2_SGLFLAGS_ADDRESS_SPACE_MASK (0x0C)
#define MPI2_SGLFLAGS_SYSTEM_ADDRESS_SPACE (0x00)
#define MPI2_SGLFLAGS_IOCDDR_ADDRESS_SPACE (0x04)
-#define MPI2_SGLFLAGS_IOCPLB_ADDRESS_SPACE (0x08)
-#define MPI2_SGLFLAGS_IOCPLBNTA_ADDRESS_SPACE (0x0C)
+#define MPI2_SGLFLAGS_IOCPLB_ADDRESS_SPACE (0x08) /* only for MPI v2.5 and earlier */
+#define MPI26_SGLFLAGS_IOCPLB_ADDRESS_SPACE (0x08) /* only for MPI v2.6 */
+#define MPI2_SGLFLAGS_IOCPLBNTA_ADDRESS_SPACE (0x0C) /* only for MPI v2.5 and earlier */
/* values for SGL Type subfield */
#define MPI2_SGLFLAGS_SGL_TYPE_MASK (0x03)
#define MPI2_SGLFLAGS_SGL_TYPE_MPI (0x00)
diff --git a/sys/dev/mpr/mpi/mpi2_cnfg.h b/sys/dev/mpr/mpi/mpi2_cnfg.h
index 3b0eb63..fb968b6 100644
--- a/sys/dev/mpr/mpi/mpi2_cnfg.h
+++ b/sys/dev/mpr/mpi/mpi2_cnfg.h
@@ -1,6 +1,6 @@
/*-
* Copyright (c) 2012-2015 LSI Corp.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -34,14 +34,15 @@
/*
* Copyright (c) 2000-2015 LSI Corporation.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
+ * All rights reserved.
*
*
* Name: mpi2_cnfg.h
* Title: MPI Configuration messages and pages
* Creation Date: November 10, 2006
*
- * mpi2_cnfg.h Version: 02.00.27
+ * mpi2_cnfg.h Version: 02.00.35
*
* NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
* prefix are for use only on MPI v2.5 products, and must not be used
@@ -210,6 +211,21 @@
* MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0.
* Added MPI2_SAS_ENCLS0_FLAGS_ENCL_LEVEL_VALID for
* MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0.
+ * 01-08-14 02.00.28 Added more defines for the BiosOptions field of
+ * MPI2_CONFIG_PAGE_BIOS_1.
+ * 06-13-14 02.00.29 Added SSUTimeout field to MPI2_CONFIG_PAGE_BIOS_1, and
+ * more defines for the BiosOptions field.
+ * 11-18-14 02.00.30 Updated copyright information.
+ * Added MPI2_BIOSPAGE1_OPTIONS_ADVANCED_CONFIG.
+ * Added AdapterOrderAux fields to BIOS Page 3.
+ * 03-16-15 02.00.31 Updated for MPI v2.6.
+ * Added BoardPowerRequirement, PCISlotPowerAllocation, and
+ * Flags field to IO Unit Page 7.
+ * Added IO Unit Page 11.
+ * Added new SAS Phy Event codes
+ * 05-25-15 02.00.33 Added more defines for the BiosOptions field of
+ * MPI2_CONFIG_PAGE_BIOS_1.
+ * 12-18-15 02.00.35 Added SATADeviceWaitTime to SAS IO Unit Page 4.
* --------------------------------------------------------------------------
*/
@@ -387,7 +403,6 @@ typedef union _MPI2_CONFIG_EXT_PAGE_HEADER_UNION
#define MPI2_ETHERNET_PGAD_IF_NUMBER_MASK (0x000000FF)
-
/****************************************************************************
* Configuration messages
****************************************************************************/
@@ -491,8 +506,17 @@ typedef struct _MPI2_CONFIG_REPLY
#define MPI25_MFGPAGE_DEVID_SAS3108_5 (0x0094)
#define MPI25_MFGPAGE_DEVID_SAS3108_6 (0x0095)
-
-
+/* MPI v2.6 SAS Products */
+#define MPI26_MFGPAGE_DEVID_SAS3216 (0x00C9)
+#define MPI26_MFGPAGE_DEVID_SAS3224 (0x00C4)
+#define MPI26_MFGPAGE_DEVID_SAS3316_1 (0x00C5)
+#define MPI26_MFGPAGE_DEVID_SAS3316_2 (0x00C6)
+#define MPI26_MFGPAGE_DEVID_SAS3316_3 (0x00C7)
+#define MPI26_MFGPAGE_DEVID_SAS3316_4 (0x00C8)
+#define MPI26_MFGPAGE_DEVID_SAS3324_1 (0x00C0)
+#define MPI26_MFGPAGE_DEVID_SAS3324_2 (0x00C1)
+#define MPI26_MFGPAGE_DEVID_SAS3324_3 (0x00C2)
+#define MPI26_MFGPAGE_DEVID_SAS3324_4 (0x00C3)
/* Manufacturing Page 0 */
@@ -962,14 +986,16 @@ typedef struct _MPI2_CONFIG_PAGE_IO_UNIT_7
U16 BoardTemperature; /* 0x14 */
U8 BoardTemperatureUnits; /* 0x16 */
U8 Reserved3; /* 0x17 */
- U32 Reserved4; /* 0x18 */
- U32 Reserved5; /* 0x1C */
- U32 Reserved6; /* 0x20 */
- U32 Reserved7; /* 0x24 */
+ U32 BoardPowerRequirement; /* 0x18 */ /* reserved prior to MPI v2.6 */
+ U32 PCISlotPowerAllocation; /* 0x1C */ /* reserved prior to MPI v2.6 */
+ U8 Flags; /* 0x20 */ /* reserved prior to MPI v2.6 */
+ U8 Reserved6; /* 0x21 */
+ U16 Reserved7; /* 0x22 */
+ U32 Reserved8; /* 0x24 */
} MPI2_CONFIG_PAGE_IO_UNIT_7, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_7,
Mpi2IOUnitPage7_t, MPI2_POINTER pMpi2IOUnitPage7_t;
-#define MPI2_IOUNITPAGE7_PAGEVERSION (0x04)
+#define MPI2_IOUNITPAGE7_PAGEVERSION (0x05)
/* defines for IO Unit Page 7 CurrentPowerMode and PreviousPowerMode fields */
#define MPI25_IOUNITPAGE7_PM_INIT_MASK (0xC0)
@@ -1050,6 +1076,8 @@ typedef struct _MPI2_CONFIG_PAGE_IO_UNIT_7
#define MPI2_IOUNITPAGE7_BOARD_TEMP_FAHRENHEIT (0x01)
#define MPI2_IOUNITPAGE7_BOARD_TEMP_CELSIUS (0x02)
+/* defines for IO Unit Page 7 Flags field */
+#define MPI2_IOUNITPAGE7_FLAG_CABLE_POWER_EXC (0x01)
/* IO Unit Page 8 */
@@ -1168,6 +1196,61 @@ typedef struct _MPI2_CONFIG_PAGE_IO_UNIT_10
#define MPI2_IOUNITPAGE10_PAGEVERSION (0x01)
+/* IO Unit Page 11 (for MPI v2.6 and later) */
+
+typedef struct _MPI26_IOUNIT11_SPINUP_GROUP
+{
+ U8 MaxTargetSpinup; /* 0x00 */
+ U8 SpinupDelay; /* 0x01 */
+ U8 SpinupFlags; /* 0x02 */
+ U8 Reserved1; /* 0x03 */
+} MPI26_IOUNIT11_SPINUP_GROUP, MPI2_POINTER PTR_MPI26_IOUNIT11_SPINUP_GROUP,
+ Mpi26IOUnit11SpinupGroup_t, MPI2_POINTER pMpi26IOUnit11SpinupGroup_t;
+
+/* defines for IO Unit Page 11 SpinupFlags */
+#define MPI26_IOUNITPAGE11_SPINUP_DISABLE_FLAG (0x01)
+
+
+/*
+ * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
+ * four and check the value returned for NumPhys at runtime.
+ */
+#ifndef MPI26_IOUNITPAGE11_PHY_MAX
+#define MPI26_IOUNITPAGE11_PHY_MAX (4)
+#endif
+
+typedef struct _MPI26_CONFIG_PAGE_IO_UNIT_11
+{
+ MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
+ U32 Reserved1; /* 0x04 */
+ MPI26_IOUNIT11_SPINUP_GROUP SpinupGroupParameters[4]; /* 0x08 */
+ U32 Reserved2; /* 0x18 */
+ U32 Reserved3; /* 0x1C */
+ U32 Reserved4; /* 0x20 */
+ U8 BootDeviceWaitTime; /* 0x24 */
+ U8 Reserved5; /* 0x25 */
+ U16 Reserved6; /* 0x26 */
+ U8 NumPhys; /* 0x28 */
+ U8 PEInitialSpinupDelay; /* 0x29 */
+ U8 PEReplyDelay; /* 0x2A */
+ U8 Flags; /* 0x2B */
+ U8 PHY[MPI26_IOUNITPAGE11_PHY_MAX];/* 0x2C */
+} MPI26_CONFIG_PAGE_IO_UNIT_11,
+ MPI2_POINTER PTR_MPI26_CONFIG_PAGE_IO_UNIT_11,
+ Mpi26IOUnitPage11_t, MPI2_POINTER pMpi26IOUnitPage11_t;
+
+#define MPI26_IOUNITPAGE11_PAGEVERSION (0x00)
+
+/* defines for Flags field */
+#define MPI26_IOUNITPAGE11_FLAGS_AUTO_PORTENABLE (0x01)
+
+/* defines for PHY field */
+#define MPI26_IOUNITPAGE11_PHY_SPINUP_GROUP_MASK (0x03)
+
+
+
+
+
/****************************************************************************
* IOC Config Pages
@@ -1331,7 +1414,9 @@ typedef struct _MPI2_CONFIG_PAGE_BIOS_1
MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
U32 BiosOptions; /* 0x04 */
U32 IOCSettings; /* 0x08 */
- U32 Reserved1; /* 0x0C */
+ U8 SSUTimeout; /* 0x0C */
+ U8 Reserved1; /* 0x0D */
+ U16 Reserved2; /* 0x0E */
U32 DeviceSettings; /* 0x10 */
U16 NumberOfDevices; /* 0x14 */
U16 UEFIVersion; /* 0x16 */
@@ -1342,18 +1427,36 @@ typedef struct _MPI2_CONFIG_PAGE_BIOS_1
} MPI2_CONFIG_PAGE_BIOS_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_BIOS_1,
Mpi2BiosPage1_t, MPI2_POINTER pMpi2BiosPage1_t;
-#define MPI2_BIOSPAGE1_PAGEVERSION (0x05)
+#define MPI2_BIOSPAGE1_PAGEVERSION (0x07)
/* values for BIOS Page 1 BiosOptions field */
-#define MPI2_BIOSPAGE1_OPTIONS_MASK_OEM_ID (0x000000F0)
-#define MPI2_BIOSPAGE1_OPTIONS_LSI_OEM_ID (0x00000000)
+#define MPI2_BIOSPAGE1_OPTIONS_BOOT_LIST_ADD_ALT_BOOT_DEVICE (0x00008000)
+#define MPI2_BIOSPAGE1_OPTIONS_ADVANCED_CONFIG (0x00004000)
+
+#define MPI2_BIOSPAGE1_OPTIONS_PNS_MASK (0x00003800)
+#define MPI2_BIOSPAGE1_OPTIONS_PNS_PBDHL (0x00000000)
+#define MPI2_BIOSPAGE1_OPTIONS_PNS_ENCSLOSURE (0x00000800)
+#define MPI2_BIOSPAGE1_OPTIONS_PNS_LWWID (0x00001000)
+#define MPI2_BIOSPAGE1_OPTIONS_PNS_PSENS (0x00001800)
+#define MPI2_BIOSPAGE1_OPTIONS_PNS_ESPHY (0x00002000)
-#define MPI2_BIOSPAGE1_OPTIONS_MASK_UEFI_HII_REGISTRATION (0x00000006)
-#define MPI2_BIOSPAGE1_OPTIONS_ENABLE_UEFI_HII (0x00000000)
-#define MPI2_BIOSPAGE1_OPTIONS_DISABLE_UEFI_HII (0x00000002)
-#define MPI2_BIOSPAGE1_OPTIONS_VERSION_CHECK_UEFI_HII (0x00000004)
+#define MPI2_BIOSPAGE1_OPTIONS_X86_DISABLE_BIOS (0x00000400)
-#define MPI2_BIOSPAGE1_OPTIONS_DISABLE_BIOS (0x00000001)
+#define MPI2_BIOSPAGE1_OPTIONS_MASK_REGISTRATION_UEFI_BSD (0x00000300)
+#define MPI2_BIOSPAGE1_OPTIONS_USE_BIT0_REGISTRATION_UEFI_BSD (0x00000000)
+#define MPI2_BIOSPAGE1_OPTIONS_FULL_REGISTRATION_UEFI_BSD (0x00000100)
+#define MPI2_BIOSPAGE1_OPTIONS_ADAPTER_REGISTRATION_UEFI_BSD (0x00000200)
+#define MPI2_BIOSPAGE1_OPTIONS_DISABLE_REGISTRATION_UEFI_BSD (0x00000300)
+
+#define MPI2_BIOSPAGE1_OPTIONS_MASK_OEM_ID (0x000000F0)
+#define MPI2_BIOSPAGE1_OPTIONS_LSI_OEM_ID (0x00000000)
+
+#define MPI2_BIOSPAGE1_OPTIONS_MASK_UEFI_HII_REGISTRATION (0x00000006)
+#define MPI2_BIOSPAGE1_OPTIONS_ENABLE_UEFI_HII (0x00000000)
+#define MPI2_BIOSPAGE1_OPTIONS_DISABLE_UEFI_HII (0x00000002)
+#define MPI2_BIOSPAGE1_OPTIONS_VERSION_CHECK_UEFI_HII (0x00000004)
+
+#define MPI2_BIOSPAGE1_OPTIONS_DISABLE_BIOS (0x00000001)
/* values for BIOS Page 1 IOCSettings field */
#define MPI2_BIOSPAGE1_IOCSET_MASK_BOOT_PREFERENCE (0x00030000)
@@ -1477,6 +1580,8 @@ typedef struct _MPI2_CONFIG_PAGE_BIOS_2
/* BIOS Page 3 */
+#define MPI2_BIOSPAGE3_NUM_ADAPTER (4)
+
typedef struct _MPI2_ADAPTER_INFO
{
U8 PciBusNumber; /* 0x00 */
@@ -1488,17 +1593,26 @@ typedef struct _MPI2_ADAPTER_INFO
#define MPI2_ADAPTER_INFO_FLAGS_EMBEDDED (0x0001)
#define MPI2_ADAPTER_INFO_FLAGS_INIT_STATUS (0x0002)
+typedef struct _MPI2_ADAPTER_ORDER_AUX
+{
+ U64 WWID; /* 0x00 */
+ U32 Reserved1; /* 0x08 */
+ U32 Reserved2; /* 0x0C */
+} MPI2_ADAPTER_ORDER_AUX, MPI2_POINTER PTR_MPI2_ADAPTER_ORDER_AUX,
+ Mpi2AdapterOrderAux_t, MPI2_POINTER pMpi2AdapterOrderAux_t;
+
typedef struct _MPI2_CONFIG_PAGE_BIOS_3
{
MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
U32 GlobalFlags; /* 0x04 */
U32 BiosVersion; /* 0x08 */
- MPI2_ADAPTER_INFO AdapterOrder[4]; /* 0x0C */
+ MPI2_ADAPTER_INFO AdapterOrder[MPI2_BIOSPAGE3_NUM_ADAPTER]; /* 0x0C */
U32 Reserved1; /* 0x1C */
+ MPI2_ADAPTER_ORDER_AUX AdapterOrderAux[MPI2_BIOSPAGE3_NUM_ADAPTER]; /* 0x20 */ /* MPI v2.5 and newer */
} MPI2_CONFIG_PAGE_BIOS_3, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_BIOS_3,
Mpi2BiosPage3_t, MPI2_POINTER pMpi2BiosPage3_t;
-#define MPI2_BIOSPAGE3_PAGEVERSION (0x00)
+#define MPI2_BIOSPAGE3_PAGEVERSION (0x01)
/* values for BIOS Page 3 GlobalFlags */
#define MPI2_BIOSPAGE3_FLAGS_PAUSE_ON_ERROR (0x00000002)
@@ -1990,6 +2104,8 @@ typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_0
#define MPI2_SASIOUNIT0_PORTFLAGS_AUTO_PORT_CONFIG (0x01)
/* values for SAS IO Unit Page 0 PhyFlags */
+#define MPI2_SASIOUNIT0_PHYFLAGS_INIT_PERSIST_CONNECT (0x40)
+#define MPI2_SASIOUNIT0_PHYFLAGS_TARG_PERSIST_CONNECT (0x20)
#define MPI2_SASIOUNIT0_PHYFLAGS_ZONING_ENABLED (0x10)
#define MPI2_SASIOUNIT0_PHYFLAGS_PHY_DISABLED (0x08)
@@ -2082,6 +2198,7 @@ typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_1
#define MPI2_SASIOUNIT1_CONTROL_CLEAR_AFFILIATION (0x0001) /* MPI v2.0 only. Obsolete in MPI v2.5 and later. */
/* values for SAS IO Unit Page 1 AdditionalControlFlags */
+#define MPI2_SASIOUNIT1_ACONTROL_DA_PERSIST_CONNECT (0x0100)
#define MPI2_SASIOUNIT1_ACONTROL_MULTI_PORT_DOMAIN_ILLEGAL (0x0080)
#define MPI2_SASIOUNIT1_ACONTROL_SATA_ASYNCHROUNOUS_NOTIFICATION (0x0040)
#define MPI2_SASIOUNIT1_ACONTROL_INVALID_TOPOLOGY_CORRECTION (0x0020)
@@ -2099,6 +2216,8 @@ typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_1
#define MPI2_SASIOUNIT1_PORT_FLAGS_AUTO_PORT_CONFIG (0x01)
/* values for SAS IO Unit Page 1 PhyFlags */
+#define MPI2_SASIOUNIT1_PHYFLAGS_INIT_PERSIST_CONNECT (0x40)
+#define MPI2_SASIOUNIT1_PHYFLAGS_TARG_PERSIST_CONNECT (0x20)
#define MPI2_SASIOUNIT1_PHYFLAGS_ZONING_ENABLE (0x10)
#define MPI2_SASIOUNIT1_PHYFLAGS_PHY_DISABLE (0x08)
@@ -2117,7 +2236,7 @@ typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_1
/* see mpi2_sas.h for values for SAS IO Unit Page 1 ControllerPhyDeviceInfo values */
-/* SAS IO Unit Page 4 */
+/* SAS IO Unit Page 4 (for MPI v2.5 and earlier) */
typedef struct _MPI2_SAS_IOUNIT4_SPINUP_GROUP
{
@@ -2148,7 +2267,7 @@ typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_4
U32 Reserved2; /* 0x1C */
U32 Reserved3; /* 0x20 */
U8 BootDeviceWaitTime; /* 0x24 */
- U8 Reserved4; /* 0x25 */
+ U8 SATADeviceWaitTime; /* 0x25 */
U16 Reserved5; /* 0x26 */
U8 NumPhys; /* 0x28 */
U8 PEInitialSpinupDelay; /* 0x29 */
@@ -2595,6 +2714,7 @@ typedef struct _MPI2_CONFIG_PAGE_SAS_DEV_0
#define MPI2_SAS_DEVICE0_FLAGS_SATA_NCQ_SUPPORTED (0x0020)
#define MPI2_SAS_DEVICE0_FLAGS_SATA_FUA_SUPPORTED (0x0010)
#define MPI2_SAS_DEVICE0_FLAGS_PORT_SELECTOR_ATTACH (0x0008)
+#define MPI2_SAS_DEVICE0_FLAGS_PERSIST_CAPABLE (0x0004)
#define MPI2_SAS_DEVICE0_FLAGS_ENCL_LEVEL_VALID (0x0002)
#define MPI2_SAS_DEVICE0_FLAGS_DEVICE_PRESENT (0x0001)
@@ -2766,6 +2886,19 @@ typedef struct _MPI2_SASPHY3_PHY_EVENT_CONFIG
#define MPI2_SASPHY3_EVENT_CODE_MISALIGNED_MUX_PRIMITIVE (0xD1)
#define MPI2_SASPHY3_EVENT_CODE_RX_AIP (0xD2)
+/* Following codes are product specific and in MPI v2.6 and later */
+#define MPI2_SASPHY3_EVENT_CODE_LCARB_WAIT_TIME (0xD3)
+#define MPI2_SASPHY3_EVENT_CODE_RCVD_CONN_RESP_WAIT_TIME (0xD4)
+#define MPI2_SASPHY3_EVENT_CODE_LCCONN_TIME (0xD5)
+#define MPI2_SASPHY3_EVENT_CODE_SSP_TX_START_TRANSMIT (0xD6)
+#define MPI2_SASPHY3_EVENT_CODE_SATA_TX_START (0xD7)
+#define MPI2_SASPHY3_EVENT_CODE_SMP_TX_START_TRANSMT (0xD8)
+#define MPI2_SASPHY3_EVENT_CODE_TX_SMP_BREAK_CONN (0xD9)
+#define MPI2_SASPHY3_EVENT_CODE_SSP_RX_START_RECEIVE (0xDA)
+#define MPI2_SASPHY3_EVENT_CODE_SATA_RX_START_RECEIVE (0xDB)
+#define MPI2_SASPHY3_EVENT_CODE_SMP_RX_START_RECEIVE (0xDC)
+
+
/* values for the CounterType field */
#define MPI2_SASPHY3_COUNTER_TYPE_WRAPPING (0x00)
#define MPI2_SASPHY3_COUNTER_TYPE_SATURATING (0x01)
diff --git a/sys/dev/mpr/mpi/mpi2_hbd.h b/sys/dev/mpr/mpi/mpi2_hbd.h
index 520407b..4870071 100644
--- a/sys/dev/mpr/mpi/mpi2_hbd.h
+++ b/sys/dev/mpr/mpi/mpi2_hbd.h
@@ -1,6 +1,6 @@
/*-
* Copyright (c) 2012-2015 LSI Corp.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -34,14 +34,15 @@
/*
* Copyright (c) 2009-2015 LSI Corporation.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
+ * All rights reserved.
*
*
* Name: mpi2_hbd.h
* Title: MPI Host Based Discovery messages and structures
* Creation Date: October 21, 2009
*
- * mpi2_hbd.h Version: 02.00.02
+ * mpi2_hbd.h Version: 02.00.03
*
* NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
* prefix are for use only on MPI v2.5 products, and must not be used
@@ -57,6 +58,7 @@
* 08-11-10 02.00.01 Removed PortGroups, DmaGroup, and ControlGroup from
* HBD Action request, replaced by AdditionalInfo field.
* 11-18-11 02.00.02 Incorporating additions for MPI v2.5.
+ * 11-18-14 02.00.03 Updated copyright information.
* --------------------------------------------------------------------------
*/
diff --git a/sys/dev/mpr/mpi/mpi2_history.txt b/sys/dev/mpr/mpi/mpi2_history.txt
index 9fca796..64498a2 100644
--- a/sys/dev/mpr/mpi/mpi2_history.txt
+++ b/sys/dev/mpr/mpi/mpi2_history.txt
@@ -1,6 +1,6 @@
/*-
* Copyright (c) 2012-2015 LSI Corp.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -37,27 +37,28 @@
==============================
Copyright (c) 2000-2015 LSI Corporation.
- Copyright (c) 2013-2015 Avago Technologies
+ Copyright (c) 2013-2016 Avago Technologies
+ All rights reserved.
---------------------------------------
- Header Set Release Version: 02.00.33
- Header Set Release Date: 12-05-13
+ Header Set Release Version: 02.00.42
+ Header Set Release Date: 01-04-16
---------------------------------------
Filename Current version Prior version
---------- --------------- -------------
- mpi2.h 02.00.33 02.00.32
- mpi2_cnfg.h 02.00.27 02.00.26
- mpi2_init.h 02.00.15 02.00.15
- mpi2_ioc.h 02.00.24 02.00.23
- mpi2_raid.h 02.00.10 02.00.10
- mpi2_sas.h 02.00.08 02.00.08
- mpi2_targ.h 02.00.06 02.00.06
- mpi2_tool.h 02.00.11 02.00.11
- mpi2_type.h 02.00.00 02.00.00
- mpi2_ra.h 02.00.00 02.00.00
- mpi2_hbd.h 02.00.02 02.00.02
- mpi2_history.txt 02.00.33 02.00.32
+ mpi2.h 02.00.42 02.00.41
+ mpi2_cnfg.h 02.00.35 02.00.34
+ mpi2_init.h 02.00.20 02.00.19
+ mpi2_ioc.h 02.00.27 02.00.27
+ mpi2_raid.h 02.00.11 02.00.11
+ mpi2_sas.h 02.00.10 02.00.10
+ mpi2_targ.h 02.00.09 02.00.09
+ mpi2_tool.h 02.00.13 02.00.13
+ mpi2_type.h 02.00.01 02.00.01
+ mpi2_ra.h 02.00.01 02.00.01
+ mpi2_hbd.h 02.00.03 02.00.03
+ mpi2_history.txt 02.00.41 02.00.40
* Date Version Description
@@ -134,6 +135,22 @@ mpi2.h
* 04-17-13 02.00.31 Bumped MPI2_HEADER_VERSION_UNIT.
* 08-19-13 02.00.32 Bumped MPI2_HEADER_VERSION_UNIT.
* 12-05-13 02.00.33 Bumped MPI2_HEADER_VERSION_UNIT.
+ * 01-08-14 02.00.34 Bumped MPI2_HEADER_VERSION_UNIT.
+ * 06-13-14 02.00.35 Bumped MPI2_HEADER_VERSION_UNIT.
+ * 11-18-14 02.00.36 Updated copyright information.
+ * Bumped MPI2_HEADER_VERSION_UNIT.
+ * 03-16-15 02.00.37 Updated for MPI v2.6.
+ * Bumped MPI2_HEADER_VERSION_UNIT.
+ * Added Scratchpad registers to
+ * MPI2_SYSTEM_INTERFACE_REGS.
+ * Added MPI2_DIAG_SBR_RELOAD.
+ * Added MPI2_IOCSTATUS_INSUFFICIENT_POWER.
+ * 03-19-15 02.00.38 Bumped MPI2_HEADER_VERSION_UNIT.
+ * 05-25-15 02.00.39 Bumped MPI2_HEADER_VERSION_UNIT.
+ * 08-25-15 02.00.40 Bumped MPI2_HEADER_VERSION_UNIT.
+ * Added V7 HostDiagnostic register defines
+ * 12-15-15 02.00.41 Bumped MPI_HEADER_VERSION_UNIT
+ * 01-04-16 02.00.42 Bumped MPI_HEADER_VERSION_UNIT
* --------------------------------------------------------------------------
mpi2_cnfg.h
@@ -294,6 +311,21 @@ mpi2_cnfg.h
* MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0.
* Added MPI2_SAS_ENCLS0_FLAGS_ENCL_LEVEL_VALID for
* MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0.
+ * 01-08-14 02.00.28 Added more defines for the BiosOptions field of
+ * MPI2_CONFIG_PAGE_BIOS_1.
+ * 06-13-14 02.00.29 Added SSUTimeout field to MPI2_CONFIG_PAGE_BIOS_1, and
+ * more defines for the BiosOptions field..
+ * 11-18-14 02.00.30 Updated copyright information.
+ * Added MPI2_BIOSPAGE1_OPTIONS_ADVANCED_CONFIG.
+ * Added AdapterOrderAux fields to BIOS Page 3.
+ * 03-16-15 02.00.31 Updated for MPI v2.6.
+ * Added BoardPowerRequirement, PCISlotPowerAllocation, and
+ * Flags field to IO Unit Page 7.
+ * Added IO Unit Page 11.
+ * Added new SAS Phy Event codes
+ * 05-25-15 02.00.33 Added more defines for the BiosOptions field of
+ * MPI2_CONFIG_PAGE_BIOS_1.
+ * 12-18-15 02.00.35 Added SATADeviceWaitTime to SAS IO Unit Page 4.
* --------------------------------------------------------------------------
mpi2_init.h
@@ -323,6 +355,16 @@ mpi2_init.h
* Priority to match SAM-4.
* Added EEDPErrorOffset to MPI2_SCSI_IO_REPLY.
* 07-10-12 02.00.14 Added MPI2_SCSIIO_CONTROL_SHIFT_DATADIRECTION.
+ * 04-09-13 02.00.15 Added SCSIStatusQualifier field to MPI2_SCSI_IO_REPLY,
+ * replacing the Reserved4 field.
+ * 11-18-14 02.00.16 Updated copyright information.
+ * 03-16-15 02.00.17 Updated for MPI v2.6.
+ * Added MPI26_SCSIIO_IOFLAGS_ESCAPE_PASSTHROUGH.
+ * Added MPI2_SEP_REQ_SLOTSTATUS_DEV_OFF and
+ * MPI2_SEP_REPLY_SLOTSTATUS_DEV_OFF.
+ * 08-26-15 02.00.18 Added SCSITASKMGMT_MSGFLAGS for Target Reset.
+ * 12-18-15 02.00.19 Added EEDPObservedValue added to SCSI IO Reply message.
+ * 01-04-16 02.00.20 Modified EEDP reported values in SCSI IO Reply message.
* --------------------------------------------------------------------------
mpi2_ioc.h
@@ -441,6 +483,16 @@ mpi2_ioc.h
* Added MPI2_FW_DOWNLOAD_ITYPE_PUBLIC_KEY.
* Added Encrypted Hash Extended Image.
* 12-05-13 02.00.24 Added MPI25_HASH_IMAGE_TYPE_BIOS.
+ * 11-18-14 02.00.25 Updated copyright information.
+ * 03-16-15 02.00.26 Updated for MPI v2.6.
+ * Added MPI2_EVENT_ACTIVE_CABLE_EXCEPTION and
+ * MPI26_EVENT_DATA_ACTIVE_CABLE_EXCEPT.
+ * Added MPI2_EVENT_PCIE_LINK_COUNTER and
+ * MPI26_EVENT_DATA_PCIE_LINK_COUNTER.
+ * Added MPI26_CTRL_OP_SHUTDOWN.
+ * Added MPI26_CTRL_OP_LINK_CLEAR_ERROR_LOG
+ * Added MPI26_FW_HEADER_PID_FAMILY_3324_SAS
+ * 08-25-15 02.00.27 Added IC ARCH Class based signature defines.
* --------------------------------------------------------------------------
mpi2_raid.h
@@ -479,6 +531,9 @@ mpi2_sas.h
* Passthrough Request message.
* 08-19-13 02.00.08 Made MPI2_SAS_OP_TRANSMIT_PORT_SELECT_SIGNAL obsolete
* for anything newer than MPI v2.0.
+ * 11-18-14 02.00.09 Updated copyright information.
+ * 03-16-15 02.00.10 Updated for MPI v2.6.
+ * Added MPI2_SATA_PT_REQ_PT_FLAGS_FPDMA.
* --------------------------------------------------------------------------
mpi2_targ.h
@@ -496,6 +551,11 @@ mpi2_targ.h
* request message structure.
* Added AbortType MPI2_TARGET_MODE_ABORT_DEVHANDLE and
* MPI2_TARGET_MODE_ABORT_ALL_COMMANDS.
+ * 06-13-14 02.00.07 Added MinMSIxIndex and MaxMSIxIndex fields to
+ * MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST.
+ * 11-18-14 02.00.08 Updated copyright information.
+ * 03-16-15 02.00.09 Updated for MPI v2.6.
+ * Added MPI26_TARGET_ASSIST_IOFLAGS_ESCAPE_PASSTHROUGH.
* --------------------------------------------------------------------------
mpi2_tool.h
@@ -519,14 +579,18 @@ mpi2_tool.h
* 07-26-12 02.00.10 Modified MPI2_TOOLBOX_DIAGNOSTIC_CLI_REQUEST so that
* it uses MPI Chain SGE as well as MPI Simple SGE.
* 08-19-13 02.00.11 Added MPI2_TOOLBOX_TEXT_DISPLAY_TOOL and related info.
+ * 01-08-14 02.00.12 Added MPI2_TOOLBOX_CLEAN_BIT26_PRODUCT_SPECIFIC.
+ * 11-18-14 02.00.13 Updated copyright information.
* --------------------------------------------------------------------------
mpi2_type.h
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
+ * 11-18-14 02.00.01 Updated copyright information.
* --------------------------------------------------------------------------
mpi2_ra.h
* 05-06-09 02.00.00 Initial version.
+ * 11-18-14 02.00.01 Updated copyright information.
* --------------------------------------------------------------------------
mpi2_hbd.h
@@ -534,24 +598,53 @@ mpi2_hbd.h
* 08-11-10 02.00.01 Removed PortGroups, DmaGroup, and ControlGroup from
* HBD Action request, replaced by AdditionalInfo field.
* 11-18-11 02.00.02 Incorporating additions for MPI v2.5.
+ * 11-18-14 02.00.03 Updated copyright information.
* --------------------------------------------------------------------------
mpi2_history.txt Parts list history
-Filename 02.00.33 02.00.32 02.00.31 02.00.30
----------- -------- -------- -------- --------
-mpi2.h 02.00.33 02.00.32 02.00.31 02.00.30
-mpi2_cnfg.h 02.00.27 02.00.26 02.00.25 02.00.25
-mpi2_init.h 02.00.15 02.00.15 02.00.15 02.00.15
-mpi2_ioc.h 02.00.24 02.00.23 02.00.22 02.00.22
-mpi2_raid.h 02.00.10 02.00.10 02.00.10 02.00.09
-mpi2_sas.h 02.00.08 02.00.08 02.00.07 02.00.07
-mpi2_targ.h 02.00.06 02.00.06 02.00.06 02.00.06
-mpi2_tool.h 02.00.11 02.00.11 02.00.10 02.00.10
-mpi2_type.h 02.00.00 02.00.00 02.00.00 02.00.00
-mpi2_ra.h 02.00.00 02.00.00 02.00.00 02.00.00
-mpi2_hbd.h 02.00.02 02.00.02 02.00.02 02.00.02
+Filename 02.00.42
+---------- --------
+mpi2.h 02.00.42
+mpi2_cnfg.h 02.00.35
+mpi2_init.h 02.00.20
+mpi2_ioc.h 02.00.27
+mpi2_raid.h 02.00.11
+mpi2_sas.h 02.00.10
+mpi2_targ.h 02.00.09
+mpi2_tool.h 02.00.13
+mpi2_type.h 02.00.01
+mpi2_ra.h 02.00.01
+mpi2_hbd.h 02.00.03
+
+Filename 02.00.41 02.00.40 02.00.39 02.00.38 02.00.37 02.00.36
+---------- -------- -------- -------- -------- -------- --------
+mpi2.h 02.00.41 02.00.40 02.00.39 02.00.38 02.00.37 02.00.36
+mpi2_cnfg.h 02.00.35 02.00.34 02.00.33 02.00.32 02.00.31 02.00.30
+mpi2_init.h 02.00.19 02.00.18 02.00.17 02.00.17 02.00.17 02.00.16
+mpi2_ioc.h 02.00.27 02.00.27 02.00.26 02.00.26 02.00.26 02.00.25
+mpi2_raid.h 02.00.11 02.00.11 02.00.11 02.00.11 02.00.11 02.00.11
+mpi2_sas.h 02.00.10 02.00.10 02.00.10 02.00.10 02.00.10 02.00.09
+mpi2_targ.h 02.00.09 02.00.09 02.00.09 02.00.09 02.00.09 02.00.08
+mpi2_tool.h 02.00.13 02.00.13 02.00.13 02.00.13 02.00.13 02.00.13
+mpi2_type.h 02.00.01 02.00.01 02.00.01 02.00.01 02.00.01 02.00.01
+mpi2_ra.h 02.00.01 02.00.01 02.00.01 02.00.01 02.00.01 02.00.01
+mpi2_hbd.h 02.00.03 02.00.03 02.00.03 02.00.03 02.00.03 02.00.03
+
+Filename 02.00.35 02.00.34 02.00.33 02.00.32 02.00.31 02.00.30
+---------- -------- -------- -------- -------- -------- --------
+mpi2.h 02.00.35 02.00.34 02.00.33 02.00.32 02.00.31 02.00.30
+mpi2_cnfg.h 02.00.29 02.00.28 02.00.27 02.00.26 02.00.25 02.00.25
+mpi2_init.h 02.00.15 02.00.15 02.00.15 02.00.15 02.00.15 02.00.15
+mpi2_ioc.h 02.00.24 02.00.24 02.00.24 02.00.23 02.00.22 02.00.22
+mpi2_raid.h 02.00.10 02.00.10 02.00.10 02.00.10 02.00.10 02.00.09
+mpi2_sas.h 02.00.08 02.00.08 02.00.08 02.00.08 02.00.07 02.00.07
+mpi2_targ.h 02.00.07 02.00.06 02.00.06 02.00.06 02.00.06 02.00.06
+mpi2_tool.h 02.00.12 02.00.12 02.00.11 02.00.11 02.00.10 02.00.10
+mpi2_type.h 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00
+mpi2_ra.h 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00
+mpi2_hbd.h 02.00.02 02.00.02 02.00.02 02.00.02 02.00.02 02.00.02
Filename 02.00.29 02.00.28 02.00.27 02.00.26 02.00.25 02.00.24
---------- -------- -------- -------- -------- -------- --------
diff --git a/sys/dev/mpr/mpi/mpi2_init.h b/sys/dev/mpr/mpi/mpi2_init.h
index 5f475c0..12b2689 100644
--- a/sys/dev/mpr/mpi/mpi2_init.h
+++ b/sys/dev/mpr/mpi/mpi2_init.h
@@ -1,6 +1,6 @@
/*-
* Copyright (c) 2012-2015 LSI Corp.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -34,14 +34,15 @@
/*
* Copyright (c) 2000-2015 LSI Corporation.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
+ * All rights reserved.
*
*
* Name: mpi2_init.h
* Title: MPI SCSI initiator mode messages and structures
* Creation Date: June 23, 2006
*
- * mpi2_init.h Version: 02.00.15
+ * mpi2_init.h Version: 02.00.20
*
* NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
* prefix are for use only on MPI v2.5 products, and must not be used
@@ -81,6 +82,14 @@
* 07-10-12 02.00.14 Added MPI2_SCSIIO_CONTROL_SHIFT_DATADIRECTION.
* 04-09-13 02.00.15 Added SCSIStatusQualifier field to MPI2_SCSI_IO_REPLY,
* replacing the Reserved4 field.
+ * 11-18-14 02.00.16 Updated copyright information.
+ * 03-16-15 02.00.17 Updated for MPI v2.6.
+ * Added MPI26_SCSIIO_IOFLAGS_ESCAPE_PASSTHROUGH.
+ * Added MPI2_SEP_REQ_SLOTSTATUS_DEV_OFF and
+ * MPI2_SEP_REPLY_SLOTSTATUS_DEV_OFF.
+ * 08-26-15 02.00.18 Added SCSITASKMGMT_MSGFLAGS for Target Reset.
+ * 12-18-15 02.00.19 Added EEDPObservedValue added to SCSI IO Reply message.
+ * 01-04-16 02.00.20 Modified EEDP reported values in SCSI IO Reply message.
* --------------------------------------------------------------------------
*/
@@ -164,8 +173,9 @@ typedef struct _MPI2_SCSI_IO_REQUEST
#define MPI2_SCSIIO_MSGFLAGS_MASK_SENSE_ADDR (0x0C)
#define MPI2_SCSIIO_MSGFLAGS_SYSTEM_SENSE_ADDR (0x00)
#define MPI2_SCSIIO_MSGFLAGS_IOCDDR_SENSE_ADDR (0x04)
-#define MPI2_SCSIIO_MSGFLAGS_IOCPLB_SENSE_ADDR (0x08)
-#define MPI2_SCSIIO_MSGFLAGS_IOCPLBNTA_SENSE_ADDR (0x0C)
+#define MPI2_SCSIIO_MSGFLAGS_IOCPLB_SENSE_ADDR (0x08) /* for MPI v2.5 and earlier only */
+#define MPI2_SCSIIO_MSGFLAGS_IOCPLBNTA_SENSE_ADDR (0x0C) /* for MPI v2.5 and earlier only */
+#define MPI26_SCSIIO_MSGFLAGS_IOCCTL_SENSE_ADDR (0x08) /* for MPI v2.6 only */
/* SCSI IO SGLFlags bits */
@@ -268,7 +278,7 @@ typedef union _MPI25_SCSI_IO_CDB_UNION
} MPI25_SCSI_IO_CDB_UNION, MPI2_POINTER PTR_MPI25_SCSI_IO_CDB_UNION,
Mpi25ScsiIoCdb_t, MPI2_POINTER pMpi25ScsiIoCdb_t;
-/* MPI v2.5 SCSI IO Request Message */
+/* MPI v2.5/2.6 SCSI IO Request Message */
typedef struct _MPI25_SCSI_IO_REQUEST
{
U16 DevHandle; /* 0x00 */
@@ -347,8 +357,10 @@ typedef struct _MPI25_SCSI_IO_REQUEST
#define MPI25_SCSIIO_IOFLAGS_NORMAL_PATH (0x0000)
#define MPI25_SCSIIO_IOFLAGS_FAST_PATH (0x4000)
+#define MPI26_SCSIIO_IOFLAGS_ESCAPE_PASSTHROUGH (0x2000) /* MPI v2.6 and later */
#define MPI25_SCSIIO_IOFLAGS_LARGE_CDB (0x1000)
#define MPI25_SCSIIO_IOFLAGS_BIDIRECTIONAL (0x0800)
+#define MPI26_SCSIIO_IOFLAGS_PORT_REQUEST (0x0400) /* MPI v2.6 and later; IOC use only */
#define MPI25_SCSIIO_IOFLAGS_CDBLENGTH_MASK (0x01FF)
/* MPI v2.5 defines for the EEDPFlags bits */
@@ -394,11 +406,19 @@ typedef struct _MPI2_SCSI_IO_REPLY
U16 TaskTag; /* 0x20 */
U16 SCSIStatusQualifier; /* 0x22 */
U32 BidirectionalTransferCount; /* 0x24 */
- U32 EEDPErrorOffset; /* 0x28 */ /* MPI 2.5 only; Reserved in MPI 2.0 */
- U32 Reserved6; /* 0x2C */
+ U32 EEDPErrorOffset; /* 0x28 */ /* MPI 2.5+ only; Reserved in MPI 2.0 */
+ U16 EEDPObservedAppTag; /* 0x2C */ /* MPI 2.5+ only; Reserved in MPI 2.0 */
+ U16 EEDPObservedGuard; /* 0x2E */ /* MPI 2.5+ only; Reserved in MPI 2.0 */
+ U32 EEDPObservedRefTag; /* 0x30 */ /* MPI 2.5+ only; Reserved in MPI 2.0 */
} MPI2_SCSI_IO_REPLY, MPI2_POINTER PTR_MPI2_SCSI_IO_REPLY,
Mpi2SCSIIOReply_t, MPI2_POINTER pMpi2SCSIIOReply_t;
+/* SCSI IO Reply MsgFlags bits */
+#define MPI26_SCSIIO_REPLY_MSGFLAGS_REFTAG_OBSERVED_VALID (0x01)
+#define MPI26_SCSIIO_REPLY_MSGFLAGS_GUARD_OBSERVED_VALID (0x02)
+#define MPI26_SCSIIO_REPLY_MSGFLAGS_APPTAG_OBSERVED_VALID (0x04)
+
+
/* SCSI IO Reply SCSIStatus values (SAM-4 status codes) */
#define MPI2_SCSI_STATUS_GOOD (0x00)
@@ -474,12 +494,10 @@ typedef struct _MPI2_SCSI_TASK_MANAGE_REQUEST
#define MPI2_SCSITASKMGMT_MSGFLAGS_MASK_TARGET_RESET (0x18)
#define MPI2_SCSITASKMGMT_MSGFLAGS_LINK_RESET (0x00)
+#define MPI2_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU (0x01)
#define MPI2_SCSITASKMGMT_MSGFLAGS_NEXUS_RESET_SRST (0x08)
#define MPI2_SCSITASKMGMT_MSGFLAGS_SAS_HARD_LINK_RESET (0x10)
-#define MPI2_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU (0x01)
-
-
/* SCSI Task Management Reply Message */
typedef struct _MPI2_SCSI_TASK_MANAGE_REPLY
@@ -561,6 +579,7 @@ typedef struct _MPI2_SEP_REQUEST
#define MPI2_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS (0x01)
/* SlotStatus defines */
+#define MPI2_SEP_REQ_SLOTSTATUS_DEV_OFF (0x00080000) /* MPI v2.6 and newer */
#define MPI2_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000)
#define MPI2_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
#define MPI2_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
@@ -598,6 +617,7 @@ typedef struct _MPI2_SEP_REPLY
Mpi2SepReply_t, MPI2_POINTER pMpi2SepReply_t;
/* SlotStatus defines */
+#define MPI2_SEP_REPLY_SLOTSTATUS_DEV_OFF (0x00080000) /* MPI v2.6 and newer */
#define MPI2_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000)
#define MPI2_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
#define MPI2_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
diff --git a/sys/dev/mpr/mpi/mpi2_ioc.h b/sys/dev/mpr/mpi/mpi2_ioc.h
index 54f39a5..37f01c6 100644
--- a/sys/dev/mpr/mpi/mpi2_ioc.h
+++ b/sys/dev/mpr/mpi/mpi2_ioc.h
@@ -1,6 +1,6 @@
/*-
* Copyright (c) 2012-2015 LSI Corp.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -34,14 +34,15 @@
/*
* Copyright (c) 2000-2015 LSI Corporation.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
+ * All rights reserved.
*
*
* Name: mpi2_ioc.h
* Title: MPI IOC, Port, Event, FW Download, and FW Upload messages
* Creation Date: October 11, 2006
*
- * mpi2_ioc.h Version: 02.00.24
+ * mpi2_ioc.h Version: 02.00.27
*
* NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
* prefix are for use only on MPI v2.5 products, and must not be used
@@ -168,6 +169,17 @@
* Added MPI2_FW_DOWNLOAD_ITYPE_PUBLIC_KEY.
* Added Encrypted Hash Extended Image.
* 12-05-13 02.00.24 Added MPI25_HASH_IMAGE_TYPE_BIOS.
+ * 11-18-14 02.00.25 Updated copyright information.
+ * 03-16-15 02.00.26 Updated for MPI v2.6.
+ * Added MPI2_EVENT_ACTIVE_CABLE_EXCEPTION and
+ * MPI26_EVENT_DATA_ACTIVE_CABLE_EXCEPT.
+ * Added MPI2_EVENT_PCIE_LINK_COUNTER and
+ * MPI26_EVENT_DATA_PCIE_LINK_COUNTER.
+ * Added MPI26_CTRL_OP_SHUTDOWN.
+ * Added MPI26_CTRL_OP_LINK_CLEAR_ERROR_LOG
+ * Added MPI26_FW_HEADER_PID_FAMILY_3324_SAS
+ * 08-25-15 02.00.27 Added IC ARCH Class based signature defines
+ *
* --------------------------------------------------------------------------
*/
@@ -200,8 +212,8 @@ typedef struct _MPI2_IOC_INIT_REQUEST
U16 MsgVersion; /* 0x0C */
U16 HeaderVersion; /* 0x0E */
U32 Reserved5; /* 0x10 */
- U16 Reserved6; /* 0x14 */
- U8 Reserved7; /* 0x16 */
+ U16 ConfigurationFlags; /* 0x14 */
+ U8 HostPageSize; /* 0x16 */
U8 HostMSIxVectors; /* 0x17 */
U16 Reserved8; /* 0x18 */
U16 SystemRequestFrameSize; /* 0x1A */
@@ -329,7 +341,12 @@ typedef struct _MPI2_IOC_FACTS_REPLY
U16 MaxDevHandle; /* 0x38 */
U16 MaxPersistentEntries; /* 0x3A */
U16 MinDevHandle; /* 0x3C */
- U16 Reserved4; /* 0x3E */
+ U8 CurrentHostPageSize; /* 0x3E */
+ U8 Reserved4; /* 0x3F */
+ U8 SGEModifierMask; /* 0x40 */
+ U8 SGEModifierValue; /* 0x41 */
+ U8 SGEModifierShift; /* 0x42 */
+ U8 Reserved5; /* 0x43 */
} MPI2_IOC_FACTS_REPLY, MPI2_POINTER PTR_MPI2_IOC_FACTS_REPLY,
Mpi2IOCFactsReply_t, MPI2_POINTER pMpi2IOCFactsReply_t;
@@ -383,8 +400,8 @@ typedef struct _MPI2_IOC_FACTS_REPLY
#define MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING (0x00000004)
/* ProtocolFlags */
-#define MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET (0x0001)
#define MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR (0x0002)
+#define MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET (0x0001)
/****************************************************************************
@@ -559,6 +576,7 @@ typedef struct _MPI2_EVENT_NOTIFICATION_REPLY
#define MPI2_EVENT_TEMP_THRESHOLD (0x0027)
#define MPI2_EVENT_HOST_MESSAGE (0x0028)
#define MPI2_EVENT_POWER_PERFORMANCE_CHANGE (0x0029)
+#define MPI2_EVENT_ACTIVE_CABLE_EXCEPTION (0x0034) /* MPI v2.6 and later */
#define MPI2_EVENT_MIN_PRODUCT_SPECIFIC (0x006E)
#define MPI2_EVENT_MAX_PRODUCT_SPECIFIC (0x007F)
@@ -630,7 +648,7 @@ typedef struct _MPI2_EVENT_DATA_HOST_MESSAGE
Mpi2EventDataHostMessage_t, MPI2_POINTER pMpi2EventDataHostMessage_t;
-/* Power Performance Change Event */
+/* Power Performance Change Event data */
typedef struct _MPI2_EVENT_DATA_POWER_PERF_CHANGE
{
@@ -656,6 +674,23 @@ typedef struct _MPI2_EVENT_DATA_POWER_PERF_CHANGE
#define MPI2_EVENT_PM_MODE_STANDBY (0x06)
+/* Active Cable Exception Event data */
+
+typedef struct _MPI26_EVENT_DATA_ACTIVE_CABLE_EXCEPT
+{
+ U32 ActiveCablePowerRequirement; /* 0x00 */
+ U8 ReasonCode; /* 0x04 */
+ U8 ReceptacleID; /* 0x05 */
+ U16 Reserved1; /* 0x06 */
+} MPI26_EVENT_DATA_ACTIVE_CABLE_EXCEPT,
+ MPI2_POINTER PTR_MPI26_EVENT_DATA_ACTIVE_CABLE_EXCEPT,
+ Mpi26EventDataActiveCableExcept_t,
+ MPI2_POINTER pMpi26EventDataActiveCableExcept_t;
+
+/* defines for ReasonCode field */
+#define MPI26_EVENT_ACTIVE_CABLE_INSUFFICIENT_POWER (0x00)
+
+
/* Hard Reset Received Event data */
typedef struct _MPI2_EVENT_DATA_HARD_RESET_RECEIVED
@@ -1130,7 +1165,6 @@ typedef struct _MPI2_EVENT_DATA_HBD_PHY
#define MPI2_EVENT_HBD_DT_SAS (0x01)
-
/****************************************************************************
* EventAck message
****************************************************************************/
@@ -1348,6 +1382,7 @@ typedef struct _MPI2_FW_UPLOAD_REQUEST
#define MPI2_FW_UPLOAD_ITYPE_MEGARAID (0x09)
#define MPI2_FW_UPLOAD_ITYPE_COMPLETE (0x0A)
#define MPI2_FW_UPLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B)
+#define MPI2_FW_UPLOAD_ITYPE_CBB_BACKUP (0x0D)
/* MPI v2.0 FWUpload TransactionContext Element */
typedef struct _MPI2_FW_UPLOAD_TCSGE
@@ -1436,7 +1471,7 @@ typedef struct _MPI2_FW_IMAGE_HEADER
U32 Reserved54; /* 0x54 */
U32 Reserved58; /* 0x58 */
U32 Reserved5C; /* 0x5C */
- U32 Reserved60; /* 0x60 */
+ U32 BootFlags; /* 0x60 */ /* reserved in MPI v2.5 and earlier */
U32 FirmwareVersionNameWhat; /* 0x64 */
U8 FirmwareVersionName[32]; /* 0x68 */
U32 VendorNameWhat; /* 0x88 */
@@ -1462,18 +1497,27 @@ typedef struct _MPI2_FW_IMAGE_HEADER
#define MPI2_FW_HEADER_SIGNATURE_OFFSET (0x00)
#define MPI2_FW_HEADER_SIGNATURE_MASK (0xFF000000)
#define MPI2_FW_HEADER_SIGNATURE (0xEA000000)
+#define MPI26_FW_HEADER_SIGNATURE (0xEB000000)
/* Signature0 field */
#define MPI2_FW_HEADER_SIGNATURE0_OFFSET (0x04)
#define MPI2_FW_HEADER_SIGNATURE0 (0x5AFAA55A)
+#define MPI26_FW_HEADER_SIGNATURE0_BASE (0x5AEAA500) /* Last byte is defined by architecture */
+#define MPI26_FW_HEADER_SIGNATURE0_ARC_0 (0x5A)
+#define MPI26_FW_HEADER_SIGNATURE0_ARC_1 (0x00)
+#define MPI26_FW_HEADER_SIGNATURE0_ARC_2 (0x01)
+#define MPI26_FW_HEADER_SIGNATURE0 (MPI26_FW_HEADER_SIGNATURE0_BASE+MPI26_FW_HEADER_SIGNATURE0_ARC_0) // legacy (0x5AEAA55A)
+#define MPI26_FW_HEADER_SIGNATURE0_3516 (MPI26_FW_HEADER_SIGNATURE0_BASE+MPI26_FW_HEADER_SIGNATURE0_ARC_1)
/* Signature1 field */
#define MPI2_FW_HEADER_SIGNATURE1_OFFSET (0x08)
#define MPI2_FW_HEADER_SIGNATURE1 (0xA55AFAA5)
+#define MPI26_FW_HEADER_SIGNATURE1 (0xA55AEAA5)
/* Signature2 field */
#define MPI2_FW_HEADER_SIGNATURE2_OFFSET (0x0C)
#define MPI2_FW_HEADER_SIGNATURE2 (0x5AA55AFA)
+#define MPI26_FW_HEADER_SIGNATURE2 (0x5AA55AEA)
/* defines for using the ProductID field */
@@ -1491,6 +1535,8 @@ typedef struct _MPI2_FW_IMAGE_HEADER
#define MPI2_FW_HEADER_PID_FAMILY_2108_SAS (0x0013)
#define MPI2_FW_HEADER_PID_FAMILY_2208_SAS (0x0014)
#define MPI25_FW_HEADER_PID_FAMILY_3108_SAS (0x0021)
+#define MPI26_FW_HEADER_PID_FAMILY_3324_SAS (0x0028)
+#define MPI26_FW_HEADER_PID_FAMILY_3516_SAS (0x0031)
/* use MPI2_IOCFACTS_PROTOCOL_ defines for ProtocolFlags field */
@@ -1499,6 +1545,7 @@ typedef struct _MPI2_FW_IMAGE_HEADER
#define MPI2_FW_HEADER_IMAGESIZE_OFFSET (0x2C)
#define MPI2_FW_HEADER_NEXTIMAGE_OFFSET (0x30)
+#define MPI26_FW_HEADER_BOOTFLAGS_OFFSET (0x60)
#define MPI2_FW_HEADER_VERNMHWAT_OFFSET (0x64)
#define MPI2_FW_HEADER_WHAT_SIGNATURE (0x29232840)
@@ -1612,7 +1659,10 @@ typedef struct _MPI2_FLASH_LAYOUT_DATA
#define MPI2_FLASH_REGION_CONFIG_1 (0x07)
#define MPI2_FLASH_REGION_CONFIG_2 (0x08)
#define MPI2_FLASH_REGION_MEGARAID (0x09)
-#define MPI2_FLASH_REGION_INIT (0x0A)
+#define MPI2_FLASH_REGION_COMMON_BOOT_BLOCK (0x0A)
+#define MPI2_FLASH_REGION_INIT (MPI2_FLASH_REGION_COMMON_BOOT_BLOCK) /* older name */
+#define MPI2_FLASH_REGION_CBB_BACKUP (0x0D)
+
/* ImageRevision */
#define MPI2_FLASH_LAYOUT_IMAGE_REVISION (0x00)
@@ -1854,5 +1904,91 @@ typedef struct _MPI2_PWR_MGMT_CONTROL_REPLY
Mpi2PwrMgmtControlReply_t, MPI2_POINTER pMpi2PwrMgmtControlReply_t;
+/****************************************************************************
+* IO Unit Control messages (MPI v2.6 and later only.)
+****************************************************************************/
+
+/* IO Unit Control Request Message */
+typedef struct _MPI26_IOUNIT_CONTROL_REQUEST
+{
+ U8 Operation; /* 0x00 */
+ U8 Reserved1; /* 0x01 */
+ U8 ChainOffset; /* 0x02 */
+ U8 Function; /* 0x03 */
+ U16 DevHandle; /* 0x04 */
+ U8 IOCParameter; /* 0x06 */
+ U8 MsgFlags; /* 0x07 */
+ U8 VP_ID; /* 0x08 */
+ U8 VF_ID; /* 0x09 */
+ U16 Reserved3; /* 0x0A */
+ U16 Reserved4; /* 0x0C */
+ U8 PhyNum; /* 0x0E */
+ U8 PrimFlags; /* 0x0F */
+ U32 Primitive; /* 0x10 */
+ U8 LookupMethod; /* 0x14 */
+ U8 Reserved5; /* 0x15 */
+ U16 SlotNumber; /* 0x16 */
+ U64 LookupAddress; /* 0x18 */
+ U32 IOCParameterValue; /* 0x20 */
+ U32 Reserved7; /* 0x24 */
+ U32 Reserved8; /* 0x28 */
+} MPI26_IOUNIT_CONTROL_REQUEST,
+ MPI2_POINTER PTR_MPI26_IOUNIT_CONTROL_REQUEST,
+ Mpi26IoUnitControlRequest_t, MPI2_POINTER pMpi26IoUnitControlRequest_t;
+
+/* values for the Operation field */
+#define MPI26_CTRL_OP_CLEAR_ALL_PERSISTENT (0x02)
+#define MPI26_CTRL_OP_SAS_PHY_LINK_RESET (0x06)
+#define MPI26_CTRL_OP_SAS_PHY_HARD_RESET (0x07)
+#define MPI26_CTRL_OP_PHY_CLEAR_ERROR_LOG (0x08)
+#define MPI26_CTRL_OP_LINK_CLEAR_ERROR_LOG (0x09)
+#define MPI26_CTRL_OP_SAS_SEND_PRIMITIVE (0x0A)
+#define MPI26_CTRL_OP_FORCE_FULL_DISCOVERY (0x0B)
+#define MPI26_CTRL_OP_REMOVE_DEVICE (0x0D)
+#define MPI26_CTRL_OP_LOOKUP_MAPPING (0x0E)
+#define MPI26_CTRL_OP_SET_IOC_PARAMETER (0x0F)
+#define MPI26_CTRL_OP_ENABLE_FP_DEVICE (0x10)
+#define MPI26_CTRL_OP_DISABLE_FP_DEVICE (0x11)
+#define MPI26_CTRL_OP_ENABLE_FP_ALL (0x12)
+#define MPI26_CTRL_OP_DISABLE_FP_ALL (0x13)
+#define MPI26_CTRL_OP_DEV_ENABLE_NCQ (0x14)
+#define MPI26_CTRL_OP_DEV_DISABLE_NCQ (0x15)
+#define MPI26_CTRL_OP_SHUTDOWN (0x16)
+#define MPI26_CTRL_OP_DEV_ENABLE_PERSIST_CONNECTION (0x17)
+#define MPI26_CTRL_OP_DEV_DISABLE_PERSIST_CONNECTION (0x18)
+#define MPI26_CTRL_OP_DEV_CLOSE_PERSIST_CONNECTION (0x19)
+#define MPI26_CTRL_OP_PRODUCT_SPECIFIC_MIN (0x80)
+
+/* values for the PrimFlags field */
+#define MPI26_CTRL_PRIMFLAGS_SINGLE (0x08)
+#define MPI26_CTRL_PRIMFLAGS_TRIPLE (0x02)
+#define MPI26_CTRL_PRIMFLAGS_REDUNDANT (0x01)
+
+/* values for the LookupMethod field */
+#define MPI26_CTRL_LOOKUP_METHOD_WWID_ADDRESS (0x01)
+#define MPI26_CTRL_LOOKUP_METHOD_ENCLOSURE_SLOT (0x02)
+#define MPI26_CTRL_LOOKUP_METHOD_SAS_DEVICE_NAME (0x03)
+
+
+/* IO Unit Control Reply Message */
+typedef struct _MPI26_IOUNIT_CONTROL_REPLY
+{
+ U8 Operation; /* 0x00 */
+ U8 Reserved1; /* 0x01 */
+ U8 MsgLength; /* 0x02 */
+ U8 Function; /* 0x03 */
+ U16 DevHandle; /* 0x04 */
+ U8 IOCParameter; /* 0x06 */
+ U8 MsgFlags; /* 0x07 */
+ U8 VP_ID; /* 0x08 */
+ U8 VF_ID; /* 0x09 */
+ U16 Reserved3; /* 0x0A */
+ U16 Reserved4; /* 0x0C */
+ U16 IOCStatus; /* 0x0E */
+ U32 IOCLogInfo; /* 0x10 */
+} MPI26_IOUNIT_CONTROL_REPLY, MPI2_POINTER PTR_MPI26_IOUNIT_CONTROL_REPLY,
+ Mpi26IoUnitControlReply_t, MPI2_POINTER pMpi26IoUnitControlReply_t;
+
+
#endif
diff --git a/sys/dev/mpr/mpi/mpi2_ra.h b/sys/dev/mpr/mpi/mpi2_ra.h
index 02304aa..013f598 100644
--- a/sys/dev/mpr/mpi/mpi2_ra.h
+++ b/sys/dev/mpr/mpi/mpi2_ra.h
@@ -1,6 +1,6 @@
/*-
* Copyright (c) 2012-2015 LSI Corp.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -34,14 +34,15 @@
/*
* Copyright (c) 2012-2015 LSI Corporation.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
+ * All rights reserved.
*
*
* Name: mpi2_ra.h
* Title: MPI RAID Accelerator messages and structures
* Creation Date: April 13, 2009
*
- * mpi2_ra.h Version: 02.00.00
+ * mpi2_ra.h Version: 02.00.01
*
* Version History
* ---------------
@@ -49,6 +50,7 @@
* Date Version Description
* -------- -------- ------------------------------------------------------
* 05-06-09 02.00.00 Initial version.
+ * 11-18-14 02.00.01 Updated copyright information.
* --------------------------------------------------------------------------
*/
diff --git a/sys/dev/mpr/mpi/mpi2_raid.h b/sys/dev/mpr/mpi/mpi2_raid.h
index 52ebf07..81be995 100644
--- a/sys/dev/mpr/mpi/mpi2_raid.h
+++ b/sys/dev/mpr/mpi/mpi2_raid.h
@@ -1,6 +1,6 @@
/*-
* Copyright (c) 2012-2015 LSI Corp.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -34,14 +34,15 @@
/*
* Copyright (c) 2000-2015 LSI Corporation.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
+ * All rights reserved.
*
*
* Name: mpi2_raid.h
* Title: MPI Integrated RAID messages and structures
* Creation Date: April 26, 2007
*
- * mpi2_raid.h Version: 02.00.10
+ * mpi2_raid.h Version: 02.00.11
*
* Version History
* ---------------
@@ -66,6 +67,7 @@
* 07-26-12 02.00.09 Added ElapsedSeconds field to MPI2_RAID_VOL_INDICATOR.
* Added MPI2_RAID_VOL_FLAGS_ELAPSED_SECONDS_VALID define.
* 04-17-13 02.00.10 Added MPI25_RAID_ACTION_ADATA_ALLOW_PI.
+ * 11-18-14 02.00.11 Updated copyright information.
* --------------------------------------------------------------------------
*/
diff --git a/sys/dev/mpr/mpi/mpi2_sas.h b/sys/dev/mpr/mpi/mpi2_sas.h
index 7cae2c3..8f90b2b 100644
--- a/sys/dev/mpr/mpi/mpi2_sas.h
+++ b/sys/dev/mpr/mpi/mpi2_sas.h
@@ -1,6 +1,6 @@
/*-
* Copyright (c) 2012-2015 LSI Corp.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -34,14 +34,15 @@
/*
* Copyright (c) 2000-2015 LSI Corporation.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
+ * All rights reserved.
*
*
* Name: mpi2_sas.h
* Title: MPI Serial Attached SCSI structures and definitions
* Creation Date: February 9, 2007
*
- * mpi2_sas.h Version: 02.00.08
+ * mpi2_sas.h Version: 02.00.10
*
* NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
* prefix are for use only on MPI v2.5 products, and must not be used
@@ -67,6 +68,9 @@
* Passthrough Request message.
* 08-19-13 02.00.08 Made MPI2_SAS_OP_TRANSMIT_PORT_SELECT_SIGNAL obsolete
* for anything newer than MPI v2.0.
+ * 11-18-14 02.00.09 Updated copyright information.
+ * 03-16-15 02.00.10 Updated for MPI v2.6.
+ * Added MPI2_SATA_PT_REQ_PT_FLAGS_FPDMA.
* --------------------------------------------------------------------------
*/
@@ -226,6 +230,7 @@ typedef struct _MPI2_SATA_PASSTHROUGH_REQUEST
/* values for PassthroughFlags field */
#define MPI2_SATA_PT_REQ_PT_FLAGS_EXECUTE_DIAG (0x0100)
+#define MPI2_SATA_PT_REQ_PT_FLAGS_FPDMA (0x0040) /* MPI v2.6 and newer */
#define MPI2_SATA_PT_REQ_PT_FLAGS_DMA (0x0020)
#define MPI2_SATA_PT_REQ_PT_FLAGS_PIO (0x0010)
#define MPI2_SATA_PT_REQ_PT_FLAGS_UNSPECIFIED_VU (0x0004)
@@ -262,6 +267,8 @@ typedef struct _MPI2_SATA_PASSTHROUGH_REPLY
/****************************************************************************
* SAS IO Unit Control messages
+* (MPI v2.5 and earlier only.
+* Replaced by IO Unit Control messages in MPI v2.6 and later.)
****************************************************************************/
/* SAS IO Unit Control Request Message */
diff --git a/sys/dev/mpr/mpi/mpi2_targ.h b/sys/dev/mpr/mpi/mpi2_targ.h
index 85b5ac5..0216cfe 100644
--- a/sys/dev/mpr/mpi/mpi2_targ.h
+++ b/sys/dev/mpr/mpi/mpi2_targ.h
@@ -1,6 +1,6 @@
/*-
* Copyright (c) 2012-2015 LSI Corp.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -34,14 +34,15 @@
/*
* Copyright (c) 2000-2015 LSI Corporation.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
+ * All rights reserved.
*
*
* Name: mpi2_targ.h
* Title: MPI Target mode messages and structures
* Creation Date: September 8, 2006
*
- * mpi2_targ.h Version: 02.00.06
+ * mpi2_targ.h Version: 02.00.09
*
* NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
* prefix are for use only on MPI v2.5 products, and must not be used
@@ -67,6 +68,11 @@
* request message structure.
* Added AbortType MPI2_TARGET_MODE_ABORT_DEVHANDLE and
* MPI2_TARGET_MODE_ABORT_ALL_COMMANDS.
+ * 06-13-14 02.00.07 Added MinMSIxIndex and MaxMSIxIndex fields to
+ * MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST.
+ * 11-18-14 02.00.08 Updated copyright information.
+ * 03-16-15 02.00.09 Updated for MPI v2.6.
+ * Added MPI26_TARGET_ASSIST_IOFLAGS_ESCAPE_PASSTHROUGH.
* --------------------------------------------------------------------------
*/
@@ -98,7 +104,8 @@ typedef struct _MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST
U16 Reserved2; /* 0x0A */
U32 Reserved3; /* 0x0C */
U16 CmdBufferLength; /* 0x10 */
- U16 Reserved4; /* 0x12 */
+ U8 MinMSIxIndex; /* 0x12 */ /* MPI 2.5 and newer only; Reserved in MPI 2.0 */
+ U8 MaxMSIxIndex; /* 0x13 */ /* MPI 2.5 and newer only; Reserved in MPI 2.0 */
U32 BaseAddressLow; /* 0x14 */
U32 BaseAddressHigh; /* 0x18 */
} MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST,
@@ -110,8 +117,9 @@ typedef struct _MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST
#define MPI2_CMD_BUF_POST_BASE_ADDRESS_SPACE_MASK (0x0C)
#define MPI2_CMD_BUF_POST_BASE_SYSTEM_ADDRESS_SPACE (0x00)
#define MPI2_CMD_BUF_POST_BASE_IOCDDR_ADDRESS_SPACE (0x04)
-#define MPI2_CMD_BUF_POST_BASE_IOCPLB_ADDRESS_SPACE (0x08)
-#define MPI2_CMD_BUF_POST_BASE_IOCPLBNTA_ADDRESS_SPACE (0x0C)
+#define MPI2_CMD_BUF_POST_BASE_IOCPLB_ADDRESS_SPACE (0x08) /* only for MPI v2.5 and earlier */
+#define MPI26_CMD_BUF_POST_BASE_IOCCTL_ADDRESS_SPACE (0x08) /* for MPI v2.6 only */
+#define MPI2_CMD_BUF_POST_BASE_IOCPLBNTA_ADDRESS_SPACE (0x0C) /* only for MPI v2.5 and earlier */
#define MPI2_CMD_BUF_POST_BASE_FLAGS_AUTO_POST_ALL (0x01)
@@ -406,6 +414,7 @@ typedef struct _MPI25_TARGET_ASSIST_REQUEST
#define MPI25_TA_DMAFLAGS_OP_D_H_I_I (0x0F)
/* defines for the IoFlags field */
+#define MPI26_TARGET_ASSIST_IOFLAGS_ESCAPE_PASSTHROUGH (0x2000) /* MPI v2.6 and later */
#define MPI25_TARGET_ASSIST_IOFLAGS_BIDIRECTIONAL (0x0800)
#define MPI25_TARGET_ASSIST_IOFLAGS_RECEIVE_FIRST (0x0200)
diff --git a/sys/dev/mpr/mpi/mpi2_tool.h b/sys/dev/mpr/mpi/mpi2_tool.h
index 59917c0..fce98ae 100644
--- a/sys/dev/mpr/mpi/mpi2_tool.h
+++ b/sys/dev/mpr/mpi/mpi2_tool.h
@@ -1,6 +1,6 @@
/*-
* Copyright (c) 2012-2015 LSI Corp.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -34,14 +34,15 @@
/*
* Copyright (c) 2000-2015 LSI Corporation.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
+ * All rights reserved.
*
*
* Name: mpi2_tool.h
* Title: MPI diagnostic tool structures and definitions
* Creation Date: March 26, 2007
*
- * mpi2_tool.h Version: 02.00.11
+ * mpi2_tool.h Version: 02.00.13
*
* Version History
* ---------------
@@ -68,6 +69,8 @@
* 07-26-12 02.00.10 Modified MPI2_TOOLBOX_DIAGNOSTIC_CLI_REQUEST so that
* it uses MPI Chain SGE as well as MPI Simple SGE.
* 08-19-13 02.00.11 Added MPI2_TOOLBOX_TEXT_DISPLAY_TOOL and related info.
+ * 01-08-14 02.00.12 Added MPI2_TOOLBOX_CLEAN_BIT26_PRODUCT_SPECIFIC.
+ * 11-18-14 02.00.13 Updated copyright information.
* --------------------------------------------------------------------------
*/
@@ -139,6 +142,7 @@ typedef struct _MPI2_TOOLBOX_CLEAN_REQUEST
#define MPI2_TOOLBOX_CLEAN_OTHER_PERSIST_PAGES (0x20000000)
#define MPI2_TOOLBOX_CLEAN_FW_CURRENT (0x10000000)
#define MPI2_TOOLBOX_CLEAN_FW_BACKUP (0x08000000)
+#define MPI2_TOOLBOX_CLEAN_BIT26_PRODUCT_SPECIFIC (0x04000000)
#define MPI2_TOOLBOX_CLEAN_MEGARAID (0x02000000)
#define MPI2_TOOLBOX_CLEAN_INITIALIZATION (0x01000000)
#define MPI2_TOOLBOX_CLEAN_FLASH (0x00000004)
diff --git a/sys/dev/mpr/mpi/mpi2_type.h b/sys/dev/mpr/mpi/mpi2_type.h
index b063683..8e64484 100644
--- a/sys/dev/mpr/mpi/mpi2_type.h
+++ b/sys/dev/mpr/mpi/mpi2_type.h
@@ -1,6 +1,6 @@
/*-
* Copyright (c) 2012-2015 LSI Corp.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -34,14 +34,15 @@
/*
* Copyright (c) 2000-2015 LSI Corporation.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
+ * All rights reserved.
*
*
* Name: mpi2_type.h
* Title: MPI basic type definitions
* Creation Date: August 16, 2006
*
- * mpi2_type.h Version: 02.00.00
+ * mpi2_type.h Version: 02.00.01
*
* Version History
* ---------------
@@ -49,6 +50,7 @@
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
+ * 11-18-14 02.00.01 Updated copyright information.
* --------------------------------------------------------------------------
*/
diff --git a/sys/dev/mpr/mpr.c b/sys/dev/mpr/mpr.c
index 07e73c5..f5fe216 100644
--- a/sys/dev/mpr/mpr.c
+++ b/sys/dev/mpr/mpr.c
@@ -1,7 +1,7 @@
/*-
* Copyright (c) 2009 Yahoo! Inc.
* Copyright (c) 2011-2015 LSI Corp.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -92,14 +92,11 @@ static __inline void mpr_complete_command(struct mpr_softc *sc,
struct mpr_command *cm);
static void mpr_dispatch_event(struct mpr_softc *sc, uintptr_t data,
MPI2_EVENT_NOTIFICATION_REPLY *reply);
-static void mpr_config_complete(struct mpr_softc *sc,
- struct mpr_command *cm);
+static void mpr_config_complete(struct mpr_softc *sc, struct mpr_command *cm);
static void mpr_periodic(void *);
static int mpr_reregister_events(struct mpr_softc *sc);
-static void mpr_enqueue_request(struct mpr_softc *sc,
- struct mpr_command *cm);
-static int mpr_get_iocfacts(struct mpr_softc *sc,
- MPI2_IOC_FACTS_REPLY *facts);
+static void mpr_enqueue_request(struct mpr_softc *sc, struct mpr_command *cm);
+static int mpr_get_iocfacts(struct mpr_softc *sc, MPI2_IOC_FACTS_REPLY *facts);
static int mpr_wait_db_ack(struct mpr_softc *sc, int timeout, int sleep_flag);
SYSCTL_NODE(_hw, OID_AUTO, mpr, CTLFLAG_RD, 0, "MPR Driver Parameters");
@@ -444,6 +441,8 @@ mpr_iocfacts_allocate(struct mpr_softc *sc, uint8_t attaching)
(saved_facts.IOCCapabilities != sc->facts->IOCCapabilities) ||
(saved_facts.IOCRequestFrameSize !=
sc->facts->IOCRequestFrameSize) ||
+ (saved_facts.IOCMaxChainSegmentSize !=
+ sc->facts->IOCMaxChainSegmentSize) ||
(saved_facts.MaxTargets != sc->facts->MaxTargets) ||
(saved_facts.MaxSasExpanders != sc->facts->MaxSasExpanders) ||
(saved_facts.MaxEnclosures != sc->facts->MaxEnclosures) ||
@@ -550,8 +549,8 @@ mpr_iocfacts_allocate(struct mpr_softc *sc, uint8_t attaching)
error = mpr_transition_operational(sc);
if (error != 0) {
if (attaching) {
- mpr_printf(sc, "%s failed to transition to "
- "operational with error %d\n", __func__, error);
+ mpr_printf(sc, "%s failed to transition to operational "
+ "with error %d\n", __func__, error);
mpr_free(sc);
return (error);
} else {
@@ -685,7 +684,7 @@ mpr_reinit(struct mpr_softc *sc)
if (sc->mpr_flags & MPR_FLAGS_DIAGRESET) {
mpr_dprint(sc, MPR_INIT, "%s reset already in progress\n",
- __func__);
+ __func__);
return 0;
}
@@ -1191,7 +1190,28 @@ mpr_alloc_requests(struct mpr_softc *sc)
bus_dmamap_load(sc->req_dmat, sc->req_map, sc->req_frames, rsize,
mpr_memaddr_cb, &sc->req_busaddr, 0);
- rsize = sc->facts->IOCRequestFrameSize * sc->max_chains * 4;
+ /*
+ * Gen3 and beyond uses the IOCMaxChainSegmentSize from IOC Facts to
+ * get the size of a Chain Frame. Previous versions use the size as a
+ * Request Frame for the Chain Frame size. If IOCMaxChainSegmentSize
+ * is 0, use the default value. The IOCMaxChainSegmentSize is the
+ * number of 16-byte elelements that can fit in a Chain Frame, which is
+ * the size of an IEEE Simple SGE.
+ */
+ if (sc->facts->MsgVersion >= MPI2_VERSION_02_05) {
+ sc->chain_seg_size =
+ htole16(sc->facts->IOCMaxChainSegmentSize);
+ if (sc->chain_seg_size == 0) {
+ sc->chain_frame_size = MPR_DEFAULT_CHAIN_SEG_SIZE *
+ MPR_MAX_CHAIN_ELEMENT_SIZE;
+ } else {
+ sc->chain_frame_size = sc->chain_seg_size *
+ MPR_MAX_CHAIN_ELEMENT_SIZE;
+ }
+ } else {
+ sc->chain_frame_size = sc->facts->IOCRequestFrameSize * 4;
+ }
+ rsize = sc->chain_frame_size * sc->max_chains;
if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */
16, 0, /* algnmnt, boundary */
BUS_SPACE_MAXADDR, /* lowaddr */
@@ -1249,9 +1269,9 @@ mpr_alloc_requests(struct mpr_softc *sc)
for (i = 0; i < sc->max_chains; i++) {
chain = &sc->chains[i];
chain->chain = (MPI2_SGE_IO_UNION *)(sc->chain_frames +
- i * sc->facts->IOCRequestFrameSize * 4);
+ i * sc->chain_frame_size);
chain->chain_busaddr = sc->chain_busaddr +
- i * sc->facts->IOCRequestFrameSize * 4;
+ i * sc->chain_frame_size;
mpr_free_chain(sc, chain);
sc->chain_free_lowwater++;
}
@@ -1714,9 +1734,9 @@ mpr_complete_command(struct mpr_softc *sc, struct mpr_command *cm)
if (cm->cm_complete != NULL) {
mpr_dprint(sc, MPR_TRACE,
- "%s cm %p calling cm_complete %p data %p reply %p\n",
- __func__, cm, cm->cm_complete, cm->cm_complete_data,
- cm->cm_reply);
+ "%s cm %p calling cm_complete %p data %p reply %p\n",
+ __func__, cm, cm->cm_complete, cm->cm_complete_data,
+ cm->cm_reply);
cm->cm_complete(sc, cm);
}
@@ -1773,10 +1793,9 @@ mpr_sas_log_info(struct mpr_softc *sc , u32 log_info)
break;
}
- mpr_dprint(sc, MPR_INFO, "log_info(0x%08x): originator(%s), "
- "code(0x%02x), sub_code(0x%04x)\n", log_info,
- originator_str, sas_loginfo.dw.code,
- sas_loginfo.dw.subcode);
+ mpr_dprint(sc, MPR_LOG, "log_info(0x%08x): originator(%s), "
+ "code(0x%02x), sub_code(0x%04x)\n", log_info, originator_str,
+ sas_loginfo.dw.code, sas_loginfo.dw.subcode);
}
static void
@@ -1925,9 +1944,10 @@ mpr_intr_locked(void *data)
*/
rel_rep =
(MPI2_DIAG_RELEASE_REPLY *)reply;
- if (le16toh(rel_rep->IOCStatus) ==
+ if ((le16toh(rel_rep->IOCStatus) &
+ MPI2_IOCSTATUS_MASK) ==
MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED)
- {
+ {
pBuffer =
&sc->fw_diag_buffer_list[
rel_rep->BufferType];
@@ -2175,7 +2195,7 @@ mpr_add_chain(struct mpr_command *cm, int segsleft)
MPI2_REQUEST_HEADER *req;
MPI25_IEEE_SGE_CHAIN64 *ieee_sgc;
struct mpr_chain *chain;
- int space, sgc_size, current_segs, rem_segs, segs_per_frame;
+ int sgc_size, current_segs, rem_segs, segs_per_frame;
uint8_t next_chain_offset = 0;
/*
@@ -2197,8 +2217,6 @@ mpr_add_chain(struct mpr_command *cm, int segsleft)
if (chain == NULL)
return (ENOBUFS);
- space = (int)cm->cm_sc->facts->IOCRequestFrameSize * 4;
-
/*
* Note: a double-linked list is used to make it easier to walk for
* debugging.
@@ -2224,13 +2242,14 @@ mpr_add_chain(struct mpr_command *cm, int segsleft)
*/
current_segs = (cm->cm_sglsize / sgc_size) - 1;
rem_segs = segsleft - current_segs;
- segs_per_frame = space / sgc_size;
+ segs_per_frame = sc->chain_frame_size / sgc_size;
if (rem_segs > segs_per_frame) {
next_chain_offset = segs_per_frame - 1;
}
}
ieee_sgc = &((MPI25_SGE_IO_UNION *)cm->cm_sge)->IeeeChain;
- ieee_sgc->Length = next_chain_offset ? htole32((uint32_t)space) :
+ ieee_sgc->Length = next_chain_offset ?
+ htole32((uint32_t)sc->chain_frame_size) :
htole32((uint32_t)rem_segs * (uint32_t)sgc_size);
ieee_sgc->NextChainOffset = next_chain_offset;
ieee_sgc->Flags = (MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT |
@@ -2239,10 +2258,9 @@ mpr_add_chain(struct mpr_command *cm, int segsleft)
ieee_sgc->Address.High = htole32(chain->chain_busaddr >> 32);
cm->cm_sge = &((MPI25_SGE_IO_UNION *)chain->chain)->IeeeSimple;
req = (MPI2_REQUEST_HEADER *)cm->cm_req;
- req->ChainOffset = ((sc->facts->IOCRequestFrameSize * 4) -
- sgc_size) >> 4;
+ req->ChainOffset = (sc->chain_frame_size - sgc_size) >> 4;
- cm->cm_sglsize = space;
+ cm->cm_sglsize = sc->chain_frame_size;
return (0);
}
@@ -2465,10 +2483,9 @@ mpr_data_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
* user they did the wrong thing.
*/
if ((cm->cm_max_segs != 0) && (nsegs > cm->cm_max_segs)) {
- mpr_dprint(sc, MPR_ERROR,
- "%s: warning: busdma returned %d segments, "
- "more than the %d allowed\n", __func__, nsegs,
- cm->cm_max_segs);
+ mpr_dprint(sc, MPR_ERROR, "%s: warning: busdma returned %d "
+ "segments, more than the %d allowed\n", __func__, nsegs,
+ cm->cm_max_segs);
}
/*
@@ -2665,8 +2682,8 @@ mpr_request_polled(struct mpr_softc *sc, struct mpr_command *cm)
if (error) {
mpr_dprint(sc, MPR_FAULT, "Calling Reinit from %s\n", __func__);
rc = mpr_reinit(sc);
- mpr_dprint(sc, MPR_FAULT, "Reinit %s\n", (rc == 0) ?
- "success" : "failed");
+ mpr_dprint(sc, MPR_FAULT, "Reinit %s\n", (rc == 0) ? "success" :
+ "failed");
}
return (error);
}
diff --git a/sys/dev/mpr/mpr_config.c b/sys/dev/mpr/mpr_config.c
index c0ea3d5..0ba44ea 100644
--- a/sys/dev/mpr/mpr_config.c
+++ b/sys/dev/mpr/mpr_config.c
@@ -1,6 +1,6 @@
/*-
* Copyright (c) 2011-2015 LSI Corp.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
diff --git a/sys/dev/mpr/mpr_ioctl.h b/sys/dev/mpr/mpr_ioctl.h
index aa1a4cb..df41f56 100644
--- a/sys/dev/mpr/mpr_ioctl.h
+++ b/sys/dev/mpr/mpr_ioctl.h
@@ -33,7 +33,7 @@
*/
/*-
* Copyright (c) 2011-2015 LSI Corp.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
diff --git a/sys/dev/mpr/mpr_mapping.c b/sys/dev/mpr/mpr_mapping.c
index 110e6a3..0feb555 100644
--- a/sys/dev/mpr/mpr_mapping.c
+++ b/sys/dev/mpr/mpr_mapping.c
@@ -1,6 +1,6 @@
/*-
* Copyright (c) 2011-2015 LSI Corp.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
diff --git a/sys/dev/mpr/mpr_mapping.h b/sys/dev/mpr/mpr_mapping.h
index c00a3b7..258e75d 100644
--- a/sys/dev/mpr/mpr_mapping.h
+++ b/sys/dev/mpr/mpr_mapping.h
@@ -1,6 +1,6 @@
/*-
* Copyright (c) 2011-2015 LSI Corp.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
diff --git a/sys/dev/mpr/mpr_pci.c b/sys/dev/mpr/mpr_pci.c
index 7430eac..17f3f3e 100644
--- a/sys/dev/mpr/mpr_pci.c
+++ b/sys/dev/mpr/mpr_pci.c
@@ -110,6 +110,18 @@ struct mpr_ident {
0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_5" },
{ MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_6,
0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_6" },
+ { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3316_1,
+ 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3316_1" },
+ { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3316_2,
+ 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3316_2" },
+ { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3324_1,
+ 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3324_1" },
+ { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3324_2,
+ 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3324_2" },
+ { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3216,
+ 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3216" },
+ { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3224,
+ 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3224" },
{ 0, 0, 0, 0, 0, NULL }
};
diff --git a/sys/dev/mpr/mpr_sas.c b/sys/dev/mpr/mpr_sas.c
index eac3360..64c0d07 100644
--- a/sys/dev/mpr/mpr_sas.c
+++ b/sys/dev/mpr/mpr_sas.c
@@ -1,7 +1,7 @@
/*-
* Copyright (c) 2009 Yahoo! Inc.
* Copyright (c) 2011-2015 LSI Corp.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -119,13 +119,11 @@ static void mprsas_remove_complete(struct mpr_softc *, struct mpr_command *);
static void mprsas_action(struct cam_sim *sim, union ccb *ccb);
static void mprsas_poll(struct cam_sim *sim);
static void mprsas_scsiio_timeout(void *data);
-static void mprsas_abort_complete(struct mpr_softc *sc,
- struct mpr_command *cm);
+static void mprsas_abort_complete(struct mpr_softc *sc, struct mpr_command *cm);
static void mprsas_action_scsiio(struct mprsas_softc *, union ccb *);
static void mprsas_scsiio_complete(struct mpr_softc *, struct mpr_command *);
static void mprsas_action_resetdev(struct mprsas_softc *, union ccb *);
-static void mprsas_resetdev_complete(struct mpr_softc *,
- struct mpr_command *);
+static void mprsas_resetdev_complete(struct mpr_softc *, struct mpr_command *);
static int mprsas_send_abort(struct mpr_softc *sc, struct mpr_command *tm,
struct mpr_command *cm);
static void mprsas_async(void *callback_arg, uint32_t code,
@@ -142,10 +140,9 @@ static void mprsas_portenable_complete(struct mpr_softc *sc,
struct mpr_command *cm);
#if __FreeBSD_version >= 900026
-static void mprsas_smpio_complete(struct mpr_softc *sc,
- struct mpr_command *cm);
-static void mprsas_send_smpcmd(struct mprsas_softc *sassc,
- union ccb *ccb, uint64_t sasaddr);
+static void mprsas_smpio_complete(struct mpr_softc *sc, struct mpr_command *cm);
+static void mprsas_send_smpcmd(struct mprsas_softc *sassc, union ccb *ccb,
+ uint64_t sasaddr);
static void mprsas_action_smpio(struct mprsas_softc *sassc, union ccb *ccb);
#endif //FreeBSD_version >= 900026
@@ -246,6 +243,8 @@ mprsas_alloc_tm(struct mpr_softc *sc)
void
mprsas_free_tm(struct mpr_softc *sc, struct mpr_command *tm)
{
+ int target_id = 0xFFFFFFFF;
+
MPR_FUNCTRACE(sc);
if (tm == NULL)
return;
@@ -257,10 +256,11 @@ mprsas_free_tm(struct mpr_softc *sc, struct mpr_command *tm)
*/
if (tm->cm_targ != NULL) {
tm->cm_targ->flags &= ~MPRSAS_TARGET_INRESET;
+ target_id = tm->cm_targ->tid;
}
if (tm->cm_ccb) {
mpr_dprint(sc, MPR_INFO, "Unfreezing devq for target ID %d\n",
- tm->cm_targ->tid);
+ target_id);
xpt_release_devq(tm->cm_ccb->ccb_h.path, 1, TRUE);
xpt_free_path(tm->cm_ccb->ccb_h.path);
xpt_free_ccb(tm->cm_ccb);
@@ -375,15 +375,14 @@ mprsas_remove_volume(struct mpr_softc *sc, struct mpr_command *tm)
return;
}
- if (reply->IOCStatus != MPI2_IOCSTATUS_SUCCESS) {
- mpr_dprint(sc, MPR_FAULT, "IOCStatus = 0x%x while resetting "
- "device 0x%x\n", reply->IOCStatus, handle);
- mprsas_free_tm(sc, tm);
- return;
+ if ((le16toh(reply->IOCStatus) & MPI2_IOCSTATUS_MASK) !=
+ MPI2_IOCSTATUS_SUCCESS) {
+ mpr_dprint(sc, MPR_ERROR, "IOCStatus = 0x%x while resetting "
+ "device 0x%x\n", le16toh(reply->IOCStatus), handle);
}
mpr_dprint(sc, MPR_XINFO, "Reset aborted %u commands\n",
- reply->TerminationCount);
+ le32toh(reply->TerminationCount));
mpr_free_reply(sc, tm->cm_reply_data);
tm->cm_reply = NULL; /* Ensures the reply won't get re-freed */
@@ -396,7 +395,8 @@ mprsas_remove_volume(struct mpr_softc *sc, struct mpr_command *tm)
* this target id if possible, and so we can assign the same target id
* to this device if it comes back in the future.
*/
- if (reply->IOCStatus == MPI2_IOCSTATUS_SUCCESS) {
+ if ((le16toh(reply->IOCStatus) & MPI2_IOCSTATUS_MASK) ==
+ MPI2_IOCSTATUS_SUCCESS) {
targ = tm->cm_targ;
targ->handle = 0x0;
targ->encl_handle = 0x0;
@@ -564,8 +564,6 @@ mprsas_remove_device(struct mpr_softc *sc, struct mpr_command *tm)
mpr_dprint(sc, MPR_ERROR, "%s: cm_flags = %#x for remove of "
"handle %#04x! This should not happen!\n", __func__,
tm->cm_flags, handle);
- mprsas_free_tm(sc, tm);
- return;
}
if (reply == NULL) {
@@ -576,11 +574,10 @@ mprsas_remove_device(struct mpr_softc *sc, struct mpr_command *tm)
return;
}
- if (le16toh(reply->IOCStatus) != MPI2_IOCSTATUS_SUCCESS) {
- mpr_dprint(sc, MPR_FAULT, "IOCStatus = 0x%x while resetting "
+ if ((le16toh(reply->IOCStatus) & MPI2_IOCSTATUS_MASK) !=
+ MPI2_IOCSTATUS_SUCCESS) {
+ mpr_dprint(sc, MPR_ERROR, "IOCStatus = 0x%x while resetting "
"device 0x%x\n", le16toh(reply->IOCStatus), handle);
- mprsas_free_tm(sc, tm);
- return;
}
mpr_dprint(sc, MPR_XINFO, "Reset aborted %u commands\n",
@@ -661,7 +658,8 @@ mprsas_remove_complete(struct mpr_softc *sc, struct mpr_command *tm)
* this target id if possible, and so we can assign the same target id
* to this device if it comes back in the future.
*/
- if (le16toh(reply->IOCStatus) == MPI2_IOCSTATUS_SUCCESS) {
+ if ((le16toh(reply->IOCStatus) & MPI2_IOCSTATUS_MASK) ==
+ MPI2_IOCSTATUS_SUCCESS) {
targ = tm->cm_targ;
targ->handle = 0x0;
targ->encl_handle = 0x0;
@@ -707,6 +705,7 @@ mprsas_register_events(struct mpr_softc *sc)
setbit(events, MPI2_EVENT_IR_PHYSICAL_DISK);
setbit(events, MPI2_EVENT_IR_OPERATION_STATUS);
setbit(events, MPI2_EVENT_TEMP_THRESHOLD);
+ setbit(events, MPI2_EVENT_ACTIVE_CABLE_EXCEPTION);
mpr_register_events(sc, events, mprsas_evt_handler, NULL,
&sc->sassc->mprsas_eh);
@@ -926,7 +925,6 @@ mpr_detach_sas(struct mpr_softc *sc)
cam_sim_free(sassc->sim, FALSE);
}
- sassc->flags |= MPRSAS_SHUTDOWN;
mpr_unlock(sc);
if (sassc->devq != NULL)
@@ -1065,15 +1063,15 @@ mprsas_action(struct cam_sim *sim, union ccb *ccb)
mprsas_set_ccbstatus(ccb, CAM_REQ_CMP);
break;
case XPT_RESET_DEV:
- mpr_dprint(sassc->sc, MPR_XINFO,
- "mprsas_action XPT_RESET_DEV\n");
+ mpr_dprint(sassc->sc, MPR_XINFO, "mprsas_action "
+ "XPT_RESET_DEV\n");
mprsas_action_resetdev(sassc, ccb);
return;
case XPT_RESET_BUS:
case XPT_ABORT:
case XPT_TERM_IO:
- mpr_dprint(sassc->sc, MPR_XINFO,
- "mprsas_action faking success for abort or reset\n");
+ mpr_dprint(sassc->sc, MPR_XINFO, "mprsas_action faking success "
+ "for abort or reset\n");
mprsas_set_ccbstatus(ccb, CAM_REQ_CMP);
break;
case XPT_SCSI_IO:
@@ -1134,8 +1132,8 @@ mprsas_complete_all_commands(struct mpr_softc *sc)
if (cm->cm_complete != NULL) {
mprsas_log_command(cm, MPR_RECOVERY,
- "completing cm %p state %x ccb %p for diag "
- "reset\n", cm, cm->cm_state, cm->cm_ccb);
+ "completing cm %p state %x ccb %p for diag reset\n",
+ cm, cm->cm_state, cm->cm_ccb);
cm->cm_complete(sc, cm);
completed = 1;
}
@@ -1216,14 +1214,13 @@ mprsas_tm_timeout(void *data)
mtx_assert(&sc->mpr_mtx, MA_OWNED);
- mprsas_log_command(tm, MPR_INFO|MPR_RECOVERY,
- "task mgmt %p timed out\n", tm);
+ mprsas_log_command(tm, MPR_INFO|MPR_RECOVERY, "task mgmt %p timed "
+ "out\n", tm);
mpr_reinit(sc);
}
static void
-mprsas_logical_unit_reset_complete(struct mpr_softc *sc,
- struct mpr_command *tm)
+mprsas_logical_unit_reset_complete(struct mpr_softc *sc, struct mpr_command *tm)
{
MPI2_SCSI_TASK_MANAGE_REPLY *reply;
MPI2_SCSI_TASK_MANAGE_REQUEST *req;
@@ -1250,8 +1247,8 @@ mprsas_logical_unit_reset_complete(struct mpr_softc *sc,
}
if (reply == NULL) {
- mprsas_log_command(tm, MPR_RECOVERY,
- "NULL reset reply for tm %p\n", tm);
+ mprsas_log_command(tm, MPR_RECOVERY, "NULL reset reply for tm "
+ "%p\n", tm);
if ((sc->mpr_flags & MPR_FLAGS_DIAGRESET) != 0) {
/* this completion was due to a reset, just cleanup */
targ->tm = NULL;
@@ -1338,8 +1335,8 @@ mprsas_target_reset_complete(struct mpr_softc *sc, struct mpr_command *tm)
}
if (reply == NULL) {
- mprsas_log_command(tm, MPR_RECOVERY,
- "NULL reset reply for tm %p\n", tm);
+ mprsas_log_command(tm, MPR_RECOVERY, "NULL reset reply for tm "
+ "%p\n", tm);
if ((sc->mpr_flags & MPR_FLAGS_DIAGRESET) != 0) {
/* this completion was due to a reset, just cleanup */
targ->tm = NULL;
@@ -1626,9 +1623,8 @@ mprsas_scsiio_timeout(void *data)
targ = cm->cm_targ;
targ->timeouts++;
- mprsas_log_command(cm, MPR_ERROR, "command timeout cm %p ccb %p "
- "target %u, handle(0x%04x)\n", cm, cm->cm_ccb, targ->tid,
- targ->handle);
+ mprsas_log_command(cm, MPR_ERROR, "command timeout cm %p ccb %p target "
+ "%u, handle(0x%04x)\n", cm, cm->cm_ccb, targ->tid, targ->handle);
if (targ->encl_level_valid) {
mpr_dprint(sc, MPR_ERROR, "At enclosure level %d, slot %d, "
"connector name (%4s)\n", targ->encl_level, targ->encl_slot,
@@ -1666,8 +1662,8 @@ mprsas_scsiio_timeout(void *data)
* more credits than disks in an enclosure, and limit
* ourselves to one TM per target for recovery.
*/
- mpr_dprint(sc, MPR_RECOVERY,
- "timedout cm %p failed to allocate a tm\n", cm);
+ mpr_dprint(sc, MPR_RECOVERY, "timedout cm %p failed to "
+ "allocate a tm\n", cm);
}
}
@@ -1927,8 +1923,13 @@ mprsas_action_scsiio(struct mprsas_softc *sassc, union ccb *ccb)
cm->cm_desc.SCSIIO.DevHandle = htole16(targ->handle);
}
+#if __FreeBSD_version >= 1000029
callout_reset_sbt(&cm->cm_callout, SBT_1MS * ccb->ccb_h.timeout, 0,
mprsas_scsiio_timeout, cm, 0);
+#else //__FreeBSD_version < 1000029
+ callout_reset(&cm->cm_callout, (ccb->ccb_h.timeout * hz) / 1000,
+ mprsas_scsiio_timeout, cm);
+#endif //__FreeBSD_version >= 1000029
targ->issued++;
targ->outstanding++;
@@ -2053,6 +2054,9 @@ mpr_sc_failed_io_info(struct mpr_softc *sc, struct ccb_scsiio *csio,
case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
desc_ioc_state = "eedp app tag error";
break;
+ case MPI2_IOCSTATUS_INSUFFICIENT_POWER:
+ desc_ioc_state = "insufficient power";
+ break;
default:
desc_ioc_state = "unknown";
break;
@@ -2578,8 +2582,7 @@ bailout:
}
static void
-mprsas_send_smpcmd(struct mprsas_softc *sassc, union ccb *ccb,
- uint64_t sasaddr)
+mprsas_send_smpcmd(struct mprsas_softc *sassc, union ccb *ccb, uint64_t sasaddr)
{
struct mpr_command *cm;
uint8_t *request, *response;
@@ -2612,9 +2615,9 @@ mprsas_send_smpcmd(struct mprsas_softc *sassc, union ccb *ccb,
*/
if ((ccb->smpio.smp_request_sglist_cnt > 1)
|| (ccb->smpio.smp_response_sglist_cnt > 1)) {
- mpr_dprint(sc, MPR_ERROR,
- "%s: multiple request or response buffer segments "
- "not supported for SMP\n", __func__);
+ mpr_dprint(sc, MPR_ERROR, "%s: multiple request or "
+ "response buffer segments not supported for SMP\n",
+ __func__);
mprsas_set_ccbstatus(ccb, CAM_REQ_INVALID);
xpt_done(ccb);
return;
@@ -2715,8 +2718,8 @@ mprsas_send_smpcmd(struct mprsas_softc *sassc, union ccb *ccb,
cm = mpr_alloc_command(sc);
if (cm == NULL) {
- mpr_dprint(sc, MPR_ERROR,
- "%s: cannot allocate command\n", __func__);
+ mpr_dprint(sc, MPR_ERROR, "%s: cannot allocate command\n",
+ __func__);
mprsas_set_ccbstatus(ccb, CAM_RESRC_UNAVAIL);
xpt_done(ccb);
return;
@@ -2949,14 +2952,13 @@ mprsas_action_resetdev(struct mprsas_softc *sassc, union ccb *ccb)
MPR_FUNCTRACE(sassc->sc);
mtx_assert(&sassc->sc->mpr_mtx, MA_OWNED);
- KASSERT(ccb->ccb_h.target_id < sassc->maxtargets,
- ("Target %d out of bounds in XPT_RESET_DEV\n",
- ccb->ccb_h.target_id));
+ KASSERT(ccb->ccb_h.target_id < sassc->maxtargets, ("Target %d out of "
+ "bounds in XPT_RESET_DEV\n", ccb->ccb_h.target_id));
sc = sassc->sc;
tm = mpr_alloc_command(sc);
if (tm == NULL) {
- mpr_dprint(sc, MPR_ERROR,
- "command alloc failure in mprsas_action_resetdev\n");
+ mpr_dprint(sc, MPR_ERROR, "command alloc failure in "
+ "mprsas_action_resetdev\n");
mprsas_set_ccbstatus(ccb, CAM_RESRC_UNAVAIL);
xpt_done(ccb);
return;
@@ -3014,9 +3016,8 @@ mprsas_resetdev_complete(struct mpr_softc *sc, struct mpr_command *tm)
goto bailout;
}
- mpr_dprint(sc, MPR_XINFO,
- "%s: IOCStatus = 0x%x ResponseCode = 0x%x\n", __func__,
- le16toh(resp->IOCStatus), le32toh(resp->ResponseCode));
+ mpr_dprint(sc, MPR_XINFO, "%s: IOCStatus = 0x%x ResponseCode = 0x%x\n",
+ __func__, le16toh(resp->IOCStatus), le32toh(resp->ResponseCode));
if (le32toh(resp->ResponseCode) == MPI2_SCSITASKMGMT_RSP_TM_COMPLETE) {
mprsas_set_ccbstatus(ccb, CAM_REQ_CMP);
@@ -3205,8 +3206,8 @@ mprsas_check_eedp(struct mpr_softc *sc, struct cam_path *path,
targetid = xpt_path_target_id(path);
lunid = xpt_path_lun_id(path);
- KASSERT(targetid < sassc->maxtargets,
- ("Target %d out of bounds in mprsas_check_eedp\n", targetid));
+ KASSERT(targetid < sassc->maxtargets, ("Target %d out of bounds in "
+ "mprsas_check_eedp\n", targetid));
target = &sassc->targets[targetid];
if (target->handle == 0x0)
return;
@@ -3216,7 +3217,7 @@ mprsas_check_eedp(struct mpr_softc *sc, struct cam_path *path,
*
* If this flag is set in the inquiry data, the device supports
* protection information, and must support the 16 byte read capacity
- * command, otherwise continue without sending read cap 16
+ * command, otherwise continue without sending read cap 16.
*/
if ((cgd->inq_data.spc3_flags & SPC3_SID_PROTECT) == 0)
return;
@@ -3232,10 +3233,10 @@ mprsas_check_eedp(struct mpr_softc *sc, struct cam_path *path,
return;
}
- if (xpt_create_path(&local_path, xpt_periph, pathid, targetid, lunid)
- != CAM_REQ_CMP) {
+ if (xpt_create_path(&local_path, xpt_periph, pathid, targetid, lunid) !=
+ CAM_REQ_CMP) {
mpr_dprint(sc, MPR_ERROR, "Unable to create path for EEDP "
- "support\n");
+ "support.\n");
xpt_free_ccb(ccb);
return;
}
@@ -3337,9 +3338,8 @@ mprsas_read_cap_done(struct cam_periph *periph, union ccb *done_ccb)
* target.
*/
sassc = (struct mprsas_softc *)done_ccb->ccb_h.ppriv_ptr1;
- KASSERT(done_ccb->ccb_h.target_id < sassc->maxtargets,
- ("Target %d out of bounds in mprsas_read_cap_done\n",
- done_ccb->ccb_h.target_id));
+ KASSERT(done_ccb->ccb_h.target_id < sassc->maxtargets, ("Target %d out "
+ "of bounds in mprsas_read_cap_done\n", done_ccb->ccb_h.target_id));
target = &sassc->targets[done_ccb->ccb_h.target_id];
SLIST_FOREACH(lun, &target->luns, lun_link) {
if (lun->lun_id != done_ccb->ccb_h.target_lun)
diff --git a/sys/dev/mpr/mpr_sas.h b/sys/dev/mpr/mpr_sas.h
index ebeed30..614b5fe 100644
--- a/sys/dev/mpr/mpr_sas.h
+++ b/sys/dev/mpr/mpr_sas.h
@@ -1,6 +1,6 @@
/*-
* Copyright (c) 2011-2015 LSI Corp.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
diff --git a/sys/dev/mpr/mpr_sas_lsi.c b/sys/dev/mpr/mpr_sas_lsi.c
index b2ffe96..73e2f54 100644
--- a/sys/dev/mpr/mpr_sas_lsi.c
+++ b/sys/dev/mpr/mpr_sas_lsi.c
@@ -1,6 +1,6 @@
/*-
* Copyright (c) 2011-2015 LSI Corp.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -30,7 +30,7 @@
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
-/* Communications core for LSI MPT3 */
+/* Communications core for Avago Technologies (LSI) MPT3 */
/* TODO Move headers to mprvar */
#include <sys/types.h>
@@ -252,8 +252,7 @@ mprsas_fw_work(struct mpr_softc *sc, struct mpr_fw_event_work *fw_event)
data = (MPI2_EVENT_DATA_SAS_DISCOVERY *)fw_event->event_data;
if (data->ReasonCode & MPI2_EVENT_SAS_DISC_RC_STARTED)
- mpr_dprint(sc, MPR_TRACE,"SAS discovery start "
- "event\n");
+ mpr_dprint(sc, MPR_TRACE,"SAS discovery start event\n");
if (data->ReasonCode & MPI2_EVENT_SAS_DISC_RC_COMPLETED) {
mpr_dprint(sc, MPR_TRACE,"SAS discovery stop event\n");
sassc->flags &= ~MPRSAS_IN_DISCOVERY;
@@ -646,6 +645,23 @@ skip_fp_send:
}
break;
}
+ case MPI2_EVENT_ACTIVE_CABLE_EXCEPTION:
+ {
+ pMpi26EventDataActiveCableExcept_t ace_event_data;
+ ace_event_data =
+ (pMpi26EventDataActiveCableExcept_t)fw_event->event_data;
+
+ if (ace_event_data->ReasonCode ==
+ MPI26_EVENT_ACTIVE_CABLE_INSUFFICIENT_POWER) {
+ mpr_printf(sc, "Currently an active cable with "
+ "ReceptacleID %d cannot be powered and device "
+ "connected to this active cable will not be seen. "
+ "This active cable requires %d mW of power.\n",
+ ace_event_data->ReceptacleID,
+ ace_event_data->ActiveCablePowerRequirement);
+ }
+ break;
+ }
case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
default:
@@ -839,8 +855,8 @@ mprsas_add_device(struct mpr_softc *sc, u16 handle, u8 linkrate){
MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET);
} else {
mpr_dprint(sc, MPR_ERROR, "Failed to allocate "
- "tm for Target Reset after SATA ID "
- "command timed out (cm %p)\n", cm);
+ "tm for Target Reset after SATA ID command "
+ "timed out (cm %p)\n", cm);
}
/*
* No need to check for more since the target is
@@ -901,9 +917,8 @@ mprsas_get_sas_address_for_sata_disk(struct mpr_softc *sc,
}
}
} while (((rc && (rc != EWOULDBLOCK)) ||
- (ioc_status &&
- (ioc_status != MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR))
- || sas_status) && (try_count < 5));
+ (ioc_status && (ioc_status != MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR))
+ || sas_status) && (try_count < 5));
if (rc == 0 && !ioc_status && !sas_status) {
mpr_dprint(sc, MPR_MAPPING, "%s: got SATA identify "
@@ -1059,8 +1074,8 @@ mprsas_ata_id_timeout(void *data)
__func__, cm, sc);
if ((callout_pending(&cm->cm_callout)) ||
(!callout_active(&cm->cm_callout))) {
- mpr_dprint(sc, MPR_INFO, "%s ATA ID command almost timed "
- "out\n", __func__);
+ mpr_dprint(sc, MPR_INFO, "%s ATA ID command almost timed out\n",
+ __func__);
return;
}
callout_deactivate(&cm->cm_callout);
@@ -1072,21 +1087,21 @@ mprsas_ata_id_timeout(void *data)
*/
mpr_intr_locked(sc);
if (cm->cm_state == MPR_CM_STATE_FREE) {
- mpr_dprint(sc, MPR_INFO, "%s ATA ID command almost timed "
- "out\n", __func__);
+ mpr_dprint(sc, MPR_INFO, "%s ATA ID command almost timed out\n",
+ __func__);
return;
}
mpr_dprint(sc, MPR_INFO, "ATA ID command timeout cm %p\n", cm);
/*
- * Send wakeup() to the sleeping thread that issued this ATA ID
- * command. wakeup() will cause msleep to return a 0 (not EWOULDBLOCK),
- * and this will keep reinit() from being called. This way, an Abort
- * Task TM can be issued so that the timed out command can be cleared.
- * The Abort Task cannot be sent from here because the driver has not
- * completed setting up targets. Instead, the command is flagged so
- * that special handling will be used to send the abort.
+ * Send wakeup() to the sleeping thread that issued this ATA ID command.
+ * wakeup() will cause msleep to return a 0 (not EWOULDBLOCK), and this
+ * will keep reinit() from being called. This way, an Abort Task TM can
+ * be issued so that the timed out command can be cleared. The Abort
+ * Task cannot be sent from here because the driver has not completed
+ * setting up targets. Instead, the command is flagged so that special
+ * handling will be used to send the abort.
*/
cm->cm_flags |= MPR_CM_FLAGS_SATA_ID_TIMEOUT;
wakeup(cm);
@@ -1257,15 +1272,15 @@ mprsas_stop_unit_done(struct cam_periph *periph, union ccb *done_ccb)
struct mprsas_softc *sassc;
char path_str[64];
+ if (done_ccb == NULL)
+ return;
+
sassc = (struct mprsas_softc *)done_ccb->ccb_h.ppriv_ptr1;
xpt_path_string(done_ccb->ccb_h.path, path_str, sizeof(path_str));
mpr_dprint(sassc->sc, MPR_INFO, "Completing stop unit for %s\n",
path_str);
- if (done_ccb == NULL)
- return;
-
/*
* Nothing more to do except free the CCB and path. If the command
* timed out, an abort reset, then target reset will be issued during
diff --git a/sys/dev/mpr/mpr_table.c b/sys/dev/mpr/mpr_table.c
index 6e7797e..6ec6492 100644
--- a/sys/dev/mpr/mpr_table.c
+++ b/sys/dev/mpr/mpr_table.c
@@ -342,9 +342,8 @@ mpr_print_evt_sas(struct mpr_softc *sc, MPI2_EVENT_NOTIFICATION_REPLY *event)
"PHY[%d].LinkRate: %s (0x%x)\n", phynum,
mpr_describe_table(mpr_linkrate_names,
(phy->LinkRate >> 4) & 0xf), phy->LinkRate);
- mpr_dprint_field(sc,MPR_EVENT,"PHY[%d].PhyStatus: "
- "%s\n", phynum,
- mpr_describe_table(mpr_phystatus_names,
+ mpr_dprint_field(sc,MPR_EVENT,"PHY[%d].PhyStatus: %s\n",
+ phynum, mpr_describe_table(mpr_phystatus_names,
phy->PhyStatus));
}
break;
diff --git a/sys/dev/mpr/mpr_user.c b/sys/dev/mpr/mpr_user.c
index 37d9467..db8de93 100644
--- a/sys/dev/mpr/mpr_user.c
+++ b/sys/dev/mpr/mpr_user.c
@@ -31,7 +31,7 @@
*/
/*-
* Copyright (c) 2011-2015 LSI Corp.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -130,24 +130,23 @@ static mpr_user_f mpi_pre_config;
static mpr_user_f mpi_pre_sas_io_unit_control;
static int mpr_user_read_cfg_header(struct mpr_softc *,
- struct mpr_cfg_page_req *);
+ struct mpr_cfg_page_req *);
static int mpr_user_read_cfg_page(struct mpr_softc *,
- struct mpr_cfg_page_req *, void *);
+ struct mpr_cfg_page_req *, void *);
static int mpr_user_read_extcfg_header(struct mpr_softc *,
- struct mpr_ext_cfg_page_req *);
+ struct mpr_ext_cfg_page_req *);
static int mpr_user_read_extcfg_page(struct mpr_softc *,
- struct mpr_ext_cfg_page_req *, void *);
+ struct mpr_ext_cfg_page_req *, void *);
static int mpr_user_write_cfg_page(struct mpr_softc *,
- struct mpr_cfg_page_req *, void *);
+ struct mpr_cfg_page_req *, void *);
static int mpr_user_setup_request(struct mpr_command *,
- struct mpr_usr_command *);
+ struct mpr_usr_command *);
static int mpr_user_command(struct mpr_softc *, struct mpr_usr_command *);
static int mpr_user_pass_thru(struct mpr_softc *sc, mpr_pass_thru_t *data);
static void mpr_user_get_adapter_data(struct mpr_softc *sc,
mpr_adapter_data_t *data);
-static void mpr_user_read_pci_info(struct mpr_softc *sc,
- mpr_pci_info_t *data);
+static void mpr_user_read_pci_info(struct mpr_softc *sc, mpr_pci_info_t *data);
static uint8_t mpr_get_fw_diag_buffer_number(struct mpr_softc *sc,
uint32_t unique_id);
static int mpr_post_fw_diag_buffer(struct mpr_softc *sc,
@@ -159,8 +158,8 @@ static int mpr_diag_register(struct mpr_softc *sc,
mpr_fw_diag_register_t *diag_register, uint32_t *return_code);
static int mpr_diag_unregister(struct mpr_softc *sc,
mpr_fw_diag_unregister_t *diag_unregister, uint32_t *return_code);
-static int mpr_diag_query(struct mpr_softc *sc,
- mpr_fw_diag_query_t *diag_query, uint32_t *return_code);
+static int mpr_diag_query(struct mpr_softc *sc, mpr_fw_diag_query_t *diag_query,
+ uint32_t *return_code);
static int mpr_diag_read_buffer(struct mpr_softc *sc,
mpr_diag_read_buffer_t *diag_read_buffer, uint8_t *ioctl_buf,
uint32_t *return_code);
@@ -168,10 +167,8 @@ static int mpr_diag_release(struct mpr_softc *sc,
mpr_fw_diag_release_t *diag_release, uint32_t *return_code);
static int mpr_do_diag_action(struct mpr_softc *sc, uint32_t action,
uint8_t *diag_action, uint32_t length, uint32_t *return_code);
-static int mpr_user_diag_action(struct mpr_softc *sc,
- mpr_diag_action_t *data);
-static void mpr_user_event_query(struct mpr_softc *sc,
- mpr_event_query_t *data);
+static int mpr_user_diag_action(struct mpr_softc *sc, mpr_diag_action_t *data);
+static void mpr_user_event_query(struct mpr_softc *sc, mpr_event_query_t *data);
static void mpr_user_event_enable(struct mpr_softc *sc,
mpr_event_enable_t *data);
static int mpr_user_event_report(struct mpr_softc *sc,
@@ -212,11 +209,12 @@ mpr_attach_user(struct mpr_softc *sc)
int unit;
unit = device_get_unit(sc->mpr_dev);
- sc->mpr_cdev = make_dev(&mpr_cdevsw, unit, UID_ROOT, GID_OPERATOR,
- 0640, "mpr%d", unit);
- if (sc->mpr_cdev == NULL) {
+ sc->mpr_cdev = make_dev(&mpr_cdevsw, unit, UID_ROOT, GID_OPERATOR, 0640,
+ "mpr%d", unit);
+
+ if (sc->mpr_cdev == NULL)
return (ENOMEM);
- }
+
sc->mpr_cdev->si_drv1 = sc;
return (0);
}
@@ -284,8 +282,8 @@ mpr_user_read_cfg_header(struct mpr_softc *sc,
}
static int
-mpr_user_read_cfg_page(struct mpr_softc *sc,
- struct mpr_cfg_page_req *page_req, void *buf)
+mpr_user_read_cfg_page(struct mpr_softc *sc, struct mpr_cfg_page_req *page_req,
+ void *buf)
{
MPI2_CONFIG_PAGE_HEADER *reqhdr, *hdr;
struct mpr_config_params params;
@@ -1257,12 +1255,14 @@ mpr_post_fw_diag_buffer(struct mpr_softc *sc,
* Process POST reply.
*/
reply = (MPI2_DIAG_BUFFER_POST_REPLY *)cm->cm_reply;
- if (reply->IOCStatus != MPI2_IOCSTATUS_SUCCESS) {
+ if ((le16toh(reply->IOCStatus) & MPI2_IOCSTATUS_MASK) !=
+ MPI2_IOCSTATUS_SUCCESS) {
status = MPR_DIAG_FAILURE;
mpr_dprint(sc, MPR_FAULT, "%s: post of FW Diag Buffer failed "
"with IOCStatus = 0x%x, IOCLogInfo = 0x%x and "
- "TransferLength = 0x%x\n", __func__, reply->IOCStatus,
- reply->IOCLogInfo, reply->TransferLength);
+ "TransferLength = 0x%x\n", __func__,
+ le16toh(reply->IOCStatus), le32toh(reply->IOCLogInfo),
+ le32toh(reply->TransferLength));
goto done;
}
@@ -1341,12 +1341,13 @@ mpr_release_fw_diag_buffer(struct mpr_softc *sc,
* Process RELEASE reply.
*/
reply = (MPI2_DIAG_RELEASE_REPLY *)cm->cm_reply;
- if ((reply->IOCStatus != MPI2_IOCSTATUS_SUCCESS) ||
- pBuffer->owned_by_firmware) {
+ if (((le16toh(reply->IOCStatus) & MPI2_IOCSTATUS_MASK) !=
+ MPI2_IOCSTATUS_SUCCESS) || pBuffer->owned_by_firmware) {
status = MPR_DIAG_FAILURE;
mpr_dprint(sc, MPR_FAULT, "%s: release of FW Diag Buffer "
"failed with IOCStatus = 0x%x and IOCLogInfo = 0x%x\n",
- __func__, reply->IOCStatus, reply->IOCLogInfo);
+ __func__, le16toh(reply->IOCStatus),
+ le32toh(reply->IOCLogInfo));
goto done;
}
@@ -1718,8 +1719,8 @@ mpr_diag_release(struct mpr_softc *sc, mpr_fw_diag_release_t *diag_release,
}
static int
-mpr_do_diag_action(struct mpr_softc *sc, uint32_t action,
- uint8_t *diag_action, uint32_t length, uint32_t *return_code)
+mpr_do_diag_action(struct mpr_softc *sc, uint32_t action, uint8_t *diag_action,
+ uint32_t length, uint32_t *return_code)
{
mpr_fw_diag_register_t diag_register;
mpr_fw_diag_unregister_t diag_unregister;
diff --git a/sys/dev/mpr/mprvar.h b/sys/dev/mpr/mprvar.h
index acac44c..c2e8917 100644
--- a/sys/dev/mpr/mprvar.h
+++ b/sys/dev/mpr/mprvar.h
@@ -1,7 +1,7 @@
/*-
* Copyright (c) 2009 Yahoo! Inc.
* Copyright (c) 2011-2015 LSI Corp.
- * Copyright (c) 2013-2015 Avago Technologies
+ * Copyright (c) 2013-2016 Avago Technologies
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -33,7 +33,7 @@
#ifndef _MPRVAR_H
#define _MPRVAR_H
-#define MPR_DRIVER_VERSION "09.255.01.00-fbsd"
+#define MPR_DRIVER_VERSION "13.00.00.00-fbsd"
#define MPR_DB_MAX_WAIT 2500
@@ -46,6 +46,8 @@
#define MPR_SGE64_SIZE 12
#define MPR_SGE32_SIZE 8
#define MPR_SGC_SIZE 8
+#define MPR_DEFAULT_CHAIN_SEG_SIZE 8
+#define MPR_MAX_CHAIN_ELEMENT_SIZE 16
#define MPR_FUNCTRACE(sc) \
mpr_dprint((sc), MPR_TRACE, "%s\n", __func__)
@@ -263,6 +265,8 @@ struct mpr_softc {
int chain_free;
int max_chains;
int chain_free_lowwater;
+ uint32_t chain_frame_size;
+ uint16_t chain_seg_size;
u_int enable_ssu;
int spinup_wait_time;
#if __FreeBSD_version >= 900030
@@ -590,13 +594,13 @@ do { \
#define mpr_dprint(sc, level, msg, args...) \
do { \
- if ((sc)->mpr_debug & level) \
+ if ((sc)->mpr_debug & (level)) \
device_printf((sc)->mpr_dev, msg, ##args); \
} while (0)
#define mpr_dprint_field(sc, level, msg, args...) \
do { \
- if ((sc)->mpr_debug & level) \
+ if ((sc)->mpr_debug & (level)) \
printf("\t" msg, ##args); \
} while (0)
@@ -658,8 +662,7 @@ void mpr_intr_locked(void *);
int mpr_register_events(struct mpr_softc *, uint8_t *, mpr_evt_callback_t *,
void *, struct mpr_event_handle **);
int mpr_restart(struct mpr_softc *);
-int mpr_update_events(struct mpr_softc *, struct mpr_event_handle *,
- uint8_t *);
+int mpr_update_events(struct mpr_softc *, struct mpr_event_handle *, uint8_t *);
int mpr_deregister_events(struct mpr_softc *, struct mpr_event_handle *);
int mpr_push_sge(struct mpr_command *, MPI2_SGE_SIMPLE64 *, size_t, int);
int mpr_push_ieee_sge(struct mpr_command *, void *, int);
@@ -676,8 +679,8 @@ void mprsas_record_event(struct mpr_softc *sc,
MPI2_EVENT_NOTIFICATION_REPLY *event_reply);
int mpr_map_command(struct mpr_softc *sc, struct mpr_command *cm);
-int mpr_wait_command(struct mpr_softc *sc, struct mpr_command *cm,
- int timeout, int sleep_flag);
+int mpr_wait_command(struct mpr_softc *sc, struct mpr_command *cm, int timeout,
+ int sleep_flag);
int mpr_request_polled(struct mpr_softc *sc, struct mpr_command *cm);
int mpr_config_get_bios_pg3(struct mpr_softc *sc, Mpi2ConfigReply_t
@@ -732,11 +735,10 @@ void mpr_mapping_ir_config_change_event(struct mpr_softc *sc,
void mprsas_evt_handler(struct mpr_softc *sc, uintptr_t data,
MPI2_EVENT_NOTIFICATION_REPLY *event);
void mprsas_prepare_remove(struct mprsas_softc *sassc, uint16_t handle);
-void mprsas_prepare_volume_remove(struct mprsas_softc *sassc,
- uint16_t handle);
+void mprsas_prepare_volume_remove(struct mprsas_softc *sassc, uint16_t handle);
int mprsas_startup(struct mpr_softc *sc);
-struct mprsas_target * mprsas_find_target_by_handle(struct mprsas_softc *,
- int, uint16_t);
+struct mprsas_target * mprsas_find_target_by_handle(struct mprsas_softc *, int,
+ uint16_t);
void mprsas_realloc_targets(struct mpr_softc *sc, int maxtargets);
struct mpr_command * mprsas_alloc_tm(struct mpr_softc *sc);
void mprsas_free_tm(struct mpr_softc *sc, struct mpr_command *tm);
diff --git a/sys/dev/pccbb/pccbb_pci.c b/sys/dev/pccbb/pccbb_pci.c
index e1ed5c2..cf79258 100644
--- a/sys/dev/pccbb/pccbb_pci.c
+++ b/sys/dev/pccbb/pccbb_pci.c
@@ -366,7 +366,7 @@ cbb_pci_attach(device_t brdev)
SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "memory",
CTLFLAG_RD, &sc->subbus, 0, "Memory window open");
SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "premem",
- CTLFLAG_RD, &sc->subbus, 0, "Prefetch memroy window open");
+ CTLFLAG_RD, &sc->subbus, 0, "Prefetch memory window open");
SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "io1",
CTLFLAG_RD, &sc->subbus, 0, "io range 1 open");
SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "io2",
diff --git a/sys/dev/wbwd/wbwd.c b/sys/dev/wbwd/wbwd.c
index 75fbea4..c0053ba 100644
--- a/sys/dev/wbwd/wbwd.c
+++ b/sys/dev/wbwd/wbwd.c
@@ -754,7 +754,7 @@ wb_attach(device_t dev)
sc = device_get_softc(dev);
KASSERT(sc->ext_cfg_enter_f != NULL && sc->ext_cfg_exit_f != NULL,
- ("%s: successfull probe result but not setup correctly", __func__));
+ ("%s: successful probe result but not setup correctly", __func__));
/* Watchdog is configured as part of LDN 8 (GPIO Port2, Watchdog). */
write_reg(sc, WB_LDN_REG, WB_LDN_REG_LDN8);
diff --git a/sys/dev/wtap/if_wtap.c b/sys/dev/wtap/if_wtap.c
index 6bc8e6b..a32f9b8 100644
--- a/sys/dev/wtap/if_wtap.c
+++ b/sys/dev/wtap/if_wtap.c
@@ -131,7 +131,7 @@ wtap_node_ioctl(struct cdev *dev, u_long cmd, caddr_t data,
switch(cmd) {
default:
- DWTAP_PRINTF("Unkown WTAP IOCTL\n");
+ DWTAP_PRINTF("Unknown WTAP IOCTL\n");
error = EINVAL;
}
return error;
diff --git a/sys/dev/wtap/if_wtap_module.c b/sys/dev/wtap/if_wtap_module.c
index 7a87d57..1528dca 100644
--- a/sys/dev/wtap/if_wtap_module.c
+++ b/sys/dev/wtap/if_wtap_module.c
@@ -89,7 +89,7 @@
MALLOC_DEFINE(M_WTAP, "wtap", "wtap wireless simulator");
MALLOC_DEFINE(M_WTAP_PACKET, "wtap packet", "wtap wireless simulator packet");
MALLOC_DEFINE(M_WTAP_RXBUF, "wtap rxbuf",
- "wtap wireless simulator recieve buffer");
+ "wtap wireless simulator receive buffer");
MALLOC_DEFINE(M_WTAP_PLUGIN, "wtap plugin", "wtap wireless simulator plugin");
static struct wtap_hal *hal;
@@ -123,7 +123,7 @@ wtap_ioctl(struct cdev *dev, u_long cmd, caddr_t data,
error = EINVAL;
break;
default:
- DWTAP_PRINTF("Unkown WTAP IOCTL\n");
+ DWTAP_PRINTF("Unknown WTAP IOCTL\n");
error = EINVAL;
}
diff --git a/sys/dev/wtap/plugins/visibility.c b/sys/dev/wtap/plugins/visibility.c
index a73d520..10cb7d1 100644
--- a/sys/dev/wtap/plugins/visibility.c
+++ b/sys/dev/wtap/plugins/visibility.c
@@ -231,7 +231,7 @@ vis_ioctl(struct cdev *sdev, u_long cmd, caddr_t data,
#endif
break;
default:
- DWTAP_PRINTF("Unkown WTAP IOCTL\n");
+ DWTAP_PRINTF("Unknown WTAP IOCTL\n");
error = EINVAL;
}
diff --git a/sys/fs/nfsclient/nfs_clport.c b/sys/fs/nfsclient/nfs_clport.c
index f6919ab..68d33f0 100644
--- a/sys/fs/nfsclient/nfs_clport.c
+++ b/sys/fs/nfsclient/nfs_clport.c
@@ -279,7 +279,7 @@ nfscl_nget(struct mount *mntp, struct vnode *dvp, struct nfsfh *nfhp,
}
/*
- * Anothe variant of nfs_nget(). This one is only used by reopen. It
+ * Another variant of nfs_nget(). This one is only used by reopen. It
* takes almost the same args as nfs_nget(), but only succeeds if an entry
* exists in the cache. (Since files should already be "open" with a
* vnode ref cnt on the node when reopen calls this, it should always
@@ -318,21 +318,24 @@ nfscl_ngetreopen(struct mount *mntp, u_int8_t *fhp, int fhsize,
NFSVOPUNLOCK(nvp, 0);
} else if (error == EBUSY) {
/*
- * The LK_EXCLOTHER lock type tells nfs_lock1() to not try
- * and lock the vnode, but just get a v_usecount on it.
- * LK_NOWAIT is set so that when vget() returns ENOENT,
- * vfs_hash_get() fails instead of looping.
- * If this succeeds, it is safe so long as a vflush() with
+ * It is safe so long as a vflush() with
* FORCECLOSE has not been done. Since the Renew thread is
* stopped and the MNTK_UNMOUNTF flag is set before doing
* a vflush() with FORCECLOSE, we should be ok here.
*/
if ((mntp->mnt_kern_flag & MNTK_UNMOUNTF))
error = EINTR;
- else
- error = vfs_hash_get(mntp, hash,
- (LK_EXCLOTHER | LK_NOWAIT), td, &nvp,
- newnfs_vncmpf, nfhp);
+ else {
+ vfs_hash_ref(mntp, hash, td, &nvp, newnfs_vncmpf, nfhp);
+ if (nvp == NULL) {
+ error = ENOENT;
+ } else if ((nvp->v_iflag & VI_DOOMED) != 0) {
+ error = ENOENT;
+ vrele(nvp);
+ } else {
+ error = 0;
+ }
+ }
}
FREE(nfhp, M_NFSFH);
if (error)
diff --git a/sys/fs/nfsclient/nfs_clvnops.c b/sys/fs/nfsclient/nfs_clvnops.c
index 1013164..ac0d179 100644
--- a/sys/fs/nfsclient/nfs_clvnops.c
+++ b/sys/fs/nfsclient/nfs_clvnops.c
@@ -139,7 +139,6 @@ static vop_rmdir_t nfs_rmdir;
static vop_symlink_t nfs_symlink;
static vop_readdir_t nfs_readdir;
static vop_strategy_t nfs_strategy;
-static vop_lock1_t nfs_lock1;
static int nfs_lookitup(struct vnode *, char *, int,
struct ucred *, struct thread *, struct nfsnode **);
static int nfs_sillyrename(struct vnode *, struct vnode *,
@@ -168,7 +167,6 @@ struct vop_vector newnfs_vnodeops = {
.vop_putpages = ncl_putpages,
.vop_inactive = ncl_inactive,
.vop_link = nfs_link,
- .vop_lock1 = nfs_lock1,
.vop_lookup = nfs_lookup,
.vop_mkdir = nfs_mkdir,
.vop_mknod = nfs_mknod,
@@ -3350,37 +3348,6 @@ struct buf_ops buf_ops_newnfs = {
.bop_bdflush = bufbdflush,
};
-/*
- * Cloned from vop_stdlock(), and then the ugly hack added.
- */
-static int
-nfs_lock1(struct vop_lock1_args *ap)
-{
- struct vnode *vp = ap->a_vp;
- int error = 0;
-
- /*
- * Since vfs_hash_get() calls vget() and it will no longer work
- * for FreeBSD8 with flags == 0, I can only think of this horrible
- * hack to work around it. I call vfs_hash_get() with LK_EXCLOTHER
- * and then handle it here. All I want for this case is a v_usecount
- * on the vnode to use for recovery, while another thread might
- * hold a lock on the vnode. I have the other threads blocked, so
- * there isn't any race problem.
- */
- if ((ap->a_flags & LK_TYPE_MASK) == LK_EXCLOTHER) {
- if ((ap->a_flags & LK_INTERLOCK) == 0)
- panic("ncllock1");
- if ((vp->v_iflag & VI_DOOMED))
- error = ENOENT;
- VI_UNLOCK(vp);
- return (error);
- }
- return (_lockmgr_args(vp->v_vnlock, ap->a_flags, VI_MTX(vp),
- LK_WMESG_DEFAULT, LK_PRIO_DEFAULT, LK_TIMO_DEFAULT, ap->a_file,
- ap->a_line));
-}
-
static int
nfs_getacl(struct vop_getacl_args *ap)
{
diff --git a/sys/kern/uipc_syscalls.c b/sys/kern/uipc_syscalls.c
index fa36849..97ca115 100644
--- a/sys/kern/uipc_syscalls.c
+++ b/sys/kern/uipc_syscalls.c
@@ -1787,6 +1787,9 @@ sockargs(mp, buf, buflen, type)
struct mbuf *m;
int error;
+ if (buflen < 0)
+ return (EINVAL);
+
if (buflen > MLEN) {
#ifdef COMPAT_OLDSOCK
if (type == MT_SONAME && buflen <= 112)
diff --git a/sys/kern/vfs_hash.c b/sys/kern/vfs_hash.c
index edcda6b..d2fbbd6 100644
--- a/sys/kern/vfs_hash.c
+++ b/sys/kern/vfs_hash.c
@@ -69,7 +69,8 @@ vfs_hash_bucket(const struct mount *mp, u_int hash)
}
int
-vfs_hash_get(const struct mount *mp, u_int hash, int flags, struct thread *td, struct vnode **vpp, vfs_hash_cmp_t *fn, void *arg)
+vfs_hash_get(const struct mount *mp, u_int hash, int flags, struct thread *td,
+ struct vnode **vpp, vfs_hash_cmp_t *fn, void *arg)
{
struct vnode *vp;
int error;
@@ -102,6 +103,36 @@ vfs_hash_get(const struct mount *mp, u_int hash, int flags, struct thread *td, s
}
void
+vfs_hash_ref(const struct mount *mp, u_int hash, struct thread *td,
+ struct vnode **vpp, vfs_hash_cmp_t *fn, void *arg)
+{
+ struct vnode *vp;
+
+ while (1) {
+ mtx_lock(&vfs_hash_mtx);
+ LIST_FOREACH(vp, vfs_hash_bucket(mp, hash), v_hashlist) {
+ if (vp->v_hash != hash)
+ continue;
+ if (vp->v_mount != mp)
+ continue;
+ if (fn != NULL && fn(vp, arg))
+ continue;
+ vhold(vp);
+ mtx_unlock(&vfs_hash_mtx);
+ vref(vp);
+ vdrop(vp);
+ *vpp = vp;
+ return;
+ }
+ if (vp == NULL) {
+ mtx_unlock(&vfs_hash_mtx);
+ *vpp = NULL;
+ return;
+ }
+ }
+}
+
+void
vfs_hash_remove(struct vnode *vp)
{
@@ -111,7 +142,8 @@ vfs_hash_remove(struct vnode *vp)
}
int
-vfs_hash_insert(struct vnode *vp, u_int hash, int flags, struct thread *td, struct vnode **vpp, vfs_hash_cmp_t *fn, void *arg)
+vfs_hash_insert(struct vnode *vp, u_int hash, int flags, struct thread *td,
+ struct vnode **vpp, vfs_hash_cmp_t *fn, void *arg)
{
struct vnode *vp2;
int error;
diff --git a/sys/netinet/tcp_syncache.c b/sys/netinet/tcp_syncache.c
index fe2eb0b..0398b03 100644
--- a/sys/netinet/tcp_syncache.c
+++ b/sys/netinet/tcp_syncache.c
@@ -124,7 +124,7 @@ SYSCTL_VNET_INT(_net_inet_tcp, OID_AUTO, syncookies_only, CTLFLAG_RW,
static void syncache_drop(struct syncache *, struct syncache_head *);
static void syncache_free(struct syncache *);
static void syncache_insert(struct syncache *, struct syncache_head *);
-static int syncache_respond(struct syncache *);
+static int syncache_respond(struct syncache *, const struct mbuf *);
static struct socket *syncache_socket(struct syncache *, struct socket *,
struct mbuf *m);
static int syncache_sysctl_count(SYSCTL_HANDLER_ARGS);
@@ -480,7 +480,7 @@ syncache_timer(void *xsch)
free(s, M_TCPLOG);
}
- (void) syncache_respond(sc);
+ (void) syncache_respond(sc, NULL);
TCPSTAT_INC(tcps_sc_retransmitted);
syncache_timeout(sc, sch, 0);
}
@@ -1307,7 +1307,7 @@ syncache_add(struct in_conninfo *inc, struct tcpopt *to, struct tcphdr *th,
s, __func__);
free(s, M_TCPLOG);
}
- if (syncache_respond(sc) == 0) {
+ if (syncache_respond(sc, m) == 0) {
sc->sc_rxmits = 0;
syncache_timeout(sc, sch, 1);
TCPSTAT_INC(tcps_sndacks);
@@ -1476,7 +1476,7 @@ skip_alloc:
/*
* Do a standard 3-way handshake.
*/
- if (syncache_respond(sc) == 0) {
+ if (syncache_respond(sc, m) == 0) {
if (V_tcp_syncookies && V_tcp_syncookiesonly && sc != &scs)
syncache_free(sc);
else if (sc != &scs)
@@ -1506,8 +1506,12 @@ tfo_done:
return (rv);
}
+/*
+ * Send SYN|ACK to the peer. Either in response to the peer's SYN,
+ * i.e. m0 != NULL, or upon 3WHS ACK timeout, i.e. m0 == NULL.
+ */
static int
-syncache_respond(struct syncache *sc)
+syncache_respond(struct syncache *sc, const struct mbuf *m0)
{
struct ip *ip = NULL;
struct mbuf *m;
@@ -1664,6 +1668,15 @@ syncache_respond(struct syncache *sc)
M_SETFIB(m, sc->sc_inc.inc_fibnum);
m->m_pkthdr.csum_data = offsetof(struct tcphdr, th_sum);
+ /*
+ * If we have peer's SYN and it has a flowid, then let's assign it to
+ * our SYN|ACK. ip6_output() and ip_output() will not assign flowid
+ * to SYN|ACK due to lack of inp here.
+ */
+ if (m0 != NULL && M_HASHTYPE_GET(m0) != M_HASHTYPE_NONE) {
+ m->m_pkthdr.flowid = m0->m_pkthdr.flowid;
+ M_HASHTYPE_SET(m, M_HASHTYPE_GET(m0));
+ }
#ifdef INET6
if (sc->sc_inc.inc_flags & INC_ISIPV6) {
m->m_pkthdr.csum_flags = CSUM_TCP_IPV6;
diff --git a/sys/sys/ata.h b/sys/sys/ata.h
index 5df610e..672ee41 100644
--- a/sys/sys/ata.h
+++ b/sys/sys/ata.h
@@ -377,10 +377,10 @@ struct ata_params {
#define ATA_NCQ_NON_DATA 0x63 /* NCQ non-data command */
#define ATA_SEND_FPDMA_QUEUED 0x64 /* send DMA NCQ */
#define ATA_SFPDMA_DSM 0x00 /* Data set management */
-#define ATA_SFPDMA_DSM_TRIM 0x01 /* Set trim bit in auxilary */
+#define ATA_SFPDMA_DSM_TRIM 0x01 /* Set trim bit in auxiliary */
#define ATA_SFPDMA_HYBRID_EVICT 0x01 /* Hybrid Evict */
#define ATA_SFPDMA_WLDMA 0x02 /* Write Log DMA EXT */
-#define ATA_RECV_FPDMA_QUEUED 0x65 /* recieve DMA NCQ */
+#define ATA_RECV_FPDMA_QUEUED 0x65 /* receive DMA NCQ */
#define ATA_SEP_ATTN 0x67 /* SEP request */
#define ATA_SEEK 0x70 /* seek */
#define ATA_PACKET_CMD 0xa0 /* packet command */
diff --git a/sys/sys/buf.h b/sys/sys/buf.h
index 540d812..6e35741 100644
--- a/sys/sys/buf.h
+++ b/sys/sys/buf.h
@@ -204,7 +204,7 @@ struct buf {
#define B_UNMAPPED 0x00000800 /* KVA is not mapped. */
#define B_KVAALLOC 0x00001000 /* But allocated. */
#define B_INVAL 0x00002000 /* Does not contain valid info. */
-#define B_BARRIER 0x00004000 /* Write this and all preceeding first. */
+#define B_BARRIER 0x00004000 /* Write this and all preceding first. */
#define B_NOCACHE 0x00008000 /* Do not cache block after use. */
#define B_MALLOC 0x00010000 /* malloced b_data */
#define B_CLUSTEROK 0x00020000 /* Pagein op, so swap() can count it. */
diff --git a/sys/sys/buf_ring.h b/sys/sys/buf_ring.h
index d36c607..ef93056 100644
--- a/sys/sys/buf_ring.h
+++ b/sys/sys/buf_ring.h
@@ -98,7 +98,7 @@ buf_ring_enqueue(struct buf_ring *br, void *buf)
/*
* If there are other enqueues in progress
- * that preceeded us, we need to wait for them
+ * that preceded us, we need to wait for them
* to complete
*/
while (br->br_prod_tail != prod_head)
@@ -135,7 +135,7 @@ buf_ring_dequeue_mc(struct buf_ring *br)
#endif
/*
* If there are other dequeues in progress
- * that preceeded us, we need to wait for them
+ * that preceded us, we need to wait for them
* to complete
*/
while (br->br_cons_tail != cons_head)
diff --git a/sys/sys/iconv.h b/sys/sys/iconv.h
index 5e59795..44a03e961 100644
--- a/sys/sys/iconv.h
+++ b/sys/sys/iconv.h
@@ -65,7 +65,7 @@ struct iconv_cspair_info {
};
/*
- * Paramters for 'add' sysctl
+ * Parameters for 'add' sysctl
*/
#define ICONV_ADD_VER 1
diff --git a/sys/sys/imgact_binmisc.h b/sys/sys/imgact_binmisc.h
index f1ed1d8..ea1b601 100644
--- a/sys/sys/imgact_binmisc.h
+++ b/sys/sys/imgact_binmisc.h
@@ -41,7 +41,7 @@
#define IBE_NAME_MAX 32 /* Max size for entry name. */
#define IBE_MAGIC_MAX 256 /* Max size for header magic and mask. */
#define IBE_ARG_LEN_MAX 256 /* Max space for optional interpreter command-
- line argruments seperated by white space */
+ line argruments separated by white space */
#define IBE_INTERP_LEN_MAX (MAXPATHLEN + IBE_ARG_LEN_MAX)
#define IBE_MAX_ENTRIES 64 /* Max number of interpreter entries. */
diff --git a/sys/sys/imgact_elf.h b/sys/sys/imgact_elf.h
index 4388f75..5f55dd9 100644
--- a/sys/sys/imgact_elf.h
+++ b/sys/sys/imgact_elf.h
@@ -40,7 +40,7 @@
struct thread;
/*
- * Structure used to pass infomation from the loader to the
+ * Structure used to pass information from the loader to the
* stack fixup routine.
*/
typedef struct {
diff --git a/sys/sys/ipc.h b/sys/sys/ipc.h
index e643d48..19f1d39 100644
--- a/sys/sys/ipc.h
+++ b/sys/sys/ipc.h
@@ -112,7 +112,7 @@ struct ipc_perm {
#define IPC_STAT 2 /* get options */
#if __BSD_VISIBLE
/*
- * For Linux compatability.
+ * For Linux compatibility.
*/
#define IPC_INFO 3 /* get info */
#endif
diff --git a/sys/sys/ipmi.h b/sys/sys/ipmi.h
index 578d78c..b8e318a 100644
--- a/sys/sys/ipmi.h
+++ b/sys/sys/ipmi.h
@@ -122,7 +122,7 @@ struct ipmi_ipmb_addr {
};
#if defined(__amd64__)
-/* Compatiblity with 32-bit binaries. */
+/* Compatibility with 32-bit binaries. */
#define IPMICTL_RECEIVE_MSG_TRUNC_32 _IOWR(IPMI_IOC_MAGIC, 11, struct ipmi_recv32)
#define IPMICTL_RECEIVE_MSG_32 _IOWR(IPMI_IOC_MAGIC, 12, struct ipmi_recv32)
diff --git a/sys/sys/linker.h b/sys/sys/linker.h
index ce4d86e..f6f2ec2 100644
--- a/sys/sys/linker.h
+++ b/sys/sys/linker.h
@@ -158,7 +158,7 @@ int linker_file_function_listall(linker_file_t,
linker_function_nameval_callback_t, void *);
/*
- * Functions soley for use by the linker class handlers.
+ * Functions solely for use by the linker class handlers.
*/
int linker_add_class(linker_class_t _cls);
int linker_file_unload(linker_file_t _file, int flags);
diff --git a/sys/sys/memrange.h b/sys/sys/memrange.h
index 32ae238..6d6ff0e 100644
--- a/sys/sys/memrange.h
+++ b/sys/sys/memrange.h
@@ -1,5 +1,5 @@
/*
- * Memory range attribute operations, peformed on /dev/mem
+ * Memory range attribute operations, performed on /dev/mem
*
* $FreeBSD$
*/
diff --git a/sys/sys/param.h b/sys/sys/param.h
index bf32156..2b8abf9 100644
--- a/sys/sys/param.h
+++ b/sys/sys/param.h
@@ -58,7 +58,7 @@
* in the range 5 to 9.
*/
#undef __FreeBSD_version
-#define __FreeBSD_version 1003501 /* Master, propagated to newvers */
+#define __FreeBSD_version 1003502 /* Master, propagated to newvers */
/*
* __FreeBSD_kernel__ indicates that this system uses the kernel of FreeBSD,
diff --git a/sys/sys/pmc.h b/sys/sys/pmc.h
index 7e52824..23bef0a 100644
--- a/sys/sys/pmc.h
+++ b/sys/sys/pmc.h
@@ -264,7 +264,7 @@ enum pmc_disp {
__PMC_CAP(THRESHOLD, 4, "ignore events below a threshold") \
__PMC_CAP(READ, 5, "read PMC counter") \
__PMC_CAP(WRITE, 6, "reprogram PMC counter") \
- __PMC_CAP(INVERT, 7, "invert comparision sense") \
+ __PMC_CAP(INVERT, 7, "invert comparison sense") \
__PMC_CAP(QUALIFIER, 8, "further qualify monitored events") \
__PMC_CAP(PRECISE, 9, "perform precise sampling") \
__PMC_CAP(TAGGING, 10, "tag upstream events") \
@@ -568,7 +568,7 @@ struct pmc_op_writelog {
/*
* OP GETMSR
*
- * Retrieve the machine specific address assoicated with the allocated
+ * Retrieve the machine specific address associated with the allocated
* PMC. This number can be used subsequently with a read-performance-counter
* instruction.
*/
diff --git a/sys/sys/priority.h b/sys/sys/priority.h
index 6548a35..a2cd3b7 100644
--- a/sys/sys/priority.h
+++ b/sys/sys/priority.h
@@ -126,7 +126,7 @@
struct priority {
u_char pri_class; /* Scheduling class. */
u_char pri_level; /* Normal priority level. */
- u_char pri_native; /* Priority before propogation. */
+ u_char pri_native; /* Priority before propagation. */
u_char pri_user; /* User priority based on p_cpu and p_nice. */
};
diff --git a/sys/sys/priv.h b/sys/sys/priv.h
index 7347149..9cd852e 100644
--- a/sys/sys/priv.h
+++ b/sys/sys/priv.h
@@ -133,7 +133,7 @@
#define PRIV_JAIL_REMOVE 112 /* Remove a jail. */
/*
- * Kernel environment priveleges.
+ * Kernel environment privileges.
*/
#define PRIV_KENV_SET 120 /* Set kernel env. variables. */
#define PRIV_KENV_UNSET 121 /* Unset kernel env. variables. */
diff --git a/sys/sys/proc.h b/sys/sys/proc.h
index 119349a..836e123 100644
--- a/sys/sys/proc.h
+++ b/sys/sys/proc.h
@@ -406,7 +406,7 @@ do { \
#define TDP_BUFNEED 0x00000008 /* Do not recurse into the buf flush */
#define TDP_COWINPROGRESS 0x00000010 /* Snapshot copy-on-write in progress. */
#define TDP_ALTSTACK 0x00000020 /* Have alternate signal stack. */
-#define TDP_DEADLKTREAT 0x00000040 /* Lock aquisition - deadlock treatment. */
+#define TDP_DEADLKTREAT 0x00000040 /* Lock acquisition - deadlock treatment. */
#define TDP_NOFAULTING 0x00000080 /* Do not handle page faults. */
#define TDP_UNUSED9 0x00000100 /* --available-- */
#define TDP_OWEUPC 0x00000200 /* Call addupc() at next AST. */
diff --git a/sys/sys/procctl.h b/sys/sys/procctl.h
index 75dbf53..c6f1e94 100644
--- a/sys/sys/procctl.h
+++ b/sys/sys/procctl.h
@@ -88,7 +88,7 @@ struct procctl_reaper_kill {
int rk_sig; /* in - signal to send */
u_int rk_flags; /* in - REAPER_KILL flags */
pid_t rk_subtree; /* in - subtree, if REAPER_KILL_SUBTREE */
- u_int rk_killed; /* out - count of processes sucessfully
+ u_int rk_killed; /* out - count of processes successfully
killed */
pid_t rk_fpid; /* out - first failed pid for which error
is returned */
diff --git a/sys/sys/shm.h b/sys/sys/shm.h
index 799bbf5..ed068e7 100644
--- a/sys/sys/shm.h
+++ b/sys/sys/shm.h
@@ -56,7 +56,7 @@
#define SHM_LOCK 11
#define SHM_UNLOCK 12
-/* ipcs shmctl commands for Linux compatability */
+/* ipcs shmctl commands for Linux compatibility */
#define SHM_STAT 13
#define SHM_INFO 14
diff --git a/sys/sys/sockio.h b/sys/sys/sockio.h
index 0ad221b..8be8ae9 100644
--- a/sys/sys/sockio.h
+++ b/sys/sys/sockio.h
@@ -98,7 +98,7 @@
#define SIOCSIFLLADDR _IOW('i', 60, struct ifreq) /* set linklevel addr */
#define SIOCGI2C _IOWR('i', 61, struct ifreq) /* get I2C data */
-#define SIOCSIFPHYADDR _IOW('i', 70, struct ifaliasreq) /* set gif addres */
+#define SIOCSIFPHYADDR _IOW('i', 70, struct ifaliasreq) /* set gif address */
#define SIOCGIFPSRCADDR _IOWR('i', 71, struct ifreq) /* get gif psrc addr */
#define SIOCGIFPDSTADDR _IOWR('i', 72, struct ifreq) /* get gif pdst addr */
#define SIOCDIFPHYADDR _IOW('i', 73, struct ifreq) /* delete gif addrs */
diff --git a/sys/sys/soundcard.h b/sys/sys/soundcard.h
index 2916287..4867f6c 100644
--- a/sys/sys/soundcard.h
+++ b/sys/sys/soundcard.h
@@ -185,7 +185,7 @@ struct snd_size {
#define AFMT_U24_LE 0x00040000 /* Little endian unsigned 24-bit */
#define AFMT_U24_BE 0x00080000 /* Big endian unsigned 24-bit */
-/* Machine dependant AFMT_* definitions. */
+/* Machine dependent AFMT_* definitions. */
#if BYTE_ORDER == LITTLE_ENDIAN
#define AFMT_S16_NE AFMT_S16_LE
#define AFMT_S24_NE AFMT_S24_LE
@@ -1447,7 +1447,7 @@ void seqbuf_dump(void); /* This function must be provided by programs */
SEQ_CONTROL(dev, voice, CTL_PAN, (pos+128) / 2)
/*
- * Timing and syncronization macros
+ * Timing and synchronization macros
*/
#define _TIMER_EVENT(ev, parm) { \
diff --git a/sys/sys/sx.h b/sys/sys/sx.h
index 01d7112..78cbdfd 100644
--- a/sys/sys/sx.h
+++ b/sys/sys/sx.h
@@ -301,7 +301,7 @@ __sx_sunlock(struct sx *sx, const char *file, int line)
#define SA_RECURSED LA_RECURSED
#define SA_NOTRECURSED LA_NOTRECURSED
-/* Backwards compatability. */
+/* Backwards compatibility. */
#define SX_LOCKED LA_LOCKED
#define SX_SLOCKED LA_SLOCKED
#define SX_XLOCKED LA_XLOCKED
diff --git a/sys/sys/sysctl.h b/sys/sys/sysctl.h
index 908dd43..f159424 100644
--- a/sys/sys/sysctl.h
+++ b/sys/sys/sysctl.h
@@ -418,7 +418,7 @@ TAILQ_HEAD(sysctl_ctx_list, sysctl_ctx_entry);
__ptr, 0, sysctl_handle_64, "QU", __DESCR(descr)); \
})
-/* Oid for a CPU dependant variable */
+/* Oid for a CPU dependent variable */
#define SYSCTL_ADD_UAUTO(ctx, parent, nbr, name, access, ptr, descr) \
({ \
struct sysctl_oid *__ret; \
@@ -541,7 +541,7 @@ TAILQ_HEAD(sysctl_ctx_list, sysctl_ctx_entry);
})
/*
- * A macro to generate a read-only sysctl to indicate the presense of optional
+ * A macro to generate a read-only sysctl to indicate the presence of optional
* kernel features.
*/
#define FEATURE(name, desc) \
diff --git a/sys/sys/user.h b/sys/sys/user.h
index a697b66..3bd2772 100644
--- a/sys/sys/user.h
+++ b/sys/sys/user.h
@@ -293,7 +293,7 @@ struct user {
/*
* Old format. Has variable hidden padding due to alignment.
- * This is a compatability hack for pre-build 7.1 packages.
+ * This is a compatibility hack for pre-build 7.1 packages.
*/
#if defined(__amd64__)
#define KINFO_OFILE_SIZE 1328
diff --git a/sys/sys/vnode.h b/sys/sys/vnode.h
index 2a32499..d3d79aba 100644
--- a/sys/sys/vnode.h
+++ b/sys/sys/vnode.h
@@ -844,9 +844,13 @@ int fifo_printinfo(struct vnode *);
typedef int vfs_hash_cmp_t(struct vnode *vp, void *arg);
void vfs_hash_changesize(int newhashsize);
-int vfs_hash_get(const struct mount *mp, u_int hash, int flags, struct thread *td, struct vnode **vpp, vfs_hash_cmp_t *fn, void *arg);
+int vfs_hash_get(const struct mount *mp, u_int hash, int flags,
+ struct thread *td, struct vnode **vpp, vfs_hash_cmp_t *fn, void *arg);
u_int vfs_hash_index(struct vnode *vp);
-int vfs_hash_insert(struct vnode *vp, u_int hash, int flags, struct thread *td, struct vnode **vpp, vfs_hash_cmp_t *fn, void *arg);
+int vfs_hash_insert(struct vnode *vp, u_int hash, int flags, struct thread *td,
+ struct vnode **vpp, vfs_hash_cmp_t *fn, void *arg);
+void vfs_hash_ref(const struct mount *mp, u_int hash, struct thread *td,
+ struct vnode **vpp, vfs_hash_cmp_t *fn, void *arg);
void vfs_hash_rehash(struct vnode *vp, u_int hash);
void vfs_hash_remove(struct vnode *vp);
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