diff options
Diffstat (limited to 'sys')
-rw-r--r-- | sys/amd64/include/pmc_mdep.h | 11 | ||||
-rw-r--r-- | sys/conf/files.amd64 | 1 | ||||
-rw-r--r-- | sys/conf/files.i386 | 1 | ||||
-rw-r--r-- | sys/conf/files.pc98 | 1 | ||||
-rw-r--r-- | sys/dev/hwpmc/hwpmc_core.c | 1046 | ||||
-rw-r--r-- | sys/dev/hwpmc/hwpmc_core.h | 15 | ||||
-rw-r--r-- | sys/dev/hwpmc/hwpmc_intel.c | 41 | ||||
-rw-r--r-- | sys/dev/hwpmc/hwpmc_uncore.c | 1121 | ||||
-rw-r--r-- | sys/dev/hwpmc/hwpmc_uncore.h | 120 | ||||
-rw-r--r-- | sys/dev/hwpmc/pmc_events.h | 2101 | ||||
-rw-r--r-- | sys/i386/include/pmc_mdep.h | 11 | ||||
-rw-r--r-- | sys/modules/hwpmc/Makefile | 4 | ||||
-rw-r--r-- | sys/sys/pmc.h | 5 |
13 files changed, 3496 insertions, 982 deletions
diff --git a/sys/amd64/include/pmc_mdep.h b/sys/amd64/include/pmc_mdep.h index f233a51..4f16485 100644 --- a/sys/amd64/include/pmc_mdep.h +++ b/sys/amd64/include/pmc_mdep.h @@ -43,17 +43,20 @@ struct pmc_mdep; #include <dev/hwpmc/hwpmc_core.h> #include <dev/hwpmc/hwpmc_piv.h> #include <dev/hwpmc/hwpmc_tsc.h> +#include <dev/hwpmc/hwpmc_uncore.h> /* * Intel processors implementing V2 and later of the Intel performance * measurement architecture have PMCs of the following classes: TSC, - * IAF and IAP. + * IAF, IAP, UCF and UCP. */ #define PMC_MDEP_CLASS_INDEX_TSC 0 #define PMC_MDEP_CLASS_INDEX_K8 1 #define PMC_MDEP_CLASS_INDEX_P4 1 #define PMC_MDEP_CLASS_INDEX_IAP 1 #define PMC_MDEP_CLASS_INDEX_IAF 2 +#define PMC_MDEP_CLASS_INDEX_UCP 3 +#define PMC_MDEP_CLASS_INDEX_UCF 4 /* * On the amd64 platform we support the following PMCs. @@ -63,12 +66,16 @@ struct pmc_mdep; * PIV Intel P4/HTT and P4/EMT64 * IAP Intel Core/Core2/Atom CPUs in 64 bits mode. * IAF Intel fixed-function PMCs in Core2 and later CPUs. + * UCP Intel Uncore programmable PMCs. + * UCF Intel Uncore fixed-function PMCs. */ union pmc_md_op_pmcallocate { struct pmc_md_amd_op_pmcallocate pm_amd; struct pmc_md_iaf_op_pmcallocate pm_iaf; struct pmc_md_iap_op_pmcallocate pm_iap; + struct pmc_md_ucf_op_pmcallocate pm_ucf; + struct pmc_md_ucp_op_pmcallocate pm_ucp; struct pmc_md_p4_op_pmcallocate pm_p4; uint64_t __pad[4]; }; @@ -83,6 +90,8 @@ union pmc_md_pmc { struct pmc_md_amd_pmc pm_amd; struct pmc_md_iaf_pmc pm_iaf; struct pmc_md_iap_pmc pm_iap; + struct pmc_md_ucf_pmc pm_ucf; + struct pmc_md_ucp_pmc pm_ucp; struct pmc_md_p4_pmc pm_p4; }; diff --git a/sys/conf/files.amd64 b/sys/conf/files.amd64 index 905d246..ae5170a 100644 --- a/sys/conf/files.amd64 +++ b/sys/conf/files.amd64 @@ -198,6 +198,7 @@ dev/hptrr/hptrr_config.c optional hptrr dev/hwpmc/hwpmc_amd.c optional hwpmc dev/hwpmc/hwpmc_intel.c optional hwpmc dev/hwpmc/hwpmc_core.c optional hwpmc +dev/hwpmc/hwpmc_uncore.c optional hwpmc dev/hwpmc/hwpmc_piv.c optional hwpmc dev/hwpmc/hwpmc_tsc.c optional hwpmc dev/hwpmc/hwpmc_x86.c optional hwpmc diff --git a/sys/conf/files.i386 b/sys/conf/files.i386 index a61dca2..b0c68b5 100644 --- a/sys/conf/files.i386 +++ b/sys/conf/files.i386 @@ -179,6 +179,7 @@ dev/hptrr/hptrr_config.c optional hptrr dev/hwpmc/hwpmc_amd.c optional hwpmc dev/hwpmc/hwpmc_intel.c optional hwpmc dev/hwpmc/hwpmc_core.c optional hwpmc +dev/hwpmc/hwpmc_uncore.c optional hwpmc dev/hwpmc/hwpmc_pentium.c optional hwpmc dev/hwpmc/hwpmc_piv.c optional hwpmc dev/hwpmc/hwpmc_ppro.c optional hwpmc diff --git a/sys/conf/files.pc98 b/sys/conf/files.pc98 index 314b16e..b24faae 100644 --- a/sys/conf/files.pc98 +++ b/sys/conf/files.pc98 @@ -99,6 +99,7 @@ dev/fe/if_fe_cbus.c optional fe isa dev/hwpmc/hwpmc_amd.c optional hwpmc dev/hwpmc/hwpmc_intel.c optional hwpmc dev/hwpmc/hwpmc_core.c optional hwpmc +dev/hwpmc/hwpmc_uncore.c optional hwpmc dev/hwpmc/hwpmc_pentium.c optional hwpmc dev/hwpmc/hwpmc_piv.c optional hwpmc dev/hwpmc/hwpmc_ppro.c optional hwpmc diff --git a/sys/dev/hwpmc/hwpmc_core.c b/sys/dev/hwpmc/hwpmc_core.c index 43a4914..90d7c8b 100644 --- a/sys/dev/hwpmc/hwpmc_core.c +++ b/sys/dev/hwpmc/hwpmc_core.c @@ -534,10 +534,12 @@ struct iap_event_descr { #define IAP_F_CC2E (1 << 2) /* CPU: Core2 Extreme only */ #define IAP_F_CA (1 << 3) /* CPU: Atom */ #define IAP_F_I7 (1 << 4) /* CPU: Core i7 */ -#define IAP_F_FM (1 << 5) /* Fixed mask */ +#define IAP_F_I7O (1 << 4) /* CPU: Core i7 (old) */ +#define IAP_F_WM (1 << 5) /* CPU: Westmere */ +#define IAP_F_FM (1 << 6) /* Fixed mask */ -#define IAP_F_ALLCPUS \ - (IAP_F_CC | IAP_F_CC2 | IAP_F_CC2E | IAP_F_CA | IAP_F_I7) +#define IAP_F_ALLCPUSCORE2 \ + (IAP_F_CC | IAP_F_CC2 | IAP_F_CC2E | IAP_F_CA) /* Sub fields of UMASK that this event supports. */ #define IAP_M_CORE (1 << 0) /* Core specificity */ @@ -570,151 +572,319 @@ static struct iap_event_descr iap_events[] = { .iap_flags = (FLAGS) \ } + IAPDESCR(02H_01H, 0x02, 0x01, IAP_F_FM | IAP_F_I7O), IAPDESCR(02H_81H, 0x02, 0x81, IAP_F_FM | IAP_F_CA), IAPDESCR(03H_00H, 0x03, 0x00, IAP_F_FM | IAP_F_CC), - IAPDESCR(03H_02H, 0x03, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2), - IAPDESCR(03H_04H, 0x03, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), + IAPDESCR(03H_01H, 0x03, 0x01, IAP_F_FM | IAP_F_I7O), + IAPDESCR(03H_02H, 0x03, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_WM), + IAPDESCR(03H_04H, 0x03, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7O), IAPDESCR(03H_08H, 0x03, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(03H_10H, 0x03, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(03H_20H, 0x03, 0x20, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(04H_00H, 0x04, 0x00, IAP_F_FM | IAP_F_CC), - IAPDESCR(04H_01H, 0x04, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), + IAPDESCR(04H_01H, 0x04, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7O), IAPDESCR(04H_02H, 0x04, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2), + IAPDESCR(04H_07H, 0x04, 0x07, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(04H_08H, 0x04, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(05H_00H, 0x05, 0x00, IAP_F_FM | IAP_F_CC), - - IAPDESCR(06H_00H, 0x06, 0x00, IAP_F_FM | IAP_F_ALLCPUS), + IAPDESCR(05H_01H, 0x05, 0x01, IAP_F_FM | IAP_F_I7O), + IAPDESCR(05H_02H, 0x05, 0x02, IAP_F_FM | IAP_F_I7O | IAP_F_WM), + IAPDESCR(05H_03H, 0x05, 0x03, IAP_F_FM | IAP_F_I7O), + + IAPDESCR(06H_00H, 0x06, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2 | + IAP_F_CC2E | IAP_F_CA), + IAPDESCR(06H_01H, 0x06, 0x01, IAP_F_FM | IAP_F_I7O), + IAPDESCR(06H_02H, 0x06, 0x02, IAP_F_FM | IAP_F_I7O), + IAPDESCR(06H_04H, 0x06, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(06H_08H, 0x06, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(06H_0FH, 0x06, 0x0F, IAP_F_FM | IAP_F_I7O), IAPDESCR(07H_00H, 0x07, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2), - IAPDESCR(07H_01H, 0x07, 0x01, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(07H_02H, 0x07, 0x02, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(07H_03H, 0x07, 0x03, IAP_F_FM | IAP_F_ALLCPUS), + IAPDESCR(07H_01H, 0x07, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 | IAP_F_WM), + IAPDESCR(07H_02H, 0x07, 0x02, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(07H_03H, 0x07, 0x03, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(07H_06H, 0x07, 0x06, IAP_F_FM | IAP_F_CA), IAPDESCR(07H_08H, 0x07, 0x08, IAP_F_FM | IAP_F_CA), - IAPDESCR(08H_01H, 0x08, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), - IAPDESCR(08H_02H, 0x08, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), - IAPDESCR(08H_04H, 0x08, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2), + IAPDESCR(08H_01H, 0x08, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(08H_02H, 0x08, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(08H_04H, 0x08, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_WM), IAPDESCR(08H_05H, 0x08, 0x05, IAP_F_FM | IAP_F_CA), IAPDESCR(08H_06H, 0x08, 0x06, IAP_F_FM | IAP_F_CA), IAPDESCR(08H_07H, 0x08, 0x07, IAP_F_FM | IAP_F_CA), IAPDESCR(08H_08H, 0x08, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(08H_09H, 0x08, 0x09, IAP_F_FM | IAP_F_CA), + IAPDESCR(08H_10H, 0x08, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(08H_20H, 0x08, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(08H_40H, 0x08, 0x40, IAP_F_FM | IAP_F_I7), + IAPDESCR(08H_80H, 0x08, 0x80, IAP_F_FM | IAP_F_I7), + + IAPDESCR(09H_01H, 0x09, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7O), + IAPDESCR(09H_02H, 0x09, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7O), + IAPDESCR(09H_04H, 0x09, 0x04, IAP_F_FM | IAP_F_I7O), + IAPDESCR(09H_08H, 0x09, 0x08, IAP_F_FM | IAP_F_I7O), - IAPDESCR(09H_01H, 0x09, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), - IAPDESCR(09H_02H, 0x09, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), + IAPDESCR(0BH_01H, 0x0B, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(0BH_02H, 0x0B, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(0BH_10H, 0x0B, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(0CH_01H, 0x0C, 0x01, IAP_F_FM | IAP_F_CC2 | IAP_F_I7), + IAPDESCR(0CH_01H, 0x0C, 0x01, IAP_F_FM | IAP_F_CC2 | IAP_F_I7 | + IAP_F_WM), IAPDESCR(0CH_02H, 0x0C, 0x02, IAP_F_FM | IAP_F_CC2), IAPDESCR(0CH_03H, 0x0C, 0x03, IAP_F_FM | IAP_F_CA), - IAPDESCR(10H_00H, 0x10, 0x00, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(10H_01H, 0x10, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7), + IAPDESCR(0EH_01H, 0x0E, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(0EH_02H, 0x0E, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + + IAPDESCR(0FH_01H, 0x0F, 0x01, IAP_F_FM | IAP_F_I7), + IAPDESCR(0FH_02H, 0x0F, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(0FH_08H, 0x0F, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(0FH_10H, 0x0F, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(0FH_20H, 0x0F, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(0FH_80H, 0x0F, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + + IAPDESCR(10H_00H, 0x10, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(10H_01H, 0x10, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7 | IAP_F_WM), + IAPDESCR(10H_02H, 0x10, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(10H_04H, 0x10, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(10H_08H, 0x10, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(10H_10H, 0x10, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(10H_20H, 0x10, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(10H_40H, 0x10, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(10H_80H, 0x10, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(10H_81H, 0x10, 0x81, IAP_F_FM | IAP_F_CA), IAPDESCR(11H_00H, 0x11, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2), IAPDESCR(11H_01H, 0x11, 0x01, IAP_F_FM | IAP_F_CA), IAPDESCR(11H_81H, 0x11, 0x81, IAP_F_FM | IAP_F_CA), - IAPDESCR(12H_00H, 0x12, 0x00, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(12H_01H, 0x12, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7), + IAPDESCR(12H_00H, 0x12, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(12H_01H, 0x12, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7 | IAP_F_WM), + IAPDESCR(12H_02H, 0x12, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(12H_04H, 0x12, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(12H_08H, 0x12, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(12H_10H, 0x12, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(12H_20H, 0x12, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(12H_40H, 0x12, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(12H_81H, 0x12, 0x81, IAP_F_FM | IAP_F_CA), - IAPDESCR(13H_00H, 0x13, 0x00, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(13H_01H, 0x13, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7), + IAPDESCR(13H_00H, 0x13, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(13H_01H, 0x13, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7 | IAP_F_WM), + IAPDESCR(13H_02H, 0x13, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(13H_04H, 0x13, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(13H_07H, 0x13, 0x07, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(13H_81H, 0x13, 0x81, IAP_F_FM | IAP_F_CA), IAPDESCR(14H_00H, 0x14, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2), - IAPDESCR(14H_01H, 0x14, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7), + IAPDESCR(14H_01H, 0x14, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7 | IAP_F_WM), + IAPDESCR(14H_02H, 0x14, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + + IAPDESCR(17H_01H, 0x17, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(18H_00H, 0x18, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2), + IAPDESCR(18H_01H, 0x18, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(19H_00H, 0x19, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2), - IAPDESCR(19H_01H, 0x19, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), + IAPDESCR(19H_01H, 0x19, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), IAPDESCR(19H_02H, 0x19, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2), - IAPDESCR(21H, 0x21, IAP_M_CORE, IAP_F_ALLCPUS), + IAPDESCR(1DH_01H, 0x1D, 0x01, IAP_F_FM | IAP_F_I7O), + IAPDESCR(1DH_02H, 0x1D, 0x02, IAP_F_FM | IAP_F_I7O), + IAPDESCR(1DH_04H, 0x1D, 0x04, IAP_F_FM | IAP_F_I7O), + + IAPDESCR(1EH_01H, 0x1E, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + + IAPDESCR(20H_01H, 0x20, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(21H, 0x21, IAP_M_CORE, IAP_F_ALLCPUSCORE2), IAPDESCR(22H, 0x22, IAP_M_CORE, IAP_F_CC2), - IAPDESCR(23H, 0x23, IAP_M_CORE, IAP_F_ALLCPUS), - IAPDESCR(24H, 0x24, IAP_M_CORE | IAP_M_PREFETCH, IAP_F_ALLCPUS), - IAPDESCR(25H, 0x25, IAP_M_CORE, IAP_F_ALLCPUS), - IAPDESCR(26H, 0x26, IAP_M_CORE | IAP_M_PREFETCH, IAP_F_ALLCPUS), - IAPDESCR(27H, 0x27, IAP_M_CORE | IAP_M_PREFETCH, IAP_F_ALLCPUS), - IAPDESCR(28H, 0x28, IAP_M_CORE | IAP_M_MESI, IAP_F_ALLCPUS), + IAPDESCR(23H, 0x23, IAP_M_CORE, IAP_F_ALLCPUSCORE2), + + IAPDESCR(24H, 0x24, IAP_M_CORE | IAP_M_PREFETCH, IAP_F_ALLCPUSCORE2), + IAPDESCR(24H_01H, 0x24, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(24H_02H, 0x24, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(24H_03H, 0x24, 0x03, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(24H_04H, 0x24, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(24H_08H, 0x24, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(24H_0CH, 0x24, 0x0C, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(24H_10H, 0x24, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(24H_20H, 0x24, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(24H_30H, 0x24, 0x30, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(24H_40H, 0x24, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(24H_80H, 0x24, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(24H_C0H, 0x24, 0xC0, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(24H_AAH, 0x24, 0xAA, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(24H_FFH, 0x24, 0xFF, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + + IAPDESCR(25H, 0x25, IAP_M_CORE, IAP_F_ALLCPUSCORE2), + + IAPDESCR(26H, 0x26, IAP_M_CORE | IAP_M_PREFETCH, IAP_F_ALLCPUSCORE2), + IAPDESCR(26H_01H, 0x26, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(26H_02H, 0x26, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(26H_04H, 0x26, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(26H_08H, 0x26, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(26H_0FH, 0x26, 0x0F, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(26H_10H, 0x26, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(26H_20H, 0x26, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(26H_40H, 0x26, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(26H_80H, 0x26, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(26H_F0H, 0x26, 0xF0, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(26H_FFH, 0x26, 0xFF, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + + IAPDESCR(27H, 0x27, IAP_M_CORE | IAP_M_PREFETCH, IAP_F_ALLCPUSCORE2), + IAPDESCR(27H_01H, 0x27, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(27H_02H, 0x27, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(27H_04H, 0x27, 0x04, IAP_F_FM | IAP_F_I7O), + IAPDESCR(27H_08H, 0x27, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(27H_0EH, 0x27, 0x0E, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(27H_0FH, 0x27, 0x0F, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(27H_10H, 0x27, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(27H_20H, 0x27, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(27H_40H, 0x27, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(27H_80H, 0x27, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(27H_E0H, 0x27, 0xE0, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(27H_F0H, 0x27, 0xF0, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + + IAPDESCR(28H, 0x28, IAP_M_CORE | IAP_M_MESI, IAP_F_ALLCPUSCORE2), + IAPDESCR(28H_01H, 0x28, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(28H_02H, 0x28, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(28H_04H, 0x28, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(28H_08H, 0x28, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(28H_0FH, 0x28, 0x0F, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(29H, 0x29, IAP_M_CORE | IAP_M_MESI, IAP_F_CC), IAPDESCR(29H, 0x29, IAP_M_CORE | IAP_M_MESI | IAP_M_PREFETCH, IAP_F_CA | IAP_F_CC2), - IAPDESCR(2AH, 0x2A, IAP_M_CORE | IAP_M_MESI, IAP_F_ALLCPUS), + IAPDESCR(2AH, 0x2A, IAP_M_CORE | IAP_M_MESI, IAP_F_ALLCPUSCORE2), IAPDESCR(2BH, 0x2B, IAP_M_CORE | IAP_M_MESI, IAP_F_CA | IAP_F_CC2), IAPDESCR(2EH, 0x2E, IAP_M_CORE | IAP_M_MESI | IAP_M_PREFETCH, - IAP_F_ALLCPUS), - IAPDESCR(2EH_41H, 0x2E, 0x41, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(2EH_4FH, 0x2E, 0x4F, IAP_F_FM | IAP_F_ALLCPUS), + IAP_F_ALLCPUSCORE2), + IAPDESCR(2EH_01H, 0x2E, 0x01, IAP_F_FM | IAP_F_WM), + IAPDESCR(2EH_02H, 0x2E, 0x02, IAP_F_FM | IAP_F_WM), + IAPDESCR(2EH_41H, 0x2E, 0x41, IAP_F_FM | IAP_F_ALLCPUSCORE2 | IAP_F_I7), + IAPDESCR(2EH_4FH, 0x2E, 0x4F, IAP_F_FM | IAP_F_ALLCPUSCORE2 | IAP_F_I7), IAPDESCR(30H, 0x30, IAP_M_CORE | IAP_M_MESI | IAP_M_PREFETCH, - IAP_F_ALLCPUS), + IAP_F_ALLCPUSCORE2), IAPDESCR(32H, 0x32, IAP_M_CORE | IAP_M_MESI | IAP_M_PREFETCH, IAP_F_CC), IAPDESCR(32H, 0x32, IAP_M_CORE, IAP_F_CA | IAP_F_CC2), IAPDESCR(3AH, 0x3A, IAP_M_TRANSITION, IAP_F_CC), IAPDESCR(3AH_00H, 0x3A, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2), - IAPDESCR(3BH_C0H, 0x3B, 0xC0, IAP_F_FM | IAP_F_ALLCPUS), + IAPDESCR(3BH_C0H, 0x3B, 0xC0, IAP_F_FM | IAP_F_ALLCPUSCORE2), - IAPDESCR(3CH_00H, 0x3C, 0x00, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(3CH_01H, 0x3C, 0x01, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(3CH_02H, 0x3C, 0x02, IAP_F_FM | IAP_F_ALLCPUS), + IAPDESCR(3CH_00H, 0x3C, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(3CH_01H, 0x3C, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(3CH_02H, 0x3C, 0x02, IAP_F_FM | IAP_F_ALLCPUSCORE2), + + IAPDESCR(3DH_01H, 0x3D, 0x01, IAP_F_FM | IAP_F_I7O), IAPDESCR(40H, 0x40, IAP_M_MESI, IAP_F_CC | IAP_F_CC2), + IAPDESCR(40H_01H, 0x40, 0x01, IAP_F_FM | IAP_F_I7), + IAPDESCR(40H_02H, 0x40, 0x02, IAP_F_FM | IAP_F_I7), + IAPDESCR(40H_04H, 0x40, 0x04, IAP_F_FM | IAP_F_I7), + IAPDESCR(40H_08H, 0x40, 0x08, IAP_F_FM | IAP_F_I7), + IAPDESCR(40H_0FH, 0x40, 0x0F, IAP_F_FM | IAP_F_I7), IAPDESCR(40H_21H, 0x40, 0x21, IAP_F_FM | IAP_F_CA), IAPDESCR(41H, 0x41, IAP_M_MESI, IAP_F_CC | IAP_F_CC2), + IAPDESCR(41H_01H, 0x41, 0x01, IAP_F_FM | IAP_F_I7O), + IAPDESCR(41H_02H, 0x41, 0x02, IAP_F_FM | IAP_F_I7), + IAPDESCR(41H_04H, 0x41, 0x04, IAP_F_FM | IAP_F_I7), + IAPDESCR(41H_08H, 0x41, 0x08, IAP_F_FM | IAP_F_I7), + IAPDESCR(41H_0FH, 0x41, 0x0F, IAP_F_FM | IAP_F_I7O), IAPDESCR(41H_22H, 0x41, 0x22, IAP_F_FM | IAP_F_CA), - IAPDESCR(42H, 0x42, IAP_M_MESI, IAP_F_ALLCPUS), + IAPDESCR(42H, 0x42, IAP_M_MESI, IAP_F_ALLCPUSCORE2), + IAPDESCR(42H_01H, 0x42, 0x01, IAP_F_FM | IAP_F_I7), + IAPDESCR(42H_02H, 0x42, 0x02, IAP_F_FM | IAP_F_I7), + IAPDESCR(42H_04H, 0x42, 0x04, IAP_F_FM | IAP_F_I7), + IAPDESCR(42H_08H, 0x42, 0x08, IAP_F_FM | IAP_F_I7), IAPDESCR(42H_10H, 0x42, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2), - IAPDESCR(43H_01H, 0x43, 0x01, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(43H_02H, 0x43, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), + IAPDESCR(43H_01H, 0x43, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 | + IAP_F_I7), + IAPDESCR(43H_02H, 0x43, 0x02, IAP_F_FM | IAP_F_CA | + IAP_F_CC2 | IAP_F_I7), IAPDESCR(44H_02H, 0x44, 0x02, IAP_F_FM | IAP_F_CC), - IAPDESCR(45H_0FH, 0x45, 0x0F, IAP_F_FM | IAP_F_ALLCPUS), + IAPDESCR(45H_0FH, 0x45, 0x0F, IAP_F_FM | IAP_F_ALLCPUSCORE2), - IAPDESCR(46H_00H, 0x46, 0x00, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(47H_00H, 0x47, 0x00, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(48H_00H, 0x48, 0x00, IAP_F_FM | IAP_F_ALLCPUS), + IAPDESCR(46H_00H, 0x46, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(47H_00H, 0x47, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), - IAPDESCR(49H_00H, 0x49, 0x00, IAP_F_FM | IAP_F_CC), - IAPDESCR(49H_01H, 0x49, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), - IAPDESCR(49H_02H, 0x49, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), + IAPDESCR(48H_00H, 0x48, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(48H_02H, 0x48, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(4BH_00H, 0x4B, 0x00, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(4BH_01H, 0x4B, 0x01, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(4BH_02H, 0x4B, 0x02, IAP_F_FM | IAP_F_ALLCPUS), + IAPDESCR(49H_00H, 0x49, 0x00, IAP_F_FM | IAP_F_CC), + IAPDESCR(49H_01H, 0x49, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(49H_02H, 0x49, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(49H_04H, 0x49, 0x04, IAP_F_FM | IAP_F_WM), + IAPDESCR(49H_10H, 0x49, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(49H_20H, 0x49, 0x20, IAP_F_FM | IAP_F_I7O), + IAPDESCR(49H_40H, 0x49, 0x40, IAP_F_FM | IAP_F_I7O), + IAPDESCR(49H_80H, 0x49, 0x80, IAP_F_FM | IAP_F_WM | IAP_F_I7O), + + IAPDESCR(4BH_00H, 0x4B, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(4BH_01H, 0x4B, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 | IAP_F_I7O), + IAPDESCR(4BH_02H, 0x4B, 0x02, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(4BH_03H, 0x4B, 0x03, IAP_F_FM | IAP_F_CC), + IAPDESCR(4BH_08H, 0x4B, 0x08, IAP_F_FM | IAP_F_I7O), IAPDESCR(4CH_00H, 0x4C, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2), + IAPDESCR(4CH_01H, 0x4C, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(4DH_01H, 0x4D, 0x01, IAP_F_FM | IAP_F_I7O), + + IAPDESCR(4EH_01H, 0x4E, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(4EH_02H, 0x4E, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(4EH_04H, 0x4E, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(4EH_10H, 0x4E, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(4FH_00H, 0x4F, 0x00, IAP_F_FM | IAP_F_CC), + IAPDESCR(4FH_02H, 0x4F, 0x02, IAP_F_FM | IAP_F_I7O), + IAPDESCR(4FH_04H, 0x4F, 0x04, IAP_F_FM | IAP_F_I7O), + IAPDESCR(4FH_08H, 0x4F, 0x08, IAP_F_FM | IAP_F_I7O), + IAPDESCR(4FH_10H, 0x4F, 0x10, IAP_F_FM | IAP_F_WM), + + IAPDESCR(51H_01H, 0x51, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(51H_02H, 0x51, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(51H_04H, 0x51, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(51H_08H, 0x51, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(60H, 0x60, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUS), + IAPDESCR(52H_01H, 0x52, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(53H_01H, 0x53, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + + IAPDESCR(60H, 0x60, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUSCORE2), + IAPDESCR(60H_01H, 0x60, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_I7O), + IAPDESCR(60H_02H, 0x60, 0x02, IAP_F_FM | IAP_F_WM | IAP_F_I7O), + IAPDESCR(60H_04H, 0x60, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_I7O), + IAPDESCR(60H_08H, 0x60, 0x08, IAP_F_FM | IAP_F_WM | IAP_F_I7O), IAPDESCR(61H, 0x61, IAP_M_AGENT, IAP_F_CA | IAP_F_CC2), IAPDESCR(61H_00H, 0x61, 0x00, IAP_F_FM | IAP_F_CC), - IAPDESCR(62H, 0x62, IAP_M_AGENT, IAP_F_ALLCPUS), + IAPDESCR(62H, 0x62, IAP_M_AGENT, IAP_F_ALLCPUSCORE2), IAPDESCR(62H_00H, 0x62, 0x00, IAP_F_FM | IAP_F_CC), IAPDESCR(63H, 0x63, IAP_M_AGENT | IAP_M_CORE, IAP_F_CA | IAP_F_CC2), IAPDESCR(63H, 0x63, IAP_M_CORE, IAP_F_CC), + IAPDESCR(63H_01H, 0x63, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(63H_02H, 0x63, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(64H, 0x64, IAP_M_CORE, IAP_F_CA | IAP_F_CC2), IAPDESCR(64H_40H, 0x64, 0x40, IAP_F_FM | IAP_F_CC), @@ -723,16 +893,18 @@ static struct iap_event_descr iap_events[] = { IAP_F_CA | IAP_F_CC2), IAPDESCR(65H, 0x65, IAP_M_CORE, IAP_F_CC), - IAPDESCR(66H, 0x66, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUS), + IAPDESCR(66H, 0x66, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUSCORE2), IAPDESCR(67H, 0x67, IAP_M_AGENT | IAP_M_CORE, IAP_F_CA | IAP_F_CC2), IAPDESCR(67H, 0x67, IAP_M_AGENT, IAP_F_CC), - IAPDESCR(68H, 0x68, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUS), - IAPDESCR(69H, 0x69, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUS), - IAPDESCR(6AH, 0x6A, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUS), - IAPDESCR(6BH, 0x6B, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUS), - IAPDESCR(6CH, 0x6C, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUS), + IAPDESCR(68H, 0x68, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUSCORE2), + IAPDESCR(69H, 0x69, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUSCORE2), + IAPDESCR(6AH, 0x6A, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUSCORE2), + IAPDESCR(6BH, 0x6B, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUSCORE2), + + IAPDESCR(6CH, 0x6C, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUSCORE2), + IAPDESCR(6CH_01H, 0x6C, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(6DH, 0x6D, IAP_M_AGENT | IAP_M_CORE, IAP_F_CA | IAP_F_CC2), IAPDESCR(6DH, 0x6D, IAP_M_CORE, IAP_F_CC), @@ -757,47 +929,89 @@ static struct iap_event_descr iap_events[] = { IAPDESCR(7BH, 0x7B, IAP_M_AGENT, IAP_F_CA | IAP_F_CC2), - IAPDESCR(7DH, 0x7D, IAP_M_CORE, IAP_F_ALLCPUS), + IAPDESCR(7DH, 0x7D, IAP_M_CORE, IAP_F_ALLCPUSCORE2), IAPDESCR(7EH, 0x7E, IAP_M_AGENT | IAP_M_CORE, IAP_F_CA | IAP_F_CC2), IAPDESCR(7EH_00H, 0x7E, 0x00, IAP_F_FM | IAP_F_CC), IAPDESCR(7FH, 0x7F, IAP_M_CORE, IAP_F_CA | IAP_F_CC2), - IAPDESCR(80H_00H, 0x80, 0x00, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(80H_02H, 0x80, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_I7), - IAPDESCR(80H_03H, 0x80, 0x03, IAP_F_FM | IAP_F_CA | IAP_F_I7), + IAPDESCR(80H_00H, 0x80, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(80H_01H, 0x80, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(80H_02H, 0x80, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_I7 | + IAP_F_WM), + IAPDESCR(80H_03H, 0x80, 0x03, IAP_F_FM | IAP_F_CA | IAP_F_I7 | + IAP_F_WM), + IAPDESCR(80H_04H, 0x80, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(81H_00H, 0x81, 0x00, IAP_F_FM | IAP_F_ALLCPUS), + IAPDESCR(81H_00H, 0x81, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(81H_01H, 0x81, 0x01, IAP_F_FM | IAP_F_I7O), + IAPDESCR(81H_02H, 0x81, 0x02, IAP_F_FM | IAP_F_I7O), + IAPDESCR(82H_01H, 0x82, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(82H_02H, 0x82, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(82H_04H, 0x82, 0x04, IAP_F_FM | IAP_F_CA), IAPDESCR(82H_10H, 0x82, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(82H_12H, 0x82, 0x12, IAP_F_FM | IAP_F_CC2), IAPDESCR(82H_40H, 0x82, 0x40, IAP_F_FM | IAP_F_CC2), + IAPDESCR(83H_01H, 0x83, 0x01, IAP_F_FM | IAP_F_I7O), IAPDESCR(83H_02H, 0x83, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(85H_00H, 0x85, 0x00, IAP_F_FM | IAP_F_CC), - - IAPDESCR(86H_00H, 0x86, 0x00, IAP_F_FM | IAP_F_ALLCPUS), - - IAPDESCR(87H_00H, 0x87, 0x00, IAP_F_FM | IAP_F_ALLCPUS), - - IAPDESCR(88H_00H, 0x88, 0x00, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(89H_00H, 0x89, 0x00, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(8AH_00H, 0x8A, 0x00, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(8BH_00H, 0x8B, 0x00, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(8CH_00H, 0x8C, 0x00, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(8DH_00H, 0x8D, 0x00, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(8EH_00H, 0x8E, 0x00, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(8FH_00H, 0x8F, 0x00, IAP_F_FM | IAP_F_ALLCPUS), - - IAPDESCR(90H_00H, 0x90, 0x00, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(91H_00H, 0x91, 0x00, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(92H_00H, 0x92, 0x00, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(93H_00H, 0x93, 0x00, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(94H_00H, 0x94, 0x00, IAP_F_FM | IAP_F_ALLCPUS), + IAPDESCR(85H_01H, 0x85, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(85H_02H, 0x85, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(85H_04H, 0x85, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_I7O), + IAPDESCR(85H_10H, 0x85, 0x10, IAP_F_FM | IAP_F_I7O), + IAPDESCR(85H_20H, 0x85, 0x20, IAP_F_FM | IAP_F_I7O), + IAPDESCR(85H_40H, 0x85, 0x40, IAP_F_FM | IAP_F_I7O), + IAPDESCR(85H_80H, 0x85, 0x80, IAP_F_FM | IAP_F_WM | IAP_F_I7O), + + IAPDESCR(86H_00H, 0x86, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + + IAPDESCR(87H_00H, 0x87, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(87H_01H, 0x87, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(87H_02H, 0x87, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(87H_04H, 0x87, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(87H_08H, 0x87, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(87H_0FH, 0x87, 0x0F, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + + IAPDESCR(88H_00H, 0x88, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(88H_01H, 0x88, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(88H_02H, 0x88, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(88H_04H, 0x88, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(88H_07H, 0x88, 0x07, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(88H_08H, 0x88, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(88H_10H, 0x88, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(88H_20H, 0x88, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(88H_30H, 0x88, 0x30, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(88H_40H, 0x88, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(88H_7FH, 0x88, 0x7F, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + + IAPDESCR(89H_00H, 0x89, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(89H_01H, 0x89, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(89H_02H, 0x89, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(89H_04H, 0x89, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(89H_07H, 0x89, 0x07, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(89H_08H, 0x89, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(89H_10H, 0x89, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(89H_20H, 0x89, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(89H_30H, 0x89, 0x30, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(89H_40H, 0x89, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(89H_7FH, 0x89, 0x7F, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + + IAPDESCR(8AH_00H, 0x8A, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(8BH_00H, 0x8B, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(8CH_00H, 0x8C, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(8DH_00H, 0x8D, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(8EH_00H, 0x8E, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(8FH_00H, 0x8F, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + + IAPDESCR(90H_00H, 0x90, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(91H_00H, 0x91, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(92H_00H, 0x92, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(93H_00H, 0x93, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(94H_00H, 0x94, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(97H_00H, 0x97, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(98H_00H, 0x98, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2), @@ -811,6 +1025,18 @@ static struct iap_event_descr iap_events[] = { IAPDESCR(A1H_20H, 0xA1, 0x20, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(A2H_00H, 0xA2, 0x00, IAP_F_FM | IAP_F_CC), + IAPDESCR(A2H_01H, 0xA2, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(A2H_02H, 0xA2, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(A2H_04H, 0xA2, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(A2H_08H, 0xA2, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(A2H_10H, 0xA2, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(A2H_20H, 0xA2, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(A2H_40H, 0xA2, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(A2H_80H, 0xA2, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + + IAPDESCR(A6H_01H, 0xA6, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(A7H_01H, 0xA7, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(A8H_01H, 0xA8, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(AAH_01H, 0xAA, 0x01, IAP_F_FM | IAP_F_CC2), IAPDESCR(AAH_02H, 0xAA, 0x02, IAP_F_FM | IAP_F_CA), @@ -820,18 +1046,41 @@ static struct iap_event_descr iap_events[] = { IAPDESCR(ABH_01H, 0xAB, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(ABH_02H, 0xAB, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2), - IAPDESCR(B0H_00H, 0xB0, 0x00, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(B0H_80H, 0xB0, 0x80, IAP_F_FM | IAP_F_CA | IAP_F_I7), - - IAPDESCR(B1H_00H, 0xB1, 0x00, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(B1H_80H, 0xB1, 0x80, IAP_F_FM | IAP_F_CA | IAP_F_I7), - - IAPDESCR(B3H_01H, 0xB3, 0x01, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(B3H_02H, 0xB3, 0x02, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(B3H_04H, 0xB3, 0x04, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(B3H_08H, 0xB3, 0x08, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(B3H_10H, 0xB3, 0x10, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(B3H_20H, 0xB3, 0x20, IAP_F_FM | IAP_F_ALLCPUS), + IAPDESCR(AEH_01H, 0xAE, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + + IAPDESCR(B0H_00H, 0xB0, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(B0H_01H, 0xB0, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_I7O), + IAPDESCR(B0H_02H, 0xB0, 0x02, IAP_F_FM | IAP_F_WM | IAP_F_I7O), + IAPDESCR(B0H_04H, 0xB0, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_I7O), + IAPDESCR(B0H_08H, 0xB0, 0x08, IAP_F_FM | IAP_F_WM | IAP_F_I7O), + IAPDESCR(B0H_20H, 0xB0, 0x20, IAP_F_FM | IAP_F_I7O), + IAPDESCR(B0H_40H, 0xB0, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(B0H_80H, 0xB0, 0x80, IAP_F_FM | IAP_F_CA | IAP_F_WM | IAP_F_I7O), + + IAPDESCR(B1H_00H, 0xB1, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(B1H_01H, 0xB1, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(B1H_02H, 0xB1, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(B1H_04H, 0xB1, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(B1H_08H, 0xB1, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(B1H_10H, 0xB1, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(B1H_1FH, 0xB1, 0x1F, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(B1H_20H, 0xB1, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(B1H_3FH, 0xB1, 0x3F, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(B1H_40H, 0xB1, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(B1H_80H, 0xB1, 0x80, IAP_F_FM | IAP_F_CA | IAP_F_I7 | + IAP_F_WM), + + IAPDESCR(B2H_01H, 0xB2, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + + IAPDESCR(B3H_01H, 0xB3, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 | + IAP_F_WM | IAP_F_I7O), + IAPDESCR(B3H_02H, 0xB3, 0x02, IAP_F_FM | IAP_F_ALLCPUSCORE2 | + IAP_F_WM | IAP_F_I7O), + IAPDESCR(B3H_04H, 0xB3, 0x04, IAP_F_FM | IAP_F_ALLCPUSCORE2 | + IAP_F_WM | IAP_F_I7O), + IAPDESCR(B3H_08H, 0xB3, 0x08, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(B3H_10H, 0xB3, 0x10, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(B3H_20H, 0xB3, 0x20, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(B3H_81H, 0xB3, 0x81, IAP_F_FM | IAP_F_CA), IAPDESCR(B3H_82H, 0xB3, 0x82, IAP_F_FM | IAP_F_CA), IAPDESCR(B3H_84H, 0xB3, 0x84, IAP_F_FM | IAP_F_CA), @@ -839,10 +1088,28 @@ static struct iap_event_descr iap_events[] = { IAPDESCR(B3H_90H, 0xB3, 0x90, IAP_F_FM | IAP_F_CA), IAPDESCR(B3H_A0H, 0xB3, 0xA0, IAP_F_FM | IAP_F_CA), - IAPDESCR(C0H_00H, 0xC0, 0x00, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(C0H_01H, 0xC0, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), - IAPDESCR(C0H_02H, 0xC0, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), - IAPDESCR(C0H_04H, 0xC0, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2), + IAPDESCR(B4H_01H, 0xB4, 0x01, IAP_F_FM | IAP_F_WM), + IAPDESCR(B4H_02H, 0xB4, 0x02, IAP_F_FM | IAP_F_WM), + IAPDESCR(B4H_04H, 0xB4, 0x04, IAP_F_FM | IAP_F_WM), + + IAPDESCR(B7H_01H, 0xB7, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + + IAPDESCR(B8H_01H, 0xB8, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(B8H_02H, 0xB8, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(B8H_04H, 0xB8, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + + IAPDESCR(BAH_01H, 0xBA, 0x01, IAP_F_FM | IAP_F_I7O), + IAPDESCR(BAH_02H, 0xBA, 0x02, IAP_F_FM | IAP_F_I7O), + + IAPDESCR(BBH_01H, 0xBB, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + + IAPDESCR(C0H_00H, 0xC0, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(C0H_01H, 0xC0, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(C0H_02H, 0xC0, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(C0H_04H, 0xC0, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), IAPDESCR(C0H_08H, 0xC0, 0x08, IAP_F_FM | IAP_F_CC2E), IAPDESCR(C1H_00H, 0xC1, 0x00, IAP_F_FM | IAP_F_CC), @@ -850,43 +1117,64 @@ static struct iap_event_descr iap_events[] = { IAPDESCR(C1H_FEH, 0xC1, 0xFE, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(C2H_00H, 0xC2, 0x00, IAP_F_FM | IAP_F_CC), - IAPDESCR(C2H_01H, 0xC2, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), - IAPDESCR(C2H_02H, 0xC2, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), - IAPDESCR(C2H_04H, 0xC2, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), + IAPDESCR(C2H_01H, 0xC2, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(C2H_02H, 0xC2, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(C2H_04H, 0xC2, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), IAPDESCR(C2H_07H, 0xC2, 0x07, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(C2H_08H, 0xC2, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(C2H_0FH, 0xC2, 0x0F, IAP_F_FM | IAP_F_CC2), IAPDESCR(C2H_10H, 0xC2, 0x10, IAP_F_FM | IAP_F_CA), IAPDESCR(C3H_00H, 0xC3, 0x00, IAP_F_FM | IAP_F_CC), - IAPDESCR(C3H_01H, 0xC3, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), - IAPDESCR(C3H_04H, 0xC3, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), - - IAPDESCR(C4H_00H, 0xC4, 0x00, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(C4H_01H, 0xC4, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), - IAPDESCR(C4H_02H, 0xC4, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), - IAPDESCR(C4H_04H, 0xC4, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), + IAPDESCR(C3H_01H, 0xC3, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(C3H_02H, 0xC3, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(C3H_04H, 0xC3, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(C3H_10H, 0xC3, 0x10, IAP_F_FM | IAP_F_I7O), + + IAPDESCR(C4H_00H, 0xC4, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(C4H_01H, 0xC4, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(C4H_02H, 0xC4, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(C4H_04H, 0xC4, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), IAPDESCR(C4H_08H, 0xC4, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(C4H_0CH, 0xC4, 0x0C, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(C4H_0FH, 0xC4, 0x0F, IAP_F_FM | IAP_F_CA), - IAPDESCR(C5H_00H, 0xC5, 0x00, IAP_F_FM | IAP_F_ALLCPUS), + IAPDESCR(C5H_00H, 0xC5, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(C5H_01H, 0xC5, 0x01, IAP_F_FM | IAP_F_WM), + IAPDESCR(C5H_02H, 0xC5, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(C5H_04H, 0xC5, 0x04, IAP_F_FM | IAP_F_WM), IAPDESCR(C6H_00H, 0xC6, 0x00, IAP_F_FM | IAP_F_CC), IAPDESCR(C6H_01H, 0xC6, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(C6H_02H, 0xC6, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(C7H_00H, 0xC7, 0x00, IAP_F_FM | IAP_F_CC), - IAPDESCR(C7H_01H, 0xC7, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), - IAPDESCR(C7H_02H, 0xC7, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), - IAPDESCR(C7H_04H, 0xC7, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), - IAPDESCR(C7H_08H, 0xC7, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), - IAPDESCR(C7H_10H, 0xC7, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), + IAPDESCR(C7H_01H, 0xC7, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(C7H_02H, 0xC7, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(C7H_04H, 0xC7, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(C7H_08H, 0xC7, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(C7H_10H, 0xC7, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), IAPDESCR(C7H_1FH, 0xC7, 0x1F, IAP_F_FM | IAP_F_CA | IAP_F_CC2), - IAPDESCR(C8H_00H, 0xC8, 0x00, IAP_F_FM | IAP_F_ALLCPUS), + IAPDESCR(C8H_00H, 0xC8, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(C8H_20H, 0xC8, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(C9H_00H, 0xC9, 0x00, IAP_F_FM | IAP_F_ALLCPUS), + IAPDESCR(C9H_00H, 0xC9, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(CAH_00H, 0xCA, 0x00, IAP_F_FM | IAP_F_CC), IAPDESCR(CAH_01H, 0xCA, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2), @@ -894,36 +1182,59 @@ static struct iap_event_descr iap_events[] = { IAPDESCR(CAH_04H, 0xCA, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(CAH_08H, 0xCA, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2), - IAPDESCR(CBH_01H, 0xCB, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), - IAPDESCR(CBH_02H, 0xCB, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), - IAPDESCR(CBH_04H, 0xCB, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), - IAPDESCR(CBH_08H, 0xCB, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), - IAPDESCR(CBH_10H, 0xCB, 0x10, IAP_F_FM | IAP_F_CC2 | IAP_F_I7), + IAPDESCR(CBH_01H, 0xCB, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(CBH_02H, 0xCB, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(CBH_04H, 0xCB, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(CBH_08H, 0xCB, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(CBH_10H, 0xCB, 0x10, IAP_F_FM | IAP_F_CC2 | IAP_F_I7 | + IAP_F_WM), + IAPDESCR(CBH_40H, 0xCB, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(CBH_80H, 0xCB, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(CCH_00H, 0xCC, 0x00, IAP_F_FM | IAP_F_CC), - IAPDESCR(CCH_01H, 0xCC, 0x01, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(CCH_02H, 0xCC, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), - - IAPDESCR(CDH_00H, 0xCD, 0x00, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(CEH_00H, 0xCE, 0x00, IAP_F_FM | IAP_F_ALLCPUS), + IAPDESCR(CCH_01H, 0xCC, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(CCH_02H, 0xCC, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(CCH_03H, 0xCC, 0x03, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + + IAPDESCR(CDH_00H, 0xCD, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(CEH_00H, 0xCE, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(CFH_00H, 0xCF, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(D0H_00H, 0xD0, 0x00, IAP_F_FM | IAP_F_CC), - - IAPDESCR(D2H_01H, 0xD2, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), - IAPDESCR(D2H_02H, 0xD2, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), - IAPDESCR(D2H_04H, 0xD2, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), - IAPDESCR(D2H_08H, 0xD2, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), - IAPDESCR(D2H_0FH, 0xD2, 0x0F, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), + IAPDESCR(D0H_01H, 0xD0, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + + IAPDESCR(D1H_01H, 0xD1, 0x01, IAP_F_FM | IAP_F_WM), + IAPDESCR(D1H_02H, 0xD1, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(D1H_04H, 0xD1, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(D1H_08H, 0xD1, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + + IAPDESCR(D2H_01H, 0xD2, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(D2H_02H, 0xD2, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(D2H_04H, 0xD2, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(D2H_08H, 0xD2, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), + IAPDESCR(D2H_0FH, 0xD2, 0x0F, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), IAPDESCR(D2H_10H, 0xD2, 0x10, IAP_F_FM | IAP_F_CC2E), - IAPDESCR(D4H_01H, 0xD4, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), + IAPDESCR(D4H_01H, 0xD4, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), IAPDESCR(D4H_02H, 0xD4, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(D4H_04H, 0xD4, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(D4H_08H, 0xD4, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(D4H_0FH, 0xD4, 0x0F, IAP_F_FM | IAP_F_CA | IAP_F_CC2), - IAPDESCR(D5H_01H, 0xD5, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7), + IAPDESCR(D5H_01H, 0xD5, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_I7 | IAP_F_WM), IAPDESCR(D5H_02H, 0xD5, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(D5H_04H, 0xD5, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(D5H_08H, 0xD5, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2), @@ -947,6 +1258,7 @@ static struct iap_event_descr iap_events[] = { IAPDESCR(DAH_02H, 0xDA, 0x02, IAP_F_FM | IAP_F_CC), IAPDESCR(DBH_00H, 0xDB, 0x00, IAP_F_FM | IAP_F_CC), + IAPDESCR(DBH_01H, 0xDB, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(DCH_01H, 0xDC, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(DCH_02H, 0xDC, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2), @@ -956,276 +1268,76 @@ static struct iap_event_descr iap_events[] = { IAPDESCR(DCH_1FH, 0xDC, 0x1F, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(E0H_00H, 0xE0, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2), - IAPDESCR(E0H_01H, 0xE0, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7), + IAPDESCR(E0H_01H, 0xE0, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7 | + IAP_F_WM), IAPDESCR(E2H_00H, 0xE2, 0x00, IAP_F_FM | IAP_F_CC), - IAPDESCR(E4H_00H, 0xE4, 0x00, IAP_F_FM | IAP_F_ALLCPUS), + + IAPDESCR(E4H_00H, 0xE4, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(E4H_01H, 0xE4, 0x01, IAP_F_FM | IAP_F_I7O), + + IAPDESCR(E5H_01H, 0xE5, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(E6H_00H, 0xE6, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2), - IAPDESCR(E6H_01H, 0xE6, 0x01, IAP_F_FM | IAP_F_CA), - - IAPDESCR(F0H_00H, 0xF0, 0x00, IAP_F_FM | IAP_F_ALLCPUS), - IAPDESCR(F8H_00H, 0xF8, 0x00, IAP_F_FM | IAP_F_ALLCPUS), - - /* Added with nehalem. */ - IAPDESCR(02H_01H, 0x02, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(03H_01H, 0x03, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(05H_01H, 0x05, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(05H_02H, 0x05, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(05H_03H, 0x05, 0x03, IAP_F_FM | IAP_F_I7), - IAPDESCR(06H_01H, 0x06, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(06H_02H, 0x06, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(06H_04H, 0x06, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(06H_08H, 0x06, 0x08, IAP_F_FM | IAP_F_I7), - IAPDESCR(06H_0FH, 0x06, 0x0F, IAP_F_FM | IAP_F_I7), - IAPDESCR(08H_10H, 0x08, 0x10, IAP_F_FM | IAP_F_I7), - IAPDESCR(08H_20H, 0x08, 0x20, IAP_F_FM | IAP_F_I7), - IAPDESCR(08H_40H, 0x08, 0x40, IAP_F_FM | IAP_F_I7), - IAPDESCR(08H_80H, 0x08, 0x80, IAP_F_FM | IAP_F_I7), - IAPDESCR(09H_04H, 0x09, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(09H_08H, 0x09, 0x08, IAP_F_FM | IAP_F_I7), - IAPDESCR(0BH_01H, 0x0B, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(0BH_02H, 0x0B, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(0EH_01H, 0x0E, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(0EH_02H, 0x0E, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(0FH_02H, 0x0F, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(0FH_08H, 0x0F, 0x08, IAP_F_FM | IAP_F_I7), - IAPDESCR(0FH_10H, 0x0F, 0x10, IAP_F_FM | IAP_F_I7), - IAPDESCR(0FH_20H, 0x0F, 0x20, IAP_F_FM | IAP_F_I7), - IAPDESCR(10H_02H, 0x10, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(10H_04H, 0x10, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(10H_08H, 0x10, 0x08, IAP_F_FM | IAP_F_I7), - IAPDESCR(10H_10H, 0x10, 0x10, IAP_F_FM | IAP_F_I7), - IAPDESCR(10H_20H, 0x10, 0x20, IAP_F_FM | IAP_F_I7), - IAPDESCR(10H_40H, 0x10, 0x40, IAP_F_FM | IAP_F_I7), - IAPDESCR(10H_80H, 0x10, 0x80, IAP_F_FM | IAP_F_I7), - IAPDESCR(12H_02H, 0x12, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(12H_04H, 0x12, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(12H_08H, 0x12, 0x08, IAP_F_FM | IAP_F_I7), - IAPDESCR(12H_10H, 0x12, 0x10, IAP_F_FM | IAP_F_I7), - IAPDESCR(12H_20H, 0x12, 0x20, IAP_F_FM | IAP_F_I7), - IAPDESCR(12H_40H, 0x12, 0x40, IAP_F_FM | IAP_F_I7), - IAPDESCR(13H_02H, 0x13, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(13H_04H, 0x13, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(13H_07H, 0x13, 0x07, IAP_F_FM | IAP_F_I7), - IAPDESCR(14H_02H, 0x14, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(17H_01H, 0x17, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(18H_01H, 0x18, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(1DH_01H, 0x1D, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(1DH_02H, 0x1D, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(1DH_04H, 0x1D, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(1EH_01H, 0x1E, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(24H_01H, 0x24, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(24H_02H, 0x24, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(24H_03H, 0x24, 0x03, IAP_F_FM | IAP_F_I7), - IAPDESCR(24H_04H, 0x24, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(24H_08H, 0x24, 0x08, IAP_F_FM | IAP_F_I7), - IAPDESCR(24H_0CH, 0x24, 0x0C, IAP_F_FM | IAP_F_I7), - IAPDESCR(24H_10H, 0x24, 0x10, IAP_F_FM | IAP_F_I7), - IAPDESCR(24H_20H, 0x24, 0x20, IAP_F_FM | IAP_F_I7), - IAPDESCR(24H_30H, 0x24, 0x30, IAP_F_FM | IAP_F_I7), - IAPDESCR(24H_40H, 0x24, 0x40, IAP_F_FM | IAP_F_I7), - IAPDESCR(24H_80H, 0x24, 0x80, IAP_F_FM | IAP_F_I7), - IAPDESCR(24H_AAH, 0x24, 0xAA, IAP_F_FM | IAP_F_I7), - IAPDESCR(24H_C0H, 0x24, 0xC0, IAP_F_FM | IAP_F_I7), - IAPDESCR(24H_FFH, 0x24, 0xFF, IAP_F_FM | IAP_F_I7), - IAPDESCR(26H_01H, 0x26, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(26H_02H, 0x26, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(26H_04H, 0x26, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(26H_08H, 0x26, 0x08, IAP_F_FM | IAP_F_I7), - IAPDESCR(26H_0FH, 0x26, 0x0F, IAP_F_FM | IAP_F_I7), - IAPDESCR(26H_10H, 0x26, 0x10, IAP_F_FM | IAP_F_I7), - IAPDESCR(26H_20H, 0x26, 0x20, IAP_F_FM | IAP_F_I7), - IAPDESCR(26H_40H, 0x26, 0x40, IAP_F_FM | IAP_F_I7), - IAPDESCR(26H_80H, 0x26, 0x80, IAP_F_FM | IAP_F_I7), - IAPDESCR(26H_F0H, 0x26, 0xF0, IAP_F_FM | IAP_F_I7), - IAPDESCR(26H_FFH, 0x26, 0xFF, IAP_F_FM | IAP_F_I7), - IAPDESCR(27H_01H, 0x27, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(27H_02H, 0x27, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(27H_04H, 0x27, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(27H_08H, 0x27, 0x08, IAP_F_FM | IAP_F_I7), - IAPDESCR(27H_0EH, 0x27, 0x0E, IAP_F_FM | IAP_F_I7), - IAPDESCR(27H_0FH, 0x27, 0x0F, IAP_F_FM | IAP_F_I7), - IAPDESCR(27H_10H, 0x27, 0x10, IAP_F_FM | IAP_F_I7), - IAPDESCR(27H_20H, 0x27, 0x20, IAP_F_FM | IAP_F_I7), - IAPDESCR(27H_40H, 0x27, 0x40, IAP_F_FM | IAP_F_I7), - IAPDESCR(27H_80H, 0x27, 0x80, IAP_F_FM | IAP_F_I7), - IAPDESCR(27H_E0H, 0x27, 0xE0, IAP_F_FM | IAP_F_I7), - IAPDESCR(27H_F0H, 0x27, 0xF0, IAP_F_FM | IAP_F_I7), - IAPDESCR(28H_01H, 0x28, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(28H_02H, 0x28, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(28H_04H, 0x28, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(28H_08H, 0x28, 0x08, IAP_F_FM | IAP_F_I7), - IAPDESCR(28H_0FH, 0x28, 0x0F, IAP_F_FM | IAP_F_I7), - IAPDESCR(3DH_01H, 0x3D, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(40H_01H, 0x40, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(40H_02H, 0x40, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(40H_04H, 0x40, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(40H_08H, 0x40, 0x08, IAP_F_FM | IAP_F_I7), - IAPDESCR(40H_0FH, 0x40, 0x0F, IAP_F_FM | IAP_F_I7), - IAPDESCR(41H_01H, 0x41, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(41H_02H, 0x41, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(41H_04H, 0x41, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(41H_08H, 0x41, 0x08, IAP_F_FM | IAP_F_I7), - IAPDESCR(41H_0FH, 0x41, 0x0F, IAP_F_FM | IAP_F_I7), - IAPDESCR(42H_01H, 0x42, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(42H_02H, 0x42, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(42H_04H, 0x42, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(42H_08H, 0x42, 0x08, IAP_F_FM | IAP_F_I7), - IAPDESCR(48H_02H, 0x48, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(49H_10H, 0x49, 0x10, IAP_F_FM | IAP_F_I7), - IAPDESCR(49H_20H, 0x49, 0x20, IAP_F_FM | IAP_F_I7), - IAPDESCR(49H_40H, 0x49, 0x40, IAP_F_FM | IAP_F_I7), - IAPDESCR(49H_80H, 0x49, 0x80, IAP_F_FM | IAP_F_I7), - IAPDESCR(4BH_08H, 0x4B, 0x08, IAP_F_FM | IAP_F_I7), - IAPDESCR(4CH_01H, 0x4C, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(4DH_01H, 0x4D, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(4EH_01H, 0x4E, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(4EH_02H, 0x4E, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(4EH_04H, 0x4E, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(4FH_02H, 0x4F, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(4FH_04H, 0x4F, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(4FH_08H, 0x4F, 0x08, IAP_F_FM | IAP_F_I7), - IAPDESCR(51H_01H, 0x51, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(51H_02H, 0x51, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(51H_04H, 0x51, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(51H_08H, 0x51, 0x08, IAP_F_FM | IAP_F_I7), - IAPDESCR(52H_01H, 0x52, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(53H_01H, 0x53, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(60H_01H, 0x60, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(60H_02H, 0x60, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(60H_04H, 0x60, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(60H_08H, 0x60, 0x08, IAP_F_FM | IAP_F_I7), - IAPDESCR(63H_01H, 0x63, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(63H_02H, 0x63, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(6CH_01H, 0x6C, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(80H_01H, 0x80, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(80H_04H, 0x80, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(80H_10H, 0x80, 0x10, IAP_F_FM | IAP_F_I7), - IAPDESCR(81H_01H, 0x81, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(81H_02H, 0x81, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(82H_01H, 0x82, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(83H_01H, 0x83, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(85H_01H, 0x85, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(85H_02H, 0x85, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(85H_04H, 0x85, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(85H_10H, 0x85, 0x10, IAP_F_FM | IAP_F_I7), - IAPDESCR(85H_20H, 0x85, 0x20, IAP_F_FM | IAP_F_I7), - IAPDESCR(85H_40H, 0x85, 0x40, IAP_F_FM | IAP_F_I7), - IAPDESCR(85H_80H, 0x85, 0x80, IAP_F_FM | IAP_F_I7), - IAPDESCR(87H_01H, 0x87, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(87H_02H, 0x87, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(87H_04H, 0x87, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(87H_08H, 0x87, 0x08, IAP_F_FM | IAP_F_I7), - IAPDESCR(87H_0FH, 0x87, 0x0F, IAP_F_FM | IAP_F_I7), - IAPDESCR(88H_01H, 0x88, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(88H_02H, 0x88, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(88H_04H, 0x88, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(88H_07H, 0x88, 0x07, IAP_F_FM | IAP_F_I7), - IAPDESCR(88H_08H, 0x88, 0x08, IAP_F_FM | IAP_F_I7), - IAPDESCR(88H_10H, 0x88, 0x10, IAP_F_FM | IAP_F_I7), - IAPDESCR(88H_20H, 0x88, 0x20, IAP_F_FM | IAP_F_I7), - IAPDESCR(88H_30H, 0x88, 0x30, IAP_F_FM | IAP_F_I7), - IAPDESCR(88H_40H, 0x88, 0x40, IAP_F_FM | IAP_F_I7), - IAPDESCR(89H_01H, 0x89, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(89H_02H, 0x89, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(89H_04H, 0x89, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(89H_07H, 0x89, 0x07, IAP_F_FM | IAP_F_I7), - IAPDESCR(89H_08H, 0x89, 0x08, IAP_F_FM | IAP_F_I7), - IAPDESCR(89H_10H, 0x89, 0x10, IAP_F_FM | IAP_F_I7), - IAPDESCR(89H_20H, 0x89, 0x20, IAP_F_FM | IAP_F_I7), - IAPDESCR(89H_30H, 0x89, 0x30, IAP_F_FM | IAP_F_I7), - IAPDESCR(89H_40H, 0x89, 0x40, IAP_F_FM | IAP_F_I7), - IAPDESCR(89H_7FH, 0x89, 0x7F, IAP_F_FM | IAP_F_I7), - IAPDESCR(A2H_01H, 0xA2, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(A2H_02H, 0xA2, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(A2H_04H, 0xA2, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(A2H_08H, 0xA2, 0x08, IAP_F_FM | IAP_F_I7), - IAPDESCR(A2H_10H, 0xA2, 0x10, IAP_F_FM | IAP_F_I7), - IAPDESCR(A2H_20H, 0xA2, 0x20, IAP_F_FM | IAP_F_I7), - IAPDESCR(A2H_40H, 0xA2, 0x40, IAP_F_FM | IAP_F_I7), - IAPDESCR(A2H_80H, 0xA2, 0x80, IAP_F_FM | IAP_F_I7), - IAPDESCR(A6H_01H, 0xA6, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(A7H_01H, 0xA7, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(A8H_01H, 0xA8, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(B0H_01H, 0xB0, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(B0H_02H, 0xB0, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(B0H_04H, 0xB0, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(B0H_08H, 0xB0, 0x08, IAP_F_FM | IAP_F_I7), - IAPDESCR(B0H_20H, 0xB0, 0x20, IAP_F_FM | IAP_F_I7), - IAPDESCR(B0H_40H, 0xB0, 0x40, IAP_F_FM | IAP_F_I7), - IAPDESCR(B1H_01H, 0xB1, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(B1H_02H, 0xB1, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(B1H_04H, 0xB1, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(B1H_08H, 0xB1, 0x08, IAP_F_FM | IAP_F_I7), - IAPDESCR(B1H_10H, 0xB1, 0x10, IAP_F_FM | IAP_F_I7), - IAPDESCR(B1H_20H, 0xB1, 0x20, IAP_F_FM | IAP_F_I7), - IAPDESCR(B1H_40H, 0xB1, 0x40, IAP_F_FM | IAP_F_I7), - IAPDESCR(B2H_01H, 0xB2, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(B7H_01H, 0xB7, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(B8H_01H, 0xB8, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(B8H_02H, 0xB8, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(B8H_04H, 0xB8, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(BAH_01H, 0xBA, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(BAH_02H, 0xBA, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(C3H_02H, 0xC3, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(C3H_10H, 0xC3, 0x10, IAP_F_FM | IAP_F_I7), - IAPDESCR(C5H_02H, 0xC5, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(C8H_20H, 0xC8, 0x20, IAP_F_FM | IAP_F_I7), - IAPDESCR(CBH_40H, 0xCB, 0x40, IAP_F_FM | IAP_F_I7), - IAPDESCR(CBH_80H, 0xCB, 0x80, IAP_F_FM | IAP_F_I7), - IAPDESCR(CCH_03H, 0xCC, 0x03, IAP_F_FM | IAP_F_I7), - IAPDESCR(D0H_01H, 0xD0, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(D1H_02H, 0xD1, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(D1H_04H, 0xD1, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(D1H_08H, 0xD1, 0x08, IAP_F_FM | IAP_F_I7), - IAPDESCR(DBH_01H, 0xDB, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(E4H_01H, 0xE4, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(E5H_01H, 0xE5, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(E6H_01H, 0xE6, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(E6H_02H, 0xE6, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(E8H_01H, 0xE8, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(E8H_02H, 0xE8, 0x02, IAP_F_FM | IAP_F_I7), + IAPDESCR(E6H_01H, 0xE6, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7 | + IAP_F_WM), + IAPDESCR(E6H_02H, 0xE6, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + + IAPDESCR(E8H_01H, 0xE8, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(E8H_02H, 0xE8, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(E8H_03H, 0xE8, 0x03, IAP_F_FM | IAP_F_I7), - IAPDESCR(F0H_01H, 0xF0, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(F0H_02H, 0xF0, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(F0H_04H, 0xF0, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(F0H_08H, 0xF0, 0x08, IAP_F_FM | IAP_F_I7), - IAPDESCR(F0H_10H, 0xF0, 0x10, IAP_F_FM | IAP_F_I7), - IAPDESCR(F0H_20H, 0xF0, 0x20, IAP_F_FM | IAP_F_I7), - IAPDESCR(F0H_40H, 0xF0, 0x40, IAP_F_FM | IAP_F_I7), - IAPDESCR(F0H_80H, 0xF0, 0x80, IAP_F_FM | IAP_F_I7), - IAPDESCR(F1H_02H, 0xF1, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(F1H_04H, 0xF1, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(F1H_07H, 0xF1, 0x07, IAP_F_FM | IAP_F_I7), - IAPDESCR(F2H_01H, 0xF2, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(F2H_02H, 0xF2, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(F2H_04H, 0xF2, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(F2H_08H, 0xF2, 0x08, IAP_F_FM | IAP_F_I7), - IAPDESCR(F2H_0FH, 0xF2, 0x0F, IAP_F_FM | IAP_F_I7), - IAPDESCR(F3H_01H, 0xF3, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(F3H_02H, 0xF3, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(F3H_04H, 0xF3, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(F3H_08H, 0xF3, 0x08, IAP_F_FM | IAP_F_I7), - IAPDESCR(F3H_10H, 0xF3, 0x10, IAP_F_FM | IAP_F_I7), - IAPDESCR(F3H_20H, 0xF3, 0x20, IAP_F_FM | IAP_F_I7), - IAPDESCR(F4H_01H, 0xF4, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(F4H_02H, 0xF4, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(F4H_04H, 0xF4, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(F4H_08H, 0xF4, 0x08, IAP_F_FM | IAP_F_I7), - IAPDESCR(F4H_10H, 0xF4, 0x10, IAP_F_FM | IAP_F_I7), - IAPDESCR(F6H_01H, 0xF6, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(F7H_01H, 0xF7, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(F7H_02H, 0xF7, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(F7H_04H, 0xF7, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(F8H_01H, 0xF8, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(FDH_01H, 0xFD, 0x01, IAP_F_FM | IAP_F_I7), - IAPDESCR(FDH_02H, 0xFD, 0x02, IAP_F_FM | IAP_F_I7), - IAPDESCR(FDH_04H, 0xFD, 0x04, IAP_F_FM | IAP_F_I7), - IAPDESCR(FDH_08H, 0xFD, 0x08, IAP_F_FM | IAP_F_I7), - IAPDESCR(FDH_10H, 0xFD, 0x10, IAP_F_FM | IAP_F_I7), - IAPDESCR(FDH_20H, 0xFD, 0x20, IAP_F_FM | IAP_F_I7), - IAPDESCR(FDH_40H, 0xFD, 0x40, IAP_F_FM | IAP_F_I7), + + IAPDESCR(ECH_01H, 0xEC, 0x01, IAP_F_FM | IAP_F_WM), + + IAPDESCR(F0H_00H, 0xF0, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(F0H_01H, 0xF0, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(F0H_02H, 0xF0, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(F0H_04H, 0xF0, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(F0H_08H, 0xF0, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(F0H_10H, 0xF0, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(F0H_20H, 0xF0, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(F0H_40H, 0xF0, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(F0H_80H, 0xF0, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + + IAPDESCR(F1H_02H, 0xF1, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(F1H_04H, 0xF1, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(F1H_07H, 0xF1, 0x07, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + + IAPDESCR(F2H_01H, 0xF2, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(F2H_02H, 0xF2, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(F2H_04H, 0xF2, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(F2H_08H, 0xF2, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(F2H_0FH, 0xF2, 0x0F, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + + IAPDESCR(F3H_01H, 0xF3, 0x01, IAP_F_FM | IAP_F_I7O), + IAPDESCR(F3H_02H, 0xF3, 0x02, IAP_F_FM | IAP_F_I7O), + IAPDESCR(F3H_04H, 0xF3, 0x04, IAP_F_FM | IAP_F_I7O), + IAPDESCR(F3H_08H, 0xF3, 0x08, IAP_F_FM | IAP_F_I7O), + IAPDESCR(F3H_10H, 0xF3, 0x10, IAP_F_FM | IAP_F_I7O), + IAPDESCR(F3H_20H, 0xF3, 0x20, IAP_F_FM | IAP_F_I7O), + + IAPDESCR(F4H_01H, 0xF4, 0x01, IAP_F_FM | IAP_F_I7O), + IAPDESCR(F4H_02H, 0xF4, 0x02, IAP_F_FM | IAP_F_I7O), + IAPDESCR(F4H_04H, 0xF4, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_I7O), + IAPDESCR(F4H_08H, 0xF4, 0x08, IAP_F_FM | IAP_F_I7O), + IAPDESCR(F4H_10H, 0xF4, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + + IAPDESCR(F6H_01H, 0xF6, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + + IAPDESCR(F7H_01H, 0xF7, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_I7), + IAPDESCR(F7H_02H, 0xF7, 0x02, IAP_F_FM | IAP_F_WM | IAP_F_I7), + IAPDESCR(F7H_04H, 0xF7, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_I7), + + IAPDESCR(F8H_00H, 0xF8, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), + IAPDESCR(F8H_01H, 0xF8, 0x01, IAP_F_FM | IAP_F_I7O), + + IAPDESCR(FDH_01H, 0xFD, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_I7), + IAPDESCR(FDH_02H, 0xFD, 0x02, IAP_F_FM | IAP_F_WM | IAP_F_I7), + IAPDESCR(FDH_04H, 0xFD, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_I7), + IAPDESCR(FDH_08H, 0xFD, 0x08, IAP_F_FM | IAP_F_WM | IAP_F_I7), + IAPDESCR(FDH_10H, 0xFD, 0x10, IAP_F_FM | IAP_F_WM | IAP_F_I7), + IAPDESCR(FDH_20H, 0xFD, 0x20, IAP_F_FM | IAP_F_WM | IAP_F_I7), + IAPDESCR(FDH_40H, 0xFD, 0x40, IAP_F_FM | IAP_F_WM | IAP_F_I7), }; static const int niap_events = sizeof(iap_events) / sizeof(iap_events[0]); @@ -1299,6 +1411,80 @@ iap_architectural_event_is_unsupported(enum pmc_event pe) } static int +iap_event_corei7_ok_on_counter(enum pmc_event pe, int ri) +{ + uint32_t mask; + + switch (pe) { + /* + * Events valid only on counter 0, 1. + */ + case PMC_EV_IAP_EVENT_40H_01H: + case PMC_EV_IAP_EVENT_40H_02H: + case PMC_EV_IAP_EVENT_40H_04H: + case PMC_EV_IAP_EVENT_40H_08H: + case PMC_EV_IAP_EVENT_40H_0FH: + case PMC_EV_IAP_EVENT_41H_02H: + case PMC_EV_IAP_EVENT_41H_04H: + case PMC_EV_IAP_EVENT_41H_08H: + case PMC_EV_IAP_EVENT_42H_01H: + case PMC_EV_IAP_EVENT_42H_02H: + case PMC_EV_IAP_EVENT_42H_04H: + case PMC_EV_IAP_EVENT_42H_08H: + case PMC_EV_IAP_EVENT_43H_01H: + case PMC_EV_IAP_EVENT_43H_02H: + case PMC_EV_IAP_EVENT_48H_02H: + case PMC_EV_IAP_EVENT_51H_01H: + case PMC_EV_IAP_EVENT_51H_02H: + case PMC_EV_IAP_EVENT_51H_04H: + case PMC_EV_IAP_EVENT_51H_08H: + case PMC_EV_IAP_EVENT_63H_01H: + case PMC_EV_IAP_EVENT_63H_02H: + mask = 0x3; + break; + + default: + mask = ~0; /* Any row index is ok. */ + } + + return (mask & (1 << ri)); +} + +static int +iap_event_westmere_ok_on_counter(enum pmc_event pe, int ri) +{ + uint32_t mask; + + switch (pe) { + /* + * Events valid only on counter 0. + */ + case PMC_EV_IAP_EVENT_B3H_01H: + case PMC_EV_IAP_EVENT_B3H_02H: + case PMC_EV_IAP_EVENT_B3H_04H: + mask = 0x1; + break; + + /* + * Events valid only on counter 0, 1. + */ + case PMC_EV_IAP_EVENT_51H_01H: + case PMC_EV_IAP_EVENT_51H_02H: + case PMC_EV_IAP_EVENT_51H_04H: + case PMC_EV_IAP_EVENT_51H_08H: + case PMC_EV_IAP_EVENT_63H_01H: + case PMC_EV_IAP_EVENT_63H_02H: + mask = 0x3; + break; + + default: + mask = ~0; /* Any row index is ok. */ + } + + return (mask & (1 << ri)); +} + +static int iap_event_ok_on_counter(enum pmc_event pe, int ri) { uint32_t mask; @@ -1310,6 +1496,9 @@ iap_event_ok_on_counter(enum pmc_event pe, int ri) case PMC_EV_IAP_EVENT_10H_00H: case PMC_EV_IAP_EVENT_14H_00H: case PMC_EV_IAP_EVENT_18H_00H: + case PMC_EV_IAP_EVENT_B3H_01H: + case PMC_EV_IAP_EVENT_B3H_02H: + case PMC_EV_IAP_EVENT_B3H_04H: case PMC_EV_IAP_EVENT_C1H_00H: case PMC_EV_IAP_EVENT_CBH_01H: case PMC_EV_IAP_EVENT_CBH_02H: @@ -1356,8 +1545,19 @@ iap_allocate_pmc(int cpu, int ri, struct pmc *pm, if (iap_architectural_event_is_unsupported(ev)) return (EOPNOTSUPP); - if (iap_event_ok_on_counter(ev, ri) == 0) - return (EINVAL); + switch (core_cputype) { + case PMC_CPU_INTEL_COREI7: + if (iap_event_corei7_ok_on_counter(ev, ri) == 0) + return (EINVAL); + break; + case PMC_CPU_INTEL_WESTMERE: + if (iap_event_westmere_ok_on_counter(ev, ri) == 0) + return (EINVAL); + break; + default: + if (iap_event_ok_on_counter(ev, ri) == 0) + return (EINVAL); + } /* * Look for an event descriptor with matching CPU and event id @@ -1381,6 +1581,9 @@ iap_allocate_pmc(int cpu, int ri, struct pmc *pm, case PMC_CPU_INTEL_COREI7: cpuflag = IAP_F_I7; break; + case PMC_CPU_INTEL_WESTMERE: + cpuflag = IAP_F_WM; + break; } for (n = 0, ie = iap_events; n < niap_events; n++, ie++) @@ -1469,6 +1672,22 @@ iap_allocate_pmc(int cpu, int ri, struct pmc *pm, else if (config & IAP_ANY) return (EINVAL); + /* + * Check offcore response configuration. + */ + if (a->pm_md.pm_iap.pm_iap_rsp != 0) { + if (ev != PMC_EV_IAP_EVENT_B7H_01H && + ev != PMC_EV_IAP_EVENT_BBH_01H) + return (EINVAL); + if (core_cputype == PMC_CPU_INTEL_COREI7 && + ev == PMC_EV_IAP_EVENT_BBH_01H) + return (EINVAL); + if ( a->pm_md.pm_iap.pm_iap_rsp & ~IA_OFFCORE_RSP_MASK) + return (EINVAL); + pm->pm_md.pm_iap.pm_iap_rsp = + a->pm_md.pm_iap.pm_iap_rsp & IA_OFFCORE_RSP_MASK; + } + if (caps & PMC_CAP_THRESHOLD) evsel |= (a->pm_md.pm_iap.pm_iap_config & IAP_F_CMASK); if (caps & PMC_CAP_USER) @@ -1628,6 +1847,18 @@ iap_start_pmc(int cpu, int ri) PMCDBG(MDP,STA,2, "iap-start/2 cpu=%d ri=%d evselmsr=0x%x evsel=0x%x", cpu, ri, IAP_EVSEL0 + ri, evsel); + /* Event specific configuration. */ + switch (pm->pm_event) { + case PMC_EV_IAP_EVENT_B7H_01H: + wrmsr(IA_OFFCORE_RSP0, pm->pm_md.pm_iap.pm_iap_rsp); + break; + case PMC_EV_IAP_EVENT_BBH_01H: + wrmsr(IA_OFFCORE_RSP1, pm->pm_md.pm_iap.pm_iap_rsp); + break; + default: + break; + } + wrmsr(IAP_EVSEL0 + ri, evsel | IAP_EN); if (core_cputype == PMC_CPU_INTEL_CORE) @@ -1863,6 +2094,8 @@ core2_intr(int cpu, struct trapframe *tf) error = pmc_process_interrupt(cpu, pm, tf, TRAPF_USERMODE(tf)); + if (error) + intrenable &= ~flag; v = iaf_reload_count_to_perfctr_value(pm->pm_sc.pm_reloadcount); @@ -1871,9 +2104,6 @@ core2_intr(int cpu, struct trapframe *tf) PMCDBG(MDP,INT, 1, "iaf-intr cpu=%d error=%d v=%jx(%jx)", cpu, error, (uintmax_t) v, (uintmax_t) rdpmc(IAF_RI_TO_MSR(n))); - - if (error) - intrenable &= ~flag; } /* diff --git a/sys/dev/hwpmc/hwpmc_core.h b/sys/dev/hwpmc/hwpmc_core.h index 0c4ee5b..e88ecb0 100644 --- a/sys/dev/hwpmc/hwpmc_core.h +++ b/sys/dev/hwpmc/hwpmc_core.h @@ -46,6 +46,7 @@ struct pmc_md_iaf_op_pmcallocate { */ struct pmc_md_iap_op_pmcallocate { uint32_t pm_iap_config; + uint32_t pm_iap_rsp; }; #define IAP_EVSEL(C) ((C) & 0xFF) @@ -59,6 +60,8 @@ struct pmc_md_iap_op_pmcallocate { #define IAP_INV (1 << 23) #define IAP_CMASK(C) (((C) & 0xFF) << 24) +#define IA_OFFCORE_RSP_MASK 0xF7FF + #ifdef _KERNEL /* @@ -76,16 +79,15 @@ struct pmc_md_iap_op_pmcallocate { /* * Programmable counters. */ -#define IAP_PMC0 0x0C1 -#define IAP_PMC1 0x0C2 +#define IAP_PMC0 0x0C1 #define IAP_EVSEL0 0x186 -#define IAP_EVSEL1 0x187 /* * Simplified programming interface in Intel Performance Architecture * v2 and later. */ + #define IA_GLOBAL_STATUS 0x38E #define IA_GLOBAL_CTRL 0x38F #define IA_GLOBAL_OVF_CTRL 0x390 @@ -93,12 +95,19 @@ struct pmc_md_iap_op_pmcallocate { #define IA_GLOBAL_STATUS_FLAG_CONDCHG (1ULL << 63) #define IA_GLOBAL_STATUS_FLAG_OVFBUF (1ULL << 62) +/* + * Offcore response configuration. + */ +#define IA_OFFCORE_RSP0 0x1A6 +#define IA_OFFCORE_RSP1 0x1A7 + struct pmc_md_iaf_pmc { uint64_t pm_iaf_ctrl; }; struct pmc_md_iap_pmc { uint32_t pm_iap_evsel; + uint32_t pm_iap_rsp; }; /* diff --git a/sys/dev/hwpmc/hwpmc_intel.c b/sys/dev/hwpmc/hwpmc_intel.c index e953f68..82d5079 100644 --- a/sys/dev/hwpmc/hwpmc_intel.c +++ b/sys/dev/hwpmc/hwpmc_intel.c @@ -133,8 +133,14 @@ pmc_intel_initialize(void) case 0x1A: case 0x1E: /* Per Intel document 253669-032 9/2009, pages A-2 and A-57 */ case 0x1F: /* Per Intel document 253669-032 9/2009, pages A-2 and A-57 */ + case 0x2E: cputype = PMC_CPU_INTEL_COREI7; - nclasses = 3; + nclasses = 5; + break; + case 0x25: /* Per Intel document 253669-033US 12/2009. */ + case 0x2C: /* Per Intel document 253669-033US 12/2009. */ + cputype = PMC_CPU_INTEL_WESTMERE; + nclasses = 5; break; } break; @@ -176,6 +182,7 @@ pmc_intel_initialize(void) case PMC_CPU_INTEL_CORE2: case PMC_CPU_INTEL_CORE2EXTREME: case PMC_CPU_INTEL_COREI7: + case PMC_CPU_INTEL_WESTMERE: error = pmc_core_initialize(pmc_mdep, ncpus); break; @@ -226,6 +233,22 @@ pmc_intel_initialize(void) KASSERT(0, ("[intel,%d] Unknown CPU type", __LINE__)); } + /* + * Init the uncore class. + */ +#if defined(__i386__) || defined(__amd64__) + switch (cputype) { + /* + * Intel Corei7 and Westmere processors. + */ + case PMC_CPU_INTEL_COREI7: + case PMC_CPU_INTEL_WESTMERE: + error = pmc_uncore_initialize(pmc_mdep, ncpus); + break; + default: + break; + } +#endif error: if (error) { @@ -247,6 +270,8 @@ pmc_intel_finalize(struct pmc_mdep *md) case PMC_CPU_INTEL_CORE: case PMC_CPU_INTEL_CORE2: case PMC_CPU_INTEL_CORE2EXTREME: + case PMC_CPU_INTEL_COREI7: + case PMC_CPU_INTEL_WESTMERE: pmc_core_finalize(md); break; @@ -269,4 +294,18 @@ pmc_intel_finalize(struct pmc_mdep *md) default: KASSERT(0, ("[intel,%d] unknown CPU type", __LINE__)); } + + /* + * Uncore. + */ +#if defined(__i386__) || defined(__amd64__) + switch (md->pmd_cputype) { + case PMC_CPU_INTEL_COREI7: + case PMC_CPU_INTEL_WESTMERE: + pmc_uncore_finalize(md); + break; + default: + break; + } +#endif } diff --git a/sys/dev/hwpmc/hwpmc_uncore.c b/sys/dev/hwpmc/hwpmc_uncore.c new file mode 100644 index 0000000..36cd95c --- /dev/null +++ b/sys/dev/hwpmc/hwpmc_uncore.c @@ -0,0 +1,1121 @@ +/*- + * Copyright (c) 2010 Fabien Thomas + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +/* + * Intel Uncore PMCs. + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <sys/param.h> +#include <sys/bus.h> +#include <sys/pmc.h> +#include <sys/pmckern.h> +#include <sys/systm.h> + +#include <machine/intr_machdep.h> +#include <machine/apicvar.h> +#include <machine/cpu.h> +#include <machine/cpufunc.h> +#include <machine/specialreg.h> + +#define UCF_PMC_CAPS \ + (PMC_CAP_READ | PMC_CAP_WRITE) + +#define UCP_PMC_CAPS \ + (PMC_CAP_EDGE | PMC_CAP_THRESHOLD | PMC_CAP_READ | PMC_CAP_WRITE | \ + PMC_CAP_INVERT | PMC_CAP_QUALIFIER | PMC_CAP_PRECISE) + +static enum pmc_cputype uncore_cputype; + +struct uncore_cpu { + volatile uint32_t pc_resync; + volatile uint32_t pc_ucfctrl; /* Fixed function control. */ + volatile uint64_t pc_globalctrl; /* Global control register. */ + struct pmc_hw pc_uncorepmcs[]; +}; + +static struct uncore_cpu **uncore_pcpu; + +static uint64_t uncore_pmcmask; + +static int uncore_ucf_ri; /* relative index of fixed counters */ +static int uncore_ucf_width; +static int uncore_ucf_npmc; + +static int uncore_ucp_width; +static int uncore_ucp_npmc; + +static int +uncore_pcpu_noop(struct pmc_mdep *md, int cpu) +{ + (void) md; + (void) cpu; + return (0); +} + +static int +uncore_pcpu_init(struct pmc_mdep *md, int cpu) +{ + struct pmc_cpu *pc; + struct uncore_cpu *cc; + struct pmc_hw *phw; + int uncore_ri, n, npmc; + + KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), + ("[ucf,%d] insane cpu number %d", __LINE__, cpu)); + + PMCDBG(MDP,INI,1,"uncore-init cpu=%d", cpu); + + uncore_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCP].pcd_ri; + npmc = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCP].pcd_num; + npmc += md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCF].pcd_num; + + cc = malloc(sizeof(struct uncore_cpu) + npmc * sizeof(struct pmc_hw), + M_PMC, M_WAITOK | M_ZERO); + + uncore_pcpu[cpu] = cc; + pc = pmc_pcpu[cpu]; + + KASSERT(pc != NULL && cc != NULL, + ("[uncore,%d] NULL per-cpu structures cpu=%d", __LINE__, cpu)); + + for (n = 0, phw = cc->pc_uncorepmcs; n < npmc; n++, phw++) { + phw->phw_state = PMC_PHW_FLAG_IS_ENABLED | + PMC_PHW_CPU_TO_STATE(cpu) | + PMC_PHW_INDEX_TO_STATE(n + uncore_ri); + phw->phw_pmc = NULL; + pc->pc_hwpmcs[n + uncore_ri] = phw; + } + + return (0); +} + +static int +uncore_pcpu_fini(struct pmc_mdep *md, int cpu) +{ + int uncore_ri, n, npmc; + struct pmc_cpu *pc; + struct uncore_cpu *cc; + + KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), + ("[uncore,%d] insane cpu number (%d)", __LINE__, cpu)); + + PMCDBG(MDP,INI,1,"uncore-pcpu-fini cpu=%d", cpu); + + if ((cc = uncore_pcpu[cpu]) == NULL) + return (0); + + uncore_pcpu[cpu] = NULL; + + pc = pmc_pcpu[cpu]; + + KASSERT(pc != NULL, ("[uncore,%d] NULL per-cpu %d state", __LINE__, + cpu)); + + npmc = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCP].pcd_num; + uncore_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCP].pcd_ri; + + for (n = 0; n < npmc; n++) + wrmsr(UCP_EVSEL0 + n, 0); + + wrmsr(UCF_CTRL, 0); + npmc += md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCF].pcd_num; + + for (n = 0; n < npmc; n++) + pc->pc_hwpmcs[n + uncore_ri] = NULL; + + free(cc, M_PMC); + + return (0); +} + +/* + * Fixed function counters. + */ + +static pmc_value_t +ucf_perfctr_value_to_reload_count(pmc_value_t v) +{ + v &= (1ULL << uncore_ucf_width) - 1; + return (1ULL << uncore_ucf_width) - v; +} + +static pmc_value_t +ucf_reload_count_to_perfctr_value(pmc_value_t rlc) +{ + return (1ULL << uncore_ucf_width) - rlc; +} + +static int +ucf_allocate_pmc(int cpu, int ri, struct pmc *pm, + const struct pmc_op_pmcallocate *a) +{ + enum pmc_event ev; + uint32_t caps, flags; + + KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), + ("[uncore,%d] illegal CPU %d", __LINE__, cpu)); + + PMCDBG(MDP,ALL,1, "ucf-allocate ri=%d reqcaps=0x%x", ri, pm->pm_caps); + + if (ri < 0 || ri > uncore_ucf_npmc) + return (EINVAL); + + caps = a->pm_caps; + + if (a->pm_class != PMC_CLASS_UCF || + (caps & UCF_PMC_CAPS) != caps) + return (EINVAL); + + ev = pm->pm_event; + if (ev < PMC_EV_UCF_FIRST || ev > PMC_EV_UCF_LAST) + return (EINVAL); + + flags = UCF_EN; + + pm->pm_md.pm_ucf.pm_ucf_ctrl = (flags << (ri * 4)); + + PMCDBG(MDP,ALL,2, "ucf-allocate config=0x%jx", + (uintmax_t) pm->pm_md.pm_ucf.pm_ucf_ctrl); + + return (0); +} + +static int +ucf_config_pmc(int cpu, int ri, struct pmc *pm) +{ + KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), + ("[uncore,%d] illegal CPU %d", __LINE__, cpu)); + + KASSERT(ri >= 0 && ri < uncore_ucf_npmc, + ("[uncore,%d] illegal row-index %d", __LINE__, ri)); + + PMCDBG(MDP,CFG,1, "ucf-config cpu=%d ri=%d pm=%p", cpu, ri, pm); + + KASSERT(uncore_pcpu[cpu] != NULL, ("[uncore,%d] null per-cpu %d", __LINE__, + cpu)); + + uncore_pcpu[cpu]->pc_uncorepmcs[ri + uncore_ucf_ri].phw_pmc = pm; + + return (0); +} + +static int +ucf_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc) +{ + int error; + struct pmc_hw *phw; + char ucf_name[PMC_NAME_MAX]; + + phw = &uncore_pcpu[cpu]->pc_uncorepmcs[ri + uncore_ucf_ri]; + + (void) snprintf(ucf_name, sizeof(ucf_name), "UCF-%d", ri); + if ((error = copystr(ucf_name, pi->pm_name, PMC_NAME_MAX, + NULL)) != 0) + return (error); + + pi->pm_class = PMC_CLASS_UCF; + + if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) { + pi->pm_enabled = TRUE; + *ppmc = phw->phw_pmc; + } else { + pi->pm_enabled = FALSE; + *ppmc = NULL; + } + + return (0); +} + +static int +ucf_get_config(int cpu, int ri, struct pmc **ppm) +{ + *ppm = uncore_pcpu[cpu]->pc_uncorepmcs[ri + uncore_ucf_ri].phw_pmc; + + return (0); +} + +static int +ucf_read_pmc(int cpu, int ri, pmc_value_t *v) +{ + struct pmc *pm; + pmc_value_t tmp; + + KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), + ("[uncore,%d] illegal cpu value %d", __LINE__, cpu)); + KASSERT(ri >= 0 && ri < uncore_ucf_npmc, + ("[uncore,%d] illegal row-index %d", __LINE__, ri)); + + pm = uncore_pcpu[cpu]->pc_uncorepmcs[ri + uncore_ucf_ri].phw_pmc; + + KASSERT(pm, + ("[uncore,%d] cpu %d ri %d(%d) pmc not configured", __LINE__, cpu, + ri, ri + uncore_ucf_ri)); + + tmp = rdmsr(UCF_CTR0 + ri); + + if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) + *v = ucf_perfctr_value_to_reload_count(tmp); + else + *v = tmp; + + PMCDBG(MDP,REA,1, "ucf-read cpu=%d ri=%d -> v=%jx", cpu, ri, *v); + + return (0); +} + +static int +ucf_release_pmc(int cpu, int ri, struct pmc *pmc) +{ + PMCDBG(MDP,REL,1, "ucf-release cpu=%d ri=%d pm=%p", cpu, ri, pmc); + + KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), + ("[uncore,%d] illegal CPU value %d", __LINE__, cpu)); + KASSERT(ri >= 0 && ri < uncore_ucf_npmc, + ("[uncore,%d] illegal row-index %d", __LINE__, ri)); + + KASSERT(uncore_pcpu[cpu]->pc_uncorepmcs[ri + uncore_ucf_ri].phw_pmc == NULL, + ("[uncore,%d] PHW pmc non-NULL", __LINE__)); + + return (0); +} + +static int +ucf_start_pmc(int cpu, int ri) +{ + struct pmc *pm; + struct uncore_cpu *ucfc; + + KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), + ("[uncore,%d] illegal CPU value %d", __LINE__, cpu)); + KASSERT(ri >= 0 && ri < uncore_ucf_npmc, + ("[uncore,%d] illegal row-index %d", __LINE__, ri)); + + PMCDBG(MDP,STA,1,"ucf-start cpu=%d ri=%d", cpu, ri); + + ucfc = uncore_pcpu[cpu]; + pm = ucfc->pc_uncorepmcs[ri + uncore_ucf_ri].phw_pmc; + + ucfc->pc_ucfctrl |= pm->pm_md.pm_ucf.pm_ucf_ctrl; + + wrmsr(UCF_CTRL, ucfc->pc_ucfctrl); + + do { + ucfc->pc_resync = 0; + ucfc->pc_globalctrl |= (1ULL << (ri + UCF_OFFSET)); + wrmsr(UC_GLOBAL_CTRL, ucfc->pc_globalctrl); + } while (ucfc->pc_resync != 0); + + PMCDBG(MDP,STA,1,"ucfctrl=%x(%x) globalctrl=%jx(%jx)", + ucfc->pc_ucfctrl, (uint32_t) rdmsr(UCF_CTRL), + ucfc->pc_globalctrl, rdmsr(UC_GLOBAL_CTRL)); + + return (0); +} + +static int +ucf_stop_pmc(int cpu, int ri) +{ + uint32_t fc; + struct uncore_cpu *ucfc; + + PMCDBG(MDP,STO,1,"ucf-stop cpu=%d ri=%d", cpu, ri); + + ucfc = uncore_pcpu[cpu]; + + KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), + ("[uncore,%d] illegal CPU value %d", __LINE__, cpu)); + KASSERT(ri >= 0 && ri < uncore_ucf_npmc, + ("[uncore,%d] illegal row-index %d", __LINE__, ri)); + + fc = (UCF_MASK << (ri * 4)); + + ucfc->pc_ucfctrl &= ~fc; + + PMCDBG(MDP,STO,1,"ucf-stop ucfctrl=%x", ucfc->pc_ucfctrl); + wrmsr(UCF_CTRL, ucfc->pc_ucfctrl); + + do { + ucfc->pc_resync = 0; + ucfc->pc_globalctrl &= ~(1ULL << (ri + UCF_OFFSET)); + wrmsr(UC_GLOBAL_CTRL, ucfc->pc_globalctrl); + } while (ucfc->pc_resync != 0); + + PMCDBG(MDP,STO,1,"ucfctrl=%x(%x) globalctrl=%jx(%jx)", + ucfc->pc_ucfctrl, (uint32_t) rdmsr(UCF_CTRL), + ucfc->pc_globalctrl, rdmsr(UC_GLOBAL_CTRL)); + + return (0); +} + +static int +ucf_write_pmc(int cpu, int ri, pmc_value_t v) +{ + struct uncore_cpu *cc; + struct pmc *pm; + + KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), + ("[uncore,%d] illegal cpu value %d", __LINE__, cpu)); + KASSERT(ri >= 0 && ri < uncore_ucf_npmc, + ("[uncore,%d] illegal row-index %d", __LINE__, ri)); + + cc = uncore_pcpu[cpu]; + pm = cc->pc_uncorepmcs[ri + uncore_ucf_ri].phw_pmc; + + KASSERT(pm, + ("[uncore,%d] cpu %d ri %d pmc not configured", __LINE__, cpu, ri)); + + if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) + v = ucf_reload_count_to_perfctr_value(v); + + wrmsr(UCF_CTRL, 0); /* Turn off fixed counters */ + wrmsr(UCF_CTR0 + ri, v); + wrmsr(UCF_CTRL, cc->pc_ucfctrl); + + PMCDBG(MDP,WRI,1, "ucf-write cpu=%d ri=%d v=%jx ucfctrl=%jx ", + cpu, ri, v, (uintmax_t) rdmsr(UCF_CTRL)); + + return (0); +} + + +static void +ucf_initialize(struct pmc_mdep *md, int maxcpu, int npmc, int pmcwidth) +{ + struct pmc_classdep *pcd; + + KASSERT(md != NULL, ("[ucf,%d] md is NULL", __LINE__)); + + PMCDBG(MDP,INI,1, "%s", "ucf-initialize"); + + pcd = &md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCF]; + + pcd->pcd_caps = UCF_PMC_CAPS; + pcd->pcd_class = PMC_CLASS_UCF; + pcd->pcd_num = npmc; + pcd->pcd_ri = md->pmd_npmc; + pcd->pcd_width = pmcwidth; + + pcd->pcd_allocate_pmc = ucf_allocate_pmc; + pcd->pcd_config_pmc = ucf_config_pmc; + pcd->pcd_describe = ucf_describe; + pcd->pcd_get_config = ucf_get_config; + pcd->pcd_get_msr = NULL; + pcd->pcd_pcpu_fini = uncore_pcpu_noop; + pcd->pcd_pcpu_init = uncore_pcpu_noop; + pcd->pcd_read_pmc = ucf_read_pmc; + pcd->pcd_release_pmc = ucf_release_pmc; + pcd->pcd_start_pmc = ucf_start_pmc; + pcd->pcd_stop_pmc = ucf_stop_pmc; + pcd->pcd_write_pmc = ucf_write_pmc; + + md->pmd_npmc += npmc; +} + +/* + * Intel programmable PMCs. + */ + +/* + * Event descriptor tables. + * + * For each event id, we track: + * + * 1. The CPUs that the event is valid for. + * + * 2. If the event uses a fixed UMASK, the value of the umask field. + * If the event doesn't use a fixed UMASK, a mask of legal bits + * to check against. + */ + +struct ucp_event_descr { + enum pmc_event ucp_ev; + unsigned char ucp_evcode; + unsigned char ucp_umask; + unsigned char ucp_flags; +}; + +#define UCP_F_I7 (1 << 0) /* CPU: Core i7 */ +#define UCP_F_WM (1 << 1) /* CPU: Westmere */ +#define UCP_F_FM (1 << 2) /* Fixed mask */ + +#define UCP_F_ALLCPUS \ + (UCP_F_I7 | UCP_F_WM) + +#define UCP_F_CMASK 0xFF000000 + +static struct ucp_event_descr ucp_events[] = { +#undef UCPDESCR +#define UCPDESCR(N,EV,UM,FLAGS) { \ + .ucp_ev = PMC_EV_UCP_EVENT_##N, \ + .ucp_evcode = (EV), \ + .ucp_umask = (UM), \ + .ucp_flags = (FLAGS) \ + } + + UCPDESCR(00H_01H, 0x00, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(00H_02H, 0x00, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(00H_04H, 0x00, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(01H_01H, 0x01, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(01H_02H, 0x01, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(01H_04H, 0x01, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(02H_01H, 0x02, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(03H_01H, 0x03, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(03H_02H, 0x03, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(03H_04H, 0x03, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(03H_08H, 0x03, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(03H_10H, 0x03, 0x10, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(03H_20H, 0x03, 0x20, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(03H_40H, 0x03, 0x40, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(04H_01H, 0x04, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(04H_02H, 0x04, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(04H_04H, 0x04, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(04H_08H, 0x04, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(04H_10H, 0x04, 0x10, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(05H_01H, 0x05, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(05H_02H, 0x05, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(05H_04H, 0x05, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(06H_01H, 0x06, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(06H_02H, 0x06, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(06H_04H, 0x06, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(06H_08H, 0x06, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(06H_10H, 0x06, 0x10, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(06H_20H, 0x06, 0x20, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(07H_01H, 0x07, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(07H_02H, 0x07, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(07H_04H, 0x07, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(07H_08H, 0x07, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(07H_10H, 0x07, 0x10, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(07H_20H, 0x07, 0x20, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(07H_24H, 0x07, 0x24, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(08H_01H, 0x08, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(08H_02H, 0x08, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(08H_04H, 0x08, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(08H_03H, 0x08, 0x03, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(09H_01H, 0x09, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(09H_02H, 0x09, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(09H_04H, 0x09, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(09H_03H, 0x09, 0x03, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(0AH_01H, 0x0A, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(0AH_02H, 0x0A, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(0AH_04H, 0x0A, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(0AH_08H, 0x0A, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(0AH_0FH, 0x0A, 0x0F, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(0BH_01H, 0x0B, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(0BH_02H, 0x0B, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(0BH_04H, 0x0B, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(0BH_08H, 0x0B, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(0BH_10H, 0x0B, 0x10, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(0BH_1FH, 0x0B, 0x1F, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(0CH_01H, 0x0C, 0x01, UCP_F_FM | UCP_F_WM), + UCPDESCR(0CH_02H, 0x0C, 0x02, UCP_F_FM | UCP_F_WM), + UCPDESCR(0CH_04H, 0x0C, 0x04, UCP_F_FM | UCP_F_WM), + UCPDESCR(0CH_08H, 0x0C, 0x08, UCP_F_FM | UCP_F_WM), + + UCPDESCR(20H_01H, 0x20, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(20H_02H, 0x20, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(20H_04H, 0x20, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(20H_08H, 0x20, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(20H_10H, 0x20, 0x10, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(20H_20H, 0x20, 0x20, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(21H_01H, 0x21, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(21H_02H, 0x21, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(21H_04H, 0x21, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(22H_01H, 0x22, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(22H_02H, 0x22, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(22H_04H, 0x22, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(23H_01H, 0x23, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(23H_02H, 0x23, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(23H_04H, 0x23, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(24H_02H, 0x24, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(24H_04H, 0x24, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(25H_01H, 0x25, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(25H_02H, 0x25, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(25H_04H, 0x25, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(26H_01H, 0x26, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(27H_01H, 0x27, 0x01, UCP_F_FM | UCP_F_I7), + UCPDESCR(27H_02H, 0x27, 0x02, UCP_F_FM | UCP_F_I7), + UCPDESCR(27H_04H, 0x27, 0x04, UCP_F_FM | UCP_F_I7), + UCPDESCR(27H_08H, 0x27, 0x08, UCP_F_FM | UCP_F_I7), + UCPDESCR(27H_10H, 0x27, 0x10, UCP_F_FM | UCP_F_I7), + UCPDESCR(27H_20H, 0x27, 0x20, UCP_F_FM | UCP_F_I7), + + UCPDESCR(28H_01H, 0x28, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(28H_02H, 0x28, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(28H_04H, 0x28, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(28H_08H, 0x28, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(28H_10H, 0x28, 0x10, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(28H_20H, 0x28, 0x20, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(29H_01H, 0x29, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(29H_02H, 0x29, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(29H_04H, 0x29, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(29H_08H, 0x29, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(29H_10H, 0x29, 0x10, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(29H_20H, 0x29, 0x20, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(2AH_01H, 0x2A, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(2AH_02H, 0x2A, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(2AH_04H, 0x2A, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(2AH_07H, 0x2A, 0x07, UCP_F_FM | UCP_F_WM), + + UCPDESCR(2BH_01H, 0x2B, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(2BH_02H, 0x2B, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(2BH_04H, 0x2B, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(2BH_07H, 0x2B, 0x07, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(2CH_01H, 0x2C, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(2CH_02H, 0x2C, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(2CH_04H, 0x2C, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(2CH_07H, 0x2C, 0x07, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(2DH_01H, 0x2D, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(2DH_02H, 0x2D, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(2DH_04H, 0x2D, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(2DH_07H, 0x2D, 0x07, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(2EH_01H, 0x2E, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(2EH_02H, 0x2E, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(2EH_04H, 0x2E, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(2EH_07H, 0x2E, 0x07, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(2FH_01H, 0x2F, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(2FH_02H, 0x2F, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(2FH_04H, 0x2F, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(2FH_07H, 0x2F, 0x07, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(2FH_08H, 0x2F, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(2FH_10H, 0x2F, 0x10, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(2FH_20H, 0x2F, 0x20, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(2FH_38H, 0x2F, 0x38, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(30H_01H, 0x30, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(30H_02H, 0x30, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(30H_04H, 0x30, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(30H_07H, 0x30, 0x07, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(31H_01H, 0x31, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(31H_02H, 0x31, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(31H_04H, 0x31, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(31H_07H, 0x31, 0x07, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(32H_01H, 0x32, 0x01, UCP_F_FM | UCP_F_WM), + UCPDESCR(32H_02H, 0x32, 0x02, UCP_F_FM | UCP_F_WM), + UCPDESCR(32H_04H, 0x32, 0x04, UCP_F_FM | UCP_F_WM), + UCPDESCR(32H_07H, 0x32, 0x07, UCP_F_FM | UCP_F_WM), + + UCPDESCR(33H_01H, 0x33, 0x01, UCP_F_FM | UCP_F_WM), + UCPDESCR(33H_02H, 0x33, 0x02, UCP_F_FM | UCP_F_WM), + UCPDESCR(33H_04H, 0x33, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(33H_07H, 0x33, 0x07, UCP_F_FM | UCP_F_WM), + + UCPDESCR(34H_01H, 0x34, 0x01, UCP_F_FM | UCP_F_WM), + UCPDESCR(34H_02H, 0x34, 0x02, UCP_F_FM | UCP_F_WM), + UCPDESCR(34H_04H, 0x34, 0x04, UCP_F_FM | UCP_F_WM), + UCPDESCR(34H_08H, 0x34, 0x08, UCP_F_FM | UCP_F_WM), + UCPDESCR(34H_10H, 0x34, 0x10, UCP_F_FM | UCP_F_WM), + UCPDESCR(34H_20H, 0x34, 0x20, UCP_F_FM | UCP_F_WM), + + UCPDESCR(35H_01H, 0x35, 0x01, UCP_F_FM | UCP_F_WM), + UCPDESCR(35H_02H, 0x35, 0x02, UCP_F_FM | UCP_F_WM), + UCPDESCR(35H_04H, 0x35, 0x04, UCP_F_FM | UCP_F_WM), + + UCPDESCR(40H_01H, 0x40, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(40H_02H, 0x40, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(40H_04H, 0x40, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(40H_08H, 0x40, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(40H_10H, 0x40, 0x10, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(40H_20H, 0x40, 0x20, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(40H_07H, 0x40, 0x07, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(40H_38H, 0x40, 0x38, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(41H_01H, 0x41, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(41H_02H, 0x41, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(41H_04H, 0x41, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(41H_08H, 0x41, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(41H_10H, 0x41, 0x10, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(41H_20H, 0x41, 0x20, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(41H_07H, 0x41, 0x07, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(41H_38H, 0x41, 0x38, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(42H_01H, 0x42, 0x01, UCP_F_FM | UCP_F_WM), + UCPDESCR(42H_02H, 0x42, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(42H_04H, 0x42, 0x04, UCP_F_FM | UCP_F_WM), + UCPDESCR(42H_08H, 0x42, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(43H_01H, 0x43, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(43H_02H, 0x43, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(60H_01H, 0x60, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(60H_02H, 0x60, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(60H_04H, 0x60, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(61H_01H, 0x61, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(61H_02H, 0x61, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(61H_04H, 0x61, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(62H_01H, 0x62, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(62H_02H, 0x62, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(62H_04H, 0x62, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(63H_01H, 0x63, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(63H_02H, 0x63, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(63H_04H, 0x63, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(63H_08H, 0x63, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(63H_10H, 0x63, 0x10, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(63H_20H, 0x63, 0x20, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(64H_01H, 0x64, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(64H_02H, 0x64, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(64H_04H, 0x64, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(64H_08H, 0x64, 0x08, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(64H_10H, 0x64, 0x10, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(64H_20H, 0x64, 0x20, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(65H_01H, 0x65, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(65H_02H, 0x65, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(65H_04H, 0x65, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(66H_01H, 0x66, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(66H_02H, 0x66, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + UCPDESCR(66H_04H, 0x66, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), + + UCPDESCR(67H_01H, 0x67, 0x01, UCP_F_FM | UCP_F_WM), + UCPDESCR(80H_01H, 0x80, 0x01, UCP_F_FM | UCP_F_WM), + UCPDESCR(80H_02H, 0x80, 0x02, UCP_F_FM | UCP_F_WM), + UCPDESCR(80H_04H, 0x80, 0x04, UCP_F_FM | UCP_F_WM), + UCPDESCR(80H_08H, 0x80, 0x08, UCP_F_FM | UCP_F_WM), + UCPDESCR(81H_01H, 0x81, 0x01, UCP_F_FM | UCP_F_WM), + UCPDESCR(81H_02H, 0x81, 0x02, UCP_F_FM | UCP_F_WM), + UCPDESCR(81H_04H, 0x81, 0x04, UCP_F_FM | UCP_F_WM), + UCPDESCR(81H_08H, 0x81, 0x08, UCP_F_FM | UCP_F_WM), + UCPDESCR(82H_01H, 0x82, 0x01, UCP_F_FM | UCP_F_WM), + UCPDESCR(83H_01H, 0x83, 0x01, UCP_F_FM | UCP_F_WM), + UCPDESCR(83H_02H, 0x83, 0x02, UCP_F_FM | UCP_F_WM), + UCPDESCR(83H_04H, 0x83, 0x04, UCP_F_FM | UCP_F_WM), + UCPDESCR(83H_08H, 0x83, 0x08, UCP_F_FM | UCP_F_WM), + UCPDESCR(84H_01H, 0x84, 0x01, UCP_F_FM | UCP_F_WM), + UCPDESCR(84H_02H, 0x84, 0x02, UCP_F_FM | UCP_F_WM), + UCPDESCR(84H_04H, 0x84, 0x04, UCP_F_FM | UCP_F_WM), + UCPDESCR(84H_08H, 0x84, 0x08, UCP_F_FM | UCP_F_WM), + UCPDESCR(85H_02H, 0x85, 0x02, UCP_F_FM | UCP_F_WM), + UCPDESCR(86H_01H, 0x86, 0x01, UCP_F_FM | UCP_F_WM) +}; + +static const int nucp_events = sizeof(ucp_events) / sizeof(ucp_events[0]); + +static pmc_value_t +ucp_perfctr_value_to_reload_count(pmc_value_t v) +{ + v &= (1ULL << uncore_ucp_width) - 1; + return (1ULL << uncore_ucp_width) - v; +} + +static pmc_value_t +ucp_reload_count_to_perfctr_value(pmc_value_t rlc) +{ + return (1ULL << uncore_ucp_width) - rlc; +} + +static int +ucp_allocate_pmc(int cpu, int ri, struct pmc *pm, + const struct pmc_op_pmcallocate *a) +{ + int n; + enum pmc_event ev; + struct ucp_event_descr *ie; + uint32_t caps, config, cpuflag, evsel; + + KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), + ("[uncore,%d] illegal CPU %d", __LINE__, cpu)); + KASSERT(ri >= 0 && ri < uncore_ucp_npmc, + ("[uncore,%d] illegal row-index value %d", __LINE__, ri)); + + /* check requested capabilities */ + caps = a->pm_caps; + if ((UCP_PMC_CAPS & caps) != caps) + return (EPERM); + + ev = pm->pm_event; + + /* + * Look for an event descriptor with matching CPU and event id + * fields. + */ + + switch (uncore_cputype) { + case PMC_CPU_INTEL_COREI7: + cpuflag = UCP_F_I7; + break; + case PMC_CPU_INTEL_WESTMERE: + cpuflag = UCP_F_WM; + break; + default: + return (EINVAL); + } + + for (n = 0, ie = ucp_events; n < nucp_events; n++, ie++) + if (ie->ucp_ev == ev && ie->ucp_flags & cpuflag) + break; + + if (n == nucp_events) + return (EINVAL); + + /* + * A matching event descriptor has been found, so start + * assembling the contents of the event select register. + */ + evsel = ie->ucp_evcode | UCP_EN; + + config = a->pm_md.pm_ucp.pm_ucp_config & ~UCP_F_CMASK; + + /* + * If the event uses a fixed umask value, reject any umask + * bits set by the user. + */ + if (ie->ucp_flags & UCP_F_FM) { + + if (UCP_UMASK(config) != 0) + return (EINVAL); + + evsel |= (ie->ucp_umask << 8); + + } else + return (EINVAL); + + if (caps & PMC_CAP_THRESHOLD) + evsel |= (a->pm_md.pm_ucp.pm_ucp_config & UCP_F_CMASK); + if (caps & PMC_CAP_EDGE) + evsel |= UCP_EDGE; + if (caps & PMC_CAP_INVERT) + evsel |= UCP_INV; + + pm->pm_md.pm_ucp.pm_ucp_evsel = evsel; + + return (0); +} + +static int +ucp_config_pmc(int cpu, int ri, struct pmc *pm) +{ + KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), + ("[uncore,%d] illegal CPU %d", __LINE__, cpu)); + + KASSERT(ri >= 0 && ri < uncore_ucp_npmc, + ("[uncore,%d] illegal row-index %d", __LINE__, ri)); + + PMCDBG(MDP,CFG,1, "ucp-config cpu=%d ri=%d pm=%p", cpu, ri, pm); + + KASSERT(uncore_pcpu[cpu] != NULL, ("[uncore,%d] null per-cpu %d", __LINE__, + cpu)); + + uncore_pcpu[cpu]->pc_uncorepmcs[ri].phw_pmc = pm; + + return (0); +} + +static int +ucp_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc) +{ + int error; + struct pmc_hw *phw; + char ucp_name[PMC_NAME_MAX]; + + phw = &uncore_pcpu[cpu]->pc_uncorepmcs[ri]; + + (void) snprintf(ucp_name, sizeof(ucp_name), "UCP-%d", ri); + if ((error = copystr(ucp_name, pi->pm_name, PMC_NAME_MAX, + NULL)) != 0) + return (error); + + pi->pm_class = PMC_CLASS_UCP; + + if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) { + pi->pm_enabled = TRUE; + *ppmc = phw->phw_pmc; + } else { + pi->pm_enabled = FALSE; + *ppmc = NULL; + } + + return (0); +} + +static int +ucp_get_config(int cpu, int ri, struct pmc **ppm) +{ + *ppm = uncore_pcpu[cpu]->pc_uncorepmcs[ri].phw_pmc; + + return (0); +} + +static int +ucp_read_pmc(int cpu, int ri, pmc_value_t *v) +{ + struct pmc *pm; + pmc_value_t tmp; + + KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), + ("[uncore,%d] illegal cpu value %d", __LINE__, cpu)); + KASSERT(ri >= 0 && ri < uncore_ucp_npmc, + ("[uncore,%d] illegal row-index %d", __LINE__, ri)); + + pm = uncore_pcpu[cpu]->pc_uncorepmcs[ri].phw_pmc; + + KASSERT(pm, + ("[uncore,%d] cpu %d ri %d pmc not configured", __LINE__, cpu, + ri)); + + tmp = rdmsr(UCP_PMC0 + ri); + if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) + *v = ucp_perfctr_value_to_reload_count(tmp); + else + *v = tmp; + + PMCDBG(MDP,REA,1, "ucp-read cpu=%d ri=%d msr=0x%x -> v=%jx", cpu, ri, + ri, *v); + + return (0); +} + +static int +ucp_release_pmc(int cpu, int ri, struct pmc *pm) +{ + (void) pm; + + PMCDBG(MDP,REL,1, "ucp-release cpu=%d ri=%d pm=%p", cpu, ri, + pm); + + KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), + ("[uncore,%d] illegal CPU value %d", __LINE__, cpu)); + KASSERT(ri >= 0 && ri < uncore_ucp_npmc, + ("[uncore,%d] illegal row-index %d", __LINE__, ri)); + + KASSERT(uncore_pcpu[cpu]->pc_uncorepmcs[ri].phw_pmc + == NULL, ("[uncore,%d] PHW pmc non-NULL", __LINE__)); + + return (0); +} + +static int +ucp_start_pmc(int cpu, int ri) +{ + struct pmc *pm; + uint32_t evsel; + struct uncore_cpu *cc; + + KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), + ("[uncore,%d] illegal CPU value %d", __LINE__, cpu)); + KASSERT(ri >= 0 && ri < uncore_ucp_npmc, + ("[uncore,%d] illegal row-index %d", __LINE__, ri)); + + cc = uncore_pcpu[cpu]; + pm = cc->pc_uncorepmcs[ri].phw_pmc; + + KASSERT(pm, + ("[uncore,%d] starting cpu%d,ri%d with no pmc configured", + __LINE__, cpu, ri)); + + PMCDBG(MDP,STA,1, "ucp-start cpu=%d ri=%d", cpu, ri); + + evsel = pm->pm_md.pm_ucp.pm_ucp_evsel; + + PMCDBG(MDP,STA,2, "ucp-start/2 cpu=%d ri=%d evselmsr=0x%x evsel=0x%x", + cpu, ri, UCP_EVSEL0 + ri, evsel); + + wrmsr(UCP_EVSEL0 + ri, evsel); + + do { + cc->pc_resync = 0; + cc->pc_globalctrl |= (1ULL << ri); + wrmsr(UC_GLOBAL_CTRL, cc->pc_globalctrl); + } while (cc->pc_resync != 0); + + return (0); +} + +static int +ucp_stop_pmc(int cpu, int ri) +{ + struct pmc *pm; + struct uncore_cpu *cc; + + KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), + ("[uncore,%d] illegal cpu value %d", __LINE__, cpu)); + KASSERT(ri >= 0 && ri < uncore_ucp_npmc, + ("[uncore,%d] illegal row index %d", __LINE__, ri)); + + cc = uncore_pcpu[cpu]; + pm = cc->pc_uncorepmcs[ri].phw_pmc; + + KASSERT(pm, + ("[uncore,%d] cpu%d ri%d no configured PMC to stop", __LINE__, + cpu, ri)); + + PMCDBG(MDP,STO,1, "ucp-stop cpu=%d ri=%d", cpu, ri); + + wrmsr(UCP_EVSEL0 + ri, 0); /* stop hw */ + + do { + cc->pc_resync = 0; + cc->pc_globalctrl &= ~(1ULL << ri); + wrmsr(UC_GLOBAL_CTRL, cc->pc_globalctrl); + } while (cc->pc_resync != 0); + + return (0); +} + +static int +ucp_write_pmc(int cpu, int ri, pmc_value_t v) +{ + struct pmc *pm; + struct uncore_cpu *cc; + + KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), + ("[uncore,%d] illegal cpu value %d", __LINE__, cpu)); + KASSERT(ri >= 0 && ri < uncore_ucp_npmc, + ("[uncore,%d] illegal row index %d", __LINE__, ri)); + + cc = uncore_pcpu[cpu]; + pm = cc->pc_uncorepmcs[ri].phw_pmc; + + KASSERT(pm, + ("[uncore,%d] cpu%d ri%d no configured PMC to stop", __LINE__, + cpu, ri)); + + PMCDBG(MDP,WRI,1, "ucp-write cpu=%d ri=%d msr=0x%x v=%jx", cpu, ri, + UCP_PMC0 + ri, v); + + if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) + v = ucp_reload_count_to_perfctr_value(v); + + /* + * Write the new value to the counter. The counter will be in + * a stopped state when the pcd_write() entry point is called. + */ + + wrmsr(UCP_PMC0 + ri, v); + + return (0); +} + + +static void +ucp_initialize(struct pmc_mdep *md, int maxcpu, int npmc, int pmcwidth) +{ + struct pmc_classdep *pcd; + + KASSERT(md != NULL, ("[ucp,%d] md is NULL", __LINE__)); + + PMCDBG(MDP,INI,1, "%s", "ucp-initialize"); + + pcd = &md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCP]; + + pcd->pcd_caps = UCP_PMC_CAPS; + pcd->pcd_class = PMC_CLASS_UCP; + pcd->pcd_num = npmc; + pcd->pcd_ri = md->pmd_npmc; + pcd->pcd_width = pmcwidth; + + pcd->pcd_allocate_pmc = ucp_allocate_pmc; + pcd->pcd_config_pmc = ucp_config_pmc; + pcd->pcd_describe = ucp_describe; + pcd->pcd_get_config = ucp_get_config; + pcd->pcd_get_msr = NULL; + pcd->pcd_pcpu_fini = uncore_pcpu_fini; + pcd->pcd_pcpu_init = uncore_pcpu_init; + pcd->pcd_read_pmc = ucp_read_pmc; + pcd->pcd_release_pmc = ucp_release_pmc; + pcd->pcd_start_pmc = ucp_start_pmc; + pcd->pcd_stop_pmc = ucp_stop_pmc; + pcd->pcd_write_pmc = ucp_write_pmc; + + md->pmd_npmc += npmc; +} + +int +pmc_uncore_initialize(struct pmc_mdep *md, int maxcpu) +{ + uncore_cputype = md->pmd_cputype; + uncore_pmcmask = 0; + + /* + * Initialize programmable counters. + */ + + uncore_ucp_npmc = 8; + uncore_ucp_width = 48; + + uncore_pmcmask |= ((1ULL << uncore_ucp_npmc) - 1); + + ucp_initialize(md, maxcpu, uncore_ucp_npmc, uncore_ucp_width); + + /* + * Initialize fixed function counters, if present. + */ + uncore_ucf_ri = uncore_ucp_npmc; + uncore_ucf_npmc = 1; + uncore_ucf_width = 48; + + ucf_initialize(md, maxcpu, uncore_ucf_npmc, uncore_ucf_width); + uncore_pmcmask |= ((1ULL << uncore_ucf_npmc) - 1) << UCF_OFFSET; + + PMCDBG(MDP,INI,1,"uncore-init pmcmask=0x%jx ucfri=%d", uncore_pmcmask, + uncore_ucf_ri); + + uncore_pcpu = malloc(sizeof(struct uncore_cpu **) * maxcpu, M_PMC, + M_ZERO | M_WAITOK); + + return (0); +} + +void +pmc_uncore_finalize(struct pmc_mdep *md) +{ + PMCDBG(MDP,INI,1, "%s", "uncore-finalize"); + + free(uncore_pcpu, M_PMC); + uncore_pcpu = NULL; +} diff --git a/sys/dev/hwpmc/hwpmc_uncore.h b/sys/dev/hwpmc/hwpmc_uncore.h new file mode 100644 index 0000000..2be34db --- /dev/null +++ b/sys/dev/hwpmc/hwpmc_uncore.h @@ -0,0 +1,120 @@ +/*- + * Copyright (c) 2010 Fabien Thomas + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _DEV_HWPMC_UNCORE_H_ +#define _DEV_HWPMC_UNCORE_H_ 1 + +/* + * Fixed-function PMCs. + */ +struct pmc_md_ucf_op_pmcallocate { + uint16_t pm_ucf_flags; /* additional flags */ +}; + +#define UCF_EN 0x1 +#define UCF_PMI 0x4 + +/* + * Programmable PMCs. + */ +struct pmc_md_ucp_op_pmcallocate { + uint32_t pm_ucp_config; +}; + +#define UCP_EVSEL(C) ((C) & 0xFF) +#define UCP_UMASK(C) ((C) & 0xFF00) +#define UCP_CTRR (1 << 17) +#define UCP_EDGE (1 << 18) +#define UCP_INT (1 << 20) +#define UCP_EN (1 << 22) +#define UCP_INV (1 << 23) +#define UCP_CMASK(C) (((C) & 0xFF) << 24) + +#ifdef _KERNEL + +#define DCTL_FLAG_UNC_PMI (1ULL << 13) + +/* + * Fixed-function counters. + */ + +#define UCF_MASK 0xF + +#define UCF_CTR0 0x394 + +#define UCF_OFFSET 32 +#define UCF_CTRL 0x395 + +/* + * Programmable counters. + */ + +#define UCP_PMC0 0x3B0 +#define UCP_EVSEL0 0x3C0 +#define UCP_OPCODE_MATCH 0x396 + +/* + * Simplified programming interface in Intel Performance Architecture + * v2 and later. + */ + +#define UC_GLOBAL_STATUS 0x392 +#define UC_GLOBAL_CTRL 0x391 +#define UC_GLOBAL_OVF_CTRL 0x393 + +#define UC_GLOBAL_STATUS_FLAG_CLRCHG (1ULL << 63) +#define UC_GLOBAL_STATUS_FLAG_OVFPMI (1ULL << 61) +#define UC_GLOBAL_CTRL_FLAG_FRZ (1ULL << 63) +#define UC_GLOBAL_CTRL_FLAG_ENPMICORE0 (1ULL << 48) + +struct pmc_md_ucf_pmc { + uint64_t pm_ucf_ctrl; +}; + +struct pmc_md_ucp_pmc { + uint32_t pm_ucp_evsel; +}; + +/* + * Prototypes. + */ + +int pmc_uncore_initialize(struct pmc_mdep *_md, int _maxcpu); +void pmc_uncore_finalize(struct pmc_mdep *_md); + +void pmc_uncore_mark_started(int _cpu, int _pmc); + +int pmc_ucf_initialize(struct pmc_mdep *_md, int _maxcpu, int _npmc, int _width); +void pmc_ucf_finalize(struct pmc_mdep *_md); + +int pmc_ucp_initialize(struct pmc_mdep *_md, int _maxcpu, int _npmc, int _width, + int _flags); +void pmc_ucp_finalize(struct pmc_mdep *_md); + +#endif /* _KERNEL */ +#endif /* _DEV_HWPMC_UNCORE_H */ diff --git a/sys/dev/hwpmc/pmc_events.h b/sys/dev/hwpmc/pmc_events.h index 628a693..e38772c 100644 --- a/sys/dev/hwpmc/pmc_events.h +++ b/sys/dev/hwpmc/pmc_events.h @@ -468,8 +468,10 @@ __PMC_EV_ALIAS("unhalted-reference-cycles", IAF_CPU_CLK_UNHALTED_REF) * the CPU model happens inside hwpmc(4). */ #define __PMC_EV_IAP() \ +__PMC_EV(IAP, EVENT_02H_01H) \ __PMC_EV(IAP, EVENT_02H_81H) \ __PMC_EV(IAP, EVENT_03H_00H) \ +__PMC_EV(IAP, EVENT_03H_01H) \ __PMC_EV(IAP, EVENT_03H_02H) \ __PMC_EV(IAP, EVENT_03H_04H) \ __PMC_EV(IAP, EVENT_03H_08H) \ @@ -478,9 +480,18 @@ __PMC_EV(IAP, EVENT_03H_20H) \ __PMC_EV(IAP, EVENT_04H_00H) \ __PMC_EV(IAP, EVENT_04H_01H) \ __PMC_EV(IAP, EVENT_04H_02H) \ +__PMC_EV(IAP, EVENT_04H_07H) \ __PMC_EV(IAP, EVENT_04H_08H) \ __PMC_EV(IAP, EVENT_05H_00H) \ +__PMC_EV(IAP, EVENT_05H_01H) \ +__PMC_EV(IAP, EVENT_05H_02H) \ +__PMC_EV(IAP, EVENT_05H_03H) \ __PMC_EV(IAP, EVENT_06H_00H) \ +__PMC_EV(IAP, EVENT_06H_01H) \ +__PMC_EV(IAP, EVENT_06H_02H) \ +__PMC_EV(IAP, EVENT_06H_04H) \ +__PMC_EV(IAP, EVENT_06H_08H) \ +__PMC_EV(IAP, EVENT_06H_0FH) \ __PMC_EV(IAP, EVENT_07H_00H) \ __PMC_EV(IAP, EVENT_07H_01H) \ __PMC_EV(IAP, EVENT_07H_02H) \ @@ -495,41 +506,126 @@ __PMC_EV(IAP, EVENT_08H_06H) \ __PMC_EV(IAP, EVENT_08H_07H) \ __PMC_EV(IAP, EVENT_08H_08H) \ __PMC_EV(IAP, EVENT_08H_09H) \ +__PMC_EV(IAP, EVENT_08H_10H) \ +__PMC_EV(IAP, EVENT_08H_20H) \ +__PMC_EV(IAP, EVENT_08H_40H) \ +__PMC_EV(IAP, EVENT_08H_80H) \ __PMC_EV(IAP, EVENT_09H_01H) \ __PMC_EV(IAP, EVENT_09H_02H) \ +__PMC_EV(IAP, EVENT_09H_04H) \ +__PMC_EV(IAP, EVENT_09H_08H) \ +__PMC_EV(IAP, EVENT_0BH_01H) \ +__PMC_EV(IAP, EVENT_0BH_02H) \ +__PMC_EV(IAP, EVENT_0BH_10H) \ __PMC_EV(IAP, EVENT_0CH_01H) \ __PMC_EV(IAP, EVENT_0CH_02H) \ __PMC_EV(IAP, EVENT_0CH_03H) \ +__PMC_EV(IAP, EVENT_0EH_01H) \ +__PMC_EV(IAP, EVENT_0EH_02H) \ +__PMC_EV(IAP, EVENT_0FH_01H) \ +__PMC_EV(IAP, EVENT_0FH_02H) \ +__PMC_EV(IAP, EVENT_0FH_08H) \ +__PMC_EV(IAP, EVENT_0FH_10H) \ +__PMC_EV(IAP, EVENT_0FH_20H) \ +__PMC_EV(IAP, EVENT_0FH_80H) \ __PMC_EV(IAP, EVENT_10H_00H) \ __PMC_EV(IAP, EVENT_10H_01H) \ +__PMC_EV(IAP, EVENT_10H_02H) \ +__PMC_EV(IAP, EVENT_10H_04H) \ +__PMC_EV(IAP, EVENT_10H_08H) \ +__PMC_EV(IAP, EVENT_10H_10H) \ +__PMC_EV(IAP, EVENT_10H_20H) \ +__PMC_EV(IAP, EVENT_10H_40H) \ +__PMC_EV(IAP, EVENT_10H_80H) \ __PMC_EV(IAP, EVENT_10H_81H) \ __PMC_EV(IAP, EVENT_11H_00H) \ __PMC_EV(IAP, EVENT_11H_01H) \ __PMC_EV(IAP, EVENT_11H_81H) \ __PMC_EV(IAP, EVENT_12H_00H) \ __PMC_EV(IAP, EVENT_12H_01H) \ +__PMC_EV(IAP, EVENT_12H_02H) \ +__PMC_EV(IAP, EVENT_12H_04H) \ +__PMC_EV(IAP, EVENT_12H_08H) \ +__PMC_EV(IAP, EVENT_12H_10H) \ +__PMC_EV(IAP, EVENT_12H_20H) \ +__PMC_EV(IAP, EVENT_12H_40H) \ __PMC_EV(IAP, EVENT_12H_81H) \ __PMC_EV(IAP, EVENT_13H_00H) \ __PMC_EV(IAP, EVENT_13H_01H) \ +__PMC_EV(IAP, EVENT_13H_02H) \ +__PMC_EV(IAP, EVENT_13H_04H) \ +__PMC_EV(IAP, EVENT_13H_07H) \ __PMC_EV(IAP, EVENT_13H_81H) \ __PMC_EV(IAP, EVENT_14H_00H) \ __PMC_EV(IAP, EVENT_14H_01H) \ +__PMC_EV(IAP, EVENT_14H_02H) \ +__PMC_EV(IAP, EVENT_17H_01H) \ __PMC_EV(IAP, EVENT_18H_00H) \ +__PMC_EV(IAP, EVENT_18H_01H) \ __PMC_EV(IAP, EVENT_19H_00H) \ __PMC_EV(IAP, EVENT_19H_01H) \ __PMC_EV(IAP, EVENT_19H_02H) \ +__PMC_EV(IAP, EVENT_1DH_01H) \ +__PMC_EV(IAP, EVENT_1DH_02H) \ +__PMC_EV(IAP, EVENT_1DH_04H) \ +__PMC_EV(IAP, EVENT_1EH_01H) \ +__PMC_EV(IAP, EVENT_20H_01H) \ __PMC_EV(IAP, EVENT_21H) \ __PMC_EV(IAP, EVENT_22H) \ __PMC_EV(IAP, EVENT_23H) \ __PMC_EV(IAP, EVENT_24H) \ +__PMC_EV(IAP, EVENT_24H_01H) \ +__PMC_EV(IAP, EVENT_24H_02H) \ +__PMC_EV(IAP, EVENT_24H_03H) \ +__PMC_EV(IAP, EVENT_24H_04H) \ +__PMC_EV(IAP, EVENT_24H_08H) \ +__PMC_EV(IAP, EVENT_24H_0CH) \ +__PMC_EV(IAP, EVENT_24H_10H) \ +__PMC_EV(IAP, EVENT_24H_20H) \ +__PMC_EV(IAP, EVENT_24H_30H) \ +__PMC_EV(IAP, EVENT_24H_40H) \ +__PMC_EV(IAP, EVENT_24H_80H) \ +__PMC_EV(IAP, EVENT_24H_AAH) \ +__PMC_EV(IAP, EVENT_24H_C0H) \ +__PMC_EV(IAP, EVENT_24H_FFH) \ __PMC_EV(IAP, EVENT_25H) \ __PMC_EV(IAP, EVENT_26H) \ +__PMC_EV(IAP, EVENT_26H_01H) \ +__PMC_EV(IAP, EVENT_26H_02H) \ +__PMC_EV(IAP, EVENT_26H_04H) \ +__PMC_EV(IAP, EVENT_26H_08H) \ +__PMC_EV(IAP, EVENT_26H_0FH) \ +__PMC_EV(IAP, EVENT_26H_10H) \ +__PMC_EV(IAP, EVENT_26H_20H) \ +__PMC_EV(IAP, EVENT_26H_40H) \ +__PMC_EV(IAP, EVENT_26H_80H) \ +__PMC_EV(IAP, EVENT_26H_F0H) \ +__PMC_EV(IAP, EVENT_26H_FFH) \ __PMC_EV(IAP, EVENT_27H) \ +__PMC_EV(IAP, EVENT_27H_01H) \ +__PMC_EV(IAP, EVENT_27H_02H) \ +__PMC_EV(IAP, EVENT_27H_04H) \ +__PMC_EV(IAP, EVENT_27H_08H) \ +__PMC_EV(IAP, EVENT_27H_0EH) \ +__PMC_EV(IAP, EVENT_27H_0FH) \ +__PMC_EV(IAP, EVENT_27H_10H) \ +__PMC_EV(IAP, EVENT_27H_20H) \ +__PMC_EV(IAP, EVENT_27H_40H) \ +__PMC_EV(IAP, EVENT_27H_80H) \ +__PMC_EV(IAP, EVENT_27H_E0H) \ +__PMC_EV(IAP, EVENT_27H_F0H) \ __PMC_EV(IAP, EVENT_28H) \ +__PMC_EV(IAP, EVENT_28H_01H) \ +__PMC_EV(IAP, EVENT_28H_02H) \ +__PMC_EV(IAP, EVENT_28H_04H) \ +__PMC_EV(IAP, EVENT_28H_08H) \ +__PMC_EV(IAP, EVENT_28H_0FH) \ __PMC_EV(IAP, EVENT_29H) \ __PMC_EV(IAP, EVENT_2AH) \ __PMC_EV(IAP, EVENT_2BH) \ __PMC_EV(IAP, EVENT_2EH) \ +__PMC_EV(IAP, EVENT_2EH_01H) \ +__PMC_EV(IAP, EVENT_2EH_02H) \ __PMC_EV(IAP, EVENT_2EH_41H) \ __PMC_EV(IAP, EVENT_2EH_4FH) \ __PMC_EV(IAP, EVENT_30H) \ @@ -540,11 +636,26 @@ __PMC_EV(IAP, EVENT_3BH_C0H) \ __PMC_EV(IAP, EVENT_3CH_00H) \ __PMC_EV(IAP, EVENT_3CH_01H) \ __PMC_EV(IAP, EVENT_3CH_02H) \ +__PMC_EV(IAP, EVENT_3DH_01H) \ __PMC_EV(IAP, EVENT_40H) \ +__PMC_EV(IAP, EVENT_40H_01H) \ +__PMC_EV(IAP, EVENT_40H_02H) \ +__PMC_EV(IAP, EVENT_40H_04H) \ +__PMC_EV(IAP, EVENT_40H_08H) \ +__PMC_EV(IAP, EVENT_40H_0FH) \ __PMC_EV(IAP, EVENT_40H_21H) \ __PMC_EV(IAP, EVENT_41H) \ +__PMC_EV(IAP, EVENT_41H_01H) \ +__PMC_EV(IAP, EVENT_41H_02H) \ +__PMC_EV(IAP, EVENT_41H_04H) \ +__PMC_EV(IAP, EVENT_41H_08H) \ +__PMC_EV(IAP, EVENT_41H_0FH) \ __PMC_EV(IAP, EVENT_41H_22H) \ __PMC_EV(IAP, EVENT_42H) \ +__PMC_EV(IAP, EVENT_42H_01H) \ +__PMC_EV(IAP, EVENT_42H_02H) \ +__PMC_EV(IAP, EVENT_42H_04H) \ +__PMC_EV(IAP, EVENT_42H_08H) \ __PMC_EV(IAP, EVENT_42H_10H) \ __PMC_EV(IAP, EVENT_43H_01H) \ __PMC_EV(IAP, EVENT_43H_02H) \ @@ -553,22 +664,50 @@ __PMC_EV(IAP, EVENT_45H_0FH) \ __PMC_EV(IAP, EVENT_46H_00H) \ __PMC_EV(IAP, EVENT_47H_00H) \ __PMC_EV(IAP, EVENT_48H_00H) \ +__PMC_EV(IAP, EVENT_48H_02H) \ __PMC_EV(IAP, EVENT_49H_00H) \ __PMC_EV(IAP, EVENT_49H_01H) \ __PMC_EV(IAP, EVENT_49H_02H) \ +__PMC_EV(IAP, EVENT_49H_04H) \ +__PMC_EV(IAP, EVENT_49H_10H) \ +__PMC_EV(IAP, EVENT_49H_20H) \ +__PMC_EV(IAP, EVENT_49H_40H) \ +__PMC_EV(IAP, EVENT_49H_80H) \ __PMC_EV(IAP, EVENT_4BH_00H) \ __PMC_EV(IAP, EVENT_4BH_01H) \ __PMC_EV(IAP, EVENT_4BH_02H) \ __PMC_EV(IAP, EVENT_4BH_03H) \ +__PMC_EV(IAP, EVENT_4BH_08H) \ __PMC_EV(IAP, EVENT_4CH_00H) \ +__PMC_EV(IAP, EVENT_4CH_01H) \ +__PMC_EV(IAP, EVENT_4DH_01H) \ +__PMC_EV(IAP, EVENT_4EH_01H) \ +__PMC_EV(IAP, EVENT_4EH_02H) \ +__PMC_EV(IAP, EVENT_4EH_04H) \ __PMC_EV(IAP, EVENT_4EH_10H) \ __PMC_EV(IAP, EVENT_4FH_00H) \ +__PMC_EV(IAP, EVENT_4FH_02H) \ +__PMC_EV(IAP, EVENT_4FH_04H) \ +__PMC_EV(IAP, EVENT_4FH_08H) \ +__PMC_EV(IAP, EVENT_4FH_10H) \ +__PMC_EV(IAP, EVENT_51H_01H) \ +__PMC_EV(IAP, EVENT_51H_02H) \ +__PMC_EV(IAP, EVENT_51H_04H) \ +__PMC_EV(IAP, EVENT_51H_08H) \ +__PMC_EV(IAP, EVENT_52H_01H) \ +__PMC_EV(IAP, EVENT_53H_01H) \ __PMC_EV(IAP, EVENT_60H) \ +__PMC_EV(IAP, EVENT_60H_01H) \ +__PMC_EV(IAP, EVENT_60H_02H) \ +__PMC_EV(IAP, EVENT_60H_04H) \ +__PMC_EV(IAP, EVENT_60H_08H) \ __PMC_EV(IAP, EVENT_61H) \ __PMC_EV(IAP, EVENT_61H_00H) \ __PMC_EV(IAP, EVENT_62H) \ __PMC_EV(IAP, EVENT_62H_00H) \ __PMC_EV(IAP, EVENT_63H) \ +__PMC_EV(IAP, EVENT_63H_01H) \ +__PMC_EV(IAP, EVENT_63H_02H) \ __PMC_EV(IAP, EVENT_64H) \ __PMC_EV(IAP, EVENT_64H_40H) \ __PMC_EV(IAP, EVENT_65H) \ @@ -579,6 +718,7 @@ __PMC_EV(IAP, EVENT_69H) \ __PMC_EV(IAP, EVENT_6AH) \ __PMC_EV(IAP, EVENT_6BH) \ __PMC_EV(IAP, EVENT_6CH) \ +__PMC_EV(IAP, EVENT_6CH_01H) \ __PMC_EV(IAP, EVENT_6DH) \ __PMC_EV(IAP, EVENT_6EH) \ __PMC_EV(IAP, EVENT_6FH) \ @@ -592,20 +732,59 @@ __PMC_EV(IAP, EVENT_7EH) \ __PMC_EV(IAP, EVENT_7EH_00H) \ __PMC_EV(IAP, EVENT_7FH) \ __PMC_EV(IAP, EVENT_80H_00H) \ +__PMC_EV(IAP, EVENT_80H_01H) \ __PMC_EV(IAP, EVENT_80H_02H) \ __PMC_EV(IAP, EVENT_80H_03H) \ +__PMC_EV(IAP, EVENT_80H_04H) \ +__PMC_EV(IAP, EVENT_80H_10H) \ __PMC_EV(IAP, EVENT_81H_00H) \ +__PMC_EV(IAP, EVENT_81H_01H) \ +__PMC_EV(IAP, EVENT_81H_02H) \ +__PMC_EV(IAP, EVENT_82H_01H) \ __PMC_EV(IAP, EVENT_82H_02H) \ __PMC_EV(IAP, EVENT_82H_04H) \ __PMC_EV(IAP, EVENT_82H_10H) \ __PMC_EV(IAP, EVENT_82H_12H) \ __PMC_EV(IAP, EVENT_82H_40H) \ +__PMC_EV(IAP, EVENT_83H_01H) \ __PMC_EV(IAP, EVENT_83H_02H) \ __PMC_EV(IAP, EVENT_85H_00H) \ +__PMC_EV(IAP, EVENT_85H_01H) \ +__PMC_EV(IAP, EVENT_85H_02H) \ +__PMC_EV(IAP, EVENT_85H_04H) \ +__PMC_EV(IAP, EVENT_85H_10H) \ +__PMC_EV(IAP, EVENT_85H_20H) \ +__PMC_EV(IAP, EVENT_85H_40H) \ +__PMC_EV(IAP, EVENT_85H_80H) \ __PMC_EV(IAP, EVENT_86H_00H) \ __PMC_EV(IAP, EVENT_87H_00H) \ +__PMC_EV(IAP, EVENT_87H_01H) \ +__PMC_EV(IAP, EVENT_87H_02H) \ +__PMC_EV(IAP, EVENT_87H_04H) \ +__PMC_EV(IAP, EVENT_87H_08H) \ +__PMC_EV(IAP, EVENT_87H_0FH) \ __PMC_EV(IAP, EVENT_88H_00H) \ +__PMC_EV(IAP, EVENT_88H_01H) \ +__PMC_EV(IAP, EVENT_88H_02H) \ +__PMC_EV(IAP, EVENT_88H_04H) \ +__PMC_EV(IAP, EVENT_88H_07H) \ +__PMC_EV(IAP, EVENT_88H_08H) \ +__PMC_EV(IAP, EVENT_88H_10H) \ +__PMC_EV(IAP, EVENT_88H_20H) \ +__PMC_EV(IAP, EVENT_88H_30H) \ +__PMC_EV(IAP, EVENT_88H_40H) \ +__PMC_EV(IAP, EVENT_88H_7FH) \ __PMC_EV(IAP, EVENT_89H_00H) \ +__PMC_EV(IAP, EVENT_89H_01H) \ +__PMC_EV(IAP, EVENT_89H_02H) \ +__PMC_EV(IAP, EVENT_89H_04H) \ +__PMC_EV(IAP, EVENT_89H_07H) \ +__PMC_EV(IAP, EVENT_89H_08H) \ +__PMC_EV(IAP, EVENT_89H_10H) \ +__PMC_EV(IAP, EVENT_89H_20H) \ +__PMC_EV(IAP, EVENT_89H_30H) \ +__PMC_EV(IAP, EVENT_89H_40H) \ +__PMC_EV(IAP, EVENT_89H_7FH) \ __PMC_EV(IAP, EVENT_8AH_00H) \ __PMC_EV(IAP, EVENT_8BH_00H) \ __PMC_EV(IAP, EVENT_8CH_00H) \ @@ -627,16 +806,45 @@ __PMC_EV(IAP, EVENT_A1H_08H) \ __PMC_EV(IAP, EVENT_A1H_10H) \ __PMC_EV(IAP, EVENT_A1H_20H) \ __PMC_EV(IAP, EVENT_A2H_00H) \ +__PMC_EV(IAP, EVENT_A2H_01H) \ +__PMC_EV(IAP, EVENT_A2H_02H) \ +__PMC_EV(IAP, EVENT_A2H_04H) \ +__PMC_EV(IAP, EVENT_A2H_08H) \ +__PMC_EV(IAP, EVENT_A2H_10H) \ +__PMC_EV(IAP, EVENT_A2H_20H) \ +__PMC_EV(IAP, EVENT_A2H_40H) \ +__PMC_EV(IAP, EVENT_A2H_80H) \ +__PMC_EV(IAP, EVENT_A6H_01H) \ +__PMC_EV(IAP, EVENT_A7H_01H) \ +__PMC_EV(IAP, EVENT_A8H_01H) \ __PMC_EV(IAP, EVENT_AAH_01H) \ __PMC_EV(IAP, EVENT_AAH_02H) \ __PMC_EV(IAP, EVENT_AAH_03H) \ __PMC_EV(IAP, EVENT_AAH_08H) \ __PMC_EV(IAP, EVENT_ABH_01H) \ __PMC_EV(IAP, EVENT_ABH_02H) \ +__PMC_EV(IAP, EVENT_AEH_01H) \ __PMC_EV(IAP, EVENT_B0H_00H) \ +__PMC_EV(IAP, EVENT_B0H_01H) \ +__PMC_EV(IAP, EVENT_B0H_02H) \ +__PMC_EV(IAP, EVENT_B0H_04H) \ +__PMC_EV(IAP, EVENT_B0H_08H) \ +__PMC_EV(IAP, EVENT_B0H_10H) \ +__PMC_EV(IAP, EVENT_B0H_20H) \ +__PMC_EV(IAP, EVENT_B0H_40H) \ __PMC_EV(IAP, EVENT_B0H_80H) \ __PMC_EV(IAP, EVENT_B1H_00H) \ +__PMC_EV(IAP, EVENT_B1H_01H) \ +__PMC_EV(IAP, EVENT_B1H_02H) \ +__PMC_EV(IAP, EVENT_B1H_04H) \ +__PMC_EV(IAP, EVENT_B1H_08H) \ +__PMC_EV(IAP, EVENT_B1H_10H) \ +__PMC_EV(IAP, EVENT_B1H_1FH) \ +__PMC_EV(IAP, EVENT_B1H_20H) \ +__PMC_EV(IAP, EVENT_B1H_3FH) \ +__PMC_EV(IAP, EVENT_B1H_40H) \ __PMC_EV(IAP, EVENT_B1H_80H) \ +__PMC_EV(IAP, EVENT_B2H_01H) \ __PMC_EV(IAP, EVENT_B3H_01H) \ __PMC_EV(IAP, EVENT_B3H_02H) \ __PMC_EV(IAP, EVENT_B3H_04H) \ @@ -649,6 +857,16 @@ __PMC_EV(IAP, EVENT_B3H_84H) \ __PMC_EV(IAP, EVENT_B3H_88H) \ __PMC_EV(IAP, EVENT_B3H_90H) \ __PMC_EV(IAP, EVENT_B3H_A0H) \ +__PMC_EV(IAP, EVENT_B4H_01H) \ +__PMC_EV(IAP, EVENT_B4H_02H) \ +__PMC_EV(IAP, EVENT_B4H_04H) \ +__PMC_EV(IAP, EVENT_B7H_01H) \ +__PMC_EV(IAP, EVENT_B8H_01H) \ +__PMC_EV(IAP, EVENT_B8H_02H) \ +__PMC_EV(IAP, EVENT_B8H_04H) \ +__PMC_EV(IAP, EVENT_BAH_01H) \ +__PMC_EV(IAP, EVENT_BAH_02H) \ +__PMC_EV(IAP, EVENT_BBH_01H) \ __PMC_EV(IAP, EVENT_C0H_00H) \ __PMC_EV(IAP, EVENT_C0H_01H) \ __PMC_EV(IAP, EVENT_C0H_02H) \ @@ -662,12 +880,14 @@ __PMC_EV(IAP, EVENT_C2H_01H) \ __PMC_EV(IAP, EVENT_C2H_02H) \ __PMC_EV(IAP, EVENT_C2H_04H) \ __PMC_EV(IAP, EVENT_C2H_07H) \ +__PMC_EV(IAP, EVENT_C2H_08H) \ __PMC_EV(IAP, EVENT_C2H_0FH) \ __PMC_EV(IAP, EVENT_C2H_10H) \ -__PMC_EV(IAP, EVENT_C2H_08H) \ __PMC_EV(IAP, EVENT_C3H_00H) \ __PMC_EV(IAP, EVENT_C3H_01H) \ +__PMC_EV(IAP, EVENT_C3H_02H) \ __PMC_EV(IAP, EVENT_C3H_04H) \ +__PMC_EV(IAP, EVENT_C3H_10H) \ __PMC_EV(IAP, EVENT_C4H_00H) \ __PMC_EV(IAP, EVENT_C4H_01H) \ __PMC_EV(IAP, EVENT_C4H_02H) \ @@ -676,6 +896,9 @@ __PMC_EV(IAP, EVENT_C4H_08H) \ __PMC_EV(IAP, EVENT_C4H_0CH) \ __PMC_EV(IAP, EVENT_C4H_0FH) \ __PMC_EV(IAP, EVENT_C5H_00H) \ +__PMC_EV(IAP, EVENT_C5H_01H) \ +__PMC_EV(IAP, EVENT_C5H_02H) \ +__PMC_EV(IAP, EVENT_C5H_04H) \ __PMC_EV(IAP, EVENT_C6H_00H) \ __PMC_EV(IAP, EVENT_C6H_01H) \ __PMC_EV(IAP, EVENT_C6H_02H) \ @@ -687,6 +910,7 @@ __PMC_EV(IAP, EVENT_C7H_08H) \ __PMC_EV(IAP, EVENT_C7H_10H) \ __PMC_EV(IAP, EVENT_C7H_1FH) \ __PMC_EV(IAP, EVENT_C8H_00H) \ +__PMC_EV(IAP, EVENT_C8H_20H) \ __PMC_EV(IAP, EVENT_C9H_00H) \ __PMC_EV(IAP, EVENT_CAH_00H) \ __PMC_EV(IAP, EVENT_CAH_01H) \ @@ -698,13 +922,21 @@ __PMC_EV(IAP, EVENT_CBH_02H) \ __PMC_EV(IAP, EVENT_CBH_04H) \ __PMC_EV(IAP, EVENT_CBH_08H) \ __PMC_EV(IAP, EVENT_CBH_10H) \ +__PMC_EV(IAP, EVENT_CBH_40H) \ +__PMC_EV(IAP, EVENT_CBH_80H) \ __PMC_EV(IAP, EVENT_CCH_00H) \ __PMC_EV(IAP, EVENT_CCH_01H) \ __PMC_EV(IAP, EVENT_CCH_02H) \ +__PMC_EV(IAP, EVENT_CCH_03H) \ __PMC_EV(IAP, EVENT_CDH_00H) \ __PMC_EV(IAP, EVENT_CEH_00H) \ __PMC_EV(IAP, EVENT_CFH_00H) \ __PMC_EV(IAP, EVENT_D0H_00H) \ +__PMC_EV(IAP, EVENT_D0H_01H) \ +__PMC_EV(IAP, EVENT_D1H_01H) \ +__PMC_EV(IAP, EVENT_D1H_02H) \ +__PMC_EV(IAP, EVENT_D1H_04H) \ +__PMC_EV(IAP, EVENT_D1H_08H) \ __PMC_EV(IAP, EVENT_D2H_01H) \ __PMC_EV(IAP, EVENT_D2H_02H) \ __PMC_EV(IAP, EVENT_D2H_04H) \ @@ -735,6 +967,7 @@ __PMC_EV(IAP, EVENT_DAH_00H) \ __PMC_EV(IAP, EVENT_DAH_01H) \ __PMC_EV(IAP, EVENT_DAH_02H) \ __PMC_EV(IAP, EVENT_DBH_00H) \ +__PMC_EV(IAP, EVENT_DBH_01H) \ __PMC_EV(IAP, EVENT_DCH_01H) \ __PMC_EV(IAP, EVENT_DCH_02H) \ __PMC_EV(IAP, EVENT_DCH_04H) \ @@ -745,249 +978,16 @@ __PMC_EV(IAP, EVENT_E0H_00H) \ __PMC_EV(IAP, EVENT_E0H_01H) \ __PMC_EV(IAP, EVENT_E2H_00H) \ __PMC_EV(IAP, EVENT_E4H_00H) \ -__PMC_EV(IAP, EVENT_E6H_00H) \ -__PMC_EV(IAP, EVENT_E6H_01H) \ -__PMC_EV(IAP, EVENT_F0H_00H) \ -__PMC_EV(IAP, EVENT_F8H_00H) \ -__PMC_EV(IAP, EVENT_02H_01H) \ -__PMC_EV(IAP, EVENT_03H_01H) \ -__PMC_EV(IAP, EVENT_05H_01H) \ -__PMC_EV(IAP, EVENT_05H_02H) \ -__PMC_EV(IAP, EVENT_05H_03H) \ -__PMC_EV(IAP, EVENT_06H_01H) \ -__PMC_EV(IAP, EVENT_06H_02H) \ -__PMC_EV(IAP, EVENT_06H_04H) \ -__PMC_EV(IAP, EVENT_06H_08H) \ -__PMC_EV(IAP, EVENT_06H_0FH) \ -__PMC_EV(IAP, EVENT_08H_10H) \ -__PMC_EV(IAP, EVENT_08H_20H) \ -__PMC_EV(IAP, EVENT_08H_40H) \ -__PMC_EV(IAP, EVENT_08H_80H) \ -__PMC_EV(IAP, EVENT_09H_04H) \ -__PMC_EV(IAP, EVENT_09H_08H) \ -__PMC_EV(IAP, EVENT_0BH_01H) \ -__PMC_EV(IAP, EVENT_0BH_02H) \ -__PMC_EV(IAP, EVENT_0EH_01H) \ -__PMC_EV(IAP, EVENT_0EH_02H) \ -__PMC_EV(IAP, EVENT_0FH_02H) \ -__PMC_EV(IAP, EVENT_0FH_08H) \ -__PMC_EV(IAP, EVENT_0FH_10H) \ -__PMC_EV(IAP, EVENT_0FH_20H) \ -__PMC_EV(IAP, EVENT_10H_02H) \ -__PMC_EV(IAP, EVENT_10H_04H) \ -__PMC_EV(IAP, EVENT_10H_08H) \ -__PMC_EV(IAP, EVENT_10H_10H) \ -__PMC_EV(IAP, EVENT_10H_20H) \ -__PMC_EV(IAP, EVENT_10H_40H) \ -__PMC_EV(IAP, EVENT_10H_80H) \ -__PMC_EV(IAP, EVENT_12H_02H) \ -__PMC_EV(IAP, EVENT_12H_04H) \ -__PMC_EV(IAP, EVENT_12H_08H) \ -__PMC_EV(IAP, EVENT_12H_10H) \ -__PMC_EV(IAP, EVENT_12H_20H) \ -__PMC_EV(IAP, EVENT_12H_40H) \ -__PMC_EV(IAP, EVENT_13H_02H) \ -__PMC_EV(IAP, EVENT_13H_04H) \ -__PMC_EV(IAP, EVENT_13H_07H) \ -__PMC_EV(IAP, EVENT_14H_02H) \ -__PMC_EV(IAP, EVENT_17H_01H) \ -__PMC_EV(IAP, EVENT_18H_01H) \ -__PMC_EV(IAP, EVENT_1DH_01H) \ -__PMC_EV(IAP, EVENT_1DH_02H) \ -__PMC_EV(IAP, EVENT_1DH_04H) \ -__PMC_EV(IAP, EVENT_1EH_01H) \ -__PMC_EV(IAP, EVENT_24H_01H) \ -__PMC_EV(IAP, EVENT_24H_02H) \ -__PMC_EV(IAP, EVENT_24H_03H) \ -__PMC_EV(IAP, EVENT_24H_04H) \ -__PMC_EV(IAP, EVENT_24H_08H) \ -__PMC_EV(IAP, EVENT_24H_0CH) \ -__PMC_EV(IAP, EVENT_24H_10H) \ -__PMC_EV(IAP, EVENT_24H_20H) \ -__PMC_EV(IAP, EVENT_24H_30H) \ -__PMC_EV(IAP, EVENT_24H_40H) \ -__PMC_EV(IAP, EVENT_24H_80H) \ -__PMC_EV(IAP, EVENT_24H_AAH) \ -__PMC_EV(IAP, EVENT_24H_C0H) \ -__PMC_EV(IAP, EVENT_24H_FFH) \ -__PMC_EV(IAP, EVENT_26H_01H) \ -__PMC_EV(IAP, EVENT_26H_02H) \ -__PMC_EV(IAP, EVENT_26H_04H) \ -__PMC_EV(IAP, EVENT_26H_08H) \ -__PMC_EV(IAP, EVENT_26H_0FH) \ -__PMC_EV(IAP, EVENT_26H_10H) \ -__PMC_EV(IAP, EVENT_26H_20H) \ -__PMC_EV(IAP, EVENT_26H_40H) \ -__PMC_EV(IAP, EVENT_26H_80H) \ -__PMC_EV(IAP, EVENT_26H_F0H) \ -__PMC_EV(IAP, EVENT_26H_FFH) \ -__PMC_EV(IAP, EVENT_27H_01H) \ -__PMC_EV(IAP, EVENT_27H_02H) \ -__PMC_EV(IAP, EVENT_27H_04H) \ -__PMC_EV(IAP, EVENT_27H_08H) \ -__PMC_EV(IAP, EVENT_27H_0EH) \ -__PMC_EV(IAP, EVENT_27H_0FH) \ -__PMC_EV(IAP, EVENT_27H_10H) \ -__PMC_EV(IAP, EVENT_27H_20H) \ -__PMC_EV(IAP, EVENT_27H_40H) \ -__PMC_EV(IAP, EVENT_27H_80H) \ -__PMC_EV(IAP, EVENT_27H_E0H) \ -__PMC_EV(IAP, EVENT_27H_F0H) \ -__PMC_EV(IAP, EVENT_28H_01H) \ -__PMC_EV(IAP, EVENT_28H_02H) \ -__PMC_EV(IAP, EVENT_28H_04H) \ -__PMC_EV(IAP, EVENT_28H_08H) \ -__PMC_EV(IAP, EVENT_28H_0FH) \ -__PMC_EV(IAP, EVENT_3DH_01H) \ -__PMC_EV(IAP, EVENT_40H_01H) \ -__PMC_EV(IAP, EVENT_40H_02H) \ -__PMC_EV(IAP, EVENT_40H_04H) \ -__PMC_EV(IAP, EVENT_40H_08H) \ -__PMC_EV(IAP, EVENT_40H_0FH) \ -__PMC_EV(IAP, EVENT_41H_01H) \ -__PMC_EV(IAP, EVENT_41H_02H) \ -__PMC_EV(IAP, EVENT_41H_04H) \ -__PMC_EV(IAP, EVENT_41H_08H) \ -__PMC_EV(IAP, EVENT_41H_0FH) \ -__PMC_EV(IAP, EVENT_42H_01H) \ -__PMC_EV(IAP, EVENT_42H_02H) \ -__PMC_EV(IAP, EVENT_42H_04H) \ -__PMC_EV(IAP, EVENT_42H_08H) \ -__PMC_EV(IAP, EVENT_48H_02H) \ -__PMC_EV(IAP, EVENT_49H_10H) \ -__PMC_EV(IAP, EVENT_49H_20H) \ -__PMC_EV(IAP, EVENT_49H_40H) \ -__PMC_EV(IAP, EVENT_49H_80H) \ -__PMC_EV(IAP, EVENT_4BH_08H) \ -__PMC_EV(IAP, EVENT_4CH_01H) \ -__PMC_EV(IAP, EVENT_4DH_01H) \ -__PMC_EV(IAP, EVENT_4EH_01H) \ -__PMC_EV(IAP, EVENT_4EH_02H) \ -__PMC_EV(IAP, EVENT_4EH_04H) \ -__PMC_EV(IAP, EVENT_4FH_02H) \ -__PMC_EV(IAP, EVENT_4FH_04H) \ -__PMC_EV(IAP, EVENT_4FH_08H) \ -__PMC_EV(IAP, EVENT_51H_01H) \ -__PMC_EV(IAP, EVENT_51H_02H) \ -__PMC_EV(IAP, EVENT_51H_04H) \ -__PMC_EV(IAP, EVENT_51H_08H) \ -__PMC_EV(IAP, EVENT_52H_01H) \ -__PMC_EV(IAP, EVENT_53H_01H) \ -__PMC_EV(IAP, EVENT_60H_01H) \ -__PMC_EV(IAP, EVENT_60H_02H) \ -__PMC_EV(IAP, EVENT_60H_04H) \ -__PMC_EV(IAP, EVENT_60H_08H) \ -__PMC_EV(IAP, EVENT_63H_01H) \ -__PMC_EV(IAP, EVENT_63H_02H) \ -__PMC_EV(IAP, EVENT_6CH_01H) \ -__PMC_EV(IAP, EVENT_80H_01H) \ -__PMC_EV(IAP, EVENT_80H_04H) \ -__PMC_EV(IAP, EVENT_80H_10H) \ -__PMC_EV(IAP, EVENT_81H_01H) \ -__PMC_EV(IAP, EVENT_81H_02H) \ -__PMC_EV(IAP, EVENT_82H_01H) \ -__PMC_EV(IAP, EVENT_83H_01H) \ -__PMC_EV(IAP, EVENT_85H_01H) \ -__PMC_EV(IAP, EVENT_85H_02H) \ -__PMC_EV(IAP, EVENT_85H_04H) \ -__PMC_EV(IAP, EVENT_85H_10H) \ -__PMC_EV(IAP, EVENT_85H_20H) \ -__PMC_EV(IAP, EVENT_85H_40H) \ -__PMC_EV(IAP, EVENT_85H_80H) \ -__PMC_EV(IAP, EVENT_87H_01H) \ -__PMC_EV(IAP, EVENT_87H_02H) \ -__PMC_EV(IAP, EVENT_87H_04H) \ -__PMC_EV(IAP, EVENT_87H_08H) \ -__PMC_EV(IAP, EVENT_87H_0FH) \ -__PMC_EV(IAP, EVENT_88H_01H) \ -__PMC_EV(IAP, EVENT_88H_02H) \ -__PMC_EV(IAP, EVENT_88H_04H) \ -__PMC_EV(IAP, EVENT_88H_07H) \ -__PMC_EV(IAP, EVENT_88H_08H) \ -__PMC_EV(IAP, EVENT_88H_10H) \ -__PMC_EV(IAP, EVENT_88H_20H) \ -__PMC_EV(IAP, EVENT_88H_30H) \ -__PMC_EV(IAP, EVENT_88H_40H) \ -__PMC_EV(IAP, EVENT_89H_01H) \ -__PMC_EV(IAP, EVENT_89H_02H) \ -__PMC_EV(IAP, EVENT_89H_04H) \ -__PMC_EV(IAP, EVENT_89H_07H) \ -__PMC_EV(IAP, EVENT_89H_08H) \ -__PMC_EV(IAP, EVENT_89H_10H) \ -__PMC_EV(IAP, EVENT_89H_20H) \ -__PMC_EV(IAP, EVENT_89H_30H) \ -__PMC_EV(IAP, EVENT_89H_40H) \ -__PMC_EV(IAP, EVENT_89H_7FH) \ -__PMC_EV(IAP, EVENT_A2H_01H) \ -__PMC_EV(IAP, EVENT_A2H_02H) \ -__PMC_EV(IAP, EVENT_A2H_04H) \ -__PMC_EV(IAP, EVENT_A2H_08H) \ -__PMC_EV(IAP, EVENT_A2H_10H) \ -__PMC_EV(IAP, EVENT_A2H_20H) \ -__PMC_EV(IAP, EVENT_A2H_40H) \ -__PMC_EV(IAP, EVENT_A2H_80H) \ -__PMC_EV(IAP, EVENT_A6H_01H) \ -__PMC_EV(IAP, EVENT_A7H_01H) \ -__PMC_EV(IAP, EVENT_A8H_01H) \ -__PMC_EV(IAP, EVENT_B0H_01H) \ -__PMC_EV(IAP, EVENT_B0H_02H) \ -__PMC_EV(IAP, EVENT_B0H_04H) \ -__PMC_EV(IAP, EVENT_B0H_08H) \ -__PMC_EV(IAP, EVENT_B0H_20H) \ -__PMC_EV(IAP, EVENT_B0H_40H) \ -__PMC_EV(IAP, EVENT_B1H_01H) \ -__PMC_EV(IAP, EVENT_B1H_02H) \ -__PMC_EV(IAP, EVENT_B1H_04H) \ -__PMC_EV(IAP, EVENT_B1H_08H) \ -__PMC_EV(IAP, EVENT_B1H_10H) \ -__PMC_EV(IAP, EVENT_B1H_20H) \ -__PMC_EV(IAP, EVENT_B1H_40H) \ -__PMC_EV(IAP, EVENT_B2H_01H) \ -__PMC_EV(IAP, EVENT_B7H_01H) \ -__PMC_EV(IAP, EVENT_B8H_01H) \ -__PMC_EV(IAP, EVENT_B8H_02H) \ -__PMC_EV(IAP, EVENT_B8H_04H) \ -__PMC_EV(IAP, EVENT_BAH_01H) \ -__PMC_EV(IAP, EVENT_BAH_02H) \ -__PMC_EV(IAP, EVENT_C3H_02H) \ -__PMC_EV(IAP, EVENT_C3H_10H) \ -__PMC_EV(IAP, EVENT_C5H_02H) \ -__PMC_EV(IAP, EVENT_C8H_20H) \ -__PMC_EV(IAP, EVENT_CBH_40H) \ -__PMC_EV(IAP, EVENT_CBH_80H) \ -__PMC_EV(IAP, EVENT_CCH_03H) \ -__PMC_EV(IAP, EVENT_D0H_01H) \ -__PMC_EV(IAP, EVENT_D1H_02H) \ -__PMC_EV(IAP, EVENT_D1H_04H) \ -__PMC_EV(IAP, EVENT_D1H_08H) \ -__PMC_EV(IAP, EVENT_DBH_01H) \ __PMC_EV(IAP, EVENT_E4H_01H) \ __PMC_EV(IAP, EVENT_E5H_01H) \ -__PMC_EV(IAP, EVENT_F3H_04H) \ -__PMC_EV(IAP, EVENT_F3H_08H) \ -__PMC_EV(IAP, EVENT_F3H_10H) \ -__PMC_EV(IAP, EVENT_F3H_20H) \ -__PMC_EV(IAP, EVENT_F4H_01H) \ -__PMC_EV(IAP, EVENT_F4H_02H) \ -__PMC_EV(IAP, EVENT_F4H_04H) \ -__PMC_EV(IAP, EVENT_F4H_08H) \ -__PMC_EV(IAP, EVENT_F4H_10H) \ -__PMC_EV(IAP, EVENT_F6H_01H) \ -__PMC_EV(IAP, EVENT_F7H_01H) \ -__PMC_EV(IAP, EVENT_F7H_02H) \ -__PMC_EV(IAP, EVENT_F7H_04H) \ -__PMC_EV(IAP, EVENT_F8H_01H) \ -__PMC_EV(IAP, EVENT_FDH_01H) \ -__PMC_EV(IAP, EVENT_FDH_02H) \ -__PMC_EV(IAP, EVENT_FDH_04H) \ -__PMC_EV(IAP, EVENT_FDH_08H) \ -__PMC_EV(IAP, EVENT_FDH_10H) \ -__PMC_EV(IAP, EVENT_FDH_20H) \ -__PMC_EV(IAP, EVENT_FDH_40H) \ +__PMC_EV(IAP, EVENT_E6H_00H) \ +__PMC_EV(IAP, EVENT_E6H_01H) \ __PMC_EV(IAP, EVENT_E6H_02H) \ __PMC_EV(IAP, EVENT_E8H_01H) \ __PMC_EV(IAP, EVENT_E8H_02H) \ __PMC_EV(IAP, EVENT_E8H_03H) \ +__PMC_EV(IAP, EVENT_ECH_01H) \ +__PMC_EV(IAP, EVENT_F0H_00H) \ __PMC_EV(IAP, EVENT_F0H_01H) \ __PMC_EV(IAP, EVENT_F0H_02H) \ __PMC_EV(IAP, EVENT_F0H_04H) \ @@ -1005,10 +1005,31 @@ __PMC_EV(IAP, EVENT_F2H_04H) \ __PMC_EV(IAP, EVENT_F2H_08H) \ __PMC_EV(IAP, EVENT_F2H_0FH) \ __PMC_EV(IAP, EVENT_F3H_01H) \ -__PMC_EV(IAP, EVENT_F3H_02H) - +__PMC_EV(IAP, EVENT_F3H_02H) \ +__PMC_EV(IAP, EVENT_F3H_04H) \ +__PMC_EV(IAP, EVENT_F3H_08H) \ +__PMC_EV(IAP, EVENT_F3H_10H) \ +__PMC_EV(IAP, EVENT_F3H_20H) \ +__PMC_EV(IAP, EVENT_F4H_01H) \ +__PMC_EV(IAP, EVENT_F4H_02H) \ +__PMC_EV(IAP, EVENT_F4H_04H) \ +__PMC_EV(IAP, EVENT_F4H_08H) \ +__PMC_EV(IAP, EVENT_F4H_10H) \ +__PMC_EV(IAP, EVENT_F6H_01H) \ +__PMC_EV(IAP, EVENT_F7H_01H) \ +__PMC_EV(IAP, EVENT_F7H_02H) \ +__PMC_EV(IAP, EVENT_F7H_04H) \ +__PMC_EV(IAP, EVENT_F8H_00H) \ +__PMC_EV(IAP, EVENT_F8H_01H) \ +__PMC_EV(IAP, EVENT_FDH_01H) \ +__PMC_EV(IAP, EVENT_FDH_02H) \ +__PMC_EV(IAP, EVENT_FDH_04H) \ +__PMC_EV(IAP, EVENT_FDH_08H) \ +__PMC_EV(IAP, EVENT_FDH_10H) \ +__PMC_EV(IAP, EVENT_FDH_20H) \ +__PMC_EV(IAP, EVENT_FDH_40H) -#define PMC_EV_IAP_FIRST PMC_EV_IAP_EVENT_02H_81H +#define PMC_EV_IAP_FIRST PMC_EV_IAP_EVENT_02H_01H #define PMC_EV_IAP_LAST PMC_EV_IAP_EVENT_FDH_40H /* @@ -1647,330 +1668,655 @@ __PMC_EV_ALIAS("X87_OPS_RETIRED.ANY", IAP_EVENT_C1H_FEH) \ __PMC_EV_ALIAS("X87_OPS_RETIRED.FXCH", IAP_EVENT_C1H_01H) /* - * Aliases for Core i7 PMC events. + * Core i7 and Xeon 5500 events removed between 253669-031US June 2009 + * and 253669-033US December 2009. + */ +#define __PMC_EV_ALIAS_COREI7_OLD() \ +__PMC_EV_ALIAS("SB_FORWARD.ANY", IAP_EVENT_02H_01H) \ +__PMC_EV_ALIAS("LOAD_BLOCK.STD", IAP_EVENT_03H_01H) \ +__PMC_EV_ALIAS("LOAD_BLOCK.ADDRESS_OFFSET", IAP_EVENT_03H_04H) \ +__PMC_EV_ALIAS("SB_DRAIN.CYCLES", IAP_EVENT_04H_01H) \ +__PMC_EV_ALIAS("MISALIGN_MEM_REF.LOAD", IAP_EVENT_05H_01H) \ +__PMC_EV_ALIAS("MISALIGN_MEM_REF.STORE", IAP_EVENT_05H_02H) \ +__PMC_EV_ALIAS("MISALIGN_MEM_REF.ANY", IAP_EVENT_05H_03H) \ +__PMC_EV_ALIAS("STORE_BLOCKS.NOT_STA", IAP_EVENT_06H_01H) \ +__PMC_EV_ALIAS("STORE_BLOCKS.STA", IAP_EVENT_06H_02H) \ +__PMC_EV_ALIAS("STORE_BLOCKS.ANY", IAP_EVENT_06H_0FH) \ +__PMC_EV_ALIAS("MEMORY_DISAMBIGURATION.RESET", IAP_EVENT_09H_01H) \ +__PMC_EV_ALIAS("MEMORY_DISAMBIGURATION.SUCCESS", IAP_EVENT_09H_02H) \ +__PMC_EV_ALIAS("MEMORY_DISAMBIGURATION.WATCHDOG", IAP_EVENT_09H_04H) \ +__PMC_EV_ALIAS("MEMORY_DISAMBIGURATION.WATCH_CYCLES", IAP_EVENT_09H_08H)\ +__PMC_EV_ALIAS("HW_INT.RCV", IAP_EVENT_1DH_01H) \ +__PMC_EV_ALIAS("HW_INT.CYCLES_MASKED", IAP_EVENT_1DH_02H) \ +__PMC_EV_ALIAS("HW_INT.CYCLES_PENDING_AND_MASKED", IAP_EVENT_1DH_04H) \ +__PMC_EV_ALIAS("L2_WRITE.RFO.E_STATE", IAP_EVENT_27H_04H) \ +__PMC_EV_ALIAS("UOPS_DECODED.DEC0", IAP_EVENT_3DH_01H) \ +__PMC_EV_ALIAS("L1D_CACHE_ST.I_STATE", IAP_EVENT_41H_01H) \ +__PMC_EV_ALIAS("L1D_CACHE_ST.MESI", IAP_EVENT_41H_0FH) \ +__PMC_EV_ALIAS("DTLB_MISSES.PDE_MISS", IAP_EVENT_49H_20H) \ +__PMC_EV_ALIAS("DTLB_MISSES.PDP_MISS", IAP_EVENT_49H_40H) \ +__PMC_EV_ALIAS("DTLB_MISSES.LARGE_WALK_COMPLETED", IAP_EVENT_49H_80H) \ +__PMC_EV_ALIAS("SSE_MEM_EXEC.NTA", IAP_EVENT_4BH_01H) \ +__PMC_EV_ALIAS("SSE_MEM_EXEC.STREAMING_STORES", IAP_EVENT_4BH_08H) \ +__PMC_EV_ALIAS("SFENCE_CYCLES", IAP_EVENT_4DH_01H) \ +__PMC_EV_ALIAS("EPT.EPDE_MISS", IAP_EVENT_4FH_02H) \ +__PMC_EV_ALIAS("EPT.EPDPE_HIT", IAP_EVENT_4FH_04H) \ +__PMC_EV_ALIAS("EPT.EPDPE_MISS", IAP_EVENT_4FH_08H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND.READ_DATA", \ + IAP_EVENT_60H_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND.READ_CODE", \ + IAP_EVENT_60H_02H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND.RFO", \ + IAP_EVENT_60H_04H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.ANY.READ", \ + IAP_EVENT_60H_08H) \ +__PMC_EV_ALIAS("IFU_IVC.FULL", IAP_EVENT_81H_01H) \ +__PMC_EV_ALIAS("IFU_IVC.L1I_EVICTION", IAP_EVENT_81H_02H) \ +__PMC_EV_ALIAS("L1I_OPPORTUNISTIC_HITS", IAP_EVENT_83H_01H) \ +__PMC_EV_ALIAS("ITLB_MISSES.WALK_CYCLES", IAP_EVENT_85H_04H) \ +__PMC_EV_ALIAS("ITLB_MISSES.PMH_BUSY_CYCLES", IAP_EVENT_85H_04H) \ +__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT", IAP_EVENT_85H_10H) \ +__PMC_EV_ALIAS("ITLB_MISSES.PDE_MISS", IAP_EVENT_85H_20H) \ +__PMC_EV_ALIAS("ITLB_MISSES.PDP_MISS", IAP_EVENT_85H_40H) \ +__PMC_EV_ALIAS("ITLB_MISSES.LARGE_WALK_COMPLETED", IAP_EVENT_85H_80H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND.READ_DATA", IAP_EVENT_B0H_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND.READ_CODE", IAP_EVENT_B0H_02H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND.RFO", IAP_EVENT_B0H_04H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.ANY.READ", IAP_EVENT_B0H_08H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.ANY.RFO", IAP_EVENT_B0H_10H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.UNCACHED_MEM", IAP_EVENT_B0H_20H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.ANY", IAP_EVENT_B0H_80H) \ +__PMC_EV_ALIAS("SNOOPQ_REQUESTS_OUTSTANDING.DATA", IAP_EVENT_B3H_01H) \ +__PMC_EV_ALIAS("SNOOPQ_REQUESTS_OUTSTANDING.INVALIDATE", \ + IAP_EVENT_B3H_02H) \ +__PMC_EV_ALIAS("SNOOPQ_REQUESTS_OUTSTANDING.CODE", IAP_EVENT_B3H_04H) \ +__PMC_EV_ALIAS("PIC_ACCESSES.TPR_READS", IAP_EVENT_BAH_01H) \ +__PMC_EV_ALIAS("PIC_ACCESSES.TPR_WRITES", IAP_EVENT_BAH_02H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.FUSION_ASSIST", IAP_EVENT_C3H_10H) \ +__PMC_EV_ALIAS("BOGUS_BR", IAP_EVENT_E4H_01H) \ +__PMC_EV_ALIAS("L2_HW_PREFETCH.HIT", IAP_EVENT_F3H_01H) \ +__PMC_EV_ALIAS("L2_HW_PREFETCH.ALLOC", IAP_EVENT_F3H_02H) \ +__PMC_EV_ALIAS("L2_HW_PREFETCH.DATA_TRIGGER", IAP_EVENT_F3H_04H) \ +__PMC_EV_ALIAS("L2_HW_PREFETCH.CODE_TRIGGER", IAP_EVENT_F3H_08H) \ +__PMC_EV_ALIAS("L2_HW_PREFETCH.DCA_TRIGGER", IAP_EVENT_F3H_10H) \ +__PMC_EV_ALIAS("L2_HW_PREFETCH.KICK_START", IAP_EVENT_F3H_20H) \ +__PMC_EV_ALIAS("SQ_MISC.PROMOTION", IAP_EVENT_F4H_01H) \ +__PMC_EV_ALIAS("SQ_MISC.PROMOTION_POST_GO", IAP_EVENT_F4H_02H) \ +__PMC_EV_ALIAS("SQ_MISC.LRU_HINTS", IAP_EVENT_F4H_04H) \ +__PMC_EV_ALIAS("SQ_MISC.FILL_DROPPED", IAP_EVENT_F4H_08H) \ +__PMC_EV_ALIAS("SEGMENT_REG_LOADS", IAP_EVENT_F8H_01H) + +/* + * Aliases for Core i7 and Xeon 5500 PMC events (253669-033US December 2009) */ #define __PMC_EV_ALIAS_COREI7() \ __PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ -__PMC_EV_ALIAS("SB_FORWARD.ANY", IAP_EVENT_02H_01H) \ -__PMC_EV_ALIAS("LOAD_BLOCK.STD", IAP_EVENT_03H_01H) \ -__PMC_EV_ALIAS("LOAD_BLOCK.ADDRESS_OFFSET", IAP_EVENT_03H_04H) \ -__PMC_EV_ALIAS("SB_DRAIN.CYCLES", IAP_EVENT_04H_01H) \ -__PMC_EV_ALIAS("MISALIGN_MEM_REF.LOAD", IAP_EVENT_05H_01H) \ -__PMC_EV_ALIAS("MISALIGN_MEM_REF.STORE", IAP_EVENT_05H_02H) \ -__PMC_EV_ALIAS("MISALIGN_MEM_REF.ANY", IAP_EVENT_05H_03H) \ -__PMC_EV_ALIAS("STORE_BLOCKS.NOT_STA", IAP_EVENT_06H_01H) \ -__PMC_EV_ALIAS("STORE_BLOCKS.STA", IAP_EVENT_06H_02H) \ -__PMC_EV_ALIAS("STORE_BLOCKS.AT_RET", IAP_EVENT_06H_04H) \ -__PMC_EV_ALIAS("STORE_BLOCKS.L1D_BLOCK", IAP_EVENT_06H_08H) \ -__PMC_EV_ALIAS("STORE_BLOCKS.ANY", IAP_EVENT_06H_0FH) \ -__PMC_EV_ALIAS("PARTIAL_ADDRESS_ALIAS", IAP_EVENT_07H_01H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.ANY", IAP_EVENT_08H_01H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED", IAP_EVENT_08H_02H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT", IAP_EVENT_08H_10H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.PDE_MISS", IAP_EVENT_08H_20H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.PDP_MISS", IAP_EVENT_08H_40H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.LARGE_WALK_COMPLETED", IAP_EVENT_08H_80H) \ -__PMC_EV_ALIAS("MEMORY_DISAMBIGURATION.RESET", IAP_EVENT_09H_01H) \ -__PMC_EV_ALIAS("MEMORY_DISAMBIGURATION.SUCCESS", IAP_EVENT_09H_02H) \ -__PMC_EV_ALIAS("MEMORY_DISAMBIGURATION.WATCHDOG", IAP_EVENT_09H_04H) \ -__PMC_EV_ALIAS("MEMORY_DISAMBIGURATION.WATCH_CYCLES", IAP_EVENT_09H_08H) \ -__PMC_EV_ALIAS("MEM_INST_RETIRED.LOADS", IAP_EVENT_0BH_01H) \ -__PMC_EV_ALIAS("MEM_INST_RETIRED.STORES", IAP_EVENT_0BH_02H) \ -__PMC_EV_ALIAS("MEM_STORE_RETIRED.DTLB_MISS", IAP_EVENT_0CH_01H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.ANY", IAP_EVENT_0EH_01H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.FUSED", IAP_EVENT_0EH_02H) \ -__PMC_EV_ALIAS("MEM_UNCORE_RETIRED.OTHER_CORE_L2_HITM", IAP_EVENT_0FH_02H) \ -__PMC_EV_ALIAS("MEM_UNCORE_RETIRED.REMOTE_CACHE_LOCAL_HOME_HIT", IAP_EVENT_0FH_08H) \ -__PMC_EV_ALIAS("MEM_UNCORE_RETIRED.REMOTE_DRAM", IAP_EVENT_0FH_10H) \ -__PMC_EV_ALIAS("MEM_UNCORE_RETIRED.LOCAL_DRAM", IAP_EVENT_0FH_20H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.X87", IAP_EVENT_10H_01H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.MMX", IAP_EVENT_10H_02H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP", IAP_EVENT_10H_04H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE2_INTEGER", IAP_EVENT_10H_08H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_PACKED", IAP_EVENT_10H_10H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_SCALAR", IAP_EVENT_10H_20H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_SINGLE_PRECISION", IAP_EVENT_10H_40H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_DOUBLE_PRECISION", IAP_EVENT_10H_80H) \ -__PMC_EV_ALIAS("SIMD_INT_128.PACKED_MPY", IAP_EVENT_12H_01H) \ -__PMC_EV_ALIAS("SIMD_INT_128.PACKED_SHIFT", IAP_EVENT_12H_02H) \ -__PMC_EV_ALIAS("SIMD_INT_128.PACK", IAP_EVENT_12H_04H) \ -__PMC_EV_ALIAS("SIMD_INT_128.UNPACK", IAP_EVENT_12H_08H) \ -__PMC_EV_ALIAS("SIMD_INT_128.PACKED_LOGICAL", IAP_EVENT_12H_10H) \ -__PMC_EV_ALIAS("SIMD_INT_128.PACKED_ARITH", IAP_EVENT_12H_20H) \ -__PMC_EV_ALIAS("SIMD_INT_128.SHUFFLE_MOVE", IAP_EVENT_12H_40H) \ -__PMC_EV_ALIAS("LOAD_DISPATCH.RS", IAP_EVENT_13H_01H) \ -__PMC_EV_ALIAS("LOAD_DISPATCH.RS_DELAYED", IAP_EVENT_13H_02H) \ -__PMC_EV_ALIAS("LOAD_DISPATCH.MOB", IAP_EVENT_13H_04H) \ -__PMC_EV_ALIAS("LOAD_DISPATCH.ANY", IAP_EVENT_13H_07H) \ -__PMC_EV_ALIAS("ARITH.CYCLES_DIV_BUSY", IAP_EVENT_14H_01H) \ -__PMC_EV_ALIAS("ARITH.MUL", IAP_EVENT_14H_02H) \ -__PMC_EV_ALIAS("INST_QUEUE_WRITES", IAP_EVENT_17H_01H) \ -__PMC_EV_ALIAS("INST_DECODED.DEC0", IAP_EVENT_18H_01H) \ -__PMC_EV_ALIAS("TWO_UOP_INSTS_DECODED", IAP_EVENT_19H_01H) \ -__PMC_EV_ALIAS("HW_INT.RCV", IAP_EVENT_1DH_01H) \ -__PMC_EV_ALIAS("HW_INT.CYCLES_MASKED", IAP_EVENT_1DH_02H) \ -__PMC_EV_ALIAS("HW_INT.CYCLES_PENDING_AND_MASKED", IAP_EVENT_1DH_04H) \ -__PMC_EV_ALIAS("INST_QUEUE_WRITE_CYCLES", IAP_EVENT_1EH_01H) \ -__PMC_EV_ALIAS("L2_RQSTS.LD_HIT", IAP_EVENT_24H_01H) \ -__PMC_EV_ALIAS("L2_RQSTS.LD_MISS", IAP_EVENT_24H_02H) \ -__PMC_EV_ALIAS("L2_RQSTS.LOADS", IAP_EVENT_24H_03H) \ -__PMC_EV_ALIAS("L2_RQSTS.RFO_HIT", IAP_EVENT_24H_04H) \ -__PMC_EV_ALIAS("L2_RQSTS.RFO_MISS", IAP_EVENT_24H_08H) \ -__PMC_EV_ALIAS("L2_RQSTS.RFOS", IAP_EVENT_24H_0CH) \ -__PMC_EV_ALIAS("L2_RQSTS.IFETCH_HIT", IAP_EVENT_24H_10H) \ -__PMC_EV_ALIAS("L2_RQSTS.IFETCH_MISS", IAP_EVENT_24H_20H) \ -__PMC_EV_ALIAS("L2_RQSTS.IFETCHES", IAP_EVENT_24H_30H) \ -__PMC_EV_ALIAS("L2_RQSTS.PREFETCH_HIT", IAP_EVENT_24H_40H) \ -__PMC_EV_ALIAS("L2_RQSTS.PREFETCH_MISS", IAP_EVENT_24H_80H) \ -__PMC_EV_ALIAS("L2_RQSTS.PREFETCHES", IAP_EVENT_24H_C0H) \ -__PMC_EV_ALIAS("L2_RQSTS.MISS", IAP_EVENT_24H_AAH) \ -__PMC_EV_ALIAS("L2_RQSTS.REFERENCES", IAP_EVENT_24H_FFH) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.DEMAND.I_STATE", IAP_EVENT_26H_01H) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.DEMAND.S_STATE", IAP_EVENT_26H_02H) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.DEMAND.E_STATE", IAP_EVENT_26H_04H) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.DEMAND.M_STATE", IAP_EVENT_26H_08H) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.DEMAND.MESI", IAP_EVENT_26H_0FH) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.PREFETCH.I_STATE", IAP_EVENT_26H_10H) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.PREFETCH.S_STATE", IAP_EVENT_26H_20H) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.PREFETCH.E_STATE", IAP_EVENT_26H_40H) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.PREFETCH.M_STATE", IAP_EVENT_26H_80H) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.PREFETCH.MESI", IAP_EVENT_26H_F0H) \ -__PMC_EV_ALIAS("L2_DATA_RQSTS.ANY", IAP_EVENT_26H_FFH) \ -__PMC_EV_ALIAS("L2_WRITE.RFO.I_STATE", IAP_EVENT_27H_01H) \ -__PMC_EV_ALIAS("L2_WRITE.RFO.S_STATE", IAP_EVENT_27H_02H) \ -__PMC_EV_ALIAS("L2_WRITE.RFO.E_STATE", IAP_EVENT_27H_04H) \ -__PMC_EV_ALIAS("L2_WRITE.RFO.M_STATE", IAP_EVENT_27H_08H) \ -__PMC_EV_ALIAS("L2_WRITE.RFO.HIT", IAP_EVENT_27H_0EH) \ -__PMC_EV_ALIAS("L2_WRITE.RFO.MESI", IAP_EVENT_27H_0FH) \ -__PMC_EV_ALIAS("L2_WRITE.LOCK.I_STATE", IAP_EVENT_27H_10H) \ -__PMC_EV_ALIAS("L2_WRITE.LOCK.S_STATE", IAP_EVENT_27H_20H) \ -__PMC_EV_ALIAS("L2_WRITE.LOCK.E_STATE", IAP_EVENT_27H_40H) \ -__PMC_EV_ALIAS("L2_WRITE.LOCK.M_STATE", IAP_EVENT_27H_80H) \ -__PMC_EV_ALIAS("L2_WRITE.LOCK.HIT", IAP_EVENT_27H_E0H) \ -__PMC_EV_ALIAS("L2_WRITE.LOCK.MESI", IAP_EVENT_27H_F0H) \ -__PMC_EV_ALIAS("L1D_WB_L2.I_STATE", IAP_EVENT_28H_01H) \ -__PMC_EV_ALIAS("L1D_WB_L2.S_STATE", IAP_EVENT_28H_02H) \ -__PMC_EV_ALIAS("L1D_WB_L2.E_STATE", IAP_EVENT_28H_04H) \ -__PMC_EV_ALIAS("L1D_WB_L2.M_STATE", IAP_EVENT_28H_08H) \ -__PMC_EV_ALIAS("L1D_WB_L2.MESI", IAP_EVENT_28H_0FH) \ -__PMC_EV_ALIAS("LONGEST_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_4FH) \ -__PMC_EV_ALIAS("LONGEST_LAT_CACHE.MISS", IAP_EVENT_2EH_41H) \ -__PMC_EV_ALIAS("CPU_CLK_UNHALTED.THREAD_P", IAP_EVENT_3CH_00H) \ -__PMC_EV_ALIAS("CPU_CLK_UNHALTED.REF_P", IAP_EVENT_3CH_01H) \ -__PMC_EV_ALIAS("UOPS_DECODED.DEC0", IAP_EVENT_3DH_01H) \ -__PMC_EV_ALIAS("L1D_CACHE_LD.I_STATE", IAP_EVENT_40H_01H) \ -__PMC_EV_ALIAS("L1D_CACHE_LD.S_STATE", IAP_EVENT_40H_02H) \ -__PMC_EV_ALIAS("L1D_CACHE_LD.E_STATE", IAP_EVENT_40H_04H) \ -__PMC_EV_ALIAS("L1D_CACHE_LD.M_STATE", IAP_EVENT_40H_08H) \ -__PMC_EV_ALIAS("L1D_CACHE_LD.MESI", IAP_EVENT_40H_0FH) \ -__PMC_EV_ALIAS("L1D_CACHE_ST.I_STATE", IAP_EVENT_41H_01H) \ -__PMC_EV_ALIAS("L1D_CACHE_ST.S_STATE", IAP_EVENT_41H_02H) \ -__PMC_EV_ALIAS("L1D_CACHE_ST.E_STATE", IAP_EVENT_41H_04H) \ -__PMC_EV_ALIAS("L1D_CACHE_ST.M_STATE", IAP_EVENT_41H_08H) \ -__PMC_EV_ALIAS("L1D_CACHE_ST.MESI", IAP_EVENT_41H_0FH) \ -__PMC_EV_ALIAS("L1D_CACHE_LOCK.HIT", IAP_EVENT_42H_01H) \ -__PMC_EV_ALIAS("L1D_CACHE_LOCK.S_STATE", IAP_EVENT_42H_02H) \ -__PMC_EV_ALIAS("L1D_CACHE_LOCK.E_STATE", IAP_EVENT_42H_04H) \ -__PMC_EV_ALIAS("L1D_CACHE_LOCK.M_STATE", IAP_EVENT_42H_08H) \ -__PMC_EV_ALIAS("L1D_ALL_REF.ANY", IAP_EVENT_43H_01H) \ -__PMC_EV_ALIAS("L1D_ALL_REF.CACHEABLE", IAP_EVENT_43H_02H) \ -__PMC_EV_ALIAS("L1D_PEND_MISS.LOAD_BUFFERS_FULL", IAP_EVENT_48H_02H) \ -__PMC_EV_ALIAS("DTLB_MISSES.ANY", IAP_EVENT_49H_01H) \ -__PMC_EV_ALIAS("DTLB_MISSES.WALK_COMPLETED", IAP_EVENT_49H_02H) \ -__PMC_EV_ALIAS("DTLB_MISSES.STLB_HIT", IAP_EVENT_49H_10H) \ -__PMC_EV_ALIAS("DTLB_MISSES.PDE_MISS", IAP_EVENT_49H_20H) \ -__PMC_EV_ALIAS("DTLB_MISSES.PDP_MISS", IAP_EVENT_49H_40H) \ -__PMC_EV_ALIAS("DTLB_MISSES.LARGE_WALK_COMPLETED", IAP_EVENT_49H_80H) \ -__PMC_EV_ALIAS("SSE_MEM_EXEC.NTA", IAP_EVENT_4BH_01H) \ -__PMC_EV_ALIAS("SSE_MEM_EXEC.STREAMING_STORES", IAP_EVENT_4BH_08H) \ -__PMC_EV_ALIAS("LOAD_HIT_PRE", IAP_EVENT_4CH_01H) \ -__PMC_EV_ALIAS("SFENCE_CYCLES", IAP_EVENT_4DH_01H) \ -__PMC_EV_ALIAS("L1D_PREFETCH.REQUESTS", IAP_EVENT_4EH_01H) \ -__PMC_EV_ALIAS("L1D_PREFETCH.MISS", IAP_EVENT_4EH_02H) \ -__PMC_EV_ALIAS("L1D_PREFETCH.TRIGGERS", IAP_EVENT_4EH_04H) \ -__PMC_EV_ALIAS("EPT.EPDE_MISS", IAP_EVENT_4FH_02H) \ -__PMC_EV_ALIAS("EPT.EPDPE_HIT", IAP_EVENT_4FH_04H) \ -__PMC_EV_ALIAS("EPT.EPDPE_MISS", IAP_EVENT_4FH_08H) \ -__PMC_EV_ALIAS("L1D.REPL", IAP_EVENT_51H_01H) \ -__PMC_EV_ALIAS("L1D.M_REPL", IAP_EVENT_51H_02H) \ -__PMC_EV_ALIAS("L1D.M_EVICT", IAP_EVENT_51H_04H) \ -__PMC_EV_ALIAS("L1D.M_SNOOP_EVICT", IAP_EVENT_51H_08H) \ -__PMC_EV_ALIAS("L1D_CACHE_PREFETCH_LOCK_FB_HIT", IAP_EVENT_52H_01H) \ -__PMC_EV_ALIAS("L1D_CACHE_LOCK_FB_HIT", IAP_EVENT_53H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND.READ_DATA", IAP_EVENT_60H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND.READ_CODE", IAP_EVENT_60H_02H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND.RFO", IAP_EVENT_60H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.ANY.READ", IAP_EVENT_60H_08H) \ -__PMC_EV_ALIAS("CACHE_LOCK_CYCLES.L1D_L2", IAP_EVENT_63H_01H) \ -__PMC_EV_ALIAS("CACHE_LOCK_CYCLES.L1D", IAP_EVENT_63H_02H) \ -__PMC_EV_ALIAS("IO_TRANSACTIONS", IAP_EVENT_6CH_01H) \ -__PMC_EV_ALIAS("L1I.HITS", IAP_EVENT_80H_01H) \ -__PMC_EV_ALIAS("L1I.MISSES", IAP_EVENT_80H_02H) \ -__PMC_EV_ALIAS("L1I.READS", IAP_EVENT_80H_03H) \ -__PMC_EV_ALIAS("L1I.CYCLES_STALLED", IAP_EVENT_80H_04H) \ -__PMC_EV_ALIAS("IFU_IVC.FULL", IAP_EVENT_81H_01H) \ -__PMC_EV_ALIAS("IFU_IVC.L1I_EVICTION", IAP_EVENT_81H_02H) \ -__PMC_EV_ALIAS("LARGE_ITLB.HIT", IAP_EVENT_82H_01H) \ -__PMC_EV_ALIAS("L1I_OPPORTUNISTIC_HITS", IAP_EVENT_83H_01H) \ -__PMC_EV_ALIAS("ITLB_MISSES.ANY", IAP_EVENT_85H_01H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED", IAP_EVENT_85H_02H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_CYCLES", IAP_EVENT_85H_04H) \ -__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT", IAP_EVENT_85H_10H) \ -__PMC_EV_ALIAS("ITLB_MISSES.PDE_MISS", IAP_EVENT_85H_20H) \ -__PMC_EV_ALIAS("ITLB_MISSES.PDP_MISS", IAP_EVENT_85H_40H) \ -__PMC_EV_ALIAS("ITLB_MISSES.LARGE_WALK_COMPLETED", IAP_EVENT_85H_80H) \ -__PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H) \ -__PMC_EV_ALIAS("ILD_STALL.MRU", IAP_EVENT_87H_02H) \ -__PMC_EV_ALIAS("ILD_STALL.IQ_FULL", IAP_EVENT_87H_04H) \ -__PMC_EV_ALIAS("ILD_STALL.REGEN", IAP_EVENT_87H_08H) \ -__PMC_EV_ALIAS("ILD_STALL.ANY", IAP_EVENT_87H_0FH) \ -__PMC_EV_ALIAS("BR_INST_EXEC.COND", IAP_EVENT_88H_01H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT", IAP_EVENT_88H_02H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NON_CALL", IAP_EVENT_88H_04H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.NON_CALLS", IAP_EVENT_88H_07H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_08H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_10H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_20H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.NEAR_CALLS", IAP_EVENT_88H_30H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN", IAP_EVENT_88H_40H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.ANY", IAP_EVENT_7FH) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.COND", IAP_EVENT_89H_01H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT", IAP_EVENT_89H_02H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NON_CALL", IAP_EVENT_89H_04H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.NON_CALLS", IAP_EVENT_89H_07H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_08H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_10H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_20H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.NEAR_CALLS", IAP_EVENT_89H_30H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN", IAP_EVENT_89H_40H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.ANY", IAP_EVENT_89H_7FH) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_A2H_01H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.LOAD", IAP_EVENT_A2H_02H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.RS_FULL", IAP_EVENT_A2H_04H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.STORE", IAP_EVENT_A2H_08H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ROB_FULL", IAP_EVENT_A2H_10H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.FPCW", IAP_EVENT_A2H_20H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.MXCSR", IAP_EVENT_A2H_40H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.OTHER", IAP_EVENT_A2H_80H) \ -__PMC_EV_ALIAS("MACRO_INSTS.FUSIONS_DECODED", IAP_EVENT_A6H_01H) \ -__PMC_EV_ALIAS("BACLEAR_FORCE_IQ", IAP_EVENT_A7H_01H) \ -__PMC_EV_ALIAS("LSD.UOPS", IAP_EVENT_A8H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND.READ_DATA", IAP_EVENT_B0H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND.READ_CODE", IAP_EVENT_B0H_02H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND.RFO", IAP_EVENT_B0H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.ANY.READ", IAP_EVENT_B0H_08H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.ANY.RFO", IAP_EVENT_80H_10H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.UNCACHED_MEM", IAP_EVENT_B0H_20H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.L1D_WRITEBACK", IAP_EVENT_B0H_40H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.ANY", IAP_EVENT_B0H_80H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.PORT0", IAP_EVENT_B1H_01H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.PORT1", IAP_EVENT_B1H_02H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.PORT2_CORE", IAP_EVENT_B1H_04H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.PORT3_CORE", IAP_EVENT_B1H_08H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.PORT4_CORE", IAP_EVENT_B1H_10H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.PORT5", IAP_EVENT_B1H_20H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.PORT015", IAP_EVENT_B1H_40H) \ -__PMC_EV_ALIAS("UOPS_EXECUTED.PORT234", IAP_EVENT_B1H_80H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_SQ_FULL", IAP_EVENT_B2H_01H) \ -__PMC_EV_ALIAS("SNOOPQ_REQUESTS_OUTSTANDING.DATA", IAP_EVENT_B3H_01H) \ -__PMC_EV_ALIAS("SNOOPQ_REQUESTS_OUTSTANDING.INVALIDATE", IAP_EVENT_B3H_02H) \ -__PMC_EV_ALIAS("SNOOPQ_REQUESTS_OUTSTANDING.CODE", IAP_EVENT_B3H_04H) \ -__PMC_EV_ALIAS("OOF_CORE_RESPONSE_0", IAP_EVENT_B7H_01H) \ -__PMC_EV_ALIAS("SNOOP_RESPONSE.HIT", IAP_EVENT_B8H_01H) \ -__PMC_EV_ALIAS("SNOOP_RESPONSE.HITE", IAP_EVENT_B8H_02H) \ -__PMC_EV_ALIAS("SNOOP_RESPONSE.HITM", IAP_EVENT_B8H_04H) \ -__PMC_EV_ALIAS("PIC_ACCESSES.TPR_READS", IAP_EVENT_BAH_01H) \ -__PMC_EV_ALIAS("PIC_ACCESSES.TPR_WRITES", IAP_EVENT_BAH_02H) \ -__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_01H) \ -__PMC_EV_ALIAS("INST_RETIRED.X87", IAP_EVENT_C0H_02H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.ANY", IAP_EVENT_C2H_01H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.RETIRE_SLOTS", IAP_EVENT_C2H_02H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.MACRO_FUSED", IAP_EVENT_C2H_04H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.CYCLES", IAP_EVENT_C3H_01H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.MEM_ORDER", IAP_EVENT_C3H_02H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_04H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.FUSION_ASSIST", IAP_EVENT_C3H_10H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_00H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.CONDITIONAL", IAP_EVENT_C4H_01H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_CALL", IAP_EVENT_C4H_02H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_04H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_00H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.NEAR_CALL", IAP_EVENT_C5H_02H) \ -__PMC_EV_ALIAS("SSEX_UOPS_RETIRED.PACKED_SINGLE", IAP_EVENT_C7H_01H) \ -__PMC_EV_ALIAS("SSEX_UOPS_RETIRED.SCALAR_SINGLE", IAP_EVENT_C7H_02H) \ -__PMC_EV_ALIAS("SSEX_UOPS_RETIRED.PACKED_DOUBLE", IAP_EVENT_C7H_04H) \ -__PMC_EV_ALIAS("SSEX_UOPS_RETIRED.SCALAR_DOUBLE", IAP_EVENT_C7H_08H) \ -__PMC_EV_ALIAS("SSEX_UOPS_RETIRED.VECTOR_INTEGER", IAP_EVENT_C7H_10H) \ -__PMC_EV_ALIAS("ITLB_MISS_RETIRED", IAP_EVENT_C8H_20H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L1D_HIT", IAP_EVENT_CBH_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L2_HIT", IAP_EVENT_CBH_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.LLC_UNSHARED_HIT", IAP_EVENT_CBH_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.OTHER_CORE_L2_HIT_HITM", IAP_EVENT_CBH_08H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.LLC_MISS", IAP_EVENT_CBH_10H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.HIT_LFB", IAP_EVENT_CBH_40H) \ -__PMC_EV_ALIAS("MEM_LOAD_RETIRED.DTLB_MISS", IAP_EVENT_CBH_80H) \ -__PMC_EV_ALIAS("FP_MMX_TRANS.TO_FP", IAP_EVENT_CCH_01H) \ -__PMC_EV_ALIAS("FP_MMX_TRANS.TO_MMX", IAP_EVENT_CCH_02H) \ -__PMC_EV_ALIAS("FP_MMX_TRANS.ANY", IAP_EVENT_CCH_03H) \ -__PMC_EV_ALIAS("MACRO_INSTS.DECODED", IAP_EVENT_D0H_01H) \ -__PMC_EV_ALIAS("UOPS_DECODED.MS", IAP_EVENT_D1H_02H) \ -__PMC_EV_ALIAS("UOPS_DECODED.ESP_FOLDING", IAP_EVENT_D1H_04H) \ -__PMC_EV_ALIAS("UOPS_DECODED.ESP_SYNC", IAP_EVENT_D1H_08H) \ -__PMC_EV_ALIAS("RAT_STALLS.FLAGS", IAP_EVENT_D2H_01H) \ -__PMC_EV_ALIAS("RAT_STALLS.REGISTERS", IAP_EVENT_D2H_02H) \ -__PMC_EV_ALIAS("RAT_STALLS.ROB_READ_PORT", IAP_EVENT_D2H_04H) \ -__PMC_EV_ALIAS("RAT_STALLS.SCOREBOARD", IAP_EVENT_D2H_08H) \ -__PMC_EV_ALIAS("RAT_STALLS.ANY", IAP_EVENT_D2H_0FH) \ -__PMC_EV_ALIAS("SEG_RENAME_STALLS", IAP_EVENT_D4H_01H) \ -__PMC_EV_ALIAS("ES_REG_RENAMES", IAP_EVENT_D5H_01H) \ -__PMC_EV_ALIAS("UOP_UNFUSION", IAP_EVENT_DBH_01H) \ -__PMC_EV_ALIAS("BR_INST_DECODED", IAP_EVENT_E0H_01H) \ -__PMC_EV_ALIAS("BOGUS_BR", IAP_EVENT_E4H_01H) \ -__PMC_EV_ALIAS("BPU_MISSED_CALL_RET", IAP_EVENT_E5H_01H) \ -__PMC_EV_ALIAS("BACLEAR.CLEAR", IAP_EVENT_E6H_01H) \ -__PMC_EV_ALIAS("BACLEAR.BAD_TARGET", IAP_EVENT_E6H_02H) \ -__PMC_EV_ALIAS("BPU_CLEARS.EARLY", IAP_EVENT_E8H_01H) \ -__PMC_EV_ALIAS("BPU_CLEARS.LATE", IAP_EVENT_E8H_02H) \ -__PMC_EV_ALIAS("BPU_CLEARS.ANY", IAP_EVENT_E8H_03H) \ -__PMC_EV_ALIAS("L2_TRANSACTIONS.LOAD", IAP_EVENT_F0H_01H) \ -__PMC_EV_ALIAS("L2_TRANSACTIONS.RFO", IAP_EVENT_F0H_02H) \ -__PMC_EV_ALIAS("L2_TRANSACTIONS.IFETCH", IAP_EVENT_F0H_04H) \ -__PMC_EV_ALIAS("L2_TRANSACTIONS.PREFETCH", IAP_EVENT_F0H_08H) \ -__PMC_EV_ALIAS("L2_TRANSACTIONS.L1D_WB", IAP_EVENT_F0H_10H) \ -__PMC_EV_ALIAS("L2_TRANSACTIONS.FILL", IAP_EVENT_F0H_20H) \ -__PMC_EV_ALIAS("L2_TRANSACTIONS.WB", IAP_EVENT_F0H_40H) \ -__PMC_EV_ALIAS("L2_TRANSACTIONS.ANY", IAP_EVENT_F0H_80H) \ -__PMC_EV_ALIAS("L2_LINES_IN.S_STATE", IAP_EVENT_F1H_02H) \ -__PMC_EV_ALIAS("L2_LINES_IN.E_STATE", IAP_EVENT_F1H_04H) \ -__PMC_EV_ALIAS("L2_LINES_IN.ANY", IAP_EVENT_F1H_07H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_CLEAN", IAP_EVENT_F2H_01H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_DIRTY", IAP_EVENT_F2H_02H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.PREFETCH_CLEAN", IAP_EVENT_F2H_04H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.PREFETCH_DIRTY", IAP_EVENT_F2H_08H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.ANY", IAP_EVENT_F2H_0FH) \ -__PMC_EV_ALIAS("L2_HW_PREFETCH.HIT", IAP_EVENT_F3H_01H) \ -__PMC_EV_ALIAS("L2_HW_PREFETCH.ALLOC", IAP_EVENT_F3H_02H) \ -__PMC_EV_ALIAS("L2_HW_PREFETCH.DATA_TRIGGER", IAP_EVENT_F3H_04H) \ -__PMC_EV_ALIAS("L2_HW_PREFETCH.CODE_TRIGGER", IAP_EVENT_F3H_08H) \ -__PMC_EV_ALIAS("L2_HW_PREFETCH.DCA_TRIGGER", IAP_EVENT_F3H_10H) \ -__PMC_EV_ALIAS("L2_HW_PREFETCH.KICK_START", IAP_EVENT_F3H_20H) \ -__PMC_EV_ALIAS("SQ_MISC.PROMOTION", IAP_EVENT_F4H_01H) \ -__PMC_EV_ALIAS("SQ_MISC.PROMOTION_POST_GO", IAP_EVENT_F4H_02H) \ -__PMC_EV_ALIAS("SQ_MISC.LRU_HINTS", IAP_EVENT_F4H_04H) \ -__PMC_EV_ALIAS("SQ_MISC.FILL_DROPPED", IAP_EVENT_F4H_08H) \ -__PMC_EV_ALIAS("SQ_MISC.SPLIT_LOCK", IAP_EVENT_F4H_10H) \ -__PMC_EV_ALIAS("SQ_FULL_STALL_CYCLES", IAP_EVENT_F6H_01H) \ -__PMC_EV_ALIAS("FP_ASSIST.ALL", IAP_EVENT_F7H_01H) \ -__PMC_EV_ALIAS("FP_ASSIST.OUTPUT", IAP_EVENT_F7H_02H) \ -__PMC_EV_ALIAS("FP_ASSIST.INPUT", IAP_EVENT_F7H_04H) \ -__PMC_EV_ALIAS("SEGMENT_REG_LOADS", IAP_EVENT_F8H_01H) \ -__PMC_EV_ALIAS("SIMD_INT_64.PACKED_MPY", IAP_EVENT_FDH_01H) \ -__PMC_EV_ALIAS("SIMD_INT_64.PACKED_SHIFT", IAP_EVENT_FDH_02H) \ -__PMC_EV_ALIAS("SIMD_INT_64.PACK", IAP_EVENT_FDH_04H) \ -__PMC_EV_ALIAS("SIMD_INT_64.UNPACK", IAP_EVENT_FDH_08H) \ -__PMC_EV_ALIAS("SIMD_INT_64.PACKED_LOGICAL", IAP_EVENT_FDH_10H) \ -__PMC_EV_ALIAS("SIMD_INT_64.PACKED_ARITH", IAP_EVENT_FDH_20H) \ -__PMC_EV_ALIAS("SIMD_INT_64.SHUFFLE_MOVE", IAP_EVENT_FDH_40H) +__PMC_EV_ALIAS("SB_DRAIN.ANY", IAP_EVENT_04H_07H) \ +__PMC_EV_ALIAS("STORE_BLOCKS.AT_RET", IAP_EVENT_06H_04H) \ +__PMC_EV_ALIAS("STORE_BLOCKS.L1D_BLOCK", IAP_EVENT_06H_08H) \ +__PMC_EV_ALIAS("PARTIAL_ADDRESS_ALIAS", IAP_EVENT_07H_01H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.ANY", IAP_EVENT_08H_01H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED", IAP_EVENT_08H_02H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT", IAP_EVENT_08H_10H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.PDE_MISS", IAP_EVENT_08H_20H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.PDP_MISS", IAP_EVENT_08H_40H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.LARGE_WALK_COMPLETED", \ + IAP_EVENT_08H_80H) \ +__PMC_EV_ALIAS("MEM_INST_RETIRED.LOADS", IAP_EVENT_0BH_01H) \ +__PMC_EV_ALIAS("MEM_INST_RETIRED.STORES", IAP_EVENT_0BH_02H) \ +__PMC_EV_ALIAS("MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD", \ + IAP_EVENT_0BH_10H) \ +__PMC_EV_ALIAS("MEM_STORE_RETIRED.DTLB_MISS", IAP_EVENT_0CH_01H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.ANY", IAP_EVENT_0EH_01H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.STALLED_CYCLES", IAP_EVENT_0EH_01H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.FUSED", IAP_EVENT_0EH_02H) \ +__PMC_EV_ALIAS("MEM_UNCORE_RETIRED.L3_DATA_MISS_UNKNOWN", \ + IAP_EVENT_0FH_01H) \ +__PMC_EV_ALIAS("MEM_UNCORE_RETIRED.OTHER_CORE_L2_HITM", \ + IAP_EVENT_0FH_02H) \ +__PMC_EV_ALIAS("MEM_UNCORE_RETIRED.REMOTE_CACHE_LOCAL_HOME_HIT", \ + IAP_EVENT_0FH_08H) \ +__PMC_EV_ALIAS("MEM_UNCORE_RETIRED.REMOTE_DRAM", \ + IAP_EVENT_0FH_10H) \ +__PMC_EV_ALIAS("MEM_UNCORE_RETIRED.LOCAL_DRAM", IAP_EVENT_0FH_20H) \ +__PMC_EV_ALIAS("MEM_UNCORE_RETIRED.UNCACHEABLE", IAP_EVENT_0FH_80H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.X87", IAP_EVENT_10H_01H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.MMX", IAP_EVENT_10H_02H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP", IAP_EVENT_10H_04H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE2_INTEGER", IAP_EVENT_10H_08H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_PACKED", IAP_EVENT_10H_10H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_SCALAR", IAP_EVENT_10H_20H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_SINGLE_PRECISION", \ + IAP_EVENT_10H_40H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_DOUBLE_PRECISION", \ + IAP_EVENT_10H_80H) \ +__PMC_EV_ALIAS("SIMD_INT_128.PACKED_MPY", IAP_EVENT_12H_01H) \ +__PMC_EV_ALIAS("SIMD_INT_128.PACKED_SHIFT", IAP_EVENT_12H_02H) \ +__PMC_EV_ALIAS("SIMD_INT_128.PACK", IAP_EVENT_12H_04H) \ +__PMC_EV_ALIAS("SIMD_INT_128.UNPACK", IAP_EVENT_12H_08H) \ +__PMC_EV_ALIAS("SIMD_INT_128.PACKED_LOGICAL", IAP_EVENT_12H_10H) \ +__PMC_EV_ALIAS("SIMD_INT_128.PACKED_ARITH", IAP_EVENT_12H_20H) \ +__PMC_EV_ALIAS("SIMD_INT_128.SHUFFLE_MOVE", IAP_EVENT_12H_40H) \ +__PMC_EV_ALIAS("LOAD_DISPATCH.RS", IAP_EVENT_13H_01H) \ +__PMC_EV_ALIAS("LOAD_DISPATCH.RS_DELAYED", IAP_EVENT_13H_02H) \ +__PMC_EV_ALIAS("LOAD_DISPATCH.MOB", IAP_EVENT_13H_04H) \ +__PMC_EV_ALIAS("LOAD_DISPATCH.ANY", IAP_EVENT_13H_07H) \ +__PMC_EV_ALIAS("ARITH.CYCLES_DIV_BUSY", IAP_EVENT_14H_01H) \ +__PMC_EV_ALIAS("ARITH.MUL", IAP_EVENT_14H_02H) \ +__PMC_EV_ALIAS("INST_QUEUE_WRITES", IAP_EVENT_17H_01H) \ +__PMC_EV_ALIAS("INST_DECODED.DEC0", IAP_EVENT_18H_01H) \ +__PMC_EV_ALIAS("TWO_UOP_INSTS_DECODED", IAP_EVENT_19H_01H) \ +__PMC_EV_ALIAS("INST_QUEUE_WRITE_CYCLES", IAP_EVENT_1EH_01H) \ +__PMC_EV_ALIAS("LSD_OVERFLOW", IAP_EVENT_20H_01H) \ +__PMC_EV_ALIAS("L2_RQSTS.LD_HIT", IAP_EVENT_24H_01H) \ +__PMC_EV_ALIAS("L2_RQSTS.LD_MISS", IAP_EVENT_24H_02H) \ +__PMC_EV_ALIAS("L2_RQSTS.LOADS", IAP_EVENT_24H_03H) \ +__PMC_EV_ALIAS("L2_RQSTS.RFO_HIT", IAP_EVENT_24H_04H) \ +__PMC_EV_ALIAS("L2_RQSTS.RFO_MISS", IAP_EVENT_24H_08H) \ +__PMC_EV_ALIAS("L2_RQSTS.RFOS", IAP_EVENT_24H_0CH) \ +__PMC_EV_ALIAS("L2_RQSTS.IFETCH_HIT", IAP_EVENT_24H_10H) \ +__PMC_EV_ALIAS("L2_RQSTS.IFETCH_MISS", IAP_EVENT_24H_20H) \ +__PMC_EV_ALIAS("L2_RQSTS.IFETCHES", IAP_EVENT_24H_30H) \ +__PMC_EV_ALIAS("L2_RQSTS.PREFETCH_HIT", IAP_EVENT_24H_40H) \ +__PMC_EV_ALIAS("L2_RQSTS.PREFETCH_MISS", IAP_EVENT_24H_80H) \ +__PMC_EV_ALIAS("L2_RQSTS.PREFETCHES", IAP_EVENT_24H_C0H) \ +__PMC_EV_ALIAS("L2_RQSTS.MISS", IAP_EVENT_24H_AAH) \ +__PMC_EV_ALIAS("L2_RQSTS.REFERENCES", IAP_EVENT_24H_FFH) \ +__PMC_EV_ALIAS("L2_DATA_RQSTS.DEMAND.I_STATE", IAP_EVENT_26H_01H) \ +__PMC_EV_ALIAS("L2_DATA_RQSTS.DEMAND.S_STATE", IAP_EVENT_26H_02H) \ +__PMC_EV_ALIAS("L2_DATA_RQSTS.DEMAND.E_STATE", IAP_EVENT_26H_04H) \ +__PMC_EV_ALIAS("L2_DATA_RQSTS.DEMAND.M_STATE", IAP_EVENT_26H_08H) \ +__PMC_EV_ALIAS("L2_DATA_RQSTS.DEMAND.MESI", IAP_EVENT_26H_0FH) \ +__PMC_EV_ALIAS("L2_DATA_RQSTS.PREFETCH.I_STATE", IAP_EVENT_26H_10H) \ +__PMC_EV_ALIAS("L2_DATA_RQSTS.PREFETCH.S_STATE", IAP_EVENT_26H_20H) \ +__PMC_EV_ALIAS("L2_DATA_RQSTS.PREFETCH.E_STATE", IAP_EVENT_26H_40H) \ +__PMC_EV_ALIAS("L2_DATA_RQSTS.PREFETCH.M_STATE", IAP_EVENT_26H_80H) \ +__PMC_EV_ALIAS("L2_DATA_RQSTS.PREFETCH.MESI", IAP_EVENT_26H_F0H) \ +__PMC_EV_ALIAS("L2_DATA_RQSTS.ANY", IAP_EVENT_26H_FFH) \ +__PMC_EV_ALIAS("L2_WRITE.RFO.I_STATE", IAP_EVENT_27H_01H) \ +__PMC_EV_ALIAS("L2_WRITE.RFO.S_STATE", IAP_EVENT_27H_02H) \ +__PMC_EV_ALIAS("L2_WRITE.RFO.M_STATE", IAP_EVENT_27H_08H) \ +__PMC_EV_ALIAS("L2_WRITE.RFO.HIT", IAP_EVENT_27H_0EH) \ +__PMC_EV_ALIAS("L2_WRITE.RFO.MESI", IAP_EVENT_27H_0FH) \ +__PMC_EV_ALIAS("L2_WRITE.LOCK.I_STATE", IAP_EVENT_27H_10H) \ +__PMC_EV_ALIAS("L2_WRITE.LOCK.S_STATE", IAP_EVENT_27H_20H) \ +__PMC_EV_ALIAS("L2_WRITE.LOCK.E_STATE", IAP_EVENT_27H_40H) \ +__PMC_EV_ALIAS("L2_WRITE.LOCK.M_STATE", IAP_EVENT_27H_80H) \ +__PMC_EV_ALIAS("L2_WRITE.LOCK.HIT", IAP_EVENT_27H_E0H) \ +__PMC_EV_ALIAS("L2_WRITE.LOCK.MESI", IAP_EVENT_27H_F0H) \ +__PMC_EV_ALIAS("L1D_WB_L2.I_STATE", IAP_EVENT_28H_01H) \ +__PMC_EV_ALIAS("L1D_WB_L2.S_STATE", IAP_EVENT_28H_02H) \ +__PMC_EV_ALIAS("L1D_WB_L2.E_STATE", IAP_EVENT_28H_04H) \ +__PMC_EV_ALIAS("L1D_WB_L2.M_STATE", IAP_EVENT_28H_08H) \ +__PMC_EV_ALIAS("L1D_WB_L2.MESI", IAP_EVENT_28H_0FH) \ +__PMC_EV_ALIAS("L3_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_4FH) \ +__PMC_EV_ALIAS("L3_LAT_CACHE.MISS", IAP_EVENT_2EH_41H) \ +__PMC_EV_ALIAS("CPU_CLK_UNHALTED.THREAD_P", IAP_EVENT_3CH_00H) \ +__PMC_EV_ALIAS("CPU_CLK_UNHALTED.REF_P", IAP_EVENT_3CH_01H) \ +__PMC_EV_ALIAS("L1D_CACHE_LD.I_STATE", IAP_EVENT_40H_01H) \ +__PMC_EV_ALIAS("L1D_CACHE_LD.S_STATE", IAP_EVENT_40H_02H) \ +__PMC_EV_ALIAS("L1D_CACHE_LD.E_STATE", IAP_EVENT_40H_04H) \ +__PMC_EV_ALIAS("L1D_CACHE_LD.M_STATE", IAP_EVENT_40H_08H) \ +__PMC_EV_ALIAS("L1D_CACHE_LD.MESI", IAP_EVENT_40H_0FH) \ +__PMC_EV_ALIAS("L1D_CACHE_ST.S_STATE", IAP_EVENT_41H_02H) \ +__PMC_EV_ALIAS("L1D_CACHE_ST.E_STATE", IAP_EVENT_41H_04H) \ +__PMC_EV_ALIAS("L1D_CACHE_ST.M_STATE", IAP_EVENT_41H_08H) \ +__PMC_EV_ALIAS("L1D_CACHE_LOCK.HIT", IAP_EVENT_42H_01H) \ +__PMC_EV_ALIAS("L1D_CACHE_LOCK.S_STATE", IAP_EVENT_42H_02H) \ +__PMC_EV_ALIAS("L1D_CACHE_LOCK.E_STATE", IAP_EVENT_42H_04H) \ +__PMC_EV_ALIAS("L1D_CACHE_LOCK.M_STATE", IAP_EVENT_42H_08H) \ +__PMC_EV_ALIAS("L1D_ALL_REF.ANY", IAP_EVENT_43H_01H) \ +__PMC_EV_ALIAS("L1D_ALL_REF.CACHEABLE", IAP_EVENT_43H_02H) \ +__PMC_EV_ALIAS("L1D_PEND_MISS.LOAD_BUFFERS_FULL", IAP_EVENT_48H_02H) \ +__PMC_EV_ALIAS("DTLB_MISSES.ANY", IAP_EVENT_49H_01H) \ +__PMC_EV_ALIAS("DTLB_MISSES.WALK_COMPLETED", IAP_EVENT_49H_02H) \ +__PMC_EV_ALIAS("DTLB_MISSES.STLB_HIT", IAP_EVENT_49H_10H) \ +__PMC_EV_ALIAS("LOAD_HIT_PRE", IAP_EVENT_4CH_01H) \ +__PMC_EV_ALIAS("L1D_PREFETCH.REQUESTS", IAP_EVENT_4EH_01H) \ +__PMC_EV_ALIAS("L1D_PREFETCH.MISS", IAP_EVENT_4EH_02H) \ +__PMC_EV_ALIAS("L1D_PREFETCH.TRIGGERS", IAP_EVENT_4EH_04H) \ +__PMC_EV_ALIAS("L1D.REPL", IAP_EVENT_51H_01H) \ +__PMC_EV_ALIAS("L1D.M_REPL", IAP_EVENT_51H_02H) \ +__PMC_EV_ALIAS("L1D.M_EVICT", IAP_EVENT_51H_04H) \ +__PMC_EV_ALIAS("L1D.M_SNOOP_EVICT", IAP_EVENT_51H_08H) \ +__PMC_EV_ALIAS("L1D_CACHE_PREFETCH_LOCK_FB_HIT", IAP_EVENT_52H_01H) \ +__PMC_EV_ALIAS("L1D_CACHE_LOCK_FB_HIT", IAP_EVENT_53H_01H) \ +__PMC_EV_ALIAS("CACHE_LOCK_CYCLES.L1D_L2", IAP_EVENT_63H_01H) \ +__PMC_EV_ALIAS("CACHE_LOCK_CYCLES.L1D", IAP_EVENT_63H_02H) \ +__PMC_EV_ALIAS("IO_TRANSACTIONS", IAP_EVENT_6CH_01H) \ +__PMC_EV_ALIAS("L1I.HITS", IAP_EVENT_80H_01H) \ +__PMC_EV_ALIAS("L1I.MISSES", IAP_EVENT_80H_02H) \ +__PMC_EV_ALIAS("L1I.READS", IAP_EVENT_80H_03H) \ +__PMC_EV_ALIAS("L1I.CYCLES_STALLED", IAP_EVENT_80H_04H) \ +__PMC_EV_ALIAS("LARGE_ITLB.HIT", IAP_EVENT_82H_01H) \ +__PMC_EV_ALIAS("ITLB_MISSES.ANY", IAP_EVENT_85H_01H) \ +__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED", IAP_EVENT_85H_02H) \ +__PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H) \ +__PMC_EV_ALIAS("ILD_STALL.MRU", IAP_EVENT_87H_02H) \ +__PMC_EV_ALIAS("ILD_STALL.IQ_FULL", IAP_EVENT_87H_04H) \ +__PMC_EV_ALIAS("ILD_STALL.REGEN", IAP_EVENT_87H_08H) \ +__PMC_EV_ALIAS("ILD_STALL.ANY", IAP_EVENT_87H_0FH) \ +__PMC_EV_ALIAS("BR_INST_EXEC.COND", IAP_EVENT_88H_01H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT", IAP_EVENT_88H_02H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NON_CALL", IAP_EVENT_88H_04H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.NON_CALLS", IAP_EVENT_88H_07H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_08H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_10H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_20H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.NEAR_CALLS", IAP_EVENT_88H_30H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN", IAP_EVENT_88H_40H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.ANY", IAP_EVENT_88H_7FH) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.COND", IAP_EVENT_89H_01H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT", IAP_EVENT_89H_02H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NON_CALL", IAP_EVENT_89H_04H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.NON_CALLS", IAP_EVENT_89H_07H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_08H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_10H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_20H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.NEAR_CALLS", IAP_EVENT_89H_30H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN", IAP_EVENT_89H_40H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.ANY", IAP_EVENT_89H_7FH) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_A2H_01H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.LOAD", IAP_EVENT_A2H_02H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.RS_FULL", IAP_EVENT_A2H_04H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.STORE", IAP_EVENT_A2H_08H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.ROB_FULL", IAP_EVENT_A2H_10H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.FPCW", IAP_EVENT_A2H_20H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.MXCSR", IAP_EVENT_A2H_40H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.OTHER", IAP_EVENT_A2H_80H) \ +__PMC_EV_ALIAS("MACRO_INSTS.FUSIONS_DECODED", IAP_EVENT_A6H_01H) \ +__PMC_EV_ALIAS("BACLEAR_FORCE_IQ", IAP_EVENT_A7H_01H) \ +__PMC_EV_ALIAS("LSD.UOPS", IAP_EVENT_A8H_01H) \ +__PMC_EV_ALIAS("ITLB_FLUSH", IAP_EVENT_AEH_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.L1D_WRITEBACK", IAP_EVENT_B0H_40H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.PORT0", IAP_EVENT_B1H_01H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.PORT1", IAP_EVENT_B1H_02H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.PORT2_CORE", IAP_EVENT_B1H_04H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.PORT3_CORE", IAP_EVENT_B1H_08H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.PORT4_CORE", IAP_EVENT_B1H_10H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.CORE_ACTIVE_CYCLES_NO_PORT5", \ + IAP_EVENT_B1H_1FH) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.PORT5", IAP_EVENT_B1H_20H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.CORE_ACTIVE_CYCLES", IAP_EVENT_B1H_3FH) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.PORT015", IAP_EVENT_B1H_40H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.PORT234", IAP_EVENT_B1H_80H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_SQ_FULL", IAP_EVENT_B2H_01H) \ +__PMC_EV_ALIAS("OFF_CORE_RESPONSE_0", IAP_EVENT_B7H_01H) \ +__PMC_EV_ALIAS("SNOOP_RESPONSE.HIT", IAP_EVENT_B8H_01H) \ +__PMC_EV_ALIAS("SNOOP_RESPONSE.HITE", IAP_EVENT_B8H_02H) \ +__PMC_EV_ALIAS("SNOOP_RESPONSE.HITM", IAP_EVENT_B8H_04H) \ +__PMC_EV_ALIAS("OFF_CORE_RESPONSE_1", IAP_EVENT_BBH_01H) \ +__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_01H) \ +__PMC_EV_ALIAS("INST_RETIRED.X87", IAP_EVENT_C0H_02H) \ +__PMC_EV_ALIAS("INST_RETIRED.MMX", IAP_EVENT_C0H_04H) \ +__PMC_EV_ALIAS("UOPS_RETIRED.ANY", IAP_EVENT_C2H_01H) \ +__PMC_EV_ALIAS("UOPS_RETIRED.RETIRE_SLOTS", IAP_EVENT_C2H_02H) \ +__PMC_EV_ALIAS("UOPS_RETIRED.MACRO_FUSED", IAP_EVENT_C2H_04H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.CYCLES", IAP_EVENT_C3H_01H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.MEM_ORDER", IAP_EVENT_C3H_02H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_04H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_00H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.CONDITIONAL", IAP_EVENT_C4H_01H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_CALL", IAP_EVENT_C4H_02H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_04H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_00H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.NEAR_CALL", IAP_EVENT_C5H_02H) \ +__PMC_EV_ALIAS("SSEX_UOPS_RETIRED.PACKED_SINGLE", IAP_EVENT_C7H_01H) \ +__PMC_EV_ALIAS("SSEX_UOPS_RETIRED.SCALAR_SINGLE", IAP_EVENT_C7H_02H) \ +__PMC_EV_ALIAS("SSEX_UOPS_RETIRED.PACKED_DOUBLE", IAP_EVENT_C7H_04H) \ +__PMC_EV_ALIAS("SSEX_UOPS_RETIRED.SCALAR_DOUBLE", IAP_EVENT_C7H_08H) \ +__PMC_EV_ALIAS("SSEX_UOPS_RETIRED.VECTOR_INTEGER", IAP_EVENT_C7H_10H) \ +__PMC_EV_ALIAS("ITLB_MISS_RETIRED", IAP_EVENT_C8H_20H) \ +__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L1D_HIT", IAP_EVENT_CBH_01H) \ +__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L2_HIT", IAP_EVENT_CBH_02H) \ +__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L3_UNSHARED_HIT", IAP_EVENT_CBH_04H) \ +__PMC_EV_ALIAS("MEM_LOAD_RETIRED.OTHER_CORE_L2_HIT_HITM", \ + IAP_EVENT_CBH_08H) \ +__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L3_MISS", IAP_EVENT_CBH_10H) \ +__PMC_EV_ALIAS("MEM_LOAD_RETIRED.HIT_LFB", IAP_EVENT_CBH_40H) \ +__PMC_EV_ALIAS("MEM_LOAD_RETIRED.DTLB_MISS", IAP_EVENT_CBH_80H) \ +__PMC_EV_ALIAS("FP_MMX_TRANS.TO_FP", IAP_EVENT_CCH_01H) \ +__PMC_EV_ALIAS("FP_MMX_TRANS.TO_MMX", IAP_EVENT_CCH_02H) \ +__PMC_EV_ALIAS("FP_MMX_TRANS.ANY", IAP_EVENT_CCH_03H) \ +__PMC_EV_ALIAS("MACRO_INSTS.DECODED", IAP_EVENT_D0H_01H) \ +__PMC_EV_ALIAS("UOPS_DECODED.MS", IAP_EVENT_D1H_02H) \ +__PMC_EV_ALIAS("UOPS_DECODED.ESP_FOLDING", IAP_EVENT_D1H_04H) \ +__PMC_EV_ALIAS("UOPS_DECODED.ESP_SYNC", IAP_EVENT_D1H_08H) \ +__PMC_EV_ALIAS("RAT_STALLS.FLAGS", IAP_EVENT_D2H_01H) \ +__PMC_EV_ALIAS("RAT_STALLS.REGISTERS", IAP_EVENT_D2H_02H) \ +__PMC_EV_ALIAS("RAT_STALLS.ROB_READ_PORT", IAP_EVENT_D2H_04H) \ +__PMC_EV_ALIAS("RAT_STALLS.SCOREBOARD", IAP_EVENT_D2H_08H) \ +__PMC_EV_ALIAS("RAT_STALLS.ANY", IAP_EVENT_D2H_0FH) \ +__PMC_EV_ALIAS("SEG_RENAME_STALLS", IAP_EVENT_D4H_01H) \ +__PMC_EV_ALIAS("ES_REG_RENAMES", IAP_EVENT_D5H_01H) \ +__PMC_EV_ALIAS("UOP_UNFUSION", IAP_EVENT_DBH_01H) \ +__PMC_EV_ALIAS("BR_INST_DECODED", IAP_EVENT_E0H_01H) \ +__PMC_EV_ALIAS("BPU_MISSED_CALL_RET", IAP_EVENT_E5H_01H) \ +__PMC_EV_ALIAS("BACLEAR.CLEAR", IAP_EVENT_E6H_01H) \ +__PMC_EV_ALIAS("BACLEAR.BAD_TARGET", IAP_EVENT_E6H_02H) \ +__PMC_EV_ALIAS("BPU_CLEARS.EARLY", IAP_EVENT_E8H_01H) \ +__PMC_EV_ALIAS("BPU_CLEARS.LATE", IAP_EVENT_E8H_02H) \ +__PMC_EV_ALIAS("BPU_CLEARS.ANY", IAP_EVENT_E8H_03H) \ +__PMC_EV_ALIAS("L2_TRANSACTIONS.LOAD", IAP_EVENT_F0H_01H) \ +__PMC_EV_ALIAS("L2_TRANSACTIONS.RFO", IAP_EVENT_F0H_02H) \ +__PMC_EV_ALIAS("L2_TRANSACTIONS.IFETCH", IAP_EVENT_F0H_04H) \ +__PMC_EV_ALIAS("L2_TRANSACTIONS.PREFETCH", IAP_EVENT_F0H_08H) \ +__PMC_EV_ALIAS("L2_TRANSACTIONS.L1D_WB", IAP_EVENT_F0H_10H) \ +__PMC_EV_ALIAS("L2_TRANSACTIONS.FILL", IAP_EVENT_F0H_20H) \ +__PMC_EV_ALIAS("L2_TRANSACTIONS.WB", IAP_EVENT_F0H_40H) \ +__PMC_EV_ALIAS("L2_TRANSACTIONS.ANY", IAP_EVENT_F0H_80H) \ +__PMC_EV_ALIAS("L2_LINES_IN.S_STATE", IAP_EVENT_F1H_02H) \ +__PMC_EV_ALIAS("L2_LINES_IN.E_STATE", IAP_EVENT_F1H_04H) \ +__PMC_EV_ALIAS("L2_LINES_IN.ANY", IAP_EVENT_F1H_07H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_CLEAN", IAP_EVENT_F2H_01H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_DIRTY", IAP_EVENT_F2H_02H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.PREFETCH_CLEAN", IAP_EVENT_F2H_04H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.PREFETCH_DIRTY", IAP_EVENT_F2H_08H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.ANY", IAP_EVENT_F2H_0FH) \ +__PMC_EV_ALIAS("SQ_MISC.SPLIT_LOCK", IAP_EVENT_F4H_10H) \ +__PMC_EV_ALIAS("SQ_FULL_STALL_CYCLES", IAP_EVENT_F6H_01H) \ +__PMC_EV_ALIAS("FP_ASSIST.ALL", IAP_EVENT_F7H_01H) \ +__PMC_EV_ALIAS("FP_ASSIST.OUTPUT", IAP_EVENT_F7H_02H) \ +__PMC_EV_ALIAS("FP_ASSIST.INPUT", IAP_EVENT_F7H_04H) \ +__PMC_EV_ALIAS("SIMD_INT_64.PACKED_MPY", IAP_EVENT_FDH_01H) \ +__PMC_EV_ALIAS("SIMD_INT_64.PACKED_SHIFT", IAP_EVENT_FDH_02H) \ +__PMC_EV_ALIAS("SIMD_INT_64.PACK", IAP_EVENT_FDH_04H) \ +__PMC_EV_ALIAS("SIMD_INT_64.UNPACK", IAP_EVENT_FDH_08H) \ +__PMC_EV_ALIAS("SIMD_INT_64.PACKED_LOGICAL", IAP_EVENT_FDH_10H) \ +__PMC_EV_ALIAS("SIMD_INT_64.PACKED_ARITH", IAP_EVENT_FDH_20H) \ +__PMC_EV_ALIAS("SIMD_INT_64.SHUFFLE_MOVE", IAP_EVENT_FDH_40H) \ +__PMC_EV_ALIAS_COREI7_OLD() + +/* + * Aliases for Westmere PMC events (253669-033US December 2009) + */ +#define __PMC_EV_ALIAS_WESTMERE() \ +__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ +__PMC_EV_ALIAS("LOAD_BLOCK.OVERLAP_STORE", IAP_EVENT_03H_02H) \ +__PMC_EV_ALIAS("SB_DRAIN.ANY", IAP_EVENT_04H_07H) \ +__PMC_EV_ALIAS("MISALIGN_MEMORY.STORE", IAP_EVENT_05H_02H) \ +__PMC_EV_ALIAS("STORE_BLOCKS.AT_RET", IAP_EVENT_06H_04H) \ +__PMC_EV_ALIAS("STORE_BLOCKS.L1D_BLOCK", IAP_EVENT_06H_08H) \ +__PMC_EV_ALIAS("PARTIAL_ADDRESS_ALIAS", IAP_EVENT_07H_01H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.ANY", IAP_EVENT_08H_01H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED", IAP_EVENT_08H_02H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_CYCLES", IAP_EVENT_08H_04H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT", IAP_EVENT_08H_10H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.PDE_MISS", IAP_EVENT_08H_20H) \ +__PMC_EV_ALIAS("MEM_INST_RETIRED.LOADS", IAP_EVENT_0BH_01H) \ +__PMC_EV_ALIAS("MEM_INST_RETIRED.STORES", IAP_EVENT_0BH_02H) \ +__PMC_EV_ALIAS("MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD", \ + IAP_EVENT_0BH_10H) \ +__PMC_EV_ALIAS("MEM_STORE_RETIRED.DTLB_MISS", IAP_EVENT_0CH_01H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.ANY", IAP_EVENT_0EH_01H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.STALLED_CYCLES", IAP_EVENT_0EH_01H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.FUSED", IAP_EVENT_0EH_02H) \ +__PMC_EV_ALIAS("MEM_UNCORE_RETIRED.LOCAL_HITM", IAP_EVENT_0FH_02H) \ +__PMC_EV_ALIAS("MEM_UNCORE_RETIRED.LOCAL_DRAM_AND_REMOTE_CACHE_HIT", \ + IAP_EVENT_0FH_08H) \ +__PMC_EV_ALIAS("MEM_UNCORE_RETIRED.LOCAL_DRAM", IAP_EVENT_0FH_10H) \ +__PMC_EV_ALIAS("MEM_UNCORE_RETIRED.REMOTE_DRAM", IAP_EVENT_0FH_20H) \ +__PMC_EV_ALIAS("MEM_UNCORE_RETIRED.UNCACHEABLE", IAP_EVENT_0FH_80H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.X87", IAP_EVENT_10H_01H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.MMX", IAP_EVENT_10H_02H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP", IAP_EVENT_10H_04H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE2_INTEGER", IAP_EVENT_10H_08H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_PACKED", IAP_EVENT_10H_10H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_SCALAR", IAP_EVENT_10H_20H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_SINGLE_PRECISION", \ + IAP_EVENT_10H_40H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_DOUBLE_PRECISION", \ + IAP_EVENT_10H_80H) \ +__PMC_EV_ALIAS("SIMD_INT_128.PACKED_MPY", IAP_EVENT_12H_01H) \ +__PMC_EV_ALIAS("SIMD_INT_128.PACKED_SHIFT", IAP_EVENT_12H_02H) \ +__PMC_EV_ALIAS("SIMD_INT_128.PACK", IAP_EVENT_12H_04H) \ +__PMC_EV_ALIAS("SIMD_INT_128.UNPACK", IAP_EVENT_12H_08H) \ +__PMC_EV_ALIAS("SIMD_INT_128.PACKED_LOGICAL", IAP_EVENT_12H_10H) \ +__PMC_EV_ALIAS("SIMD_INT_128.PACKED_ARITH", IAP_EVENT_12H_20H) \ +__PMC_EV_ALIAS("SIMD_INT_128.SHUFFLE_MOVE", IAP_EVENT_12H_40H) \ +__PMC_EV_ALIAS("LOAD_DISPATCH.RS", IAP_EVENT_13H_01H) \ +__PMC_EV_ALIAS("LOAD_DISPATCH.RS_DELAYED", IAP_EVENT_13H_02H) \ +__PMC_EV_ALIAS("LOAD_DISPATCH.MOB", IAP_EVENT_13H_04H) \ +__PMC_EV_ALIAS("LOAD_DISPATCH.ANY", IAP_EVENT_13H_07H) \ +__PMC_EV_ALIAS("ARITH.CYCLES_DIV_BUSY", IAP_EVENT_14H_01H) \ +__PMC_EV_ALIAS("ARITH.MUL", IAP_EVENT_14H_02H) \ +__PMC_EV_ALIAS("INST_QUEUE_WRITES", IAP_EVENT_17H_01H) \ +__PMC_EV_ALIAS("INST_DECODED.DEC0", IAP_EVENT_18H_01H) \ +__PMC_EV_ALIAS("TWO_UOP_INSTS_DECODED", IAP_EVENT_19H_01H) \ +__PMC_EV_ALIAS("INST_QUEUE_WRITE_CYCLES", IAP_EVENT_1EH_01H) \ +__PMC_EV_ALIAS("LSD_OVERFLOW", IAP_EVENT_20H_01H) \ +__PMC_EV_ALIAS("L2_RQSTS.LD_HIT", IAP_EVENT_24H_01H) \ +__PMC_EV_ALIAS("L2_RQSTS.LD_MISS", IAP_EVENT_24H_02H) \ +__PMC_EV_ALIAS("L2_RQSTS.LOADS", IAP_EVENT_24H_03H) \ +__PMC_EV_ALIAS("L2_RQSTS.RFO_HIT", IAP_EVENT_24H_04H) \ +__PMC_EV_ALIAS("L2_RQSTS.RFO_MISS", IAP_EVENT_24H_08H) \ +__PMC_EV_ALIAS("L2_RQSTS.RFOS", IAP_EVENT_24H_0CH) \ +__PMC_EV_ALIAS("L2_RQSTS.IFETCH_HIT", IAP_EVENT_24H_10H) \ +__PMC_EV_ALIAS("L2_RQSTS.IFETCH_MISS", IAP_EVENT_24H_20H) \ +__PMC_EV_ALIAS("L2_RQSTS.IFETCHES", IAP_EVENT_24H_30H) \ +__PMC_EV_ALIAS("L2_RQSTS.PREFETCH_HIT", IAP_EVENT_24H_40H) \ +__PMC_EV_ALIAS("L2_RQSTS.PREFETCH_MISS", IAP_EVENT_24H_80H) \ +__PMC_EV_ALIAS("L2_RQSTS.PREFETCHES", IAP_EVENT_24H_C0H) \ +__PMC_EV_ALIAS("L2_RQSTS.MISS", IAP_EVENT_24H_AAH) \ +__PMC_EV_ALIAS("L2_RQSTS.REFERENCES", IAP_EVENT_24H_FFH) \ +__PMC_EV_ALIAS("L2_DATA_RQSTS.DEMAND.I_STATE", IAP_EVENT_26H_01H) \ +__PMC_EV_ALIAS("L2_DATA_RQSTS.DEMAND.S_STATE", IAP_EVENT_26H_02H) \ +__PMC_EV_ALIAS("L2_DATA_RQSTS.DEMAND.E_STATE", IAP_EVENT_26H_04H) \ +__PMC_EV_ALIAS("L2_DATA_RQSTS.DEMAND.M_STATE", IAP_EVENT_26H_08H) \ +__PMC_EV_ALIAS("L2_DATA_RQSTS.DEMAND.MESI", IAP_EVENT_26H_0FH) \ +__PMC_EV_ALIAS("L2_DATA_RQSTS.PREFETCH.I_STATE", IAP_EVENT_26H_10H) \ +__PMC_EV_ALIAS("L2_DATA_RQSTS.PREFETCH.S_STATE", IAP_EVENT_26H_20H) \ +__PMC_EV_ALIAS("L2_DATA_RQSTS.PREFETCH.E_STATE", IAP_EVENT_26H_40H) \ +__PMC_EV_ALIAS("L2_DATA_RQSTS.PREFETCH.M_STATE", IAP_EVENT_26H_80H) \ +__PMC_EV_ALIAS("L2_DATA_RQSTS.PREFETCH.MESI", IAP_EVENT_26H_F0H) \ +__PMC_EV_ALIAS("L2_DATA_RQSTS.ANY", IAP_EVENT_26H_FFH) \ +__PMC_EV_ALIAS("L2_WRITE.RFO.I_STATE", IAP_EVENT_27H_01H) \ +__PMC_EV_ALIAS("L2_WRITE.RFO.S_STATE", IAP_EVENT_27H_02H) \ +__PMC_EV_ALIAS("L2_WRITE.RFO.M_STATE", IAP_EVENT_27H_08H) \ +__PMC_EV_ALIAS("L2_WRITE.RFO.HIT", IAP_EVENT_27H_0EH) \ +__PMC_EV_ALIAS("L2_WRITE.RFO.MESI", IAP_EVENT_27H_0FH) \ +__PMC_EV_ALIAS("L2_WRITE.LOCK.I_STATE", IAP_EVENT_27H_10H) \ +__PMC_EV_ALIAS("L2_WRITE.LOCK.S_STATE", IAP_EVENT_27H_20H) \ +__PMC_EV_ALIAS("L2_WRITE.LOCK.E_STATE", IAP_EVENT_27H_40H) \ +__PMC_EV_ALIAS("L2_WRITE.LOCK.M_STATE", IAP_EVENT_27H_80H) \ +__PMC_EV_ALIAS("L2_WRITE.LOCK.HIT", IAP_EVENT_27H_E0H) \ +__PMC_EV_ALIAS("L2_WRITE.LOCK.MESI", IAP_EVENT_27H_F0H) \ +__PMC_EV_ALIAS("L1D_WB_L2.I_STATE", IAP_EVENT_28H_01H) \ +__PMC_EV_ALIAS("L1D_WB_L2.S_STATE", IAP_EVENT_28H_02H) \ +__PMC_EV_ALIAS("L1D_WB_L2.E_STATE", IAP_EVENT_28H_04H) \ +__PMC_EV_ALIAS("L1D_WB_L2.M_STATE", IAP_EVENT_28H_08H) \ +__PMC_EV_ALIAS("L1D_WB_L2.MESI", IAP_EVENT_28H_0FH) \ +__PMC_EV_ALIAS("L3_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_02H) \ +__PMC_EV_ALIAS("L3_LAT_CACHE.MISS", IAP_EVENT_2EH_01H) \ +__PMC_EV_ALIAS("CPU_CLK_UNHALTED.THREAD_P", IAP_EVENT_3CH_00H) \ +__PMC_EV_ALIAS("CPU_CLK_UNHALTED.REF_P", IAP_EVENT_3CH_01H) \ +__PMC_EV_ALIAS("DTLB_MISSES.ANY", IAP_EVENT_49H_01H) \ +__PMC_EV_ALIAS("DTLB_MISSES.WALK_COMPLETED", IAP_EVENT_49H_02H) \ +__PMC_EV_ALIAS("DTLB_MISSES.WALK_CYCLES", IAP_EVENT_49H_04H) \ +__PMC_EV_ALIAS("DTLB_MISSES.STLB_HIT", IAP_EVENT_49H_10H) \ +__PMC_EV_ALIAS("DTLB_MISSES.LARGE_WALK_COMPLETED", IAP_EVENT_49H_80H) \ +__PMC_EV_ALIAS("LOAD_HIT_PRE", IAP_EVENT_4CH_01H) \ +__PMC_EV_ALIAS("L1D_PREFETCH.REQUESTS", IAP_EVENT_4EH_01H) \ +__PMC_EV_ALIAS("L1D_PREFETCH.MISS", IAP_EVENT_4EH_02H) \ +__PMC_EV_ALIAS("L1D_PREFETCH.TRIGGERS", IAP_EVENT_4EH_04H) \ +__PMC_EV_ALIAS("EPT.WALK_CYCLES", IAP_EVENT_4FH_10H) \ +__PMC_EV_ALIAS("L1D.REPL", IAP_EVENT_51H_01H) \ +__PMC_EV_ALIAS("L1D.M_REPL", IAP_EVENT_51H_02H) \ +__PMC_EV_ALIAS("L1D.M_EVICT", IAP_EVENT_51H_04H) \ +__PMC_EV_ALIAS("L1D.M_SNOOP_EVICT", IAP_EVENT_51H_08H) \ +__PMC_EV_ALIAS("L1D_CACHE_PREFETCH_LOCK_FB_HIT", IAP_EVENT_52H_01H) \ +__PMC_EV_ALIAS("L1D_CACHE_LOCK_FB_HIT", IAP_EVENT_53H_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND.READ_DATA", \ + IAP_EVENT_60H_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND.READ_CODE", \ + IAP_EVENT_60H_02H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND.RFO", \ + IAP_EVENT_60H_04H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.ANY.READ", \ + IAP_EVENT_60H_08H) \ +__PMC_EV_ALIAS("CACHE_LOCK_CYCLES.L1D_L2", IAP_EVENT_63H_01H) \ +__PMC_EV_ALIAS("CACHE_LOCK_CYCLES.L1D", IAP_EVENT_63H_02H) \ +__PMC_EV_ALIAS("IO_TRANSACTIONS", IAP_EVENT_6CH_01H) \ +__PMC_EV_ALIAS("L1I.HITS", IAP_EVENT_80H_01H) \ +__PMC_EV_ALIAS("L1I.MISSES", IAP_EVENT_80H_02H) \ +__PMC_EV_ALIAS("L1I.READS", IAP_EVENT_80H_03H) \ +__PMC_EV_ALIAS("L1I.CYCLES_STALLED", IAP_EVENT_80H_04H) \ +__PMC_EV_ALIAS("LARGE_ITLB.HIT", IAP_EVENT_82H_01H) \ +__PMC_EV_ALIAS("ITLB_MISSES.ANY", IAP_EVENT_85H_01H) \ +__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED", IAP_EVENT_85H_02H) \ +__PMC_EV_ALIAS("ITLB_MISSES.WALK_CYCLES", IAP_EVENT_85H_04H) \ +__PMC_EV_ALIAS("ITLB_MISSES.LARGE_WALK_COMPLETED", IAP_EVENT_85H_80H) \ +__PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H) \ +__PMC_EV_ALIAS("ILD_STALL.MRU", IAP_EVENT_87H_02H) \ +__PMC_EV_ALIAS("ILD_STALL.IQ_FULL", IAP_EVENT_87H_04H) \ +__PMC_EV_ALIAS("ILD_STALL.REGEN", IAP_EVENT_87H_08H) \ +__PMC_EV_ALIAS("ILD_STALL.ANY", IAP_EVENT_87H_0FH) \ +__PMC_EV_ALIAS("BR_INST_EXEC.COND", IAP_EVENT_88H_01H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT", IAP_EVENT_88H_02H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NON_CALL", IAP_EVENT_88H_04H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.NON_CALLS", IAP_EVENT_88H_07H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_08H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_10H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_20H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.NEAR_CALLS", IAP_EVENT_88H_30H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN", IAP_EVENT_88H_40H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.ANY", IAP_EVENT_88H_7FH) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.COND", IAP_EVENT_89H_01H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT", IAP_EVENT_89H_02H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NON_CALL", IAP_EVENT_89H_04H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.NON_CALLS", IAP_EVENT_89H_07H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_08H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_10H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_20H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.NEAR_CALLS", IAP_EVENT_89H_30H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN", IAP_EVENT_89H_40H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.ANY", IAP_EVENT_89H_7FH) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_A2H_01H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.LOAD", IAP_EVENT_A2H_02H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.RS_FULL", IAP_EVENT_A2H_04H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.STORE", IAP_EVENT_A2H_08H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.ROB_FULL", IAP_EVENT_A2H_10H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.FPCW", IAP_EVENT_A2H_20H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.MXCSR", IAP_EVENT_A2H_40H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.OTHER", IAP_EVENT_A2H_80H) \ +__PMC_EV_ALIAS("MACRO_INSTS.FUSIONS_DECODED", IAP_EVENT_A6H_01H) \ +__PMC_EV_ALIAS("BACLEAR_FORCE_IQ", IAP_EVENT_A7H_01H) \ +__PMC_EV_ALIAS("LSD.UOPS", IAP_EVENT_A8H_01H) \ +__PMC_EV_ALIAS("ITLB_FLUSH", IAP_EVENT_AEH_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND.READ_DATA", IAP_EVENT_B0H_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND.READ_CODE", IAP_EVENT_B0H_02H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND.RFO", IAP_EVENT_B0H_04H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.ANY.READ", IAP_EVENT_B0H_08H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.ANY.RFO", IAP_EVENT_80H_10H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.L1D_WRITEBACK", IAP_EVENT_B0H_40H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.ANY", IAP_EVENT_B0H_80H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.PORT0", IAP_EVENT_B1H_01H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.PORT1", IAP_EVENT_B1H_02H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.PORT2_CORE", IAP_EVENT_B1H_04H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.PORT3_CORE", IAP_EVENT_B1H_08H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.PORT4_CORE", IAP_EVENT_B1H_10H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.CORE_ACTIVE_CYCLES_NO_PORT5", \ + IAP_EVENT_B1H_1FH) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.PORT5", IAP_EVENT_B1H_20H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.CORE_ACTIVE_CYCLES", IAP_EVENT_B1H_3FH) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.PORT015", IAP_EVENT_B1H_40H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.PORT234", IAP_EVENT_B1H_80H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_SQ_FULL", IAP_EVENT_B2H_01H) \ +__PMC_EV_ALIAS("SNOOPQ_REQUESTS_OUTSTANDING.DATA", IAP_EVENT_B3H_01H) \ +__PMC_EV_ALIAS("SNOOPQ_REQUESTS_OUTSTANDING.INVALIDATE", \ + IAP_EVENT_B3H_02H) \ +__PMC_EV_ALIAS("SNOOPQ_REQUESTS_OUTSTANDING.CODE", IAP_EVENT_B3H_04H) \ +__PMC_EV_ALIAS("SNOOPQ_REQUESTS.CODE", IAP_EVENT_B4H_01H) \ +__PMC_EV_ALIAS("SNOOPQ_REQUESTS.DATA", IAP_EVENT_B4H_02H) \ +__PMC_EV_ALIAS("SNOOPQ_REQUESTS.INVALIDATE", IAP_EVENT_B4H_04H) \ +__PMC_EV_ALIAS("OFF_CORE_RESPONSE_0", IAP_EVENT_B7H_01H) \ +__PMC_EV_ALIAS("SNOOP_RESPONSE.HIT", IAP_EVENT_B8H_01H) \ +__PMC_EV_ALIAS("SNOOP_RESPONSE.HITE", IAP_EVENT_B8H_02H) \ +__PMC_EV_ALIAS("SNOOP_RESPONSE.HITM", IAP_EVENT_B8H_04H) \ +__PMC_EV_ALIAS("OFF_CORE_RESPONSE_1", IAP_EVENT_BBH_01H) \ +__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_01H) \ +__PMC_EV_ALIAS("INST_RETIRED.X87", IAP_EVENT_C0H_02H) \ +__PMC_EV_ALIAS("INST_RETIRED.MMX", IAP_EVENT_C0H_04H) \ +__PMC_EV_ALIAS("UOPS_RETIRED.ANY", IAP_EVENT_C2H_01H) \ +__PMC_EV_ALIAS("UOPS_RETIRED.RETIRE_SLOTS", IAP_EVENT_C2H_02H) \ +__PMC_EV_ALIAS("UOPS_RETIRED.MACRO_FUSED", IAP_EVENT_C2H_04H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.CYCLES", IAP_EVENT_C3H_01H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.MEM_ORDER", IAP_EVENT_C3H_02H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_04H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_00H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.CONDITIONAL", IAP_EVENT_C4H_01H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_CALL", IAP_EVENT_C4H_02H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_04H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_00H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.CONDITIONAL", IAP_EVENT_C5H_01H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.NEAR_CALL", IAP_EVENT_C5H_02H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_04H) \ +__PMC_EV_ALIAS("SSEX_UOPS_RETIRED.PACKED_SINGLE", IAP_EVENT_C7H_01H) \ +__PMC_EV_ALIAS("SSEX_UOPS_RETIRED.SCALAR_SINGLE", IAP_EVENT_C7H_02H) \ +__PMC_EV_ALIAS("SSEX_UOPS_RETIRED.PACKED_DOUBLE", IAP_EVENT_C7H_04H) \ +__PMC_EV_ALIAS("SSEX_UOPS_RETIRED.SCALAR_DOUBLE", IAP_EVENT_C7H_08H) \ +__PMC_EV_ALIAS("SSEX_UOPS_RETIRED.VECTOR_INTEGER", IAP_EVENT_C7H_10H) \ +__PMC_EV_ALIAS("ITLB_MISS_RETIRED", IAP_EVENT_C8H_20H) \ +__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L1D_HIT", IAP_EVENT_CBH_01H) \ +__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L2_HIT", IAP_EVENT_CBH_02H) \ +__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L3_UNSHARED_HIT", IAP_EVENT_CBH_04H) \ +__PMC_EV_ALIAS("MEM_LOAD_RETIRED.OTHER_CORE_L2_HIT_HITM", \ + IAP_EVENT_CBH_08H) \ +__PMC_EV_ALIAS("MEM_LOAD_RETIRED.L3_MISS", IAP_EVENT_CBH_10H) \ +__PMC_EV_ALIAS("MEM_LOAD_RETIRED.HIT_LFB", IAP_EVENT_CBH_40H) \ +__PMC_EV_ALIAS("MEM_LOAD_RETIRED.DTLB_MISS", IAP_EVENT_CBH_80H) \ +__PMC_EV_ALIAS("FP_MMX_TRANS.TO_FP", IAP_EVENT_CCH_01H) \ +__PMC_EV_ALIAS("FP_MMX_TRANS.TO_MMX", IAP_EVENT_CCH_02H) \ +__PMC_EV_ALIAS("FP_MMX_TRANS.ANY", IAP_EVENT_CCH_03H) \ +__PMC_EV_ALIAS("MACRO_INSTS.DECODED", IAP_EVENT_D0H_01H) \ +__PMC_EV_ALIAS("UOPS_DECODED.STALL_CYCLES", IAP_EVENT_D1H_01H) \ +__PMC_EV_ALIAS("UOPS_DECODED.MS", IAP_EVENT_D1H_02H) \ +__PMC_EV_ALIAS("UOPS_DECODED.ESP_FOLDING", IAP_EVENT_D1H_04H) \ +__PMC_EV_ALIAS("UOPS_DECODED.ESP_SYNC", IAP_EVENT_D1H_08H) \ +__PMC_EV_ALIAS("RAT_STALLS.FLAGS", IAP_EVENT_D2H_01H) \ +__PMC_EV_ALIAS("RAT_STALLS.REGISTERS", IAP_EVENT_D2H_02H) \ +__PMC_EV_ALIAS("RAT_STALLS.ROB_READ_PORT", IAP_EVENT_D2H_04H) \ +__PMC_EV_ALIAS("RAT_STALLS.SCOREBOARD", IAP_EVENT_D2H_08H) \ +__PMC_EV_ALIAS("RAT_STALLS.ANY", IAP_EVENT_D2H_0FH) \ +__PMC_EV_ALIAS("SEG_RENAME_STALLS", IAP_EVENT_D4H_01H) \ +__PMC_EV_ALIAS("ES_REG_RENAMES", IAP_EVENT_D5H_01H) \ +__PMC_EV_ALIAS("UOP_UNFUSION", IAP_EVENT_DBH_01H) \ +__PMC_EV_ALIAS("BR_INST_DECODED", IAP_EVENT_E0H_01H) \ +__PMC_EV_ALIAS("BPU_MISSED_CALL_RET", IAP_EVENT_E5H_01H) \ +__PMC_EV_ALIAS("BACLEAR.CLEAR", IAP_EVENT_E6H_01H) \ +__PMC_EV_ALIAS("BACLEAR.BAD_TARGET", IAP_EVENT_E6H_02H) \ +__PMC_EV_ALIAS("BPU_CLEARS.EARLY", IAP_EVENT_E8H_01H) \ +__PMC_EV_ALIAS("BPU_CLEARS.LATE", IAP_EVENT_E8H_02H) \ +__PMC_EV_ALIAS("THREAD_ACTIVE", IAP_EVENT_ECH_01H) \ +__PMC_EV_ALIAS("L2_TRANSACTIONS.LOAD", IAP_EVENT_F0H_01H) \ +__PMC_EV_ALIAS("L2_TRANSACTIONS.RFO", IAP_EVENT_F0H_02H) \ +__PMC_EV_ALIAS("L2_TRANSACTIONS.IFETCH", IAP_EVENT_F0H_04H) \ +__PMC_EV_ALIAS("L2_TRANSACTIONS.PREFETCH", IAP_EVENT_F0H_08H) \ +__PMC_EV_ALIAS("L2_TRANSACTIONS.L1D_WB", IAP_EVENT_F0H_10H) \ +__PMC_EV_ALIAS("L2_TRANSACTIONS.FILL", IAP_EVENT_F0H_20H) \ +__PMC_EV_ALIAS("L2_TRANSACTIONS.WB", IAP_EVENT_F0H_40H) \ +__PMC_EV_ALIAS("L2_TRANSACTIONS.ANY", IAP_EVENT_F0H_80H) \ +__PMC_EV_ALIAS("L2_LINES_IN.S_STATE", IAP_EVENT_F1H_02H) \ +__PMC_EV_ALIAS("L2_LINES_IN.E_STATE", IAP_EVENT_F1H_04H) \ +__PMC_EV_ALIAS("L2_LINES_IN.ANY", IAP_EVENT_F1H_07H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_CLEAN", IAP_EVENT_F2H_01H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_DIRTY", IAP_EVENT_F2H_02H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.PREFETCH_CLEAN", IAP_EVENT_F2H_04H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.PREFETCH_DIRTY", IAP_EVENT_F2H_08H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.ANY", IAP_EVENT_F2H_0FH) \ +__PMC_EV_ALIAS("SQ_MISC.LRU_HINTS", IAP_EVENT_F4H_04H) \ +__PMC_EV_ALIAS("SQ_MISC.SPLIT_LOCK", IAP_EVENT_F4H_10H) \ +__PMC_EV_ALIAS("SQ_FULL_STALL_CYCLES", IAP_EVENT_F6H_01H) \ +__PMC_EV_ALIAS("FP_ASSIST.ALL", IAP_EVENT_F7H_01H) \ +__PMC_EV_ALIAS("FP_ASSIST.OUTPUT", IAP_EVENT_F7H_02H) \ +__PMC_EV_ALIAS("FP_ASSIST.INPUT", IAP_EVENT_F7H_04H) \ +__PMC_EV_ALIAS("SIMD_INT_64.PACKED_MPY", IAP_EVENT_FDH_01H) \ +__PMC_EV_ALIAS("SIMD_INT_64.PACKED_SHIFT", IAP_EVENT_FDH_02H) \ +__PMC_EV_ALIAS("SIMD_INT_64.PACK", IAP_EVENT_FDH_04H) \ +__PMC_EV_ALIAS("SIMD_INT_64.UNPACK", IAP_EVENT_FDH_08H) \ +__PMC_EV_ALIAS("SIMD_INT_64.PACKED_LOGICAL", IAP_EVENT_FDH_10H) \ +__PMC_EV_ALIAS("SIMD_INT_64.PACKED_ARITH", IAP_EVENT_FDH_20H) \ +__PMC_EV_ALIAS("SIMD_INT_64.SHUFFLE_MOVE", IAP_EVENT_FDH_40H) /* timestamp counters. */ #define __PMC_EV_TSC() \ @@ -1979,6 +2325,627 @@ __PMC_EV_ALIAS("SIMD_INT_64.SHUFFLE_MOVE", IAP_EVENT_FDH_40H) #define PMC_EV_TSC_FIRST PMC_EV_TSC_TSC #define PMC_EV_TSC_LAST PMC_EV_TSC_TSC +#define __PMC_EV_UCF() \ +__PMC_EV(UCF, UCLOCK) + +#define PMC_EV_UCF_FIRST PMC_EV_UCF_UCLOCK +#define PMC_EV_UCF_LAST PMC_EV_UCF_UCLOCK + +#define __PMC_EV_UCP() \ +__PMC_EV(UCP, EVENT_00H_01H) \ +__PMC_EV(UCP, EVENT_00H_02H) \ +__PMC_EV(UCP, EVENT_00H_04H) \ +__PMC_EV(UCP, EVENT_01H_01H) \ +__PMC_EV(UCP, EVENT_01H_02H) \ +__PMC_EV(UCP, EVENT_01H_04H) \ +__PMC_EV(UCP, EVENT_02H_01H) \ +__PMC_EV(UCP, EVENT_03H_01H) \ +__PMC_EV(UCP, EVENT_03H_02H) \ +__PMC_EV(UCP, EVENT_03H_04H) \ +__PMC_EV(UCP, EVENT_03H_08H) \ +__PMC_EV(UCP, EVENT_03H_10H) \ +__PMC_EV(UCP, EVENT_03H_20H) \ +__PMC_EV(UCP, EVENT_03H_40H) \ +__PMC_EV(UCP, EVENT_04H_01H) \ +__PMC_EV(UCP, EVENT_04H_02H) \ +__PMC_EV(UCP, EVENT_04H_04H) \ +__PMC_EV(UCP, EVENT_04H_08H) \ +__PMC_EV(UCP, EVENT_04H_10H) \ +__PMC_EV(UCP, EVENT_05H_01H) \ +__PMC_EV(UCP, EVENT_05H_02H) \ +__PMC_EV(UCP, EVENT_05H_04H) \ +__PMC_EV(UCP, EVENT_06H_01H) \ +__PMC_EV(UCP, EVENT_06H_02H) \ +__PMC_EV(UCP, EVENT_06H_04H) \ +__PMC_EV(UCP, EVENT_06H_08H) \ +__PMC_EV(UCP, EVENT_06H_10H) \ +__PMC_EV(UCP, EVENT_06H_20H) \ +__PMC_EV(UCP, EVENT_07H_01H) \ +__PMC_EV(UCP, EVENT_07H_02H) \ +__PMC_EV(UCP, EVENT_07H_04H) \ +__PMC_EV(UCP, EVENT_07H_08H) \ +__PMC_EV(UCP, EVENT_07H_10H) \ +__PMC_EV(UCP, EVENT_07H_20H) \ +__PMC_EV(UCP, EVENT_07H_24H) \ +__PMC_EV(UCP, EVENT_08H_01H) \ +__PMC_EV(UCP, EVENT_08H_02H) \ +__PMC_EV(UCP, EVENT_08H_04H) \ +__PMC_EV(UCP, EVENT_08H_03H) \ +__PMC_EV(UCP, EVENT_09H_01H) \ +__PMC_EV(UCP, EVENT_09H_02H) \ +__PMC_EV(UCP, EVENT_09H_04H) \ +__PMC_EV(UCP, EVENT_09H_03H) \ +__PMC_EV(UCP, EVENT_0AH_01H) \ +__PMC_EV(UCP, EVENT_0AH_02H) \ +__PMC_EV(UCP, EVENT_0AH_04H) \ +__PMC_EV(UCP, EVENT_0AH_08H) \ +__PMC_EV(UCP, EVENT_0AH_0FH) \ +__PMC_EV(UCP, EVENT_0BH_01H) \ +__PMC_EV(UCP, EVENT_0BH_02H) \ +__PMC_EV(UCP, EVENT_0BH_04H) \ +__PMC_EV(UCP, EVENT_0BH_08H) \ +__PMC_EV(UCP, EVENT_0BH_10H) \ +__PMC_EV(UCP, EVENT_0BH_1FH) \ +__PMC_EV(UCP, EVENT_0CH_01H) \ +__PMC_EV(UCP, EVENT_0CH_02H) \ +__PMC_EV(UCP, EVENT_0CH_04H) \ +__PMC_EV(UCP, EVENT_0CH_08H) \ +__PMC_EV(UCP, EVENT_20H_01H) \ +__PMC_EV(UCP, EVENT_20H_02H) \ +__PMC_EV(UCP, EVENT_20H_04H) \ +__PMC_EV(UCP, EVENT_20H_08H) \ +__PMC_EV(UCP, EVENT_20H_10H) \ +__PMC_EV(UCP, EVENT_20H_20H) \ +__PMC_EV(UCP, EVENT_21H_01H) \ +__PMC_EV(UCP, EVENT_21H_02H) \ +__PMC_EV(UCP, EVENT_21H_04H) \ +__PMC_EV(UCP, EVENT_22H_01H) \ +__PMC_EV(UCP, EVENT_22H_02H) \ +__PMC_EV(UCP, EVENT_22H_04H) \ +__PMC_EV(UCP, EVENT_23H_01H) \ +__PMC_EV(UCP, EVENT_23H_02H) \ +__PMC_EV(UCP, EVENT_23H_04H) \ +__PMC_EV(UCP, EVENT_24H_02H) \ +__PMC_EV(UCP, EVENT_24H_04H) \ +__PMC_EV(UCP, EVENT_25H_01H) \ +__PMC_EV(UCP, EVENT_25H_02H) \ +__PMC_EV(UCP, EVENT_25H_04H) \ +__PMC_EV(UCP, EVENT_26H_01H) \ +__PMC_EV(UCP, EVENT_27H_01H) \ +__PMC_EV(UCP, EVENT_27H_02H) \ +__PMC_EV(UCP, EVENT_27H_04H) \ +__PMC_EV(UCP, EVENT_27H_08H) \ +__PMC_EV(UCP, EVENT_27H_10H) \ +__PMC_EV(UCP, EVENT_27H_20H) \ +__PMC_EV(UCP, EVENT_28H_01H) \ +__PMC_EV(UCP, EVENT_28H_02H) \ +__PMC_EV(UCP, EVENT_28H_04H) \ +__PMC_EV(UCP, EVENT_28H_08H) \ +__PMC_EV(UCP, EVENT_28H_10H) \ +__PMC_EV(UCP, EVENT_28H_20H) \ +__PMC_EV(UCP, EVENT_29H_01H) \ +__PMC_EV(UCP, EVENT_29H_02H) \ +__PMC_EV(UCP, EVENT_29H_04H) \ +__PMC_EV(UCP, EVENT_29H_08H) \ +__PMC_EV(UCP, EVENT_29H_10H) \ +__PMC_EV(UCP, EVENT_29H_20H) \ +__PMC_EV(UCP, EVENT_2AH_01H) \ +__PMC_EV(UCP, EVENT_2AH_02H) \ +__PMC_EV(UCP, EVENT_2AH_04H) \ +__PMC_EV(UCP, EVENT_2AH_07H) \ +__PMC_EV(UCP, EVENT_2BH_01H) \ +__PMC_EV(UCP, EVENT_2BH_02H) \ +__PMC_EV(UCP, EVENT_2BH_04H) \ +__PMC_EV(UCP, EVENT_2BH_07H) \ +__PMC_EV(UCP, EVENT_2CH_01H) \ +__PMC_EV(UCP, EVENT_2CH_02H) \ +__PMC_EV(UCP, EVENT_2CH_04H) \ +__PMC_EV(UCP, EVENT_2CH_07H) \ +__PMC_EV(UCP, EVENT_2DH_01H) \ +__PMC_EV(UCP, EVENT_2DH_02H) \ +__PMC_EV(UCP, EVENT_2DH_04H) \ +__PMC_EV(UCP, EVENT_2DH_07H) \ +__PMC_EV(UCP, EVENT_2EH_01H) \ +__PMC_EV(UCP, EVENT_2EH_02H) \ +__PMC_EV(UCP, EVENT_2EH_04H) \ +__PMC_EV(UCP, EVENT_2EH_07H) \ +__PMC_EV(UCP, EVENT_2FH_01H) \ +__PMC_EV(UCP, EVENT_2FH_02H) \ +__PMC_EV(UCP, EVENT_2FH_04H) \ +__PMC_EV(UCP, EVENT_2FH_07H) \ +__PMC_EV(UCP, EVENT_2FH_08H) \ +__PMC_EV(UCP, EVENT_2FH_10H) \ +__PMC_EV(UCP, EVENT_2FH_20H) \ +__PMC_EV(UCP, EVENT_2FH_38H) \ +__PMC_EV(UCP, EVENT_30H_01H) \ +__PMC_EV(UCP, EVENT_30H_02H) \ +__PMC_EV(UCP, EVENT_30H_04H) \ +__PMC_EV(UCP, EVENT_30H_07H) \ +__PMC_EV(UCP, EVENT_31H_01H) \ +__PMC_EV(UCP, EVENT_31H_02H) \ +__PMC_EV(UCP, EVENT_31H_04H) \ +__PMC_EV(UCP, EVENT_31H_07H) \ +__PMC_EV(UCP, EVENT_32H_01H) \ +__PMC_EV(UCP, EVENT_32H_02H) \ +__PMC_EV(UCP, EVENT_32H_04H) \ +__PMC_EV(UCP, EVENT_32H_07H) \ +__PMC_EV(UCP, EVENT_33H_01H) \ +__PMC_EV(UCP, EVENT_33H_02H) \ +__PMC_EV(UCP, EVENT_33H_04H) \ +__PMC_EV(UCP, EVENT_33H_07H) \ +__PMC_EV(UCP, EVENT_34H_01H) \ +__PMC_EV(UCP, EVENT_34H_02H) \ +__PMC_EV(UCP, EVENT_34H_04H) \ +__PMC_EV(UCP, EVENT_34H_08H) \ +__PMC_EV(UCP, EVENT_34H_10H) \ +__PMC_EV(UCP, EVENT_34H_20H) \ +__PMC_EV(UCP, EVENT_35H_01H) \ +__PMC_EV(UCP, EVENT_35H_02H) \ +__PMC_EV(UCP, EVENT_35H_04H) \ +__PMC_EV(UCP, EVENT_40H_01H) \ +__PMC_EV(UCP, EVENT_40H_02H) \ +__PMC_EV(UCP, EVENT_40H_04H) \ +__PMC_EV(UCP, EVENT_40H_08H) \ +__PMC_EV(UCP, EVENT_40H_10H) \ +__PMC_EV(UCP, EVENT_40H_20H) \ +__PMC_EV(UCP, EVENT_40H_07H) \ +__PMC_EV(UCP, EVENT_40H_38H) \ +__PMC_EV(UCP, EVENT_41H_01H) \ +__PMC_EV(UCP, EVENT_41H_02H) \ +__PMC_EV(UCP, EVENT_41H_04H) \ +__PMC_EV(UCP, EVENT_41H_08H) \ +__PMC_EV(UCP, EVENT_41H_10H) \ +__PMC_EV(UCP, EVENT_41H_20H) \ +__PMC_EV(UCP, EVENT_41H_07H) \ +__PMC_EV(UCP, EVENT_41H_38H) \ +__PMC_EV(UCP, EVENT_42H_01H) \ +__PMC_EV(UCP, EVENT_42H_02H) \ +__PMC_EV(UCP, EVENT_42H_04H) \ +__PMC_EV(UCP, EVENT_42H_08H) \ +__PMC_EV(UCP, EVENT_43H_01H) \ +__PMC_EV(UCP, EVENT_43H_02H) \ +__PMC_EV(UCP, EVENT_60H_01H) \ +__PMC_EV(UCP, EVENT_60H_02H) \ +__PMC_EV(UCP, EVENT_60H_04H) \ +__PMC_EV(UCP, EVENT_61H_01H) \ +__PMC_EV(UCP, EVENT_61H_02H) \ +__PMC_EV(UCP, EVENT_61H_04H) \ +__PMC_EV(UCP, EVENT_62H_01H) \ +__PMC_EV(UCP, EVENT_62H_02H) \ +__PMC_EV(UCP, EVENT_62H_04H) \ +__PMC_EV(UCP, EVENT_63H_01H) \ +__PMC_EV(UCP, EVENT_63H_02H) \ +__PMC_EV(UCP, EVENT_63H_04H) \ +__PMC_EV(UCP, EVENT_63H_08H) \ +__PMC_EV(UCP, EVENT_63H_10H) \ +__PMC_EV(UCP, EVENT_63H_20H) \ +__PMC_EV(UCP, EVENT_64H_01H) \ +__PMC_EV(UCP, EVENT_64H_02H) \ +__PMC_EV(UCP, EVENT_64H_04H) \ +__PMC_EV(UCP, EVENT_64H_08H) \ +__PMC_EV(UCP, EVENT_64H_10H) \ +__PMC_EV(UCP, EVENT_64H_20H) \ +__PMC_EV(UCP, EVENT_65H_01H) \ +__PMC_EV(UCP, EVENT_65H_02H) \ +__PMC_EV(UCP, EVENT_65H_04H) \ +__PMC_EV(UCP, EVENT_66H_01H) \ +__PMC_EV(UCP, EVENT_66H_02H) \ +__PMC_EV(UCP, EVENT_66H_04H) \ +__PMC_EV(UCP, EVENT_67H_01H) \ +__PMC_EV(UCP, EVENT_80H_01H) \ +__PMC_EV(UCP, EVENT_80H_02H) \ +__PMC_EV(UCP, EVENT_80H_04H) \ +__PMC_EV(UCP, EVENT_80H_08H) \ +__PMC_EV(UCP, EVENT_81H_01H) \ +__PMC_EV(UCP, EVENT_81H_02H) \ +__PMC_EV(UCP, EVENT_81H_04H) \ +__PMC_EV(UCP, EVENT_81H_08H) \ +__PMC_EV(UCP, EVENT_82H_01H) \ +__PMC_EV(UCP, EVENT_83H_01H) \ +__PMC_EV(UCP, EVENT_83H_02H) \ +__PMC_EV(UCP, EVENT_83H_04H) \ +__PMC_EV(UCP, EVENT_83H_08H) \ +__PMC_EV(UCP, EVENT_84H_01H) \ +__PMC_EV(UCP, EVENT_84H_02H) \ +__PMC_EV(UCP, EVENT_84H_04H) \ +__PMC_EV(UCP, EVENT_84H_08H) \ +__PMC_EV(UCP, EVENT_85H_02H) \ +__PMC_EV(UCP, EVENT_86H_01H) + +#define PMC_EV_UCP_FIRST PMC_EV_UCP_EVENT_00H_01H +#define PMC_EV_UCP_LAST PMC_EV_UCP_EVENT_86H_01H + +#define __PMC_EV_ALIAS_COREI7UC() \ +__PMC_EV_ALIAS("GQ_CYCLES_FULL.READ_TRACKER", UCP_EVENT_00H_01H) \ +__PMC_EV_ALIAS("GQ_CYCLES_FULL.WRITE_TRACKER", UCP_EVENT_00H_02H) \ +__PMC_EV_ALIAS("GQ_CYCLES_FULL.PEER_PROBE_TRACKER", UCP_EVENT_00H_04H) \ +__PMC_EV_ALIAS("GQ_CYCLES_NOT_EMPTY.READ_TRACKER", UCP_EVENT_01H_01H) \ +__PMC_EV_ALIAS("GQ_CYCLES_NOT_EMPTY.WRITE_TRACKER", UCP_EVENT_01H_02H) \ +__PMC_EV_ALIAS("GQ_CYCLES_NOT_EMPTY.PEER_PROBE_TRACKER", UCP_EVENT_01H_04H) \ +__PMC_EV_ALIAS("GQ_ALLOC.READ_TRACKER", UCP_EVENT_03H_01H) \ +__PMC_EV_ALIAS("GQ_ALLOC.RT_L3_MISS", UCP_EVENT_03H_02H) \ +__PMC_EV_ALIAS("GQ_ALLOC.RT_TO_L3_RESP", UCP_EVENT_03H_04H) \ +__PMC_EV_ALIAS("GQ_ALLOC.RT_TO_RTID_ACQUIRED", UCP_EVENT_03H_08H) \ +__PMC_EV_ALIAS("GQ_ALLOC.WT_TO_RTID_ACQUIRED", UCP_EVENT_03H_10H) \ +__PMC_EV_ALIAS("GQ_ALLOC.WRITE_TRACKER", UCP_EVENT_03H_20H) \ +__PMC_EV_ALIAS("GQ_ALLOC.PEER_PROBE_TRACKER", UCP_EVENT_03H_40H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_QPI", UCP_EVENT_04H_01H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_QMC", UCP_EVENT_04H_02H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_L3", UCP_EVENT_04H_04H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_CORES_02", UCP_EVENT_04H_08H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_CORES_13", UCP_EVENT_04H_10H) \ +__PMC_EV_ALIAS("GQ_DATA.TO_QPI_QMC", UCP_EVENT_05H_01H) \ +__PMC_EV_ALIAS("GQ_DATA.TO_L3", UCP_EVENT_05H_02H) \ +__PMC_EV_ALIAS("GQ_DATA.TO_CORES", UCP_EVENT_05H_04H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.I_STATE", UCP_EVENT_06H_01H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.S_STATE", UCP_EVENT_06H_02H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.FWD_S_STATE", UCP_EVENT_06H_04H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.FWD_I_STATE", UCP_EVENT_06H_08H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.CONFLICT", UCP_EVENT_06H_10H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.WB", UCP_EVENT_06H_20H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.I_STATE", UCP_EVENT_07H_01H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.S_STATE", UCP_EVENT_07H_02H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.FWD_S_STATE", UCP_EVENT_07H_04H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.FWD_I_STATE", UCP_EVENT_07H_08H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.CONFLICT", UCP_EVENT_07H_10H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.WB", UCP_EVENT_07H_20H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.HITM", UCP_EVENT_07H_24H) \ +__PMC_EV_ALIAS("L3_HITS.READ", UCP_EVENT_08H_01H) \ +__PMC_EV_ALIAS("L3_HITS.WRITE", UCP_EVENT_08H_02H) \ +__PMC_EV_ALIAS("L3_HITS.PROBE", UCP_EVENT_08H_04H) \ +__PMC_EV_ALIAS("L3_HITS.ANY", UCP_EVENT_08H_03H) \ +__PMC_EV_ALIAS("L3_MISS.READ", UCP_EVENT_09H_01H) \ +__PMC_EV_ALIAS("L3_MISS.WRITE", UCP_EVENT_09H_02H) \ +__PMC_EV_ALIAS("L3_MISS.PROBE", UCP_EVENT_09H_04H) \ +__PMC_EV_ALIAS("L3_MISS.ANY", UCP_EVENT_09H_03H) \ +__PMC_EV_ALIAS("L3_LINES_IN.M_STATE", UCP_EVENT_0AH_01H) \ +__PMC_EV_ALIAS("L3_LINES_IN.E_STATE", UCP_EVENT_0AH_02H) \ +__PMC_EV_ALIAS("L3_LINES_IN.S_STATE", UCP_EVENT_0AH_04H) \ +__PMC_EV_ALIAS("L3_LINES_IN.F_STATE", UCP_EVENT_0AH_08H) \ +__PMC_EV_ALIAS("L3_LINES_IN.ANY", UCP_EVENT_0AH_0FH) \ +__PMC_EV_ALIAS("L3_LINES_OUT.M_STATE", UCP_EVENT_0BH_01H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.E_STATE", UCP_EVENT_0BH_02H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.S_STATE", UCP_EVENT_0BH_04H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.I_STATE", UCP_EVENT_0BH_08H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.F_STATE", UCP_EVENT_0BH_10H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.ANY", UCP_EVENT_0BH_1FH) \ +__PMC_EV_ALIAS("QHL_REQUESTS.IOH_READS", UCP_EVENT_20H_01H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.IOH_WRITES", UCP_EVENT_20H_02H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.REMOTE_READS", UCP_EVENT_20H_04H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.REMOTE_WRITES", UCP_EVENT_20H_08H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.LOCAL_READS", UCP_EVENT_20H_10H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.LOCAL_WRITES", UCP_EVENT_20H_20H) \ +__PMC_EV_ALIAS("QHL_CYCLES_FULL.IOH", UCP_EVENT_21H_01H) \ +__PMC_EV_ALIAS("QHL_CYCLES_FULL.REMOTE", UCP_EVENT_21H_02H) \ +__PMC_EV_ALIAS("QHL_CYCLES_FULL.LOCAL", UCP_EVENT_21H_04H) \ +__PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.IOH", UCP_EVENT_22H_01H) \ +__PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.REMOTE", UCP_EVENT_22H_02H) \ +__PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.LOCAL", UCP_EVENT_22H_04H) \ +__PMC_EV_ALIAS("QHL_OCCUPANCY.IOH", UCP_EVENT_23H_01H) \ +__PMC_EV_ALIAS("QHL_OCCUPANCY.REMOTE", UCP_EVENT_23H_02H) \ +__PMC_EV_ALIAS("QHL_OCCUPANCY.LOCAL", UCP_EVENT_23H_04H) \ +__PMC_EV_ALIAS("QHL_ADDRESS_CONFLICTS.2WAY", UCP_EVENT_24H_02H) \ +__PMC_EV_ALIAS("QHL_ADDRESS_CONFLICTS.3WAY", UCP_EVENT_24H_04H) \ +__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.IOH", UCP_EVENT_25H_01H) \ +__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.REMOTE", UCP_EVENT_25H_02H) \ +__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.LOCAL", UCP_EVENT_25H_04H) \ +__PMC_EV_ALIAS("QHL_TO_QMC_BYPASS", UCP_EVENT_26H_01H) \ +__PMC_EV_ALIAS("QMC_NORMAL_FULL.READ.CH0", UCP_EVENT_27H_01H) \ +__PMC_EV_ALIAS("QMC_NORMAL_FULL.READ.CH1", UCP_EVENT_27H_02H) \ +__PMC_EV_ALIAS("QMC_NORMAL_FULL.READ.CH2", UCP_EVENT_27H_04H) \ +__PMC_EV_ALIAS("QMC_NORMAL_FULL.WRITE.CH0", UCP_EVENT_27H_08H) \ +__PMC_EV_ALIAS("QMC_NORMAL_FULL.WRITE.CH1", UCP_EVENT_27H_10H) \ +__PMC_EV_ALIAS("QMC_NORMAL_FULL.WRITE.CH2", UCP_EVENT_27H_20H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH0", UCP_EVENT_28H_01H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH1", UCP_EVENT_28H_02H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH2", UCP_EVENT_28H_04H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH0", UCP_EVENT_28H_08H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH1", UCP_EVENT_28H_10H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH2", UCP_EVENT_28H_20H) \ +__PMC_EV_ALIAS("QMC_BUSY.READ.CH0", UCP_EVENT_29H_01H) \ +__PMC_EV_ALIAS("QMC_BUSY.READ.CH1", UCP_EVENT_29H_02H) \ +__PMC_EV_ALIAS("QMC_BUSY.READ.CH2", UCP_EVENT_29H_04H) \ +__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH0", UCP_EVENT_29H_08H) \ +__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH1", UCP_EVENT_29H_10H) \ +__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH2", UCP_EVENT_29H_20H) \ +__PMC_EV_ALIAS("QMC_OCCUPANCY.CH0", UCP_EVENT_2AH_01H) \ +__PMC_EV_ALIAS("QMC_OCCUPANCY.CH1", UCP_EVENT_2AH_02H) \ +__PMC_EV_ALIAS("QMC_OCCUPANCY.CH2", UCP_EVENT_2AH_04H) \ +__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH0", UCP_EVENT_2BH_01H) \ +__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH1", UCP_EVENT_2BH_02H) \ +__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH2", UCP_EVENT_2BH_04H) \ +__PMC_EV_ALIAS("QMC_ISSOC_READS.ANY", UCP_EVENT_2BH_07H) \ +__PMC_EV_ALIAS("QMC_NORMAL_READS.CH0", UCP_EVENT_2CH_01H) \ +__PMC_EV_ALIAS("QMC_NORMAL_READS.CH1", UCP_EVENT_2CH_02H) \ +__PMC_EV_ALIAS("QMC_NORMAL_READS.CH2", UCP_EVENT_2CH_04H) \ +__PMC_EV_ALIAS("QMC_NORMAL_READS.ANY", UCP_EVENT_2CH_07H) \ +__PMC_EV_ALIAS("QMC_HIGH_PRIORITY_READS.CH0", UCP_EVENT_2DH_01H) \ +__PMC_EV_ALIAS("QMC_HIGH_PRIORITY_READS.CH1", UCP_EVENT_2DH_02H) \ +__PMC_EV_ALIAS("QMC_HIGH_PRIORITY_READS.CH2", UCP_EVENT_2DH_04H) \ +__PMC_EV_ALIAS("QMC_HIGH_PRIORITY_READS.ANY", UCP_EVENT_2DH_07H) \ +__PMC_EV_ALIAS("QMC_CRITICAL_PRIORITY_READS.CH0", UCP_EVENT_2EH_01H) \ +__PMC_EV_ALIAS("QMC_CRITICAL_PRIORITY_READS.CH1", UCP_EVENT_2EH_02H) \ +__PMC_EV_ALIAS("QMC_CRITICAL_PRIORITY_READS.CH2", UCP_EVENT_2EH_04H) \ +__PMC_EV_ALIAS("QMC_CRITICAL_PRIORITY_READS.ANY", UCP_EVENT_2EH_07H) \ +__PMC_EV_ALIAS("QMC_WRITES.FULL.CH0", UCP_EVENT_2FH_01H) \ +__PMC_EV_ALIAS("QMC_WRITES.FULL.CH1", UCP_EVENT_2FH_02H) \ +__PMC_EV_ALIAS("QMC_WRITES.FULL.CH2", UCP_EVENT_2FH_04H) \ +__PMC_EV_ALIAS("QMC_WRITES.FULL.ANY", UCP_EVENT_2FH_07H) \ +__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH0", UCP_EVENT_2FH_08H) \ +__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH1", UCP_EVENT_2FH_10H) \ +__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH2", UCP_EVENT_2FH_20H) \ +__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.ANY", UCP_EVENT_2FH_38H) \ +__PMC_EV_ALIAS("QMC_CANCEL.CH0", UCP_EVENT_30H_01H) \ +__PMC_EV_ALIAS("QMC_CANCEL.CH1", UCP_EVENT_30H_02H) \ +__PMC_EV_ALIAS("QMC_CANCEL.CH2", UCP_EVENT_30H_04H) \ +__PMC_EV_ALIAS("QMC_CANCEL.ANY", UCP_EVENT_30H_07H) \ +__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH0", UCP_EVENT_31H_01H) \ +__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH1", UCP_EVENT_31H_02H) \ +__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH2", UCP_EVENT_31H_04H) \ +__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.ANY", UCP_EVENT_31H_07H) \ +__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.LOCAL", UCP_EVENT_33H_04H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.HOME.LINK_0", UCP_EVENT_40H_01H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.SNOOP.LINK_0", UCP_EVENT_40H_02H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.NDR.LINK_0", UCP_EVENT_40H_04H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.HOME.LINK_1", UCP_EVENT_40H_08H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.SNOOP.LINK_1", UCP_EVENT_40H_10H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.NDR.LINK_1", UCP_EVENT_40H_20H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.LINK_0", UCP_EVENT_40H_07H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.LINK_1", UCP_EVENT_40H_38H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.DRS.LINK_0", UCP_EVENT_41H_01H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCB.LINK_0", UCP_EVENT_41H_02H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCS.LINK_0", UCP_EVENT_41H_04H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.DRS.LINK_1", UCP_EVENT_41H_08H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCB.LINK_1", UCP_EVENT_41H_10H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCS.LINK_1", UCP_EVENT_41H_20H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.LINK_0", UCP_EVENT_41H_07H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.LINK_1", UCP_EVENT_41H_38H) \ +__PMC_EV_ALIAS("QPI_TX_HEADER.BUSY.LINK_0", UCP_EVENT_42H_02H) \ +__PMC_EV_ALIAS("QPI_TX_HEADER.BUSY.LINK_1", UCP_EVENT_42H_08H) \ +__PMC_EV_ALIAS("QPI_RX_NO_PPT_CREDIT.STALLS.LINK_0", UCP_EVENT_43H_01H) \ +__PMC_EV_ALIAS("QPI_RX_NO_PPT_CREDIT.STALLS.LINK_1", UCP_EVENT_43H_02H) \ +__PMC_EV_ALIAS("DRAM_OPEN.CH0", UCP_EVENT_60H_01H) \ +__PMC_EV_ALIAS("DRAM_OPEN.CH1", UCP_EVENT_60H_02H) \ +__PMC_EV_ALIAS("DRAM_OPEN.CH2", UCP_EVENT_60H_04H) \ +__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH0", UCP_EVENT_61H_01H) \ +__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH1", UCP_EVENT_61H_02H) \ +__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH2", UCP_EVENT_61H_04H) \ +__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH0", UCP_EVENT_62H_01H) \ +__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH1", UCP_EVENT_62H_02H) \ +__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH2", UCP_EVENT_62H_04H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.CH0", UCP_EVENT_63H_01H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH0", UCP_EVENT_63H_02H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.CH1", UCP_EVENT_63H_04H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH1", UCP_EVENT_63H_08H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.CH2", UCP_EVENT_63H_10H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH2", UCP_EVENT_63H_20H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH0", UCP_EVENT_64H_01H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH0", UCP_EVENT_64H_02H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH1", UCP_EVENT_64H_04H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH1", UCP_EVENT_64H_08H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH2", UCP_EVENT_64H_10H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH2", UCP_EVENT_64H_20H) \ +__PMC_EV_ALIAS("DRAM_REFRESH.CH0", UCP_EVENT_65H_01H) \ +__PMC_EV_ALIAS("DRAM_REFRESH.CH1", UCP_EVENT_65H_02H) \ +__PMC_EV_ALIAS("DRAM_REFRESH.CH2", UCP_EVENT_65H_04H) \ +__PMC_EV_ALIAS("DRAM_PRE_ALL.CH0", UCP_EVENT_66H_01H) \ +__PMC_EV_ALIAS("DRAM_PRE_ALL.CH1", UCP_EVENT_66H_02H) \ +__PMC_EV_ALIAS("DRAM_PRE_ALL.CH2", UCP_EVENT_66H_04H) + +#define __PMC_EV_ALIAS_WESTMEREUC() \ +__PMC_EV_ALIAS("GQ_CYCLES_FULL.READ_TRACKER", UCP_EVENT_00H_01H) \ +__PMC_EV_ALIAS("GQ_CYCLES_FULL.WRITE_TRACKER", UCP_EVENT_00H_02H) \ +__PMC_EV_ALIAS("GQ_CYCLES_FULL.PEER_PROBE_TRACKER", UCP_EVENT_00H_04H) \ +__PMC_EV_ALIAS("GQ_CYCLES_NOT_EMPTY.READ_TRACKER", UCP_EVENT_01H_01H) \ +__PMC_EV_ALIAS("GQ_CYCLES_NOT_EMPTY.WRITE_TRACKER", UCP_EVENT_01H_02H) \ +__PMC_EV_ALIAS("GQ_CYCLES_NOT_EMPTY.PEER_PROBE_TRACKER", UCP_EVENT_01H_04H) \ +__PMC_EV_ALIAS("GQ_OCCUPANCY.READ_TRACKER", UCP_EVENT_02H_01H) \ +__PMC_EV_ALIAS("GQ_ALLOC.READ_TRACKER", UCP_EVENT_03H_01H) \ +__PMC_EV_ALIAS("GQ_ALLOC.RT_L3_MISS", UCP_EVENT_03H_02H) \ +__PMC_EV_ALIAS("GQ_ALLOC.RT_TO_L3_RESP", UCP_EVENT_03H_04H) \ +__PMC_EV_ALIAS("GQ_ALLOC.RT_TO_RTID_ACQUIRED", UCP_EVENT_03H_08H) \ +__PMC_EV_ALIAS("GQ_ALLOC.WT_TO_RTID_ACQUIRED", UCP_EVENT_03H_10H) \ +__PMC_EV_ALIAS("GQ_ALLOC.WRITE_TRACKER", UCP_EVENT_03H_20H) \ +__PMC_EV_ALIAS("GQ_ALLOC.PEER_PROBE_TRACKER", UCP_EVENT_03H_40H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_QPI", UCP_EVENT_04H_01H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_QMC", UCP_EVENT_04H_02H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_L3", UCP_EVENT_04H_04H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_CORES_02", UCP_EVENT_04H_08H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_CORES_13", UCP_EVENT_04H_10H) \ +__PMC_EV_ALIAS("GQ_DATA.TO_QPI_QMC", UCP_EVENT_05H_01H) \ +__PMC_EV_ALIAS("GQ_DATA.TO_L3", UCP_EVENT_05H_02H) \ +__PMC_EV_ALIAS("GQ_DATA.TO_CORES", UCP_EVENT_05H_04H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.I_STATE", UCP_EVENT_06H_01H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.S_STATE", UCP_EVENT_06H_02H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.FWD_S_STATE", UCP_EVENT_06H_04H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.FWD_I_STATE", UCP_EVENT_06H_08H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.CONFLICT", UCP_EVENT_06H_10H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.WB", UCP_EVENT_06H_20H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.I_STATE", UCP_EVENT_07H_01H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.S_STATE", UCP_EVENT_07H_02H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.FWD_S_STATE", UCP_EVENT_07H_04H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.FWD_I_STATE", UCP_EVENT_07H_08H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.CONFLICT", UCP_EVENT_07H_10H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.WB", UCP_EVENT_07H_20H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.HITM", UCP_EVENT_07H_24H) \ +__PMC_EV_ALIAS("L3_HITS.READ", UCP_EVENT_08H_01H) \ +__PMC_EV_ALIAS("L3_HITS.WRITE", UCP_EVENT_08H_02H) \ +__PMC_EV_ALIAS("L3_HITS.PROBE", UCP_EVENT_08H_04H) \ +__PMC_EV_ALIAS("L3_HITS.ANY", UCP_EVENT_08H_03H) \ +__PMC_EV_ALIAS("L3_MISS.READ", UCP_EVENT_09H_01H) \ +__PMC_EV_ALIAS("L3_MISS.WRITE", UCP_EVENT_09H_02H) \ +__PMC_EV_ALIAS("L3_MISS.PROBE", UCP_EVENT_09H_04H) \ +__PMC_EV_ALIAS("L3_MISS.ANY", UCP_EVENT_09H_03H) \ +__PMC_EV_ALIAS("L3_LINES_IN.M_STATE", UCP_EVENT_0AH_01H) \ +__PMC_EV_ALIAS("L3_LINES_IN.E_STATE", UCP_EVENT_0AH_02H) \ +__PMC_EV_ALIAS("L3_LINES_IN.S_STATE", UCP_EVENT_0AH_04H) \ +__PMC_EV_ALIAS("L3_LINES_IN.F_STATE", UCP_EVENT_0AH_08H) \ +__PMC_EV_ALIAS("L3_LINES_IN.ANY", UCP_EVENT_0AH_0FH) \ +__PMC_EV_ALIAS("L3_LINES_OUT.M_STATE", UCP_EVENT_0BH_01H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.E_STATE", UCP_EVENT_0BH_02H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.S_STATE", UCP_EVENT_0BH_04H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.I_STATE", UCP_EVENT_0BH_08H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.F_STATE", UCP_EVENT_0BH_10H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.ANY", UCP_EVENT_0BH_1FH) \ +__PMC_EV_ALIAS("GQ_SNOOP.GOTO_S", UCP_EVENT_0CH_01H) \ +__PMC_EV_ALIAS("GQ_SNOOP.GOTO_I", UCP_EVENT_0CH_02H) \ +__PMC_EV_ALIAS("GQ_SNOOP.GOTO_S_HIT", UCP_EVENT_0CH_04H) \ +__PMC_EV_ALIAS("GQ_SNOOP.GOTO_I_HIT", UCP_EVENT_0CH_08H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.IOH_READS", UCP_EVENT_20H_01H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.IOH_WRITES", UCP_EVENT_20H_02H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.REMOTE_READS", UCP_EVENT_20H_04H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.REMOTE_WRITES", UCP_EVENT_20H_08H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.LOCAL_READS", UCP_EVENT_20H_10H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.LOCAL_WRITES", UCP_EVENT_20H_20H) \ +__PMC_EV_ALIAS("QHL_CYCLES_FULL.IOH", UCP_EVENT_21H_01H) \ +__PMC_EV_ALIAS("QHL_CYCLES_FULL.REMOTE", UCP_EVENT_21H_02H) \ +__PMC_EV_ALIAS("QHL_CYCLES_FULL.LOCAL", UCP_EVENT_21H_04H) \ +__PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.IOH", UCP_EVENT_22H_01H) \ +__PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.REMOTE", UCP_EVENT_22H_02H) \ +__PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.LOCAL", UCP_EVENT_22H_04H) \ +__PMC_EV_ALIAS("QHL_OCCUPANCY.IOH", UCP_EVENT_23H_01H) \ +__PMC_EV_ALIAS("QHL_OCCUPANCY.REMOTE", UCP_EVENT_23H_02H) \ +__PMC_EV_ALIAS("QHL_OCCUPANCY.LOCAL", UCP_EVENT_23H_04H) \ +__PMC_EV_ALIAS("QHL_ADDRESS_CONFLICTS.2WAY", UCP_EVENT_24H_02H) \ +__PMC_EV_ALIAS("QHL_ADDRESS_CONFLICTS.3WAY", UCP_EVENT_24H_04H) \ +__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.IOH", UCP_EVENT_25H_01H) \ +__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.REMOTE", UCP_EVENT_25H_02H) \ +__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.LOCAL", UCP_EVENT_25H_04H) \ +__PMC_EV_ALIAS("QHL_TO_QMC_BYPASS", UCP_EVENT_26H_01H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH0", UCP_EVENT_28H_01H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH1", UCP_EVENT_28H_02H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH2", UCP_EVENT_28H_04H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH0", UCP_EVENT_28H_08H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH1", UCP_EVENT_28H_10H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH2", UCP_EVENT_28H_20H) \ +__PMC_EV_ALIAS("QMC_BUSY.READ.CH0", UCP_EVENT_29H_01H) \ +__PMC_EV_ALIAS("QMC_BUSY.READ.CH1", UCP_EVENT_29H_02H) \ +__PMC_EV_ALIAS("QMC_BUSY.READ.CH2", UCP_EVENT_29H_04H) \ +__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH0", UCP_EVENT_29H_08H) \ +__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH1", UCP_EVENT_29H_10H) \ +__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH2", UCP_EVENT_29H_20H) \ +__PMC_EV_ALIAS("QMC_OCCUPANCY.CH0", UCP_EVENT_2AH_01H) \ +__PMC_EV_ALIAS("QMC_OCCUPANCY.CH1", UCP_EVENT_2AH_02H) \ +__PMC_EV_ALIAS("QMC_OCCUPANCY.CH2", UCP_EVENT_2AH_04H) \ +__PMC_EV_ALIAS("QMC_OCCUPANCY.ANY", UCP_EVENT_2AH_07H) \ +__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH0", UCP_EVENT_2BH_01H) \ +__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH1", UCP_EVENT_2BH_02H) \ +__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH2", UCP_EVENT_2BH_04H) \ +__PMC_EV_ALIAS("QMC_ISSOC_READS.ANY", UCP_EVENT_2BH_07H) \ +__PMC_EV_ALIAS("QMC_NORMAL_READS.CH0", UCP_EVENT_2CH_01H) \ +__PMC_EV_ALIAS("QMC_NORMAL_READS.CH1", UCP_EVENT_2CH_02H) \ +__PMC_EV_ALIAS("QMC_NORMAL_READS.CH2", UCP_EVENT_2CH_04H) \ +__PMC_EV_ALIAS("QMC_NORMAL_READS.ANY", UCP_EVENT_2CH_07H) \ +__PMC_EV_ALIAS("QMC_HIGH_PRIORITY_READS.CH0", UCP_EVENT_2DH_01H) \ +__PMC_EV_ALIAS("QMC_HIGH_PRIORITY_READS.CH1", UCP_EVENT_2DH_02H) \ +__PMC_EV_ALIAS("QMC_HIGH_PRIORITY_READS.CH2", UCP_EVENT_2DH_04H) \ +__PMC_EV_ALIAS("QMC_HIGH_PRIORITY_READS.ANY", UCP_EVENT_2DH_07H) \ +__PMC_EV_ALIAS("QMC_CRITICAL_PRIORITY_READS.CH0", UCP_EVENT_2EH_01H) \ +__PMC_EV_ALIAS("QMC_CRITICAL_PRIORITY_READS.CH1", UCP_EVENT_2EH_02H) \ +__PMC_EV_ALIAS("QMC_CRITICAL_PRIORITY_READS.CH2", UCP_EVENT_2EH_04H) \ +__PMC_EV_ALIAS("QMC_CRITICAL_PRIORITY_READS.ANY", UCP_EVENT_2EH_07H) \ +__PMC_EV_ALIAS("QMC_WRITES.FULL.CH0", UCP_EVENT_2FH_01H) \ +__PMC_EV_ALIAS("QMC_WRITES.FULL.CH1", UCP_EVENT_2FH_02H) \ +__PMC_EV_ALIAS("QMC_WRITES.FULL.CH2", UCP_EVENT_2FH_04H) \ +__PMC_EV_ALIAS("QMC_WRITES.FULL.ANY", UCP_EVENT_2FH_07H) \ +__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH0", UCP_EVENT_2FH_08H) \ +__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH1", UCP_EVENT_2FH_10H) \ +__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH2", UCP_EVENT_2FH_20H) \ +__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.ANY", UCP_EVENT_2FH_38H) \ +__PMC_EV_ALIAS("QMC_CANCEL.CH0", UCP_EVENT_30H_01H) \ +__PMC_EV_ALIAS("QMC_CANCEL.CH1", UCP_EVENT_30H_02H) \ +__PMC_EV_ALIAS("QMC_CANCEL.CH2", UCP_EVENT_30H_04H) \ +__PMC_EV_ALIAS("QMC_CANCEL.ANY", UCP_EVENT_30H_07H) \ +__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH0", UCP_EVENT_31H_01H) \ +__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH1", UCP_EVENT_31H_02H) \ +__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH2", UCP_EVENT_31H_04H) \ +__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.ANY", UCP_EVENT_31H_07H) \ +__PMC_EV_ALIAS("IMC_RETRY.CH0", UCP_EVENT_32H_01H) \ +__PMC_EV_ALIAS("IMC_RETRY.CH1", UCP_EVENT_32H_02H) \ +__PMC_EV_ALIAS("IMC_RETRY.CH2", UCP_EVENT_32H_04H) \ +__PMC_EV_ALIAS("IMC_RETRY.ANY", UCP_EVENT_32H_07H) \ +__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.IOH", UCP_EVENT_33H_01H) \ +__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.REMOTE", UCP_EVENT_33H_02H) \ +__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.LOCAL", UCP_EVENT_33H_04H) \ +__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.ANY", UCP_EVENT_33H_07H) \ +__PMC_EV_ALIAS("QHL_SLEEPS.IOH_ORDER", UCP_EVENT_34H_01H) \ +__PMC_EV_ALIAS("QHL_SLEEPS.REMOTE_ORDER", UCP_EVENT_34H_02H) \ +__PMC_EV_ALIAS("QHL_SLEEPS.LOCAL_ORDER", UCP_EVENT_34H_04H) \ +__PMC_EV_ALIAS("QHL_SLEEPS.IOH_CONFLICT", UCP_EVENT_34H_08H) \ +__PMC_EV_ALIAS("QHL_SLEEPS.REMOTE_CONFLICT", UCP_EVENT_34H_10H) \ +__PMC_EV_ALIAS("QHL_SLEEPS.LOCAL_CONFLICT", UCP_EVENT_34H_20H) \ +__PMC_EV_ALIAS("ADDR_OPCODE_MATCH.IOH", UCP_EVENT_35H_01H) \ +__PMC_EV_ALIAS("ADDR_OPCODE_MATCH.REMOTE", UCP_EVENT_35H_02H) \ +__PMC_EV_ALIAS("ADDR_OPCODE_MATCH.LOCAL", UCP_EVENT_35H_04H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.HOME.LINK_0", UCP_EVENT_40H_01H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.SNOOP.LINK_0", UCP_EVENT_40H_02H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.NDR.LINK_0", UCP_EVENT_40H_04H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.HOME.LINK_1", UCP_EVENT_40H_08H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.SNOOP.LINK_1", UCP_EVENT_40H_10H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.NDR.LINK_1", UCP_EVENT_40H_20H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.LINK_0", UCP_EVENT_40H_07H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.LINK_1", UCP_EVENT_40H_38H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.DRS.LINK_0", UCP_EVENT_41H_01H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCB.LINK_0", UCP_EVENT_41H_02H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCS.LINK_0", UCP_EVENT_41H_04H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.DRS.LINK_1", UCP_EVENT_41H_08H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCB.LINK_1", UCP_EVENT_41H_10H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCS.LINK_1", UCP_EVENT_41H_20H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.LINK_0", UCP_EVENT_41H_07H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.LINK_1", UCP_EVENT_41H_38H) \ +__PMC_EV_ALIAS("QPI_TX_HEADER.FULL.LINK_0", UCP_EVENT_42H_01H) \ +__PMC_EV_ALIAS("QPI_TX_HEADER.BUSY.LINK_0", UCP_EVENT_42H_02H) \ +__PMC_EV_ALIAS("QPI_TX_HEADER.FULL.LINK_1", UCP_EVENT_42H_04H) \ +__PMC_EV_ALIAS("QPI_TX_HEADER.BUSY.LINK_1", UCP_EVENT_42H_08H) \ +__PMC_EV_ALIAS("QPI_RX_NO_PPT_CREDIT.STALLS.LINK_0", UCP_EVENT_43H_01H) \ +__PMC_EV_ALIAS("QPI_RX_NO_PPT_CREDIT.STALLS.LINK_1", UCP_EVENT_43H_02H) \ +__PMC_EV_ALIAS("DRAM_OPEN.CH0", UCP_EVENT_60H_01H) \ +__PMC_EV_ALIAS("DRAM_OPEN.CH1", UCP_EVENT_60H_02H) \ +__PMC_EV_ALIAS("DRAM_OPEN.CH2", UCP_EVENT_60H_04H) \ +__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH0", UCP_EVENT_61H_01H) \ +__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH1", UCP_EVENT_61H_02H) \ +__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH2", UCP_EVENT_61H_04H) \ +__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH0", UCP_EVENT_62H_01H) \ +__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH1", UCP_EVENT_62H_02H) \ +__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH2", UCP_EVENT_62H_04H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.CH0", UCP_EVENT_63H_01H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH0", UCP_EVENT_63H_02H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.CH1", UCP_EVENT_63H_04H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH1", UCP_EVENT_63H_08H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.CH2", UCP_EVENT_63H_10H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH2", UCP_EVENT_63H_20H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH0", UCP_EVENT_64H_01H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH0", UCP_EVENT_64H_02H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH1", UCP_EVENT_64H_04H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH1", UCP_EVENT_64H_08H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH2", UCP_EVENT_64H_10H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH2", UCP_EVENT_64H_20H) \ +__PMC_EV_ALIAS("DRAM_REFRESH.CH0", UCP_EVENT_65H_01H) \ +__PMC_EV_ALIAS("DRAM_REFRESH.CH1", UCP_EVENT_65H_02H) \ +__PMC_EV_ALIAS("DRAM_REFRESH.CH2", UCP_EVENT_65H_04H) \ +__PMC_EV_ALIAS("DRAM_PRE_ALL.CH0", UCP_EVENT_66H_01H) \ +__PMC_EV_ALIAS("DRAM_PRE_ALL.CH1", UCP_EVENT_66H_02H) \ +__PMC_EV_ALIAS("DRAM_PRE_ALL.CH2", UCP_EVENT_66H_04H) \ +__PMC_EV_ALIAS("DRAM_THERMAL_THROTTLED", UCP_EVENT_67H_01H) \ +__PMC_EV_ALIAS("THERMAL_THROTTLING_TEMP.CORE_0", UCP_EVENT_80H_01H) \ +__PMC_EV_ALIAS("THERMAL_THROTTLING_TEMP.CORE_1", UCP_EVENT_80H_02H) \ +__PMC_EV_ALIAS("THERMAL_THROTTLING_TEMP.CORE_2", UCP_EVENT_80H_04H) \ +__PMC_EV_ALIAS("THERMAL_THROTTLING_TEMP.CORE_3", UCP_EVENT_80H_08H) \ +__PMC_EV_ALIAS("THERMAL_THROTTLED_TEMP.CORE_0", UCP_EVENT_81H_01H) \ +__PMC_EV_ALIAS("THERMAL_THROTTLED_TEMP.CORE_1", UCP_EVENT_81H_02H) \ +__PMC_EV_ALIAS("THERMAL_THROTTLED_TEMP.CORE_2", UCP_EVENT_81H_04H) \ +__PMC_EV_ALIAS("THERMAL_THROTTLED_TEMP.CORE_3", UCP_EVENT_81H_08H) \ +__PMC_EV_ALIAS("PROCHOT_ASSERTION", UCP_EVENT_82H_01H) \ +__PMC_EV_ALIAS("THERMAL_THROTTLING_PROCHOT.CORE_0", UCP_EVENT_83H_01H) \ +__PMC_EV_ALIAS("THERMAL_THROTTLING_PROCHOT.CORE_1", UCP_EVENT_83H_02H) \ +__PMC_EV_ALIAS("THERMAL_THROTTLING_PROCHOT.CORE_2", UCP_EVENT_83H_04H) \ +__PMC_EV_ALIAS("THERMAL_THROTTLING_PROCHOT.CORE_3", UCP_EVENT_83H_08H) \ +__PMC_EV_ALIAS("TURBO_MODE.CORE_0", UCP_EVENT_84H_01H) \ +__PMC_EV_ALIAS("TURBO_MODE.CORE_1", UCP_EVENT_84H_02H) \ +__PMC_EV_ALIAS("TURBO_MODE.CORE_2", UCP_EVENT_84H_04H) \ +__PMC_EV_ALIAS("TURBO_MODE.CORE_3", UCP_EVENT_84H_08H) \ +__PMC_EV_ALIAS("CYCLES_UNHALTED_L3_FLL_ENABLE", UCP_EVENT_85H_02H) \ +__PMC_EV_ALIAS("CYCLES_UNHALTED_L3_FLL_DISABLE", UCP_EVENT_86H_01H) /* * Intel XScale events from: @@ -2165,10 +3132,14 @@ __PMC_EV_ALIAS("SIMD_INT_64.SHUFFLE_MOVE", IAP_EVENT_FDH_40H) __PMC_EV_P6() \ __PMC_EV_BLOCK(XSCALE, 0x11200) \ __PMC_EV_XSCALE() \ - __PMC_EV_BLOCK(MIPS24K, 0x11300) \ - __PMC_EV_MIPS24K() + __PMC_EV_BLOCK(MIPS24K, 0x11300) \ + __PMC_EV_MIPS24K() \ + __PMC_EV_BLOCK(UCF, 0x12000) \ + __PMC_EV_UCF() \ + __PMC_EV_BLOCK(UCP, 0x12080) \ + __PMC_EV_UCP() \ #define PMC_EVENT_FIRST PMC_EV_TSC_TSC -#define PMC_EVENT_LAST PMC_EV_24K_LAST +#define PMC_EVENT_LAST PMC_EV_UCP_LAST #endif /* _DEV_HWPMC_PMC_EVENTS_H_ */ diff --git a/sys/i386/include/pmc_mdep.h b/sys/i386/include/pmc_mdep.h index 4389a20..9209a2b 100644 --- a/sys/i386/include/pmc_mdep.h +++ b/sys/i386/include/pmc_mdep.h @@ -49,6 +49,8 @@ struct pmc_mdep; * PENTIUM Intel Pentium MMX. * IAP Intel Core/Core2/Atom programmable PMCs. * IAF Intel fixed-function PMCs. + * UCP Intel Uncore programmable PMCs. + * UCF Intel Uncore fixed-function PMCs. */ #include <dev/hwpmc/hwpmc_amd.h> /* K7 and K8 */ @@ -57,11 +59,12 @@ struct pmc_mdep; #include <dev/hwpmc/hwpmc_ppro.h> #include <dev/hwpmc/hwpmc_pentium.h> #include <dev/hwpmc/hwpmc_tsc.h> +#include <dev/hwpmc/hwpmc_uncore.h> /* * Intel processors implementing V2 and later of the Intel performance * measurement architecture have PMCs of the following classes: TSC, - * IAF and IAP. + * IAF, IAP, UCF and UCP. */ #define PMC_MDEP_CLASS_INDEX_TSC 0 #define PMC_MDEP_CLASS_INDEX_K7 1 @@ -71,6 +74,8 @@ struct pmc_mdep; #define PMC_MDEP_CLASS_INDEX_P6 1 #define PMC_MDEP_CLASS_INDEX_IAP 1 #define PMC_MDEP_CLASS_INDEX_IAF 2 +#define PMC_MDEP_CLASS_INDEX_UCP 3 +#define PMC_MDEP_CLASS_INDEX_UCF 4 /* * Architecture specific extensions to <sys/pmc.h> structures. @@ -80,6 +85,8 @@ union pmc_md_op_pmcallocate { struct pmc_md_amd_op_pmcallocate pm_amd; struct pmc_md_iaf_op_pmcallocate pm_iaf; struct pmc_md_iap_op_pmcallocate pm_iap; + struct pmc_md_ucf_op_pmcallocate pm_ucf; + struct pmc_md_ucp_op_pmcallocate pm_ucp; struct pmc_md_p4_op_pmcallocate pm_p4; struct pmc_md_pentium_op_pmcallocate pm_pentium; struct pmc_md_ppro_op_pmcallocate pm_ppro; @@ -97,6 +104,8 @@ union pmc_md_pmc { struct pmc_md_amd_pmc pm_amd; struct pmc_md_iaf_pmc pm_iaf; struct pmc_md_iap_pmc pm_iap; + struct pmc_md_ucf_pmc pm_ucf; + struct pmc_md_ucp_pmc pm_ucp; struct pmc_md_p4_pmc pm_p4; struct pmc_md_pentium_pmc pm_pentium; struct pmc_md_ppro_pmc pm_ppro; diff --git a/sys/modules/hwpmc/Makefile b/sys/modules/hwpmc/Makefile index 0a696a1..1febf54 100644 --- a/sys/modules/hwpmc/Makefile +++ b/sys/modules/hwpmc/Makefile @@ -10,7 +10,7 @@ SRCS= hwpmc_mod.c hwpmc_logging.c vnode_if.h .if ${MACHINE_ARCH} == "amd64" SRCS+= hwpmc_amd.c hwpmc_core.c hwpmc_intel.c hwpmc_piv.c hwpmc_tsc.c -SRCS+= hwpmc_x86.c +SRCS+= hwpmc_x86.c hwpmc_uncore.c SRCS+= device_if.h bus_if.h .endif @@ -20,7 +20,7 @@ SRCS+= hwpmc_arm.c .if ${MACHINE_ARCH} == "i386" SRCS+= hwpmc_amd.c hwpmc_core.c hwpmc_intel.c hwpmc_piv.c hwpmc_ppro.c -SRCS+= hwpmc_pentium.c hwpmc_tsc.c hwpmc_x86.c +SRCS+= hwpmc_pentium.c hwpmc_tsc.c hwpmc_x86.c hwpmc_uncore.c SRCS+= device_if.h bus_if.h .endif diff --git a/sys/sys/pmc.h b/sys/sys/pmc.h index 02a8714..9da2cc8 100644 --- a/sys/sys/pmc.h +++ b/sys/sys/pmc.h @@ -40,7 +40,7 @@ #define PMC_MODULE_NAME "hwpmc" #define PMC_NAME_MAX 16 /* HW counter name size */ -#define PMC_CLASS_MAX 4 /* max #classes of PMCs per-system */ +#define PMC_CLASS_MAX 6 /* max #classes of PMCs per-system */ /* * Kernel<->userland API version number [MMmmpppp] @@ -85,6 +85,7 @@ __PMC_CPU(INTEL_CORE2EXTREME, 0x89, "Intel Core2 Extreme") \ __PMC_CPU(INTEL_ATOM, 0x8A, "Intel Atom") \ __PMC_CPU(INTEL_COREI7, 0x8B, "Intel Core i7") \ + __PMC_CPU(INTEL_WESTMERE, 0x8C, "Intel Westmere") \ __PMC_CPU(INTEL_XSCALE, 0x100, "Intel XScale") \ __PMC_CPU(MIPS_24K, 0x200, "MIPS 24K") @@ -110,6 +111,8 @@ enum pmc_cputype { __PMC_CLASS(P4) /* Intel Pentium-IV counters */ \ __PMC_CLASS(IAF) /* Intel Core2/Atom, fixed function */ \ __PMC_CLASS(IAP) /* Intel Core...Atom, programmable */ \ + __PMC_CLASS(UCF) /* Intel Uncore programmable */ \ + __PMC_CLASS(UCP) /* Intel Uncore fixed function */ \ __PMC_CLASS(XSCALE) /* Intel XScale counters */ \ __PMC_CLASS(MIPS24K) /* MIPS 24K */ |