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-rw-r--r--sys/amd64/amd64/mp_machdep.c6
-rw-r--r--sys/amd64/amd64/sys_machdep.c3
-rw-r--r--sys/amd64/conf/GENERIC1
-rw-r--r--sys/amd64/conf/Makefile2
-rw-r--r--sys/arm/conf/SHEEVAPLUG70
-rw-r--r--sys/arm/mv/kirkwood/files.kirkwood4
-rw-r--r--sys/arm/mv/kirkwood/files.sheevaplug4
-rw-r--r--sys/arm/mv/kirkwood/sheevaplug.c152
-rw-r--r--sys/arm/mv/kirkwood/std.kirkwood15
-rw-r--r--sys/arm/mv/kirkwood/std.sheevaplug8
-rw-r--r--sys/boot/common/bootstrap.h1
-rw-r--r--sys/boot/common/dev_net.c53
-rw-r--r--sys/boot/efi/include/efilib.h4
-rw-r--r--sys/boot/efi/libefi/Makefile4
-rw-r--r--sys/boot/efi/libefi/efifs.c441
-rw-r--r--sys/boot/efi/libefi/efipart.c265
-rw-r--r--sys/boot/ia64/efi/conf.c7
-rw-r--r--sys/boot/ia64/efi/main.c2
-rw-r--r--sys/boot/ia64/efi/version3
-rw-r--r--sys/boot/sparc64/loader/Makefile6
-rw-r--r--sys/boot/zfs/zfsimpl.c154
-rw-r--r--sys/cam/ata/ata_xpt.c29
-rw-r--r--sys/cam/scsi/scsi_ses.c4
-rw-r--r--sys/cam/scsi/scsi_targ_bh.c2
-rw-r--r--sys/cddl/boot/zfs/zfsimpl.h13
-rw-r--r--sys/cddl/boot/zfs/zfssubr.c50
-rw-r--r--sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_send.c13
-rw-r--r--sys/compat/linux/linux_futex.c2
-rw-r--r--sys/compat/x86bios/x86bios_alloc.c81
-rw-r--r--sys/conf/NOTES6
-rw-r--r--sys/conf/files.sparc642
-rw-r--r--sys/conf/makeLINT.mk8
-rw-r--r--sys/conf/options1
-rw-r--r--sys/contrib/ngatm/netnatm/api/cc_conn.c2
-rw-r--r--sys/contrib/x86emu/x86emu_util.c211
-rw-r--r--sys/ddb/db_ps.c4
-rw-r--r--sys/dev/aac/aac.c2
-rw-r--r--sys/dev/ae/if_ae.c1
-rw-r--r--sys/dev/agp/agp.c2
-rw-r--r--sys/dev/ahci/ahci.c12
-rw-r--r--sys/dev/amd/amd.c2
-rw-r--r--sys/dev/amr/amr.c2
-rw-r--r--sys/dev/arcmsr/arcmsr.c2
-rw-r--r--sys/dev/ata/ata-all.c8
-rw-r--r--sys/dev/ata/ata-raid.c2
-rw-r--r--sys/dev/ata/chipsets/ata-ahci.c6
-rw-r--r--sys/dev/ata/chipsets/ata-ati.c25
-rw-r--r--sys/dev/ata/chipsets/ata-siliconimage.c6
-rw-r--r--sys/dev/ath/ath_hal/ar5211/ar5211_reset.c2
-rw-r--r--sys/dev/ath/ath_hal/ar5212/ar5212_interrupts.c2
-rw-r--r--sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c2
-rw-r--r--sys/dev/bktr/bktr_i2c.c2
-rw-r--r--sys/dev/cfe/cfe_api.c2
-rw-r--r--sys/dev/cfe/cfe_console.c22
-rw-r--r--sys/dev/cs/if_cs.c2
-rw-r--r--sys/dev/cxgb/common/cxgb_t3_hw.c2
-rw-r--r--sys/dev/cxgb/cxgb_sge.c2
-rw-r--r--sys/dev/de/if_de.c2
-rw-r--r--sys/dev/dpt/dpt.h4
-rw-r--r--sys/dev/dpt/dpt_scsi.c1
-rw-r--r--sys/dev/e1000/if_em.c2
-rw-r--r--sys/dev/ep/if_ep.c2
-rw-r--r--sys/dev/ex/if_ex.c2
-rw-r--r--sys/dev/fatm/if_fatm.c2
-rw-r--r--sys/dev/firewire/sbp.c6
-rw-r--r--sys/dev/hatm/if_hatm.c4
-rw-r--r--sys/dev/hptmv/entry.c2
-rw-r--r--sys/dev/ic/ns16550.h5
-rw-r--r--sys/dev/if_ndis/if_ndis_usb.c2
-rw-r--r--sys/dev/iicbus/xlr_eeprom.c156
-rw-r--r--sys/dev/iicbus/xlr_rtc.c140
-rw-r--r--sys/dev/iicbus/xlr_temperature.c161
-rw-r--r--sys/dev/iir/iir.c35
-rw-r--r--sys/dev/iir/iir_pci.c1
-rw-r--r--sys/dev/iscsi/initiator/isc_sm.c2
-rw-r--r--sys/dev/isp/isp.c6
-rw-r--r--sys/dev/isp/isp_library.c2
-rw-r--r--sys/dev/iwn/if_iwn.c31
-rw-r--r--sys/dev/iwn/if_iwnvar.h3
-rw-r--r--sys/dev/ixgbe/ixgbe.c4
-rw-r--r--sys/dev/jme/if_jme.c10
-rw-r--r--sys/dev/lmc/if_lmc.c2
-rw-r--r--sys/dev/malo/if_malo.c2
-rw-r--r--sys/dev/mge/if_mge.c2
-rw-r--r--sys/dev/mly/mly.c4
-rw-r--r--sys/dev/mxge/if_mxge.c30
-rw-r--r--sys/dev/patm/if_patm_intr.c2
-rw-r--r--sys/dev/pdq/if_fea.c2
-rwxr-xr-xsys/dev/rmi/sec/desc.h3067
-rw-r--r--sys/dev/rmi/sec/rmilib.c3172
-rw-r--r--sys/dev/rmi/sec/rmilib.h997
-rw-r--r--sys/dev/rmi/sec/rmisec.c603
-rw-r--r--sys/dev/rmi/sec/stats.h469
-rw-r--r--sys/dev/rmi/xlr/atx_cpld.h53
-rw-r--r--sys/dev/rmi/xlr/rge.c2748
-rw-r--r--sys/dev/rmi/xlr/rge.h1097
-rw-r--r--sys/dev/rmi/xlr/xgmac_mdio.h127
-rw-r--r--sys/dev/safe/safe.c2
-rw-r--r--sys/dev/siba/siba_mips.c113
-rw-r--r--sys/dev/siba/siba_sdram.c114
-rw-r--r--sys/dev/sound/pci/maestro3.c2
-rw-r--r--sys/dev/ste/if_ste.c32
-rw-r--r--sys/dev/trm/trm.c2
-rw-r--r--sys/dev/uart/uart_dev_ns8250.c2
-rw-r--r--sys/dev/usb/controller/musb_otg.c2
-rw-r--r--sys/dev/usb/controller/uhci.c27
-rw-r--r--sys/dev/usb/quirk/usb_quirk.c6
-rw-r--r--sys/dev/usb/serial/u3g.c234
-rw-r--r--sys/dev/usb/serial/uch341.c530
-rw-r--r--sys/dev/usb/storage/umass.c4
-rw-r--r--sys/dev/usb/usb_device.c5
-rw-r--r--sys/dev/usb/usb_msctest.c258
-rw-r--r--sys/dev/usb/usb_msctest.h13
-rw-r--r--sys/dev/usb/usbdevs5
-rw-r--r--sys/fs/procfs/procfs_status.c2
-rw-r--r--sys/fs/smbfs/smbfs_smb.c110
-rw-r--r--sys/fs/tmpfs/tmpfs_vfsops.c6
-rw-r--r--sys/geom/geom_redboot.c156
-rw-r--r--sys/gnu/fs/xfs/FreeBSD/xfs_vnops.c2
-rw-r--r--sys/i386/conf/GENERIC1
-rw-r--r--sys/i386/conf/Makefile2
-rw-r--r--sys/i386/conf/PAE4
-rw-r--r--sys/i386/i386/locore.s2
-rw-r--r--sys/i386/i386/pmap.c23
-rw-r--r--sys/i386/include/pmap.h1
-rw-r--r--sys/i386/xen/locore.s2
-rw-r--r--sys/i386/xen/pmap.c7
-rw-r--r--sys/i386/xen/xen_machdep.c3
-rw-r--r--sys/ia64/conf/GENERIC1
-rw-r--r--sys/ia64/conf/Makefile2
-rw-r--r--sys/isa/pnp.c2
-rw-r--r--sys/kern/kern_clock.c122
-rw-r--r--sys/kern/kern_cpu.c8
-rw-r--r--sys/kern/kern_fail.c4
-rw-r--r--sys/kern/kern_lock.c46
-rw-r--r--sys/kern/kern_mib.c3
-rw-r--r--sys/kern/kern_umtx.c149
-rw-r--r--sys/kern/sched_4bsd.c2
-rw-r--r--sys/kern/subr_firmware.c2
-rw-r--r--sys/kern/subr_sleepqueue.c28
-rw-r--r--sys/kern/subr_turnstile.c2
-rw-r--r--sys/libkern/qdivrem.c2
-rw-r--r--sys/libkern/quad.h2
-rw-r--r--sys/mips/mips/busdma_machdep.c2
-rw-r--r--sys/modules/Makefile2
-rw-r--r--sys/modules/crypto/Makefile2
-rw-r--r--sys/modules/epic/Makefile8
-rw-r--r--sys/modules/usb/uch341/Makefile36
-rw-r--r--sys/net/flowtable.c2
-rw-r--r--sys/net/if_epair.c2
-rw-r--r--sys/net/if_ethersubr.c2
-rw-r--r--sys/net/if_lagg.c9
-rw-r--r--sys/net80211/ieee80211_node.c2
-rw-r--r--sys/net80211/ieee80211_var.h6
-rw-r--r--sys/netgraph/ng_ether.c16
-rw-r--r--sys/netgraph/ng_ipfw.c2
-rw-r--r--sys/netinet/in.c2
-rw-r--r--sys/netinet/ip_carp.c4
-rw-r--r--sys/netinet/ip_divert.c44
-rw-r--r--sys/netinet/ip_var.h47
-rw-r--r--sys/netinet/ipfw/ip_dummynet.c41
-rw-r--r--sys/netinet/ipfw/ip_fw_dynamic.c3
-rw-r--r--sys/netinet/ipfw/ip_fw_log.c1
-rw-r--r--sys/netinet/ipfw/ip_fw_pfil.c13
-rw-r--r--sys/netinet/ipfw/ip_fw_private.h48
-rw-r--r--sys/netinet/ipfw/ip_fw_sockopt.c3
-rw-r--r--sys/netinet/ipfw/ip_fw_table.c1
-rw-r--r--sys/netinet/libalias/alias_db.c2
-rw-r--r--sys/netinet/libalias/alias_mod.c2
-rw-r--r--sys/netinet/raw_ip.c10
-rw-r--r--sys/netinet/sctp_asconf.c2
-rw-r--r--sys/netinet/sctputil.c2
-rw-r--r--sys/netinet6/icmp6.c2
-rw-r--r--sys/netinet6/ip6_input.c2
-rw-r--r--sys/nfsclient/bootp_subr.c2
-rw-r--r--sys/nfsclient/nfs_vfsops.c11
-rw-r--r--sys/nfsclient/nfs_vnops.c5
-rw-r--r--sys/nfsserver/nfs.h6
-rw-r--r--sys/nfsserver/nfs_fha.c133
-rw-r--r--sys/nfsserver/nfs_srvkrpc.c26
-rw-r--r--sys/opencrypto/cryptosoft.c19
-rw-r--r--sys/pc98/conf/GENERIC1
-rw-r--r--sys/pc98/conf/Makefile2
-rw-r--r--sys/pci/ncr.c2
-rw-r--r--sys/powerpc/aim/mmu_oea.c6
-rw-r--r--sys/powerpc/aim/mmu_oea64.c6
-rw-r--r--sys/powerpc/booke/pmap.c4
-rw-r--r--sys/powerpc/conf/GENERIC1
-rw-r--r--sys/powerpc/conf/Makefile2
-rw-r--r--sys/rpc/clnt_dg.c2
-rw-r--r--sys/rpc/rpcsec_gss/rpcsec_gss_prot.c10
-rw-r--r--sys/rpc/rpcsec_gss/svc_rpcsec_gss.c9
-rw-r--r--sys/sparc64/conf/GENERIC4
-rw-r--r--sys/sparc64/conf/Makefile2
-rw-r--r--sys/sparc64/ebus/epic.c216
-rw-r--r--sys/sparc64/pci/fire.c151
-rw-r--r--sys/sun4v/conf/GENERIC2
-rw-r--r--sys/sun4v/conf/Makefile2
-rw-r--r--sys/sys/proc.h3
-rw-r--r--sys/sys/sleepqueue.h1
-rw-r--r--sys/sys/socket.h4
-rw-r--r--sys/sys/user.h4
-rw-r--r--sys/teken/sequences1
-rw-r--r--sys/teken/teken_demo.c19
-rw-r--r--sys/teken/teken_scs.h54
-rw-r--r--sys/teken/teken_stress.c13
-rw-r--r--sys/teken/teken_subr.h228
-rw-r--r--sys/teken/teken_subr_compat.h26
-rw-r--r--sys/ufs/ffs/ffs_snapshot.c2
-rw-r--r--sys/ufs/ufs/ufs_dirhash.c1
-rw-r--r--sys/xen/xenbus/xenbus_probe.c2
211 files changed, 2377 insertions, 15675 deletions
diff --git a/sys/amd64/amd64/mp_machdep.c b/sys/amd64/amd64/mp_machdep.c
index f5b1351..337c028 100644
--- a/sys/amd64/amd64/mp_machdep.c
+++ b/sys/amd64/amd64/mp_machdep.c
@@ -98,12 +98,6 @@ char *doublefault_stack;
char *nmi_stack;
void *dpcpu;
-/* Hotwire a 0->4MB V==P mapping */
-extern pt_entry_t *KPTphys;
-
-/* SMP page table page */
-extern pt_entry_t *SMPpt;
-
struct pcb stoppcbs[MAXCPU];
struct xpcb **stopxpcbs = NULL;
diff --git a/sys/amd64/amd64/sys_machdep.c b/sys/amd64/amd64/sys_machdep.c
index 1cba8a2..bb81664 100644
--- a/sys/amd64/amd64/sys_machdep.c
+++ b/sys/amd64/amd64/sys_machdep.c
@@ -420,13 +420,14 @@ user_ldt_alloc(struct proc *p, int force)
return (pldt);
}
- mdp->md_ldt = new_ldt;
if (pldt != NULL) {
bcopy(pldt->ldt_base, new_ldt->ldt_base, max_ldt_segment *
sizeof(struct user_segment_descriptor));
user_ldt_derefl(pldt);
}
ssdtosyssd(&sldt, &p->p_md.md_ldt_sd);
+ atomic_store_rel_ptr((volatile uintptr_t *)&mdp->md_ldt,
+ (uintptr_t)new_ldt);
if (p == curproc)
set_user_ldt(mdp);
diff --git a/sys/amd64/conf/GENERIC b/sys/amd64/conf/GENERIC
index 0a75547..b308b97 100644
--- a/sys/amd64/conf/GENERIC
+++ b/sys/amd64/conf/GENERIC
@@ -75,6 +75,7 @@ options MAC # TrustedBSD MAC Framework
options FLOWTABLE # per-cpu routing cache
#options KDTRACE_FRAME # Ensure frames are compiled in
#options KDTRACE_HOOKS # Kernel DTrace hooks
+options INCLUDE_CONFIG_FILE # Include this file in kernel
# Debugging for use in -current
options KDB # Enable kernel debugger support.
diff --git a/sys/amd64/conf/Makefile b/sys/amd64/conf/Makefile
index 2c006e9..1d2513f 100644
--- a/sys/amd64/conf/Makefile
+++ b/sys/amd64/conf/Makefile
@@ -1,3 +1,5 @@
# $FreeBSD$
+TARGET=amd64
+
.include "${.CURDIR}/../../conf/makeLINT.mk"
diff --git a/sys/arm/conf/SHEEVAPLUG b/sys/arm/conf/SHEEVAPLUG
new file mode 100644
index 0000000..d11b34d
--- /dev/null
+++ b/sys/arm/conf/SHEEVAPLUG
@@ -0,0 +1,70 @@
+#
+# Custom kernel for Marvell SheevaPlug devices.
+#
+# $FreeBSD$
+#
+
+ident SHEEVAPLUG
+include "../mv/kirkwood/std.sheevaplug"
+
+options SOC_MV_KIRKWOOD
+makeoptions MODULES_OVERRIDE=""
+
+#makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols
+makeoptions WERROR="-Werror"
+
+options SCHED_4BSD #4BSD scheduler
+options INET #InterNETworking
+options INET6 #IPv6 communications protocols
+options FFS #Berkeley Fast Filesystem
+options NFSCLIENT #Network Filesystem Client
+options NFSLOCKD #Network Lock Manager
+options NFS_ROOT #NFS usable as /, requires NFSCLIENT
+options BOOTP
+options BOOTP_NFSROOT
+options BOOTP_NFSV3
+options BOOTP_WIRED_TO=mge0
+
+# Root fs on USB device
+#options ROOTDEVNAME=\"ufs:/dev/da0a\"
+
+options SYSVSHM #SYSV-style shared memory
+options SYSVMSG #SYSV-style message queues
+options SYSVSEM #SYSV-style semaphores
+options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
+options MUTEX_NOINLINE
+options RWLOCK_NOINLINE
+options NO_FFS_SNAPSHOT
+options NO_SWAPPING
+
+# Debugging
+options ALT_BREAK_TO_DEBUGGER
+options DDB
+options KDB
+
+# Pseudo devices
+device random
+device pty
+device loop
+
+# Serial ports
+device uart
+
+# Networking
+device ether
+device mge # Marvell Gigabit Ethernet controller
+device mii
+device e1000phy
+device bpf
+options HZ=1000
+options DEVICE_POLLING
+device vlan
+
+# USB
+device usb
+device ehci
+device umass
+device scbus
+device pass
+device da
+
diff --git a/sys/arm/mv/kirkwood/files.kirkwood b/sys/arm/mv/kirkwood/files.kirkwood
new file mode 100644
index 0000000..afcea15
--- /dev/null
+++ b/sys/arm/mv/kirkwood/files.kirkwood
@@ -0,0 +1,4 @@
+# $FreeBSD$
+
+arm/mv/rtc.c standard
+arm/mv/kirkwood/kirkwood.c standard
diff --git a/sys/arm/mv/kirkwood/files.sheevaplug b/sys/arm/mv/kirkwood/files.sheevaplug
new file mode 100644
index 0000000..f56c2ab
--- /dev/null
+++ b/sys/arm/mv/kirkwood/files.sheevaplug
@@ -0,0 +1,4 @@
+# $FreeBSD$
+
+include "arm/mv/kirkwood/files.kirkwood"
+arm/mv/kirkwood/sheevaplug.c standard
diff --git a/sys/arm/mv/kirkwood/sheevaplug.c b/sys/arm/mv/kirkwood/sheevaplug.c
new file mode 100644
index 0000000..ae8b592
--- /dev/null
+++ b/sys/arm/mv/kirkwood/sheevaplug.c
@@ -0,0 +1,152 @@
+/*-
+ * Copyright (C) 2008 MARVELL INTERNATIONAL LTD.
+ * Copyright (C) 2009 Semihalf
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of MARVELL nor the names of contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+#include <sys/kernel.h>
+
+#include <vm/vm.h>
+#include <vm/pmap.h>
+
+#include <machine/bus.h>
+#include <machine/pte.h>
+#include <machine/pmap.h>
+#include <machine/vmparam.h>
+
+#include <arm/mv/mvreg.h>
+#include <arm/mv/mvvar.h>
+#include <arm/mv/mvwin.h>
+
+/*
+ * Virtual address space layout:
+ * -----------------------------
+ * 0x0000_0000 - 0x7FFF_FFFF : User Process (2 GB)
+ * 0x8000_0000 - 0xBBFF_FFFF : Unused (960 MB)
+ * 0xBC00_0000 - 0xBDFF_FFFF : Device Bus: CS1 (32 MB)
+ * 0xBE00_0000 - 0xBECF_FFFF : Unused (13 MB)
+ * 0xBED0_0000 - 0xBEDF_FFFF : Device Bus: CS2 (1 MB)
+ * 0xBEE0_0000 - 0xBEEF_FFFF : Device Bus: CS0 (1 MB)
+ * 0xBEF0_0000 - 0xBEFF_FFFF : Device Bus: BOOT (1 MB)
+ * 0xBF00_0000 - 0xBFFF_FFFF : Unused (16 MB)
+ * 0xC000_0000 - virtual_avail : Kernel Reserved (text, data, page tables,
+ * : stack etc.)
+ * virtual-avail - 0xEFFF_FFFF : KVA (virtual_avail is typically < 0xc0a0_0000)
+ * 0xF000_0000 - 0xF0FF_FFFF : No-Cache allocation area (16 MB)
+ * 0xF100_0000 - 0xF10F_FFFF : SoC Integrated devices registers range (1 MB)
+ * 0xF110_0000 - 0xF11F_FFFF : CESA SRAM (1 MB)
+ * 0xF120_0000 - 0xFFFE_FFFF : Unused (237 MB + 960 kB)
+ * 0xFFFF_0000 - 0xFFFF_0FFF : 'High' vectors page (4 kB)
+ * 0xFFFF_1000 - 0xFFFF_1FFF : ARM_TP_ADDRESS/RAS page (4 kB)
+ * 0xFFFF_2000 - 0xFFFF_FFFF : Unused (56 kB)
+ */
+
+/* Static device mappings. */
+const struct pmap_devmap pmap_devmap[] = {
+ /*
+ * Map the on-board devices VA == PA so that we can access them
+ * with the MMU on or off.
+ */
+ { /* SoC integrated peripherals registers range */
+ MV_BASE,
+ MV_PHYS_BASE,
+ MV_SIZE,
+ VM_PROT_READ | VM_PROT_WRITE,
+ PTE_NOCACHE,
+ },
+ { /* CESA SRAM */
+ MV_CESA_SRAM_BASE,
+ MV_CESA_SRAM_PHYS_BASE,
+ MV_CESA_SRAM_SIZE,
+ VM_PROT_READ | VM_PROT_WRITE,
+ PTE_NOCACHE,
+ },
+ { 0, 0, 0, 0, 0, }
+};
+
+const struct gpio_config mv_gpio_config[] = {
+ { -1, -1, -1 }
+};
+
+void
+platform_mpp_init(void)
+{
+
+ /*
+ * MPP configuration for Sheeva Plug
+ *
+ * MPP[0]: NF_IO[2]
+ * MPP[1]: NF_IO[3]
+ * MPP[2]: NF_IO[4]
+ * MPP[3]: NF_IO[5]
+ * MPP[4]: NF_IO[6]
+ * MPP[5]: NF_IO[7]
+ * MPP[6]: SYSRST_OUTn
+ * MPP[8]: UA0_RTS
+ * MPP[9]: UA0_CTS
+ * MPP[10]: UA0_TXD
+ * MPP[11]: UA0_RXD
+ * MPP[12]: SD_CLK
+ * MPP[13]: SD_CMD
+ * MPP[14]: SD_D[0]
+ * MPP[15]: SD_D[1]
+ * MPP[16]: SD_D[2]
+ * MPP[17]: SD_D[3]
+ * MPP[18]: NF_IO[0]
+ * MPP[19]: NF_IO[1]
+ * MPP[29]: TSMP[9]
+ *
+ * Others: GPIO
+ */
+
+ bus_space_write_4(obio_tag, MV_MPP_BASE, MPP_CONTROL0, 0x01111111);
+ bus_space_write_4(obio_tag, MV_MPP_BASE, MPP_CONTROL1, 0x11113322);
+ bus_space_write_4(obio_tag, MV_MPP_BASE, MPP_CONTROL2, 0x00001111);
+ bus_space_write_4(obio_tag, MV_MPP_BASE, MPP_CONTROL3, 0x00100000);
+ bus_space_write_4(obio_tag, MV_MPP_BASE, MPP_CONTROL4, 0x00000000);
+ bus_space_write_4(obio_tag, MV_MPP_BASE, MPP_CONTROL5, 0x00000000);
+ bus_space_write_4(obio_tag, MV_MPP_BASE, MPP_CONTROL6, 0x00000000);
+}
+
+static void
+platform_identify(void *dummy)
+{
+
+ soc_identify();
+
+ /*
+ * XXX Board identification e.g. read out from FPGA or similar should
+ * go here
+ */
+}
+SYSINIT(platform_identify, SI_SUB_CPU, SI_ORDER_SECOND, platform_identify, NULL);
diff --git a/sys/arm/mv/kirkwood/std.kirkwood b/sys/arm/mv/kirkwood/std.kirkwood
new file mode 100644
index 0000000..6b74920
--- /dev/null
+++ b/sys/arm/mv/kirkwood/std.kirkwood
@@ -0,0 +1,15 @@
+# $FreeBSD$
+
+# kernel gets loaded at 0x00900000 by the loader, but runs at virtual address
+# 0xc0900000. RAM starts at 0. We put the pagetable at a reasonable place
+# in memory, but may need to bounce it higher if there's a problem with this.
+# We could paper over this by loading the kernel at 0xc0000000 virtual, but
+# that leads to other complications, so we'll just reclaim the lower region of
+# ram after we're loaded. Put the page tables for startup at 1MB.
+makeoptions KERNPHYSADDR=0x00900000
+makeoptions KERNVIRTADDR=0xc0900000
+
+options KERNPHYSADDR=0x00900000
+options KERNVIRTADDR=0xc0900000
+options PHYSADDR=0x00000000
+options STARTUP_PAGETABLE_ADDR=0x00100000
diff --git a/sys/arm/mv/kirkwood/std.sheevaplug b/sys/arm/mv/kirkwood/std.sheevaplug
new file mode 100644
index 0000000..a289914
--- /dev/null
+++ b/sys/arm/mv/kirkwood/std.sheevaplug
@@ -0,0 +1,8 @@
+# $FreeBSD$
+
+include "../mv/std.mv"
+include "../mv/kirkwood/std.kirkwood"
+files "../mv/kirkwood/files.sheevaplug"
+
+options PHYSMEM_SIZE=0x20000000
+options MII_ADDR_BASE=0
diff --git a/sys/boot/common/bootstrap.h b/sys/boot/common/bootstrap.h
index 5f08480..ff8f459 100644
--- a/sys/boot/common/bootstrap.h
+++ b/sys/boot/common/bootstrap.h
@@ -45,6 +45,7 @@ struct devdesc
#define DEVT_CD 3
#define DEVT_ZFS 4
int d_unit;
+ void *d_opendata;
};
/* Commands and return values; nonzero return sets command_errmsg != NULL */
diff --git a/sys/boot/common/dev_net.c b/sys/boot/common/dev_net.c
index 0101ce1..147a809 100644
--- a/sys/boot/common/dev_net.c
+++ b/sys/boot/common/dev_net.c
@@ -1,6 +1,4 @@
-/*
- * $NetBSD: dev_net.c,v 1.12 1997/12/10 20:38:37 gwr Exp $
- */
+/* $NetBSD: dev_net.c,v 1.23 2008/04/28 20:24:06 martin Exp $ */
/*-
* Copyright (c) 1997 The NetBSD Foundation, Inc.
@@ -17,13 +15,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -80,12 +71,14 @@ __FBSDID("$FreeBSD$");
int debug = 0;
#endif
+static char *netdev_name;
static int netdev_sock = -1;
static int netdev_opens;
static int net_init(void);
static int net_open(struct open_file *, ...);
static int net_close(struct open_file *);
+static void net_cleanup(void);
static int net_strategy();
static void net_print(int);
@@ -99,7 +92,8 @@ struct devsw netdev = {
net_open,
net_close,
noioctl,
- net_print
+ net_print,
+ net_cleanup
};
static int
@@ -125,6 +119,12 @@ net_open(struct open_file *f, ...)
devname = va_arg(args, char*);
va_end(args);
+#ifdef NETIF_OPEN_CLOSE_ONCE
+ /* Before opening another interface, close the previous one first. */
+ if (netdev_sock >= 0 && strcmp(devname, netdev_name) != 0)
+ net_cleanup();
+#endif
+
/* On first open, do netif open, mount, etc. */
if (netdev_opens == 0) {
/* Find network interface. */
@@ -134,6 +134,7 @@ net_open(struct open_file *f, ...)
printf("net_open: netif_open() failed\n");
return (ENXIO);
}
+ netdev_name = strdup(devname);
#ifdef NETIF_DEBUG
if (debug)
printf("net_open: netif_open() succeeded\n");
@@ -144,14 +145,12 @@ net_open(struct open_file *f, ...)
error = net_getparams(netdev_sock);
if (error) {
/* getparams makes its own noise */
+ free(netdev_name);
netif_close(netdev_sock);
netdev_sock = -1;
return (error);
}
}
-#if defined(__sparc64__)
- netdev_opens++;
-#endif
}
netdev_opens++;
f->f_devdata = &netdev_sock;
@@ -161,30 +160,46 @@ net_open(struct open_file *f, ...)
static int
net_close(struct open_file *f)
{
+
#ifdef NETIF_DEBUG
if (debug)
printf("net_close: opens=%d\n", netdev_opens);
#endif
- /* On last close, do netif close, etc. */
f->f_devdata = NULL;
+
+#ifndef NETIF_OPEN_CLOSE_ONCE
/* Extra close call? */
if (netdev_opens <= 0)
return (0);
netdev_opens--;
/* Not last close? */
if (netdev_opens > 0)
- return(0);
- rootip.s_addr = 0;
+ return (0);
+ /* On last close, do netif close, etc. */
+#ifdef NETIF_DEBUG
+ if (debug)
+ printf("net_close: calling net_cleanup()\n");
+#endif
+ net_cleanup();
+#endif
+ return (0);
+}
+
+static void
+net_cleanup(void)
+{
+
if (netdev_sock >= 0) {
#ifdef NETIF_DEBUG
if (debug)
- printf("net_close: calling netif_close()\n");
+ printf("net_cleanup: calling netif_close()\n");
#endif
+ rootip.s_addr = 0;
+ free(netdev_name);
netif_close(netdev_sock);
netdev_sock = -1;
}
- return (0);
}
static int
diff --git a/sys/boot/efi/include/efilib.h b/sys/boot/efi/include/efilib.h
index 220e01a..cf825a6 100644
--- a/sys/boot/efi/include/efilib.h
+++ b/sys/boot/efi/include/efilib.h
@@ -34,9 +34,7 @@ extern EFI_SYSTEM_TABLE *ST;
extern EFI_BOOT_SERVICES *BS;
extern EFI_RUNTIME_SERVICES *RS;
-extern struct devsw efifs_dev;
-extern struct fs_ops efifs_fsops;
-
+extern struct devsw efipart_dev;
extern struct devsw efinet_dev;
extern struct netif_driver efinetif;
diff --git a/sys/boot/efi/libefi/Makefile b/sys/boot/efi/libefi/Makefile
index 5c504a3..55053e1 100644
--- a/sys/boot/efi/libefi/Makefile
+++ b/sys/boot/efi/libefi/Makefile
@@ -3,8 +3,8 @@
LIB= efi
INTERNALLIB=
-SRCS= delay.c efi_console.c efifs.c efinet.c errno.c handles.c libefi.c \
- time.c
+SRCS= delay.c efi_console.c efinet.c efipart.c errno.c handles.c \
+ libefi.c time.c
CFLAGS+= -I${.CURDIR}/../include
CFLAGS+= -I${.CURDIR}/../include/${MACHINE_ARCH:S/amd64/i386/}
diff --git a/sys/boot/efi/libefi/efifs.c b/sys/boot/efi/libefi/efifs.c
deleted file mode 100644
index 716102c..0000000
--- a/sys/boot/efi/libefi/efifs.c
+++ /dev/null
@@ -1,441 +0,0 @@
-/*-
- * Copyright (c) 2001 Doug Rabson
- * Copyright (c) 2006 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/time.h>
-#include <stddef.h>
-#include <stdarg.h>
-
-#include <bootstrap.h>
-
-#include <efi.h>
-#include <efilib.h>
-#include <efiprot.h>
-
-/* Perform I/O in blocks of size EFI_BLOCK_SIZE. */
-#define EFI_BLOCK_SIZE (1024 * 1024)
-
-union fileinfo {
- EFI_FILE_INFO info;
- char bytes[sizeof(EFI_FILE_INFO) + 508];
-};
-
-static EFI_GUID sfs_guid = SIMPLE_FILE_SYSTEM_PROTOCOL;
-static EFI_GUID fs_guid = EFI_FILE_SYSTEM_INFO_ID;
-static EFI_GUID fi_guid = EFI_FILE_INFO_ID;
-
-static int
-efifs_open(const char *upath, struct open_file *f)
-{
- struct devdesc *dev = f->f_devdata;
- EFI_FILE_IO_INTERFACE *fsif;
- EFI_FILE *file, *root;
- EFI_HANDLE h;
- EFI_STATUS status;
- CHAR16 *cp, *path;
-
- if (f->f_dev != &efifs_dev || dev->d_unit < 0)
- return (EINVAL);
-
- h = efi_find_handle(f->f_dev, dev->d_unit);
- if (h == NULL)
- return (EINVAL);
-
- status = BS->HandleProtocol(h, &sfs_guid, (VOID **)&fsif);
- if (EFI_ERROR(status))
- return (efi_status_to_errno(status));
-
- /* Get the root directory. */
- status = fsif->OpenVolume(fsif, &root);
- if (EFI_ERROR(status))
- return (efi_status_to_errno(status));
-
- while (*upath == '/')
- upath++;
-
- /* Special case: opening the root directory. */
- if (*upath == '\0') {
- f->f_fsdata = root;
- return (0);
- }
-
- path = malloc((strlen(upath) + 1) * sizeof(CHAR16));
- if (path == NULL) {
- root->Close(root);
- return (ENOMEM);
- }
-
- cp = path;
- while (*upath != '\0') {
- if (*upath == '/') {
- *cp = '\\';
- while (upath[1] == '/')
- upath++;
- } else
- *cp = *upath;
- upath++;
- cp++;
- }
- *cp = 0;
-
- /* Open the file. */
- status = root->Open(root, &file, path,
- EFI_FILE_MODE_READ | EFI_FILE_MODE_WRITE, 0);
- if (status == EFI_ACCESS_DENIED || status == EFI_WRITE_PROTECTED)
- status = root->Open(root, &file, path, EFI_FILE_MODE_READ, 0);
- free(path);
- root->Close(root);
- if (EFI_ERROR(status))
- return (efi_status_to_errno(status));
-
- f->f_fsdata = file;
- return (0);
-}
-
-static int
-efifs_close(struct open_file *f)
-{
- EFI_FILE *file = f->f_fsdata;
-
- if (file == NULL)
- return (EBADF);
-
- file->Close(file);
- f->f_fsdata = NULL;
- return (0);
-}
-
-static int
-efifs_read(struct open_file *f, void *buf, size_t size, size_t *resid)
-{
- EFI_FILE *file = f->f_fsdata;
- EFI_STATUS status;
- UINTN sz = size;
- char *bufp;
-
- if (file == NULL)
- return (EBADF);
-
- bufp = buf;
- while (size > 0) {
- sz = size;
- if (sz > EFI_BLOCK_SIZE)
- sz = EFI_BLOCK_SIZE;
- status = file->Read(file, &sz, bufp);
- if (EFI_ERROR(status))
- return (efi_status_to_errno(status));
- if (sz == 0)
- break;
- size -= sz;
- bufp += sz;
- }
- if (resid)
- *resid = size;
- return (0);
-}
-
-static int
-efifs_write(struct open_file *f, void *buf, size_t size, size_t *resid)
-{
- EFI_FILE *file = f->f_fsdata;
- EFI_STATUS status;
- UINTN sz = size;
- char *bufp;
-
- if (file == NULL)
- return (EBADF);
-
- bufp = buf;
- while (size > 0) {
- sz = size;
- if (sz > EFI_BLOCK_SIZE)
- sz = EFI_BLOCK_SIZE;
- status = file->Write(file, &sz, bufp);
- if (EFI_ERROR(status))
- return (efi_status_to_errno(status));
- if (sz == 0)
- break;
- size -= sz;
- bufp += sz;
- }
- if (resid)
- *resid = size;
- return (0);
-}
-
-static off_t
-efifs_seek(struct open_file *f, off_t offset, int where)
-{
- EFI_FILE *file = f->f_fsdata;
- EFI_STATUS status;
- UINT64 base;
-
- if (file == NULL)
- return (EBADF);
-
- switch (where) {
- case SEEK_SET:
- break;
-
- case SEEK_END:
- status = file->SetPosition(file, ~0ULL);
- if (EFI_ERROR(status))
- return (-1);
- /* FALLTHROUGH */
-
- case SEEK_CUR:
- status = file->GetPosition(file, &base);
- if (EFI_ERROR(status))
- return (-1);
- offset = (off_t)(base + offset);
- break;
-
- default:
- return (-1);
- }
- if (offset < 0)
- return (-1);
-
- status = file->SetPosition(file, (UINT64)offset);
- return (EFI_ERROR(status) ? -1 : offset);
-}
-
-static int
-efifs_stat(struct open_file *f, struct stat *sb)
-{
- EFI_FILE *file = f->f_fsdata;
- union fileinfo fi;
- EFI_STATUS status;
- UINTN sz;
-
- if (file == NULL)
- return (EBADF);
-
- bzero(sb, sizeof(*sb));
-
- sz = sizeof(fi);
- status = file->GetInfo(file, &fi_guid, &sz, &fi);
- if (EFI_ERROR(status))
- return (efi_status_to_errno(status));
-
- sb->st_mode = S_IRUSR | S_IRGRP | S_IROTH;
- if ((fi.info.Attribute & EFI_FILE_READ_ONLY) == 0)
- sb->st_mode |= S_IWUSR | S_IWGRP | S_IWOTH;
- if (fi.info.Attribute & EFI_FILE_DIRECTORY)
- sb->st_mode |= S_IFDIR;
- else
- sb->st_mode |= S_IFREG;
- sb->st_nlink = 1;
- sb->st_atime = efi_time(&fi.info.LastAccessTime);
- sb->st_mtime = efi_time(&fi.info.ModificationTime);
- sb->st_ctime = efi_time(&fi.info.CreateTime);
- sb->st_size = fi.info.FileSize;
- sb->st_blocks = fi.info.PhysicalSize / S_BLKSIZE;
- sb->st_blksize = S_BLKSIZE;
- sb->st_birthtime = sb->st_ctime;
- return (0);
-}
-
-static int
-efifs_readdir(struct open_file *f, struct dirent *d)
-{
- EFI_FILE *file = f->f_fsdata;
- union fileinfo fi;
- EFI_STATUS status;
- UINTN sz;
- int i;
-
- if (file == NULL)
- return (EBADF);
-
- sz = sizeof(fi);
- status = file->Read(file, &sz, &fi);
- if (EFI_ERROR(status))
- return (efi_status_to_errno(status));
- if (sz == 0)
- return (ENOENT);
-
- d->d_fileno = 0;
- d->d_reclen = sizeof(*d);
- if (fi.info.Attribute & EFI_FILE_DIRECTORY)
- d->d_type = DT_DIR;
- else
- d->d_type = DT_REG;
- for (i = 0; fi.info.FileName[i] != 0; i++)
- d->d_name[i] = fi.info.FileName[i];
- d->d_name[i] = 0;
- d->d_namlen = i;
- return (0);
-}
-
-struct fs_ops efifs_fsops = {
- .fs_name = "efifs",
- .fo_open = efifs_open,
- .fo_close = efifs_close,
- .fo_read = efifs_read,
- .fo_write = efifs_write,
- .fo_seek = efifs_seek,
- .fo_stat = efifs_stat,
- .fo_readdir = efifs_readdir
-};
-
-static int
-efifs_dev_init(void)
-{
- EFI_HANDLE *handles;
- EFI_STATUS status;
- UINTN sz;
- int err;
-
- sz = 0;
- status = BS->LocateHandle(ByProtocol, &sfs_guid, 0, &sz, 0);
- if (status == EFI_BUFFER_TOO_SMALL) {
- handles = (EFI_HANDLE *)malloc(sz);
- status = BS->LocateHandle(ByProtocol, &sfs_guid, 0, &sz,
- handles);
- if (EFI_ERROR(status))
- free(handles);
- }
- if (EFI_ERROR(status))
- return (efi_status_to_errno(status));
- err = efi_register_handles(&efifs_dev, handles,
- sz / sizeof(EFI_HANDLE));
- free(handles);
- return (err);
-}
-
-/*
- * Print information about disks
- */
-static void
-efifs_dev_print(int verbose)
-{
- union {
- EFI_FILE_SYSTEM_INFO info;
- char buffer[1024];
- } fi;
- char line[80];
- EFI_FILE_IO_INTERFACE *fsif;
- EFI_FILE *volume;
- EFI_HANDLE h;
- EFI_STATUS status;
- UINTN sz;
- int i, unit;
-
- for (unit = 0, h = efi_find_handle(&efifs_dev, 0);
- h != NULL; h = efi_find_handle(&efifs_dev, ++unit)) {
- sprintf(line, " %s%d: ", efifs_dev.dv_name, unit);
- pager_output(line);
-
- status = BS->HandleProtocol(h, &sfs_guid, (VOID **)&fsif);
- if (EFI_ERROR(status))
- goto err;
-
- status = fsif->OpenVolume(fsif, &volume);
- if (EFI_ERROR(status))
- goto err;
-
- sz = sizeof(fi);
- status = volume->GetInfo(volume, &fs_guid, &sz, &fi);
- volume->Close(volume);
- if (EFI_ERROR(status))
- goto err;
-
- if (fi.info.ReadOnly)
- pager_output("[RO] ");
- else
- pager_output(" ");
- for (i = 0; fi.info.VolumeLabel[i] != 0; i++)
- fi.buffer[i] = fi.info.VolumeLabel[i];
- fi.buffer[i] = 0;
- if (fi.buffer[0] != 0)
- pager_output(fi.buffer);
- else
- pager_output("EFI filesystem");
- pager_output("\n");
- continue;
-
- err:
- sprintf(line, "[--] error %d: unable to obtain information\n",
- efi_status_to_errno(status));
- pager_output(line);
- }
-}
-
-/*
- * Attempt to open the disk described by (dev) for use by (f).
- *
- * Note that the philosophy here is "give them exactly what
- * they ask for". This is necessary because being too "smart"
- * about what the user might want leads to complications.
- * (eg. given no slice or partition value, with a disk that is
- * sliced - are they after the first BSD slice, or the DOS
- * slice before it?)
- */
-static int
-efifs_dev_open(struct open_file *f, ...)
-{
- va_list args;
- struct devdesc *dev;
-
- va_start(args, f);
- dev = va_arg(args, struct devdesc*);
- va_end(args);
-
- if (dev->d_unit < 0)
- return(ENXIO);
- return (0);
-}
-
-static int
-efifs_dev_close(struct open_file *f)
-{
-
- return (0);
-}
-
-static int
-efifs_dev_strategy(void *devdata, int rw, daddr_t dblk, size_t size, char *buf, size_t *rsize)
-{
-
- return (ENOSYS);
-}
-
-struct devsw efifs_dev = {
- .dv_name = "fs",
- .dv_type = DEVT_DISK,
- .dv_init = efifs_dev_init,
- .dv_strategy = efifs_dev_strategy,
- .dv_open = efifs_dev_open,
- .dv_close = efifs_dev_close,
- .dv_ioctl = noioctl,
- .dv_print = efifs_dev_print,
- .dv_cleanup = NULL
-};
diff --git a/sys/boot/efi/libefi/efipart.c b/sys/boot/efi/libefi/efipart.c
new file mode 100644
index 0000000..4c8c170
--- /dev/null
+++ b/sys/boot/efi/libefi/efipart.c
@@ -0,0 +1,265 @@
+/*-
+ * Copyright (c) 2010 Marcel Moolenaar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/time.h>
+#include <stddef.h>
+#include <stdarg.h>
+
+#include <bootstrap.h>
+
+#include <efi.h>
+#include <efilib.h>
+#include <efiprot.h>
+
+static EFI_GUID blkio_guid = BLOCK_IO_PROTOCOL;
+
+static int efipart_init(void);
+static int efipart_strategy(void *, int, daddr_t, size_t, char *, size_t *);
+static int efipart_open(struct open_file *, ...);
+static int efipart_close(struct open_file *);
+static void efipart_print(int);
+
+struct devsw efipart_dev = {
+ .dv_name = "part",
+ .dv_type = DEVT_DISK,
+ .dv_init = efipart_init,
+ .dv_strategy = efipart_strategy,
+ .dv_open = efipart_open,
+ .dv_close = efipart_close,
+ .dv_ioctl = noioctl,
+ .dv_print = efipart_print,
+ .dv_cleanup = NULL
+};
+
+static int
+efipart_init(void)
+{
+ EFI_BLOCK_IO *blkio;
+ EFI_HANDLE *hin, *hout;
+ EFI_STATUS status;
+ UINTN sz;
+ u_int n, nin, nout;
+ int err;
+
+ sz = 0;
+ status = BS->LocateHandle(ByProtocol, &blkio_guid, 0, &sz, 0);
+ if (status == EFI_BUFFER_TOO_SMALL) {
+ hin = (EFI_HANDLE *)malloc(sz * 2);
+ status = BS->LocateHandle(ByProtocol, &blkio_guid, 0, &sz,
+ hin);
+ if (EFI_ERROR(status))
+ free(hin);
+ }
+ if (EFI_ERROR(status))
+ return (efi_status_to_errno(status));
+
+ /* Filter handles to only include FreeBSD partitions. */
+ nin = sz / sizeof(EFI_HANDLE);
+ hout = hin + nin;
+ nout = 0;
+
+ for (n = 0; n < nin; n++) {
+ status = BS->HandleProtocol(hin[n], &blkio_guid, &blkio);
+ if (EFI_ERROR(status))
+ continue;
+ if (!blkio->Media->LogicalPartition)
+ continue;
+ hout[nout] = hin[n];
+ nout++;
+ }
+
+ err = efi_register_handles(&efipart_dev, hout, nout);
+ free(hin);
+ return (err);
+}
+
+static void
+efipart_print(int verbose)
+{
+ char line[80];
+ EFI_BLOCK_IO *blkio;
+ EFI_HANDLE h;
+ EFI_STATUS status;
+ u_int unit;
+
+ for (unit = 0, h = efi_find_handle(&efipart_dev, 0);
+ h != NULL; h = efi_find_handle(&efipart_dev, ++unit)) {
+ sprintf(line, " %s%d:", efipart_dev.dv_name, unit);
+ pager_output(line);
+
+ status = BS->HandleProtocol(h, &blkio_guid, &blkio);
+ if (!EFI_ERROR(status)) {
+ sprintf(line, " %llu blocks",
+ (unsigned long long)(blkio->Media->LastBlock + 1));
+ pager_output(line);
+ if (blkio->Media->RemovableMedia)
+ pager_output(" (removable)");
+ }
+ pager_output("\n");
+ }
+}
+
+static int
+efipart_open(struct open_file *f, ...)
+{
+ va_list args;
+ struct devdesc *dev;
+ EFI_BLOCK_IO *blkio;
+ EFI_HANDLE h;
+ EFI_STATUS status;
+
+ va_start(args, f);
+ dev = va_arg(args, struct devdesc*);
+ va_end(args);
+
+ h = efi_find_handle(&efipart_dev, dev->d_unit);
+ if (h == NULL)
+ return (EINVAL);
+
+ status = BS->HandleProtocol(h, &blkio_guid, &blkio);
+ if (EFI_ERROR(status))
+ return (efi_status_to_errno(status));
+
+ if (!blkio->Media->MediaPresent)
+ return (EAGAIN);
+
+ dev->d_opendata = blkio;
+ return (0);
+}
+
+static int
+efipart_close(struct open_file *f)
+{
+ struct devdesc *dev;
+
+ dev = (struct devdesc *)(f->f_devdata);
+ if (dev->d_opendata == NULL)
+ return (EINVAL);
+
+ dev->d_opendata = NULL;
+ return (0);
+}
+
+/*
+ * efipart_readwrite()
+ * Internal equivalent of efipart_strategy(), which operates on the
+ * media-native block size. This function expects all I/O requests
+ * to be within the media size and returns an error if such is not
+ * the case.
+ */
+static int
+efipart_readwrite(EFI_BLOCK_IO *blkio, int rw, daddr_t blk, daddr_t nblks,
+ char *buf)
+{
+ EFI_STATUS status;
+
+ if (blkio == NULL)
+ return (ENXIO);
+ if (blk < 0 || blk > blkio->Media->LastBlock)
+ return (EIO);
+ if ((blk + nblks - 1) > blkio->Media->LastBlock)
+ return (EIO);
+
+ switch (rw) {
+ case F_READ:
+ status = blkio->ReadBlocks(blkio, blkio->Media->MediaId, blk,
+ nblks * blkio->Media->BlockSize, buf);
+ break;
+ case F_WRITE:
+ if (blkio->Media->ReadOnly)
+ return (EROFS);
+ status = blkio->WriteBlocks(blkio, blkio->Media->MediaId, blk,
+ nblks * blkio->Media->BlockSize, buf);
+ break;
+ default:
+ return (ENOSYS);
+ }
+
+ if (EFI_ERROR(status))
+ printf("%s: rw=%d, status=%lu\n", __func__, rw, status);
+ return (efi_status_to_errno(status));
+}
+
+static int
+efipart_strategy(void *devdata, int rw, daddr_t blk, size_t size, char *buf,
+ size_t *rsize)
+{
+ struct devdesc *dev = (struct devdesc *)devdata;
+ EFI_BLOCK_IO *blkio;
+ off_t off;
+ char *blkbuf;
+ size_t blkoff, blksz;
+ int error;
+
+ if (dev == NULL || blk < 0)
+ return (EINVAL);
+
+ blkio = dev->d_opendata;
+ if (blkio == NULL)
+ return (ENXIO);
+
+ if (size == 0 || (size % 512) != 0)
+ return (EIO);
+
+ if (rsize != NULL)
+ *rsize = size;
+
+ if (blkio->Media->BlockSize == 512)
+ return (efipart_readwrite(blkio, rw, blk, size / 512, buf));
+
+ /*
+ * The block size of the media is not 512B per sector.
+ */
+ blkbuf = malloc(blkio->Media->BlockSize);
+ if (blkbuf == NULL)
+ return (ENOMEM);
+
+ error = 0;
+ off = blk * 512;
+ blk = off / blkio->Media->BlockSize;
+ blkoff = off % blkio->Media->BlockSize;
+ blksz = blkio->Media->BlockSize - blkoff;
+ while (size > 0) {
+ error = efipart_readwrite(blkio, rw, blk, 1, blkbuf);
+ if (error)
+ break;
+ if (size < blksz)
+ blksz = size;
+ bcopy(blkbuf + blkoff, buf, blksz);
+ buf += blksz;
+ size -= blksz;
+ blk++;
+ blkoff = 0;
+ blksz = blkio->Media->BlockSize;
+ }
+
+ free(blkbuf);
+ return (error);
+}
diff --git a/sys/boot/ia64/efi/conf.c b/sys/boot/ia64/efi/conf.c
index a72f79f..69d0927 100644
--- a/sys/boot/ia64/efi/conf.c
+++ b/sys/boot/ia64/efi/conf.c
@@ -49,15 +49,16 @@ __FBSDID("$FreeBSD$");
/* Exported for libstand */
struct devsw *devsw[] = {
- &efifs_dev,
+ &efipart_dev,
&efinet_dev,
NULL
};
struct fs_ops *file_system[] = {
- &efifs_fsops,
- &nfs_fsops,
+ &dosfs_fsops,
&ufs_fsops,
+ &cd9660_fsops,
+ &nfs_fsops,
&gzipfs_fsops,
NULL
};
diff --git a/sys/boot/ia64/efi/main.c b/sys/boot/ia64/efi/main.c
index 9419903..c9bb547 100644
--- a/sys/boot/ia64/efi/main.c
+++ b/sys/boot/ia64/efi/main.c
@@ -127,8 +127,6 @@ main(int argc, CHAR16 *argv[])
/* Get our loaded image protocol interface structure. */
BS->HandleProtocol(IH, &imgid, (VOID**)&img);
- printf("Image base: 0x%016lx\n", (u_long)img->ImageBase);
-
printf("\n");
printf("%s, Revision %s\n", bootprog_name, bootprog_rev);
printf("(%s, %s)\n", bootprog_maker, bootprog_date);
diff --git a/sys/boot/ia64/efi/version b/sys/boot/ia64/efi/version
index 7d7f566..37a71c3 100644
--- a/sys/boot/ia64/efi/version
+++ b/sys/boot/ia64/efi/version
@@ -3,6 +3,9 @@ $FreeBSD$
NOTE ANY CHANGES YOU MAKE TO THE BOOTBLOCKS HERE. The format of this
file is important. Make sure the current version number is on line 6.
+2.0: Provide devices based on the block I/O protocol, rather than the
+ simple file services protocol. Use the FreeBSD file system code
+ on top of those devices to access files.
1.2: Restructured. Has some user visible differences.
1.1: Pass the HCDP table address to the kernel via bootinfo if one
is present in the EFI system table.
diff --git a/sys/boot/sparc64/loader/Makefile b/sys/boot/sparc64/loader/Makefile
index 0d7161c..46c6baa 100644
--- a/sys/boot/sparc64/loader/Makefile
+++ b/sys/boot/sparc64/loader/Makefile
@@ -51,11 +51,15 @@ CFLAGS+= -DBOOT_FORTH -I${.CURDIR}/../../ficl -I${.CURDIR}/../../ficl/sparc64
LIBFICL= ${.OBJDIR}/../../ficl/libficl.a
.endif
-# Always add MI sources
+# Always add MI sources
.PATH: ${.CURDIR}/../../common
.include "${.CURDIR}/../../common/Makefile.inc"
CFLAGS+= -I${.CURDIR}/../../common
CFLAGS+= -I.
+# Avoid the open-close-dance for every file access as some firmwares perform
+# an auto-negotiation on every open of the network interface and thus causes
+# netbooting to take horribly long.
+CFLAGS+= -DNETIF_OPEN_CLOSE_ONCE
CLEANFILES+= vers.c loader.help
diff --git a/sys/boot/zfs/zfsimpl.c b/sys/boot/zfs/zfsimpl.c
index adddb6a..1407eb5 100644
--- a/sys/boot/zfs/zfsimpl.c
+++ b/sys/boot/zfs/zfsimpl.c
@@ -404,7 +404,7 @@ vdev_create(uint64_t guid, vdev_read_t *read)
}
static int
-vdev_init_from_nvlist(const unsigned char *nvlist, vdev_t **vdevp)
+vdev_init_from_nvlist(const unsigned char *nvlist, vdev_t **vdevp, int is_newer)
{
int rc;
uint64_t guid, id, ashift, nparity;
@@ -412,7 +412,8 @@ vdev_init_from_nvlist(const unsigned char *nvlist, vdev_t **vdevp)
const char *path;
vdev_t *vdev, *kid;
const unsigned char *kids;
- int nkids, i;
+ int nkids, i, is_new;
+ uint64_t is_offline, is_faulted, is_degraded, is_removed;
if (nvlist_find(nvlist, ZPOOL_CONFIG_GUID,
DATA_TYPE_UINT64, 0, &guid)
@@ -424,17 +425,6 @@ vdev_init_from_nvlist(const unsigned char *nvlist, vdev_t **vdevp)
return (ENOENT);
}
- /*
- * Assume that if we've seen this vdev tree before, this one
- * will be identical.
- */
- vdev = vdev_find(guid);
- if (vdev) {
- if (vdevp)
- *vdevp = vdev;
- return (0);
- }
-
if (strcmp(type, VDEV_TYPE_MIRROR)
&& strcmp(type, VDEV_TYPE_DISK)
&& strcmp(type, VDEV_TYPE_RAIDZ)) {
@@ -442,44 +432,92 @@ vdev_init_from_nvlist(const unsigned char *nvlist, vdev_t **vdevp)
return (EIO);
}
- if (!strcmp(type, VDEV_TYPE_MIRROR))
- vdev = vdev_create(guid, vdev_mirror_read);
- else if (!strcmp(type, VDEV_TYPE_RAIDZ))
- vdev = vdev_create(guid, vdev_raidz_read);
- else
- vdev = vdev_create(guid, vdev_disk_read);
+ is_offline = is_removed = is_faulted = is_degraded = 0;
- vdev->v_id = id;
- if (nvlist_find(nvlist, ZPOOL_CONFIG_ASHIFT,
- DATA_TYPE_UINT64, 0, &ashift) == 0)
- vdev->v_ashift = ashift;
- else
- vdev->v_ashift = 0;
- if (nvlist_find(nvlist, ZPOOL_CONFIG_NPARITY,
- DATA_TYPE_UINT64, 0, &nparity) == 0)
- vdev->v_nparity = nparity;
- else
- vdev->v_nparity = 0;
- if (nvlist_find(nvlist, ZPOOL_CONFIG_PATH,
- DATA_TYPE_STRING, 0, &path) == 0) {
- if (strlen(path) > 5
- && path[0] == '/'
- && path[1] == 'd'
- && path[2] == 'e'
- && path[3] == 'v'
- && path[4] == '/')
- path += 5;
- vdev->v_name = strdup(path);
+ nvlist_find(nvlist, ZPOOL_CONFIG_OFFLINE, DATA_TYPE_UINT64, 0,
+ &is_offline);
+ nvlist_find(nvlist, ZPOOL_CONFIG_REMOVED, DATA_TYPE_UINT64, 0,
+ &is_removed);
+ nvlist_find(nvlist, ZPOOL_CONFIG_FAULTED, DATA_TYPE_UINT64, 0,
+ &is_faulted);
+ nvlist_find(nvlist, ZPOOL_CONFIG_DEGRADED, DATA_TYPE_UINT64, 0,
+ &is_degraded);
+
+ vdev = vdev_find(guid);
+ if (!vdev) {
+ is_new = 1;
+
+ if (!strcmp(type, VDEV_TYPE_MIRROR))
+ vdev = vdev_create(guid, vdev_mirror_read);
+ else if (!strcmp(type, VDEV_TYPE_RAIDZ))
+ vdev = vdev_create(guid, vdev_raidz_read);
+ else
+ vdev = vdev_create(guid, vdev_disk_read);
+
+ vdev->v_id = id;
+ if (nvlist_find(nvlist, ZPOOL_CONFIG_ASHIFT,
+ DATA_TYPE_UINT64, 0, &ashift) == 0)
+ vdev->v_ashift = ashift;
+ else
+ vdev->v_ashift = 0;
+ if (nvlist_find(nvlist, ZPOOL_CONFIG_NPARITY,
+ DATA_TYPE_UINT64, 0, &nparity) == 0)
+ vdev->v_nparity = nparity;
+ else
+ vdev->v_nparity = 0;
+ if (nvlist_find(nvlist, ZPOOL_CONFIG_PATH,
+ DATA_TYPE_STRING, 0, &path) == 0) {
+ if (strlen(path) > 5
+ && path[0] == '/'
+ && path[1] == 'd'
+ && path[2] == 'e'
+ && path[3] == 'v'
+ && path[4] == '/')
+ path += 5;
+ vdev->v_name = strdup(path);
+ } else {
+ if (!strcmp(type, "raidz")) {
+ if (vdev->v_nparity == 1)
+ vdev->v_name = "raidz1";
+ else
+ vdev->v_name = "raidz2";
+ } else {
+ vdev->v_name = strdup(type);
+ }
+ }
+
+ if (is_offline)
+ vdev->v_state = VDEV_STATE_OFFLINE;
+ else if (is_removed)
+ vdev->v_state = VDEV_STATE_REMOVED;
+ else if (is_faulted)
+ vdev->v_state = VDEV_STATE_FAULTED;
+ else if (is_degraded)
+ vdev->v_state = VDEV_STATE_DEGRADED;
+ else
+ vdev->v_state = VDEV_STATE_HEALTHY;
} else {
- if (!strcmp(type, "raidz")) {
- if (vdev->v_nparity == 1)
- vdev->v_name = "raidz1";
+ is_new = 0;
+
+ if (is_newer) {
+ /*
+ * We've already seen this vdev, but from an older
+ * vdev label, so let's refresh its state from the
+ * newer label.
+ */
+ if (is_offline)
+ vdev->v_state = VDEV_STATE_OFFLINE;
+ else if (is_removed)
+ vdev->v_state = VDEV_STATE_REMOVED;
+ else if (is_faulted)
+ vdev->v_state = VDEV_STATE_FAULTED;
+ else if (is_degraded)
+ vdev->v_state = VDEV_STATE_DEGRADED;
else
- vdev->v_name = "raidz2";
- } else {
- vdev->v_name = strdup(type);
+ vdev->v_state = VDEV_STATE_HEALTHY;
}
}
+
rc = nvlist_find(nvlist, ZPOOL_CONFIG_CHILDREN,
DATA_TYPE_NVLIST_ARRAY, &nkids, &kids);
/*
@@ -488,10 +526,12 @@ vdev_init_from_nvlist(const unsigned char *nvlist, vdev_t **vdevp)
if (rc == 0) {
vdev->v_nchildren = nkids;
for (i = 0; i < nkids; i++) {
- rc = vdev_init_from_nvlist(kids, &kid);
+ rc = vdev_init_from_nvlist(kids, &kid, is_newer);
if (rc)
return (rc);
- STAILQ_INSERT_TAIL(&vdev->v_children, kid, v_childlink);
+ if (is_new)
+ STAILQ_INSERT_TAIL(&vdev->v_children, kid,
+ v_childlink);
kids = nvlist_next(kids);
}
} else {
@@ -593,7 +633,9 @@ state_name(vdev_state_t state)
"UNKNOWN",
"CLOSED",
"OFFLINE",
+ "REMOVED",
"CANT_OPEN",
+ "FAULTED",
"DEGRADED",
"ONLINE"
};
@@ -711,7 +753,7 @@ vdev_probe(vdev_phys_read_t *read, void *read_priv, spa_t **spap)
uint64_t pool_txg, pool_guid;
const char *pool_name;
const unsigned char *vdevs;
- int i, rc;
+ int i, rc, is_newer;
char upbuf[1024];
const struct uberblock *up;
@@ -793,12 +835,15 @@ vdev_probe(vdev_phys_read_t *read, void *read_priv, spa_t **spap)
spa = spa_create(pool_guid);
spa->spa_name = strdup(pool_name);
}
- if (pool_txg > spa->spa_txg)
+ if (pool_txg > spa->spa_txg) {
spa->spa_txg = pool_txg;
+ is_newer = 1;
+ } else
+ is_newer = 0;
/*
* Get the vdev tree and create our in-core copy of it.
- * If we already have a healthy vdev with this guid, this must
+ * If we already have a vdev with this guid, this must
* be some kind of alias (overlapping slices, dangerously dedicated
* disks etc).
*/
@@ -808,16 +853,16 @@ vdev_probe(vdev_phys_read_t *read, void *read_priv, spa_t **spap)
return (EIO);
}
vdev = vdev_find(guid);
- if (vdev && vdev->v_state == VDEV_STATE_HEALTHY) {
+ if (vdev && vdev->v_phys_read) /* Has this vdev already been inited? */
return (EIO);
- }
if (nvlist_find(nvlist,
ZPOOL_CONFIG_VDEV_TREE,
DATA_TYPE_NVLIST, 0, &vdevs)) {
return (EIO);
}
- rc = vdev_init_from_nvlist(vdevs, &top_vdev);
+
+ rc = vdev_init_from_nvlist(vdevs, &top_vdev, is_newer);
if (rc)
return (rc);
@@ -838,7 +883,6 @@ vdev_probe(vdev_phys_read_t *read, void *read_priv, spa_t **spap)
if (vdev) {
vdev->v_phys_read = read;
vdev->v_read_priv = read_priv;
- vdev->v_state = VDEV_STATE_HEALTHY;
} else {
printf("ZFS: inconsistent nvlist contents\n");
return (EIO);
diff --git a/sys/cam/ata/ata_xpt.c b/sys/cam/ata/ata_xpt.c
index f3f90af..99cf314 100644
--- a/sys/cam/ata/ata_xpt.c
+++ b/sys/cam/ata/ata_xpt.c
@@ -1001,7 +1001,6 @@ typedef struct {
union ccb *request_ccb;
struct ccb_pathinq *cpi;
int counter;
- int found;
} ata_scan_bus_info;
/*
@@ -1049,14 +1048,11 @@ ata_scan_bus(struct cam_periph *periph, union ccb *request_ccb)
}
scan_info->request_ccb = request_ccb;
scan_info->cpi = &work_ccb->cpi;
- if (scan_info->cpi->transport == XPORT_ATA)
- scan_info->found = 0x0003;
- else
- scan_info->found = 0x8001;
- scan_info->counter = 0;
/* If PM supported, probe it first. */
if (scan_info->cpi->hba_inquiry & PI_SATAPM)
- scan_info->counter = 15;
+ scan_info->counter = scan_info->cpi->max_target;
+ else
+ scan_info->counter = 0;
work_ccb = xpt_alloc_ccb_nowait();
if (work_ccb == NULL) {
@@ -1073,10 +1069,11 @@ ata_scan_bus(struct cam_periph *periph, union ccb *request_ccb)
/* Free the current request path- we're done with it. */
xpt_free_path(work_ccb->ccb_h.path);
/* If there is PMP... */
- if (scan_info->counter == 15) {
+ if ((scan_info->cpi->hba_inquiry & PI_SATAPM) &&
+ (scan_info->counter == scan_info->cpi->max_target)) {
if (work_ccb->ccb_h.ppriv_field1 != 0) {
/* everything else willbe probed by it */
- scan_info->found = 0x8000;
+ goto done;
} else {
struct ccb_trans_settings cts;
@@ -1091,11 +1088,10 @@ ata_scan_bus(struct cam_periph *periph, union ccb *request_ccb)
xpt_action((union ccb *)&cts);
}
}
-take_next:
- /* Take next device. Wrap from 15 (PM) to 0. */
- scan_info->counter = (scan_info->counter + 1 ) & 0x0f;
- if (scan_info->counter > scan_info->cpi->max_target -
- ((scan_info->cpi->hba_inquiry & PI_SATAPM) ? 1 : 0)) {
+ if (scan_info->counter ==
+ ((scan_info->cpi->hba_inquiry & PI_SATAPM) ?
+ 0 : scan_info->cpi->max_target)) {
+done:
xpt_free_ccb(work_ccb);
xpt_free_ccb((union ccb *)scan_info->cpi);
request_ccb = scan_info->request_ccb;
@@ -1104,9 +1100,10 @@ take_next:
xpt_done(request_ccb);
break;
}
+ /* Take next device. Wrap from max (PMP) to 0. */
+ scan_info->counter = (scan_info->counter + 1 ) %
+ (scan_info->cpi->max_target + 1);
scan_next:
- if ((scan_info->found & (1 << scan_info->counter)) == 0)
- goto take_next;
status = xpt_create_path(&path, xpt_periph,
scan_info->request_ccb->ccb_h.path_id,
scan_info->counter, 0);
diff --git a/sys/cam/scsi/scsi_ses.c b/sys/cam/scsi/scsi_ses.c
index 825b883..2275654 100644
--- a/sys/cam/scsi/scsi_ses.c
+++ b/sys/cam/scsi/scsi_ses.c
@@ -1555,7 +1555,7 @@ ses_encode(char *b, int amt, uint8_t *ep, int elt, int elm, SesComStat *sp)
*/
static int safte_getconfig(ses_softc_t *);
-static int safte_rdstat(ses_softc_t *, int);;
+static int safte_rdstat(ses_softc_t *, int);
static int set_objstat_sel(ses_softc_t *, ses_objstat *, int);
static int wrbuf16(ses_softc_t *, uint8_t, uint8_t, uint8_t, uint8_t, int);
static void wrslot_stat(ses_softc_t *, int);
@@ -2257,7 +2257,7 @@ safte_rdstat(ses_softc_t *ssc, int slpflg)
ssc->ses_objmap[oid].encstat[0] = SES_OBJSTAT_NOTAVAIL;
ssc->ses_objmap[oid].encstat[1] = 0;
ssc->ses_objmap[oid].encstat[2] = sdata[r];
- ssc->ses_objmap[oid].encstat[3] = 0;;
+ ssc->ses_objmap[oid].encstat[3] = 0;
ssc->ses_objmap[oid++].svalid = 1;
r++;
}
diff --git a/sys/cam/scsi/scsi_targ_bh.c b/sys/cam/scsi/scsi_targ_bh.c
index 47b6e2b..b8c2379 100644
--- a/sys/cam/scsi/scsi_targ_bh.c
+++ b/sys/cam/scsi/scsi_targ_bh.c
@@ -429,7 +429,7 @@ targbhdtor(struct cam_periph *periph)
switch (softc->init_level) {
case 0:
- panic("targdtor - impossible init level");;
+ panic("targdtor - impossible init level");
case 1:
/* FALLTHROUGH */
default:
diff --git a/sys/cddl/boot/zfs/zfsimpl.h b/sys/cddl/boot/zfs/zfsimpl.h
index 1149eac..ef13487 100644
--- a/sys/cddl/boot/zfs/zfsimpl.h
+++ b/sys/cddl/boot/zfs/zfsimpl.h
@@ -548,7 +548,6 @@ typedef enum {
#define ZPOOL_CONFIG_DTL "DTL"
#define ZPOOL_CONFIG_STATS "stats"
#define ZPOOL_CONFIG_WHOLE_DISK "whole_disk"
-#define ZPOOL_CONFIG_OFFLINE "offline"
#define ZPOOL_CONFIG_ERRCOUNT "error_count"
#define ZPOOL_CONFIG_NOT_PRESENT "not_present"
#define ZPOOL_CONFIG_SPARES "spares"
@@ -558,6 +557,16 @@ typedef enum {
#define ZPOOL_CONFIG_HOSTNAME "hostname"
#define ZPOOL_CONFIG_TIMESTAMP "timestamp" /* not stored on disk */
+/*
+ * The persistent vdev state is stored as separate values rather than a single
+ * 'vdev_state' entry. This is because a device can be in multiple states, such
+ * as offline and degraded.
+ */
+#define ZPOOL_CONFIG_OFFLINE "offline"
+#define ZPOOL_CONFIG_FAULTED "faulted"
+#define ZPOOL_CONFIG_DEGRADED "degraded"
+#define ZPOOL_CONFIG_REMOVED "removed"
+
#define VDEV_TYPE_ROOT "root"
#define VDEV_TYPE_MIRROR "mirror"
#define VDEV_TYPE_REPLACING "replacing"
@@ -590,7 +599,9 @@ typedef enum vdev_state {
VDEV_STATE_UNKNOWN = 0, /* Uninitialized vdev */
VDEV_STATE_CLOSED, /* Not currently open */
VDEV_STATE_OFFLINE, /* Not allowed to open */
+ VDEV_STATE_REMOVED, /* Explicitly removed from system */
VDEV_STATE_CANT_OPEN, /* Tried to open, but failed */
+ VDEV_STATE_FAULTED, /* External request to fault device */
VDEV_STATE_DEGRADED, /* Replicated vdev with unhealthy kids */
VDEV_STATE_HEALTHY /* Presumed good */
} vdev_state_t;
diff --git a/sys/cddl/boot/zfs/zfssubr.c b/sys/cddl/boot/zfs/zfssubr.c
index 4013986..25d349b 100644
--- a/sys/cddl/boot/zfs/zfssubr.c
+++ b/sys/cddl/boot/zfs/zfssubr.c
@@ -454,7 +454,7 @@ vdev_raidz_reconstruct_q(raidz_col_t *cols, int nparity, int acols, int x)
static void
vdev_raidz_reconstruct_pq(raidz_col_t *cols, int nparity, int acols,
- int x, int y)
+ int x, int y, void *temp_p, void *temp_q)
{
uint8_t *p, *q, *pxy, *qxy, *xd, *yd, tmp, a, b, aexp, bexp;
void *pdata, *qdata;
@@ -478,10 +478,8 @@ vdev_raidz_reconstruct_pq(raidz_col_t *cols, int nparity, int acols,
xsize = cols[x].rc_size;
ysize = cols[y].rc_size;
- cols[VDEV_RAIDZ_P].rc_data =
- zfs_alloc_temp(cols[VDEV_RAIDZ_P].rc_size);
- cols[VDEV_RAIDZ_Q].rc_data =
- zfs_alloc_temp(cols[VDEV_RAIDZ_Q].rc_size);
+ cols[VDEV_RAIDZ_P].rc_data = temp_p;
+ cols[VDEV_RAIDZ_Q].rc_data = temp_q;
cols[x].rc_size = 0;
cols[y].rc_size = 0;
@@ -551,9 +549,12 @@ vdev_raidz_read(vdev_t *vdev, const blkptr_t *bp, void *buf,
uint64_t f = b % dcols;
uint64_t o = (b / dcols) << unit_shift;
uint64_t q, r, coff;
- int c, c1, bc, col, acols, devidx, asize, n;
+ int c, c1, bc, col, acols, devidx, asize, n, max_rc_size;
static raidz_col_t cols[16];
raidz_col_t *rc, *rc1;
+ void *orig, *orig1, *temp_p, *temp_q;
+
+ orig = orig1 = temp_p = temp_q = NULL;
q = s / (dcols - nparity);
r = s - q * (dcols - nparity);
@@ -561,6 +562,7 @@ vdev_raidz_read(vdev_t *vdev, const blkptr_t *bp, void *buf,
acols = (q == 0 ? bc : dcols);
asize = 0;
+ max_rc_size = 0;
for (c = 0; c < acols; c++) {
col = f + c;
@@ -577,6 +579,8 @@ vdev_raidz_read(vdev_t *vdev, const blkptr_t *bp, void *buf,
cols[c].rc_tried = 0;
cols[c].rc_skipped = 0;
asize += cols[c].rc_size;
+ if (cols[c].rc_size > max_rc_size)
+ max_rc_size = cols[c].rc_size;
}
asize = roundup(asize, (nparity + 1) << unit_shift);
@@ -777,8 +781,13 @@ reconstruct:
//ASSERT(c != acols);
//ASSERT(!rc->rc_skipped || rc->rc_error == ENXIO || rc->rc_error == ESTALE);
+ if (temp_p == NULL)
+ temp_p = zfs_alloc_temp(max_rc_size);
+ if (temp_q == NULL)
+ temp_q = zfs_alloc_temp(max_rc_size);
+
vdev_raidz_reconstruct_pq(cols, nparity, acols,
- c1, c);
+ c1, c, temp_p, temp_q);
if (zio_checksum_error(bp, buf) == 0)
return (0);
@@ -845,18 +854,12 @@ reconstruct:
return (EIO);
}
- asize = 0;
- for (c = 0; c < acols; c++) {
- rc = &cols[c];
- if (rc->rc_size > asize)
- asize = rc->rc_size;
- }
if (cols[VDEV_RAIDZ_P].rc_error == 0) {
/*
* Attempt to reconstruct the data from parity P.
*/
- void *orig;
- orig = zfs_alloc_temp(asize);
+ if (orig == NULL)
+ orig = zfs_alloc_temp(max_rc_size);
for (c = nparity; c < acols; c++) {
rc = &cols[c];
@@ -874,8 +877,8 @@ reconstruct:
/*
* Attempt to reconstruct the data from parity Q.
*/
- void *orig;
- orig = zfs_alloc_temp(asize);
+ if (orig == NULL)
+ orig = zfs_alloc_temp(max_rc_size);
for (c = nparity; c < acols; c++) {
rc = &cols[c];
@@ -895,9 +898,14 @@ reconstruct:
/*
* Attempt to reconstruct the data from both P and Q.
*/
- void *orig, *orig1;
- orig = zfs_alloc_temp(asize);
- orig1 = zfs_alloc_temp(asize);
+ if (orig == NULL)
+ orig = zfs_alloc_temp(max_rc_size);
+ if (orig1 == NULL)
+ orig1 = zfs_alloc_temp(max_rc_size);
+ if (temp_p == NULL)
+ temp_p = zfs_alloc_temp(max_rc_size);
+ if (temp_q == NULL)
+ temp_q = zfs_alloc_temp(max_rc_size);
for (c = nparity; c < acols - 1; c++) {
rc = &cols[c];
@@ -909,7 +917,7 @@ reconstruct:
memcpy(orig1, rc1->rc_data, rc1->rc_size);
vdev_raidz_reconstruct_pq(cols, nparity,
- acols, c, c1);
+ acols, c, c1, temp_p, temp_q);
if (zio_checksum_error(bp, buf) == 0)
return (0);
diff --git a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_send.c b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_send.c
index 9803265..5c97cd7 100644
--- a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_send.c
+++ b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_send.c
@@ -847,6 +847,12 @@ restore_object(struct restorearg *ra, objset_t *os, struct drr_object *drro)
if (err != 0 && err != ENOENT)
return (EINVAL);
+ if (drro->drr_bonuslen) {
+ data = restore_read(ra, P2ROUNDUP(drro->drr_bonuslen, 8));
+ if (ra->err)
+ return (ra->err);
+ }
+
if (err == ENOENT) {
/* currently free, want to be allocated */
tx = dmu_tx_create(os);
@@ -862,7 +868,6 @@ restore_object(struct restorearg *ra, objset_t *os, struct drr_object *drro)
dmu_tx_commit(tx);
} else {
/* currently allocated, want to be allocated */
-
err = dmu_object_reclaim(os, drro->drr_object,
drro->drr_type, drro->drr_blksz,
drro->drr_bonustype, drro->drr_bonuslen);
@@ -870,12 +875,6 @@ restore_object(struct restorearg *ra, objset_t *os, struct drr_object *drro)
if (err)
return (EINVAL);
- if (drro->drr_bonuslen) {
- data = restore_read(ra, P2ROUNDUP(drro->drr_bonuslen, 8));
- if (ra->err)
- return (ra->err);
- }
-
tx = dmu_tx_create(os);
dmu_tx_hold_bonus(tx, drro->drr_object);
err = dmu_tx_assign(tx, TXG_WAIT);
diff --git a/sys/compat/linux/linux_futex.c b/sys/compat/linux/linux_futex.c
index b9f570b..4842260 100644
--- a/sys/compat/linux/linux_futex.c
+++ b/sys/compat/linux/linux_futex.c
@@ -493,7 +493,7 @@ linux_sys_futex(struct thread *td, struct linux_sys_futex_args *args)
return (error);
if (f == NULL) {
td->td_retval[0] = 0;
- return (error);;
+ return (error);
}
td->td_retval[0] = futex_wake(f, args->val);
futex_put(f, NULL);
diff --git a/sys/compat/x86bios/x86bios_alloc.c b/sys/compat/x86bios/x86bios_alloc.c
deleted file mode 100644
index 0a364e7..0000000
--- a/sys/compat/x86bios/x86bios_alloc.c
+++ /dev/null
@@ -1,81 +0,0 @@
-/*-
- * Copyright (C) 1999 Egbert Eich
- *
- * Permission to use, copy, modify, distribute, and sell this software and
- * its documentation for any purpose is hereby granted without fee,
- * provided that the above copyright notice appear in all copies and that
- * both that copyright notice and this permission notice appear in
- * supporting documentation, and that the name of the authors not be used
- * in advertising or publicity pertaining to distribution of the software
- * without specific, written prior permission. The authors makes no
- * representations about the suitability of this software for any purpose.
- * It is provided "as is" without express or implied warranty.
- *
- * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
- * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
- * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- *
- * xserver/hw/xfree86/int10/generic.c
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-
-#include <compat/x86bios/x86bios.h>
-
-extern u_char *pbiosMem;
-extern int busySegMap[5];
-
-void *
-x86bios_alloc(int count, int *segs)
-{
- int i;
- int j;
-
- /* find the free segblock of page */
- for (i = 0; i < (PAGE_RESERV - count); i++)
- {
- if (busySegMap[i] == 0)
- {
- /* find the capacity of segblock */
- for (j = i; j < (i + count); j++)
- {
- if (busySegMap[j] == 1)
- break;
- }
-
- if (j == (i + count))
- break;
- i += count;
- }
- }
-
- if (i == (PAGE_RESERV - count))
- return NULL;
-
- /* make the segblock is used */
- for (j = i; j < (i + count); j++)
- busySegMap[i] = 1;
-
- *segs = i * 4096;
-
- return (pbiosMem + *segs);
-}
-
-void
-x86bios_free(void *pbuf, int count)
-{
- int i;
- int busySeg;
-
- busySeg = ((u_char *)pbuf - pbiosMem) / 4096;
-
- for (i = busySeg; i < (busySeg + count); i++)
- busySegMap[i] = 0;
-}
diff --git a/sys/conf/NOTES b/sys/conf/NOTES
index 51abbf9..8e949b5 100644
--- a/sys/conf/NOTES
+++ b/sys/conf/NOTES
@@ -973,6 +973,7 @@ options NFSSERVER #Network File System server
options NFSLOCKD #Network Lock Manager
options NFSCL #experimental NFS client with NFSv4
options NFSD #experimental NFS server with NFSv4
+options KGSSAPI #Kernel GSSAPI implementaion
# NT File System. Read-mostly, see mount_ntfs(8) for details.
# For a full read-write NTFS support consider sysutils/fusefs-ntfs
@@ -2530,6 +2531,11 @@ options BOOTP_BLOCKSIZE=8192 # Override NFS block size
options SW_WATCHDOG
#
+# Add the software deadlock resolver thread.
+#
+options DEADLKRES
+
+#
# Disable swapping of stack pages. This option removes all
# code which actually performs swapping, so it's not possible to turn
# it back on at run-time.
diff --git a/sys/conf/files.sparc64 b/sys/conf/files.sparc64
index ef6efa6..8b771ae 100644
--- a/sys/conf/files.sparc64
+++ b/sys/conf/files.sparc64
@@ -67,12 +67,14 @@ libkern/flsl.c standard
libkern/memmove.c standard
sparc64/central/central.c optional central
sparc64/ebus/ebus.c optional ebus
+sparc64/ebus/epic.c optional epic ebus
sparc64/fhc/clkbrd.c optional fhc
sparc64/fhc/fhc.c optional fhc
sparc64/isa/isa.c optional isa
sparc64/isa/isa_dma.c optional isa
sparc64/isa/ofw_isa.c optional ebus | isa
sparc64/pci/apb.c optional pci
+sparc64/pci/fire.c optional pci
sparc64/pci/ofw_pcib.c optional pci
sparc64/pci/ofw_pcib_subr.c optional pci
sparc64/pci/ofw_pcibus.c optional pci
diff --git a/sys/conf/makeLINT.mk b/sys/conf/makeLINT.mk
index 08947a9..e7ca909 100644
--- a/sys/conf/makeLINT.mk
+++ b/sys/conf/makeLINT.mk
@@ -5,7 +5,15 @@ all:
clean:
rm -f LINT
+.if ${TARGET} == "amd64" || ${TARGET} == "i386"
+ rm -f LINT-VIMAGE
+.endif
NOTES= ../../conf/NOTES NOTES
LINT: ${NOTES} ../../conf/makeLINT.sed
cat ${NOTES} | sed -E -n -f ../../conf/makeLINT.sed > ${.TARGET}
+.if ${TARGET} == "amd64" || ${TARGET} == "i386"
+ echo "include ${.TARGET}" > ${.TARGET}-VIMAGE
+ echo "ident ${.TARGET}-VIMAGE" >> ${.TARGET}-VIMAGE
+ echo "options VIMAGE" >> ${.TARGET}-VIMAGE
+.endif
diff --git a/sys/conf/options b/sys/conf/options
index 75f69c2..84bfbd1 100644
--- a/sys/conf/options
+++ b/sys/conf/options
@@ -72,6 +72,7 @@ COMPAT_FREEBSD6 opt_compat.h
COMPAT_FREEBSD7 opt_compat.h
COMPILING_LINT opt_global.h
CY_PCI_FASTINTR
+DEADLKRES opt_watchdog.h
DIRECTIO
FULL_PREEMPTION opt_sched.h
IPI_PREEMPTION opt_sched.h
diff --git a/sys/contrib/ngatm/netnatm/api/cc_conn.c b/sys/contrib/ngatm/netnatm/api/cc_conn.c
index c57bc1a..2ba972a 100644
--- a/sys/contrib/ngatm/netnatm/api/cc_conn.c
+++ b/sys/contrib/ngatm/netnatm/api/cc_conn.c
@@ -768,7 +768,7 @@ cc_party_drop_ack_ind(struct ccconn *conn,
party = cc_party_find(conn, drop->epref.epref);
if (party == NULL) {
cc_party_log(party, "no party for %s",
- ptab[CONN_SIG_DROP_PARTY_ACK_IND]);
+ cc_conn_sigtab[CONN_SIG_DROP_PARTY_ACK_IND]);
return;
}
switch (party->state) {
diff --git a/sys/contrib/x86emu/x86emu_util.c b/sys/contrib/x86emu/x86emu_util.c
deleted file mode 100644
index 4172f94..0000000
--- a/sys/contrib/x86emu/x86emu_util.c
+++ /dev/null
@@ -1,211 +0,0 @@
-/* $OpenBSD: x86emu_util.c,v 1.5 2009/06/18 14:19:21 pirofti Exp $ */
-/* $NetBSD: x86emu_util.c,v 1.2 2007/12/04 17:32:22 joerg Exp $ */
-
-/*
- *
- * Realmode X86 Emulator Library
- *
- * Copyright (C) 1996-1999 SciTech Software, Inc.
- * Copyright (C) David Mosberger-Tang
- * Copyright (C) 1999 Egbert Eich
- * Copyright (C) 2007 Joerg Sonnenberger
- *
- * ========================================================================
- *
- * Permission to use, copy, modify, distribute, and sell this software and
- * its documentation for any purpose is hereby granted without fee,
- * provided that the above copyright notice appear in all copies and that
- * both that copyright notice and this permission notice appear in
- * supporting documentation, and that the name of the authors not be used
- * in advertising or publicity pertaining to distribution of the software
- * without specific, written prior permission. The authors makes no
- * representations about the suitability of this software for any purpose.
- * It is provided "as is" without express or implied warranty.
- *
- * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
- * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
- * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- *
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/endian.h>
-
-#include <contrib/x86emu/x86emu.h>
-#include <contrib/x86emu/x86emu_regs.h>
-
-
-
-/*
- * PARAMETERS:
- * addr - Emulator memory address to read
- *
- * RETURNS:
- * Byte value read from emulator memory.
- *
- * REMARKS:
- * Reads a byte value from the emulator memory.
- */
-static uint8_t
-rdb(struct x86emu *emu, uint32_t addr)
-{
- if (addr > emu->mem_size - 1)
- x86emu_halt_sys(emu);
- return emu->mem_base[addr];
-}
-
-/*
- * PARAMETERS:
- * addr - Emulator memory address to read
- *
- * RETURNS:
- * Word value read from emulator memory.
- *
- * REMARKS:
- * Reads a word value from the emulator memory.
- */
-static uint16_t
-rdw(struct x86emu *emu, uint32_t addr)
-{
- if (addr > emu->mem_size - 2)
- x86emu_halt_sys(emu);
-#ifdef __STRICT_ALIGNMENT
- if (addr & 1) {
- u_int8_t *a = emu->mem_base + addr;
- u_int16_t r;
-
- r = ((*(a + 0) << 0) & 0x00ff) |
- ((*(a + 1) << 8) & 0xff00);
- return r;
- } else
- return le32toh(*(u_int32_t *)(emu->mem_base + addr));
-#else
- return le16toh(*(u_int16_t *)(emu->mem_base + addr));
-#endif
-}
-
-/*
- * PARAMETERS:
- * addr - Emulator memory address to read
- *
- * RETURNS:
- * Long value read from emulator memory.
- * REMARKS:
- * Reads a long value from the emulator memory.
- */
-static uint32_t
-rdl(struct x86emu *emu, uint32_t addr)
-{
- if (addr > emu->mem_size - 4)
- x86emu_halt_sys(emu);
-#ifdef __STRICT_ALIGNMENT
- if (addr & 3) {
- u_int8_t *a = emu->mem_base + addr;
- u_int32_t r;
-
- r = ((*(a + 0) << 0) & 0x000000ff) |
- ((*(a + 1) << 8) & 0x0000ff00) |
- ((*(a + 2) << 16) & 0x00ff0000) |
- ((*(a + 3) << 24) & 0xff000000);
- return r;
- } else
- return le32toh(*(u_int32_t *)(emu->mem_base + addr));
-#else
- return le32toh(*(u_int32_t *)(emu->mem_base + addr));
-#endif
-}
-
-/*
- * PARAMETERS:
- * addr - Emulator memory address to read
- * val - Value to store
- *
- * REMARKS:
- * Writes a byte value to emulator memory.
- */
-static void
-wrb(struct x86emu *emu, uint32_t addr, uint8_t val)
-{
- if (addr > emu->mem_size - 1)
- x86emu_halt_sys(emu);
- emu->mem_base[addr] = val;
-}
-
-/*
- * PARAMETERS:
- * addr - Emulator memory address to read
- * val - Value to store
- *
- * REMARKS:
- * Writes a word value to emulator memory.
- */
-static void
-wrw(struct x86emu *emu, uint32_t addr, uint16_t val)
-{
- if (addr > emu->mem_size - 2)
- x86emu_halt_sys(emu);
-#ifdef __STRICT_ALIGNMENT
- if (addr & 1) {
- u_int8_t *a = emu->mem_base + addr;
-
- *((a + 0)) = (val >> 0) & 0xff;
- *((a + 1)) = (val >> 8) & 0xff;
- } else
- *((u_int16_t *)(emu->mem_base + addr)) = htole16(val);
-#else
- *((u_int16_t *)(emu->mem_base + addr)) = htole16(val);
-#endif
-}
-
-/*
- * PARAMETERS:
- * addr - Emulator memory address to read
- * val - Value to store
- *
- * REMARKS:
- * Writes a long value to emulator memory.
- */
-static void
-wrl(struct x86emu *emu, uint32_t addr, uint32_t val)
-{
- if (addr > emu->mem_size - 4)
- x86emu_halt_sys(emu);
-#ifdef __STRICT_ALIGNMENT
- if (addr & 3) {
- u_int8_t *a = emu->mem_base + addr;
-
- *((a + 0) = (val >> 0) & 0xff;
- *((a + 1) = (val >> 8) & 0xff;
- *((a + 2) = (val >> 16) & 0xff;
- *((a + 3) = (val >> 24) & 0xff;
- } else
- *((u_int32_t *)(emu->mem_base + addr)) = htole32(val);
-#else
- *((u_int32_t *)(emu->mem_base + addr)) = htole32(val);
-#endif
-}
-
-/* Setup */
-
-void
-x86emu_init_default(struct x86emu *emu)
-{
- int i;
-
- emu->emu_rdb = rdb;
- emu->emu_rdw = rdw;
- emu->emu_rdl = rdl;
- emu->emu_wrb = wrb;
- emu->emu_wrw = wrw;
- emu->emu_wrl = wrl;
-
- for (i = 0; i < 256; i++)
- emu->_x86emu_intrTab[i] = NULL;
-}
diff --git a/sys/ddb/db_ps.c b/sys/ddb/db_ps.c
index e233a26..2261721 100644
--- a/sys/ddb/db_ps.c
+++ b/sys/ddb/db_ps.c
@@ -136,7 +136,7 @@ db_ps(db_expr_t addr, boolean_t hasaddr, db_expr_t count, char *modif)
if (TD_ON_LOCK(td))
lflag++;
if (TD_IS_SLEEPING(td)) {
- if (!td->td_flags & TDF_SINTR)
+ if (!(td->td_flags & TDF_SINTR))
dflag++;
else
sflag++;
@@ -171,7 +171,7 @@ db_ps(db_expr_t addr, boolean_t hasaddr, db_expr_t count, char *modif)
state[1] = '\0';
/* Additional process state flags. */
- if (!p->p_flag & P_INMEM)
+ if (!(p->p_flag & P_INMEM))
strlcat(state, "W", sizeof(state));
if (p->p_flag & P_TRACED)
strlcat(state, "X", sizeof(state));
diff --git a/sys/dev/aac/aac.c b/sys/dev/aac/aac.c
index f0c67cd..f4c57e6 100644
--- a/sys/dev/aac/aac.c
+++ b/sys/dev/aac/aac.c
@@ -553,7 +553,7 @@ aac_alloc(struct aac_softc *sc)
0, /* flags */
NULL, NULL, /* No locking needed */
&sc->aac_fib_dmat)) {
- device_printf(sc->aac_dev, "can't allocate FIB DMA tag\n");;
+ device_printf(sc->aac_dev, "can't allocate FIB DMA tag\n");
return (ENOMEM);
}
diff --git a/sys/dev/ae/if_ae.c b/sys/dev/ae/if_ae.c
index d3e95ef..68181f4 100644
--- a/sys/dev/ae/if_ae.c
+++ b/sys/dev/ae/if_ae.c
@@ -367,6 +367,7 @@ ae_attach(device_t dev)
if (ifp == NULL) {
device_printf(dev, "could not allocate ifnet structure.\n");
error = ENXIO;
+ goto fail;
}
ifp->if_softc = sc;
diff --git a/sys/dev/agp/agp.c b/sys/dev/agp/agp.c
index 53399e2..c992c93 100644
--- a/sys/dev/agp/agp.c
+++ b/sys/dev/agp/agp.c
@@ -763,7 +763,7 @@ agp_allocate_user(device_t dev, agp_allocate *alloc)
static int
agp_deallocate_user(device_t dev, int id)
{
- struct agp_memory *mem = agp_find_memory(dev, id);;
+ struct agp_memory *mem = agp_find_memory(dev, id);
if (mem) {
AGP_FREE_MEMORY(dev, mem);
diff --git a/sys/dev/ahci/ahci.c b/sys/dev/ahci/ahci.c
index cfbe43b..ca7b057 100644
--- a/sys/dev/ahci/ahci.c
+++ b/sys/dev/ahci/ahci.c
@@ -570,6 +570,12 @@ ahci_setup_interrupt(device_t dev)
device_printf(dev, "unable to setup interrupt\n");
return ENXIO;
}
+ if (ctlr->numirqs > 1) {
+ bus_describe_intr(dev, ctlr->irqs[i].r_irq,
+ ctlr->irqs[i].handle,
+ ctlr->irqs[i].mode == AHCI_IRQ_MODE_ONE ?
+ "ch%d" : "%d", i);
+ }
}
return (0);
}
@@ -622,8 +628,14 @@ ahci_intr_one(void *data)
int unit;
unit = irq->r_irq_rid - 1;
+ /* Some controllers have edge triggered IS. */
+ if (ctlr->quirks & AHCI_Q_EDGEIS)
+ ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit);
if ((arg = ctlr->interrupt[unit].argument))
ctlr->interrupt[unit].function(arg);
+ /* AHCI declares level triggered IS. */
+ if (!(ctlr->quirks & AHCI_Q_EDGEIS))
+ ATA_OUTL(ctlr->r_mem, AHCI_IS, 1 << unit);
}
static struct resource *
diff --git a/sys/dev/amd/amd.c b/sys/dev/amd/amd.c
index 5375399..f4b3d80 100644
--- a/sys/dev/amd/amd.c
+++ b/sys/dev/amd/amd.c
@@ -1657,7 +1657,7 @@ amdhandlemsgreject(struct amd_softc *amd)
tinfo_sync_period[pDCB->SyncPeriod - 4];
pDCB->tinfo.goal.offset = pDCB->SyncOffset;
pDCB->tinfo.current.period =
- tinfo_sync_period[pDCB->SyncPeriod - 4];;
+ tinfo_sync_period[pDCB->SyncPeriod - 4];
pDCB->tinfo.current.offset = pDCB->SyncOffset;
/*
diff --git a/sys/dev/amr/amr.c b/sys/dev/amr/amr.c
index 955c879..5ccf9b8 100644
--- a/sys/dev/amr/amr.c
+++ b/sys/dev/amr/amr.c
@@ -221,7 +221,7 @@ amr_attach(struct amr_softc *sc)
sc->amr_submit_command = amr_std_submit_command;
sc->amr_get_work = amr_std_get_work;
sc->amr_poll_command = amr_std_poll_command;
- amr_std_attach_mailbox(sc);;
+ amr_std_attach_mailbox(sc);
}
#ifdef AMR_BOARD_INIT
diff --git a/sys/dev/arcmsr/arcmsr.c b/sys/dev/arcmsr/arcmsr.c
index 0e6acbf..93466eb 100644
--- a/sys/dev/arcmsr/arcmsr.c
+++ b/sys/dev/arcmsr/arcmsr.c
@@ -1940,7 +1940,7 @@ static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
switch (pccb->csio.cdb_io.cdb_bytes[0]) {
case INQUIRY: {
unsigned char inqdata[36];
- char *buffer=pccb->csio.data_ptr;;
+ char *buffer=pccb->csio.data_ptr;
if (pccb->ccb_h.target_lun) {
pccb->ccb_h.status |= CAM_SEL_TIMEOUT;
diff --git a/sys/dev/ata/ata-all.c b/sys/dev/ata/ata-all.c
index 6bbff47..f342c81 100644
--- a/sys/dev/ata/ata-all.c
+++ b/sys/dev/ata/ata-all.c
@@ -1473,7 +1473,7 @@ ataaction(struct cam_sim *sim, union ccb *ccb)
d = &ch->curr[ccb->ccb_h.target_id];
else
d = &ch->user[ccb->ccb_h.target_id];
- if ((ch->flags & ATA_SATA) && (ch->flags & ATA_NO_SLAVE)) {
+ if (ch->flags & ATA_SATA) {
if (cts->xport_specific.sata.valid & CTS_SATA_VALID_REVISION)
d->revision = cts->xport_specific.sata.revision;
if (cts->xport_specific.ata.valid & CTS_SATA_VALID_MODE) {
@@ -1497,8 +1497,6 @@ ataaction(struct cam_sim *sim, union ccb *ccb)
}
if (cts->xport_specific.ata.valid & CTS_ATA_VALID_BYTECOUNT)
d->bytecount = cts->xport_specific.ata.bytecount;
- if (ch->flags & ATA_SATA)
- d->bytecount = min(8192, d->bytecount);
}
ccb->ccb_h.status = CAM_REQ_CMP;
xpt_done(ccb);
@@ -1515,7 +1513,7 @@ ataaction(struct cam_sim *sim, union ccb *ccb)
d = &ch->user[ccb->ccb_h.target_id];
cts->protocol = PROTO_ATA;
cts->protocol_version = PROTO_VERSION_UNSPECIFIED;
- if ((ch->flags & ATA_SATA) && (ch->flags & ATA_NO_SLAVE)) {
+ if (ch->flags & ATA_SATA) {
cts->transport = XPORT_SATA;
cts->transport_version = XPORT_VERSION_UNSPECIFIED;
cts->xport_specific.sata.mode = d->mode;
@@ -1604,7 +1602,7 @@ ataaction(struct cam_sim *sim, union ccb *ccb)
strncpy(cpi->hba_vid, "ATA", HBA_IDLEN);
strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
cpi->unit_number = cam_sim_unit(sim);
- if ((ch->flags & ATA_SATA) && (ch->flags & ATA_NO_SLAVE))
+ if (ch->flags & ATA_SATA)
cpi->transport = XPORT_SATA;
else
cpi->transport = XPORT_ATA;
diff --git a/sys/dev/ata/ata-raid.c b/sys/dev/ata/ata-raid.c
index 7bc88b5..1e97607 100644
--- a/sys/dev/ata/ata-raid.c
+++ b/sys/dev/ata/ata-raid.c
@@ -407,7 +407,7 @@ ata_raid_strategy(struct bio *bp)
if (rdp->status & AR_S_REBUILDING)
blk = ((lba / rdp->interleave) * rdp->width) * rdp->interleave +
(rdp->interleave * (drv % rdp->width)) +
- lba % rdp->interleave;;
+ lba % rdp->interleave;
if (bp->bio_cmd == BIO_READ) {
int src_online =
diff --git a/sys/dev/ata/chipsets/ata-ahci.c b/sys/dev/ata/chipsets/ata-ahci.c
index 39c5152..6811c79 100644
--- a/sys/dev/ata/chipsets/ata-ahci.c
+++ b/sys/dev/ata/chipsets/ata-ahci.c
@@ -656,9 +656,9 @@ ata_ahci_pm_write(device_t dev, int port, int reg, u_int32_t value)
ctp->cfis[3] = reg;
ctp->cfis[7] = port | ATA_D_LBA;
ctp->cfis[12] = value & 0xff;
- ctp->cfis[4] = (value >> 8) & 0xff;;
- ctp->cfis[5] = (value >> 16) & 0xff;;
- ctp->cfis[6] = (value >> 24) & 0xff;;
+ ctp->cfis[4] = (value >> 8) & 0xff;
+ ctp->cfis[5] = (value >> 16) & 0xff;
+ ctp->cfis[6] = (value >> 24) & 0xff;
ctp->cfis[15] = ATA_A_4BIT;
if (ata_ahci_issue_cmd(dev, 0, 100)) {
diff --git a/sys/dev/ata/chipsets/ata-ati.c b/sys/dev/ata/chipsets/ata-ati.c
index d464897..1dfd84b 100644
--- a/sys/dev/ata/chipsets/ata-ati.c
+++ b/sys/dev/ata/chipsets/ata-ati.c
@@ -53,6 +53,7 @@ __FBSDID("$FreeBSD$");
/* local prototypes */
static int ata_ati_chipinit(device_t dev);
+static int ata_ati_ixp700_ch_attach(device_t dev);
static int ata_ati_setmode(device_t dev, int target, int mode);
/* misc defines */
@@ -121,7 +122,7 @@ ata_ati_chipinit(device_t dev)
{
struct ata_pci_controller *ctlr = device_get_softc(dev);
device_t smbdev;
- int satacfg;
+ uint8_t satacfg;
if (ata_setup_interrupt(dev, ata_generic_intr))
return ENXIO;
@@ -145,13 +146,16 @@ ata_ati_chipinit(device_t dev)
(satacfg & 0x01) == 0 ? "disabled" : "enabled",
(satacfg & 0x08) == 0 ? "" : "combined mode, ",
(satacfg & 0x10) == 0 ? "primary" : "secondary");
-
+ ctlr->chipset_data = (void *)(uintptr_t)satacfg;
/*
* If SATA controller is enabled but combined mode is disabled,
* we have only one PATA channel. Ignore a non-existent channel.
*/
if ((satacfg & 0x09) == 0x01)
ctlr->ichannels &= ~(1 << ((satacfg & 0x10) >> 4));
+ else {
+ ctlr->ch_attach = ata_ati_ixp700_ch_attach;
+ }
}
break;
}
@@ -161,6 +165,23 @@ ata_ati_chipinit(device_t dev)
}
static int
+ata_ati_ixp700_ch_attach(device_t dev)
+{
+ struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
+ struct ata_channel *ch = device_get_softc(dev);
+ uint8_t satacfg = (uint8_t)(uintptr_t)ctlr->chipset_data;
+
+ /* Setup the usual register normal pci style. */
+ if (ata_pci_ch_attach(dev))
+ return ENXIO;
+
+ /* One of channels is PATA, another is SATA. */
+ if (ch->unit == ((satacfg & 0x10) >> 4))
+ ch->flags |= ATA_SATA;
+ return (0);
+}
+
+static int
ata_ati_setmode(device_t dev, int target, int mode)
{
device_t parent = device_get_parent(dev);
diff --git a/sys/dev/ata/chipsets/ata-siliconimage.c b/sys/dev/ata/chipsets/ata-siliconimage.c
index 066e9280..85b0830 100644
--- a/sys/dev/ata/chipsets/ata-siliconimage.c
+++ b/sys/dev/ata/chipsets/ata-siliconimage.c
@@ -716,9 +716,9 @@ ata_siiprb_pm_write(device_t dev, int port, int reg, u_int32_t value)
prb->fis[3] = reg;
prb->fis[7] = port;
prb->fis[12] = value & 0xff;
- prb->fis[4] = (value >> 8) & 0xff;;
- prb->fis[5] = (value >> 16) & 0xff;;
- prb->fis[6] = (value >> 24) & 0xff;;
+ prb->fis[4] = (value >> 8) & 0xff;
+ prb->fis[5] = (value >> 16) & 0xff;
+ prb->fis[6] = (value >> 24) & 0xff;
if (ata_siiprb_issue_cmd(dev)) {
device_printf(dev, "error writing PM port\n");
return ATA_E_ABORT;
diff --git a/sys/dev/ath/ath_hal/ar5211/ar5211_reset.c b/sys/dev/ath/ath_hal/ar5211/ar5211_reset.c
index 1ed6214..438bf5c 100644
--- a/sys/dev/ath/ath_hal/ar5211/ar5211_reset.c
+++ b/sys/dev/ath/ath_hal/ar5211/ar5211_reset.c
@@ -136,7 +136,7 @@ static void ar5211GetLowerUpperPcdacs(uint16_t pcdac,
uint16_t channel, const PCDACS_EEPROM *pSrcStruct,
uint16_t *pLowerPcdac, uint16_t *pUpperPcdac);
-static void ar5211SetRfgain(struct ath_hal *, const GAIN_VALUES *);;
+static void ar5211SetRfgain(struct ath_hal *, const GAIN_VALUES *);
static void ar5211RequestRfgain(struct ath_hal *);
static HAL_BOOL ar5211InvalidGainReadback(struct ath_hal *, GAIN_VALUES *);
static HAL_BOOL ar5211IsGainAdjustNeeded(struct ath_hal *, const GAIN_VALUES *);
diff --git a/sys/dev/ath/ath_hal/ar5212/ar5212_interrupts.c b/sys/dev/ath/ath_hal/ar5212/ar5212_interrupts.c
index b9cee9a..47f9e74 100644
--- a/sys/dev/ath/ath_hal/ar5212/ar5212_interrupts.c
+++ b/sys/dev/ath/ath_hal/ar5212/ar5212_interrupts.c
@@ -76,7 +76,7 @@ ar5212GetPendingInterrupts(struct ath_hal *ah, HAL_INT *masked)
isr = OS_REG_READ(ah, AR_ISR_RAC);
if (isr == 0xffffffff) {
*masked = 0;
- return AH_FALSE;;
+ return AH_FALSE;
}
*masked = isr & HAL_INT_COMMON;
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c b/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c
index 7b6f951..4b66d04 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c
+++ b/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c
@@ -104,7 +104,7 @@ ar5416GetPendingInterrupts(struct ath_hal *ah, HAL_INT *masked)
isr = OS_REG_READ(ah, AR_ISR_RAC);
if (isr == 0xffffffff) {
*masked = 0;
- return AH_FALSE;;
+ return AH_FALSE;
}
*masked = isr & HAL_INT_COMMON;
diff --git a/sys/dev/bktr/bktr_i2c.c b/sys/dev/bktr/bktr_i2c.c
index 4032258..06a6547 100644
--- a/sys/dev/bktr/bktr_i2c.c
+++ b/sys/dev/bktr/bktr_i2c.c
@@ -331,7 +331,7 @@ bti2c_smb_readb(device_t dev, u_char slave, char cmd, char *byte)
/* clear status bits */
OUTL(sc,BKTR_INT_STAT, (BT848_INT_RACK | BT848_INT_I2CDONE));
- OUTL(sc,BKTR_I2C_DATA_CTL, ((slave & 0xff) << 24) | (u_char)cmd);;
+ OUTL(sc,BKTR_I2C_DATA_CTL, ((slave & 0xff) << 24) | (u_char)cmd);
BTI2C_DEBUG(printf("r%lx/", (u_long)(((slave & 0xff) << 24) | (u_char)cmd)));
diff --git a/sys/dev/cfe/cfe_api.c b/sys/dev/cfe/cfe_api.c
index bf3fa66..15f6ae7 100644
--- a/sys/dev/cfe/cfe_api.c
+++ b/sys/dev/cfe/cfe_api.c
@@ -160,7 +160,7 @@ cfe_enumenv(int idx, char *name, int namelen, char *val, int vallen)
{
cfe_xiocb_t xiocb;
- xiocb.xiocb_fcode = CFE_CMD_ENV_ENUM;
+ xiocb.xiocb_fcode = CFE_CMD_ENV_SET;
xiocb.xiocb_status = 0;
xiocb.xiocb_handle = 0;
xiocb.xiocb_flags = 0;
diff --git a/sys/dev/cfe/cfe_console.c b/sys/dev/cfe/cfe_console.c
index 1461ef2..2c38096 100644
--- a/sys/dev/cfe/cfe_console.c
+++ b/sys/dev/cfe/cfe_console.c
@@ -84,12 +84,14 @@ CONSOLE_DRIVER(cfe);
static void
cn_drvinit(void *unused)
{
+ char output[32];
struct tty *tp;
if (cfe_consdev.cn_pri != CN_DEAD &&
cfe_consdev.cn_name[0] != '\0') {
tp = tty_alloc(&cfe_ttydevsw, NULL);
- tty_makedev(tp, NULL, "cfecons");
+ tty_makedev(tp, NULL, "%s", output);
+ tty_makealias(tp, "cfecons");
}
}
@@ -115,21 +117,15 @@ cfe_tty_close(struct tty *tp)
static void
cfe_tty_outwakeup(struct tty *tp)
{
- int len, written, rc;
+ int len;
u_char buf[CFEBURSTLEN];
for (;;) {
len = ttydisc_getc(tp, buf, sizeof buf);
if (len == 0)
break;
-
- written = 0;
- while (written < len) {
- rc = cfe_write(conhandle, &buf[written], len - written);
- if (rc < 0)
- break;
- written += rc;
- }
+ while (cfe_write(conhandle, buf, len) == 0)
+ continue;
}
}
@@ -188,9 +184,13 @@ cfe_cnterm(struct consdev *cp)
static int
cfe_cngetc(struct consdev *cp)
{
+ int result;
unsigned char ch;
- if (cfe_read(conhandle, &ch, 1) == 1) {
+ while ((result = cfe_read(conhandle, &ch, 1)) == 0)
+ continue;
+
+ if (result > 0) {
#if defined(KDB) && defined(ALT_BREAK_TO_DEBUGGER)
int kdb_brk;
diff --git a/sys/dev/cs/if_cs.c b/sys/dev/cs/if_cs.c
index 826f4ad..8baaafd 100644
--- a/sys/dev/cs/if_cs.c
+++ b/sys/dev/cs/if_cs.c
@@ -475,7 +475,7 @@ int
cs_attach(device_t dev)
{
int error, media=0;
- struct cs_softc *sc = device_get_softc(dev);;
+ struct cs_softc *sc = device_get_softc(dev);
struct ifnet *ifp;
sc->dev = dev;
diff --git a/sys/dev/cxgb/common/cxgb_t3_hw.c b/sys/dev/cxgb/common/cxgb_t3_hw.c
index e340058..2c205ec 100644
--- a/sys/dev/cxgb/common/cxgb_t3_hw.c
+++ b/sys/dev/cxgb/common/cxgb_t3_hw.c
@@ -4443,7 +4443,7 @@ int __devinit t3_prep_adapter(adapter_t *adapter,
adapter->params.info = ai;
adapter->params.nports = ai->nports0 + ai->nports1;
- adapter->params.chan_map = !!ai->nports0 | (!!ai->nports1 << 1);
+ adapter->params.chan_map = (!!ai->nports0) | (!!ai->nports1 << 1);
adapter->params.rev = t3_read_reg(adapter, A_PL_REV);
/*
diff --git a/sys/dev/cxgb/cxgb_sge.c b/sys/dev/cxgb/cxgb_sge.c
index 7565347..dc2aee8 100644
--- a/sys/dev/cxgb/cxgb_sge.c
+++ b/sys/dev/cxgb/cxgb_sge.c
@@ -152,7 +152,7 @@ struct rx_desc {
uint32_t len_gen;
uint32_t gen2;
uint32_t addr_hi;
-} __packed;;
+} __packed;
struct rsp_desc { /* response queue descriptor */
struct rss_header rss_hdr;
diff --git a/sys/dev/de/if_de.c b/sys/dev/de/if_de.c
index b785fe4..a9b9f31 100644
--- a/sys/dev/de/if_de.c
+++ b/sys/dev/de/if_de.c
@@ -2290,7 +2290,7 @@ tulip_identify_asante_nic(tulip_softc_t * const sc)
mi->mi_gpr_length = 0;
mi->mi_gpr_offset = 0;
mi->mi_reset_length = 0;
- mi->mi_reset_offset = 0;;
+ mi->mi_reset_offset = 0;
mi->mi_phyaddr = TULIP_MII_NOPHY;
for (idx = 20; idx > 0 && mi->mi_phyaddr == TULIP_MII_NOPHY; idx--) {
diff --git a/sys/dev/dpt/dpt.h b/sys/dev/dpt/dpt.h
index b1562d3..c31e6e3 100644
--- a/sys/dev/dpt/dpt.h
+++ b/sys/dev/dpt/dpt.h
@@ -26,6 +26,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
+ * $FreeBSD$
*/
/*
@@ -39,9 +40,6 @@
* FreeBSD.ORG; Great O/S to work on and for.
*/
-
-#ident "$FreeBSD$"
-
#ifndef _DPT_H
#define _DPT_H
diff --git a/sys/dev/dpt/dpt_scsi.c b/sys/dev/dpt/dpt_scsi.c
index eb1f3f4..2f72407 100644
--- a/sys/dev/dpt/dpt_scsi.c
+++ b/sys/dev/dpt/dpt_scsi.c
@@ -27,7 +27,6 @@
* SUCH DAMAGE.
*/
-#ident "$FreeBSD$"
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
diff --git a/sys/dev/e1000/if_em.c b/sys/dev/e1000/if_em.c
index 8756b0c..f0d24ac 100644
--- a/sys/dev/e1000/if_em.c
+++ b/sys/dev/e1000/if_em.c
@@ -4346,7 +4346,7 @@ em_free_receive_structures(struct adapter *adapter)
static int
em_rxeof(struct adapter *adapter, int count)
{
- struct ifnet *ifp = adapter->ifp;;
+ struct ifnet *ifp = adapter->ifp;
struct mbuf *mp;
u8 status, accept_frame = 0, eop = 0;
u16 len, desc_len, prev_len_adj;
diff --git a/sys/dev/ep/if_ep.c b/sys/dev/ep/if_ep.c
index a1bbb01..59dd1c4 100644
--- a/sys/dev/ep/if_ep.c
+++ b/sys/dev/ep/if_ep.c
@@ -815,7 +815,7 @@ read_again:
#endif
EP_FRST(sc, F_RX_FIRST);
status = CSR_READ_2(sc, EP_W1_RX_STATUS);
- if (!status & ERR_RX_INCOMPLETE) {
+ if (!(status & ERR_RX_INCOMPLETE)) {
/*
* We see if by now, the packet has completly
* arrived
diff --git a/sys/dev/ex/if_ex.c b/sys/dev/ex/if_ex.c
index 7a3d74f..d9e0c98 100644
--- a/sys/dev/ex/if_ex.c
+++ b/sys/dev/ex/if_ex.c
@@ -677,7 +677,7 @@ ex_tx_intr(struct ex_softc *sc)
while (sc->tx_head != sc->tx_tail) {
CSR_WRITE_2(sc, HOST_ADDR_REG, sc->tx_head);
- if (! CSR_READ_2(sc, IO_PORT_REG) & Done_bit)
+ if (!(CSR_READ_2(sc, IO_PORT_REG) & Done_bit))
break;
tx_status = CSR_READ_2(sc, IO_PORT_REG);
diff --git a/sys/dev/fatm/if_fatm.c b/sys/dev/fatm/if_fatm.c
index 18b619a..5dd0c1d 100644
--- a/sys/dev/fatm/if_fatm.c
+++ b/sys/dev/fatm/if_fatm.c
@@ -858,7 +858,7 @@ fatm_getprom(struct fatm_softc *sc)
NEXT_QUEUE_ENTRY(sc->cmdqueue.head, FATM_CMD_QLEN);
q->error = 0;
- q->cb = NULL;;
+ q->cb = NULL;
H_SETSTAT(q->q.statp, FATM_STAT_PENDING);
H_SYNCSTAT_PREWRITE(sc, q->q.statp);
diff --git a/sys/dev/firewire/sbp.c b/sys/dev/firewire/sbp.c
index 02ceb78..0b9d1fa 100644
--- a/sys/dev/firewire/sbp.c
+++ b/sys/dev/firewire/sbp.c
@@ -1573,7 +1573,7 @@ END_DEBUG
bcopy(&sbp_cmd_status->s_keydep[0],
&sense->sense_key_spec[0], 3);
- ocb->ccb->csio.scsi_status = sbp_cmd_status->status;;
+ ocb->ccb->csio.scsi_status = sbp_cmd_status->status;
ocb->ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR
| CAM_AUTOSNS_VALID;
/*
@@ -2148,7 +2148,7 @@ sbp_free_target(struct sbp_target *target)
}
STAILQ_INIT(&target->xferlist);
free(target->luns, M_SBP);
- target->num_lun = 0;;
+ target->num_lun = 0;
target->luns = NULL;
target->fwdev = NULL;
}
@@ -2318,7 +2318,7 @@ sbp_timeout(void *arg)
sbp_cam_detach_target(target);
if (target->luns != NULL)
free(target->luns, M_SBP);
- target->num_lun = 0;;
+ target->num_lun = 0;
target->luns = NULL;
target->fwdev = NULL;
#endif
diff --git a/sys/dev/hatm/if_hatm.c b/sys/dev/hatm/if_hatm.c
index 5344fe4..bbeca8d 100644
--- a/sys/dev/hatm/if_hatm.c
+++ b/sys/dev/hatm/if_hatm.c
@@ -836,7 +836,7 @@ hatm_init_rx_buffer_pool(struct hatm_softc *sc,
uint32_t lbuf_addr; /* address of current buffer */
u_int i;
- row_size = sc->bytes_per_row;;
+ row_size = sc->bytes_per_row;
row_addr = start * row_size;
lbuf_size = sc->cells_per_lbuf * 48;
lbufs_per_row = sc->cells_per_row / sc->cells_per_lbuf;
@@ -889,7 +889,7 @@ hatm_init_tx_buffer_pool(struct hatm_softc *sc,
uint32_t lbuf_addr; /* address of current buffer */
u_int i;
- row_size = sc->bytes_per_row;;
+ row_size = sc->bytes_per_row;
row_addr = start * row_size;
lbuf_size = sc->cells_per_lbuf * 48;
lbufs_per_row = sc->cells_per_row / sc->cells_per_lbuf;
diff --git a/sys/dev/hptmv/entry.c b/sys/dev/hptmv/entry.c
index 843281a..bce7458 100644
--- a/sys/dev/hptmv/entry.c
+++ b/sys/dev/hptmv/entry.c
@@ -1341,7 +1341,7 @@ init_adapter(IAL_ADAPTER_T *pAdapter)
#endif
&pAdapter->io_dma_parent /* tag */))
{
- return ENXIO;;
+ return ENXIO;
}
diff --git a/sys/dev/ic/ns16550.h b/sys/dev/ic/ns16550.h
index 635270c..400088c 100644
--- a/sys/dev/ic/ns16550.h
+++ b/sys/dev/ic/ns16550.h
@@ -52,7 +52,6 @@
#define REG_IIR com_iir
#define IIR_IMASK 0xf
#define IIR_RXTOUT 0xc
-#define IIR_BUSY 0x7
#define IIR_RLS 0x6
#define IIR_RXRDY 0x4
#define IIR_TXRDY 0x2
@@ -182,10 +181,6 @@
#define com_xoff1 6 /* XOFF 1 character (R/W) */
#define com_xoff2 7 /* XOFF 2 character (R/W) */
-#define com_usr 39 /* Octeon 16750/16550 Uart Status Reg */
-#define REG_USR com_usr
-#define USR_TXFIFO_NOTFULL 2 /* Uart TX FIFO Not full */
-
/* 16950 register #1. Access enabled by ACR[7]. Also requires !LCR[7]. */
#define com_asr 1 /* additional status register (R[0-7]/W[0-1]) */
diff --git a/sys/dev/if_ndis/if_ndis_usb.c b/sys/dev/if_ndis/if_ndis_usb.c
index 8f22420..b872f9a 100644
--- a/sys/dev/if_ndis/if_ndis_usb.c
+++ b/sys/dev/if_ndis/if_ndis_usb.c
@@ -205,7 +205,7 @@ ndisusb_detach(device_t self)
{
int i;
struct ndis_softc *sc = device_get_softc(self);
- struct ndisusb_ep *ne;;
+ struct ndisusb_ep *ne;
sc->ndisusb_status |= NDISUSB_STATUS_DETACH;
diff --git a/sys/dev/iicbus/xlr_eeprom.c b/sys/dev/iicbus/xlr_eeprom.c
deleted file mode 100644
index 613655a..0000000
--- a/sys/dev/iicbus/xlr_eeprom.c
+++ /dev/null
@@ -1,156 +0,0 @@
-/*-
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD */
-
-#include <sys/cdefs.h>
-/*
- * reading eeprom for the mac address .
- */
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/module.h>
-#include <sys/mutex.h>
-#include <sys/bus.h>
-#include <sys/resource.h>
-#include <sys/rman.h>
-#include <sys/sysctl.h>
-
-#include <machine/bus.h>
-#include <machine/cpu.h>
-#include <machine/cpufunc.h>
-#include <machine/frame.h>
-#include <machine/resource.h>
-
-#include <dev/iicbus/iiconf.h>
-
-#include "iicbus_if.h"
-
-#define IIC_M_WR 0 /* write operation */
-#define XLR_EEPROM_ADDR 0xa0 /* slave address */
-#define XLR_EEPROM_ETH_MAC_ADDR 0x20
-
-
-struct xlr_eeprom_softc {
- device_t sc_dev;
- struct mtx sc_mtx;
- uint8_t mac_address[6];
-};
-
-static void xlr_eeprom_read_mac(struct xlr_eeprom_softc *);
-
-static int
-xlr_eeprom_probe(device_t dev)
-{
- /* XXX really probe? */
- device_set_desc(dev, "reading eeprom for mac address");
- return (0);
-}
-
-static int
-xlr_eeprom_mac_sysctl(SYSCTL_HANDLER_ARGS)
-{
- struct xlr_eeprom_softc *sc = arg1;
- int temp ;
-
- xlr_eeprom_read_mac(sc);
- return sysctl_handle_int(oidp, &temp, 0, req);
-}
-
-
-static int
-xlr_eeprom_attach(device_t dev)
-{
- struct xlr_eeprom_softc *sc = device_get_softc(dev);
- struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(dev);
- struct sysctl_oid *tree = device_get_sysctl_tree(dev);
-
- sc->sc_dev = dev;
-
-
- mtx_init(&sc->sc_mtx, "eeprom", "eeprom", MTX_DEF);
-
- SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
- "eeprom-mac", CTLTYPE_INT | CTLFLAG_RD, sc, 0,
- xlr_eeprom_mac_sysctl, "I", "mac address");
-
- return (0);
-}
-
-static int
-xlr_eeprom_read(device_t dev, int reg)
-{
- uint8_t addr = reg;
- uint8_t data[1];
- struct iic_msg msgs[2] = {
- { XLR_EEPROM_ADDR, IIC_M_WR, 1, &addr },
- { XLR_EEPROM_ADDR, IIC_M_RD, 1, data },
- };
-
- return iicbus_transfer(dev, msgs, 2) != 0 ? -1 : data[0];
-}
-
-
-static void
-xlr_eeprom_read_mac(struct xlr_eeprom_softc *sc)
-{
- int v;
- int i;
-
- mtx_lock(&sc->sc_mtx);
- printf("\nmac address is: \n");
- for(i=0; i<6; i++){
- v = xlr_eeprom_read(sc->sc_dev, XLR_EEPROM_ETH_MAC_ADDR+i);
- sc->mac_address[i] = v;
- if(i != 5)
- printf("%x:", sc->mac_address[i]);
- else
- printf("%x\n", sc->mac_address[i]);
- }
- mtx_unlock(&sc->sc_mtx);
-}
-
-static device_method_t xlr_eeprom_methods[] = {
- DEVMETHOD(device_probe, xlr_eeprom_probe),
- DEVMETHOD(device_attach, xlr_eeprom_attach),
-
- {0, 0},
-};
-
-static driver_t xlr_eeprom_driver = {
- "xlr_eeprom",
- xlr_eeprom_methods,
- sizeof(struct xlr_eeprom_softc),
-};
-static devclass_t xlr_eeprom_devclass;
-
-DRIVER_MODULE(xlr_eeprom, iicbus, xlr_eeprom_driver, xlr_eeprom_devclass, 0, 0);
-MODULE_VERSION(xlr_eeprom, 1);
-MODULE_DEPEND(xlr_eeprom, iicbus, 1, 1, 1);
diff --git a/sys/dev/iicbus/xlr_rtc.c b/sys/dev/iicbus/xlr_rtc.c
deleted file mode 100644
index b53c100..0000000
--- a/sys/dev/iicbus/xlr_rtc.c
+++ /dev/null
@@ -1,140 +0,0 @@
-/*-
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD */
-
-#include <sys/cdefs.h>
-/*
- * RTC chip sitting on the I2C bus.
- */
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/bus.h>
-#include <sys/clock.h>
-#include <sys/time.h>
-#include <sys/resource.h>
-#include <sys/rman.h>
-
-#include <mips/include/bus.h>
-#include <mips/include/cpu.h>
-#include <mips/include/cpufunc.h>
-#include <mips/include/frame.h>
-#include <mips/include/resource.h>
-
-#include <dev/iicbus/iiconf.h>
-
-#include "iicbus_if.h"
-#include "clock_if.h"
-
-#define IIC_M_WR 0 /* write operation */
-#define XLR_SLAVE_ADDR (0xd0 ) /* slave address */
-#define XLR_RTC_COUNTER 0 /* counter (bytes 0-3) */
-#define NANOSEC 1000000000
-
-struct xlr_rtc_softc {
- device_t sc_dev;
-};
-
-static int
-xlr_rtc_probe(device_t dev)
-{
- device_set_desc(dev, "RTC on XLR board");
- return (0);
-}
-
-static int
-xlr_rtc_attach(device_t dev)
-{
- struct xlr_rtc_softc *sc = device_get_softc(dev);
-
- sc->sc_dev = dev;
-
- clock_register(dev, 1000);
- return (0);
-}
-
-static int
-xlr_rtc_gettime(device_t dev, struct timespec *ts)
-{
- uint8_t addr[1] = { XLR_RTC_COUNTER };
- uint8_t secs[4];
- struct iic_msg msgs[2] = {
- { XLR_SLAVE_ADDR, IIC_M_WR, 1, addr },
- { XLR_SLAVE_ADDR, IIC_M_RD, 4, secs },
- };
- int error;
-
- error = iicbus_transfer(dev, msgs, 2);
- if (error == 0) {
- /* counter has seconds since epoch */
- ts->tv_sec = (secs[3] << 24) | (secs[2] << 16)
- | (secs[1] << 8) | (secs[0] << 0);
- ts->tv_nsec = NANOSEC / 2;
- }
- return error;
-}
-
-static int
-xlr_rtc_settime(device_t dev, struct timespec *ts)
-{
- /* NB: register pointer precedes actual data */
- uint8_t data[5] = { XLR_RTC_COUNTER };
- struct iic_msg msgs[1] = {
- { XLR_SLAVE_ADDR, IIC_M_WR, 5, data },
- };
-
- data[1] = (ts->tv_sec >> 0) & 0xff;
- data[2] = (ts->tv_sec >> 8) & 0xff;
- data[3] = (ts->tv_sec >> 16) & 0xff;
- data[4] = (ts->tv_sec >> 24) & 0xff;
-
- return iicbus_transfer(dev, msgs, 1);
-}
-
-static device_method_t xlr_rtc_methods[] = {
- DEVMETHOD(device_probe, xlr_rtc_probe),
- DEVMETHOD(device_attach, xlr_rtc_attach),
-
- DEVMETHOD(clock_gettime, xlr_rtc_gettime),
- DEVMETHOD(clock_settime, xlr_rtc_settime),
-
- {0, 0},
-};
-
-static driver_t xlr_rtc_driver = {
- "xlr_rtc",
- xlr_rtc_methods,
- sizeof(struct xlr_rtc_softc),
-};
-static devclass_t xlr_rtc_devclass;
-
-DRIVER_MODULE(xlr_rtc, iicbus, xlr_rtc_driver, xlr_rtc_devclass, 0, 0);
-MODULE_VERSION(xlr_rtc, 1);
-MODULE_DEPEND(xlr_rtc, iicbus, 1, 1, 1);
diff --git a/sys/dev/iicbus/xlr_temperature.c b/sys/dev/iicbus/xlr_temperature.c
deleted file mode 100644
index 48d8490..0000000
--- a/sys/dev/iicbus/xlr_temperature.c
+++ /dev/null
@@ -1,161 +0,0 @@
-/*-
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD */
-
-#include <sys/cdefs.h>
-/*
- * temperature sensor chip sitting on the I2C bus.
- */
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/module.h>
-#include <sys/mutex.h>
-#include <sys/bus.h>
-#include <sys/resource.h>
-#include <sys/rman.h>
-#include <sys/sysctl.h>
-#include <mips/xlr/board.h>
-
-#include <machine/bus.h>
-#include <machine/cpu.h>
-#include <machine/cpufunc.h>
-#include <machine/frame.h>
-#include <machine/resource.h>
-
-#include <dev/iicbus/iiconf.h>
-
-#include "iicbus_if.h"
-
-#define IIC_M_WR 0 /* write operation */
-#define XLR_TEMPSENSOR_ADDR 0x98 /* slave address */
-#define XLR_ATX8_TEMPSENSOR_ADDR 0x9a /* slave address */
-#define XLR_TEMPSENSOR_EXT_TEMP 1
-
-
-struct xlr_temperature_softc {
- device_t sc_dev;
- struct mtx sc_mtx;
- int sc_curtemp;
- int sc_lastupdate; /* in ticks */
-};
-
-static void xlr_temperature_update(struct xlr_temperature_softc *);
-
-static int
-xlr_temperature_probe(device_t dev)
-{
- /* XXX really probe? */
- device_set_desc(dev, "temperature sensor on XLR");
- return (0);
-}
-
-static int
-xlr_temperature_sysctl_temp(SYSCTL_HANDLER_ARGS)
-{
- struct xlr_temperature_softc *sc = arg1;
- int temp;
-
- xlr_temperature_update(sc);
- temp = sc->sc_curtemp ;
- return sysctl_handle_int(oidp, &temp, 0, req);
-}
-
-
-static int
-xlr_temperature_attach(device_t dev)
-{
- struct xlr_temperature_softc *sc = device_get_softc(dev);
- struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(dev);
- struct sysctl_oid *tree = device_get_sysctl_tree(dev);
-
- sc->sc_dev = dev;
- mtx_init(&sc->sc_mtx, "xlr_temperature", "xlr_temperature", MTX_DEF);
-
- SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
- "temp", CTLTYPE_INT | CTLFLAG_RD, sc, 0,
- xlr_temperature_sysctl_temp, "I", "operating temperature");
-
- return (0);
-}
-
-static int
-xlr_temperature_read(device_t dev, int reg)
-{
- uint8_t addr = reg;
- uint8_t data[1];
- struct iic_msg msgs[2] = {
- { XLR_TEMPSENSOR_ADDR, IIC_M_WR, 1, &addr },
- { XLR_TEMPSENSOR_ADDR, IIC_M_RD, 1, data },
- };
-
- if(xlr_boot1_info.board_major_version == RMI_XLR_BOARD_ARIZONA_VIII)
- {
- msgs[0].slave = XLR_ATX8_TEMPSENSOR_ADDR ;
- msgs[1].slave = XLR_ATX8_TEMPSENSOR_ADDR ;
- }
-
- return iicbus_transfer(dev, msgs, 2) != 0 ? -1 : data[0];
-}
-
-
-static void
-xlr_temperature_update(struct xlr_temperature_softc *sc)
-{
- int v;
-
- mtx_lock(&sc->sc_mtx);
- /* NB: no point in updating any faster than the chip */
- if (ticks - sc->sc_lastupdate > hz) {
- v = xlr_temperature_read(sc->sc_dev, XLR_TEMPSENSOR_EXT_TEMP);
- if (v >= 0)
- sc->sc_curtemp = v;
- sc->sc_lastupdate = ticks;
- }
- mtx_unlock(&sc->sc_mtx);
-}
-
-static device_method_t xlr_temperature_methods[] = {
- DEVMETHOD(device_probe, xlr_temperature_probe),
- DEVMETHOD(device_attach, xlr_temperature_attach),
-
- {0, 0},
-};
-
-static driver_t xlr_temperature_driver = {
- "xlr_temperature",
- xlr_temperature_methods,
- sizeof(struct xlr_temperature_softc),
-};
-static devclass_t xlr_temperature_devclass;
-
-DRIVER_MODULE(xlr_temperature, iicbus, xlr_temperature_driver, xlr_temperature_devclass, 0, 0);
-MODULE_VERSION(xlr_temperature, 1);
-MODULE_DEPEND(xlr_temperature, iicbus, 1, 1, 1);
diff --git a/sys/dev/iir/iir.c b/sys/dev/iir/iir.c
index f5f6d7e..b0915c2 100644
--- a/sys/dev/iir/iir.c
+++ b/sys/dev/iir/iir.c
@@ -153,7 +153,6 @@ static void iir_action(struct cam_sim *sim, union ccb *ccb);
static void iir_poll(struct cam_sim *sim);
static void iir_shutdown(void *arg, int howto);
static void iir_timeout(void *arg);
-static void iir_watchdog(void *arg);
static void gdt_eval_mapping(u_int32_t size, int *cyls, int *heads,
int *secs);
@@ -1484,40 +1483,6 @@ iir_timeout(void *arg)
GDT_DPRINTF(GDT_D_TIMEOUT, ("iir_timeout(%p)\n", gccb));
}
-static void
-iir_watchdog(void *arg)
-{
- struct gdt_softc *gdt;
-
- gdt = (struct gdt_softc *)arg;
- GDT_DPRINTF(GDT_D_DEBUG, ("iir_watchdog(%p)\n", gdt));
-
- {
- int ccbs = 0, ucmds = 0, frees = 0, pends = 0;
- struct gdt_ccb *p;
- struct ccb_hdr *h;
- struct gdt_ucmd *u;
-
- for (h = TAILQ_FIRST(&gdt->sc_ccb_queue); h != NULL;
- h = TAILQ_NEXT(h, sim_links.tqe))
- ccbs++;
- for (u = TAILQ_FIRST(&gdt->sc_ucmd_queue); u != NULL;
- u = TAILQ_NEXT(u, links))
- ucmds++;
- for (p = SLIST_FIRST(&gdt->sc_free_gccb); p != NULL;
- p = SLIST_NEXT(p, sle))
- frees++;
- for (p = SLIST_FIRST(&gdt->sc_pending_gccb); p != NULL;
- p = SLIST_NEXT(p, sle))
- pends++;
-
- GDT_DPRINTF(GDT_D_TIMEOUT, ("ccbs %d ucmds %d frees %d pends %d\n",
- ccbs, ucmds, frees, pends));
- }
-
- timeout(iir_watchdog, (caddr_t)gdt, hz * 15);
-}
-
static void
iir_shutdown( void *arg, int howto )
{
diff --git a/sys/dev/iir/iir_pci.c b/sys/dev/iir/iir_pci.c
index c75f084..19d09c6 100644
--- a/sys/dev/iir/iir_pci.c
+++ b/sys/dev/iir/iir_pci.c
@@ -29,7 +29,6 @@
* SUCH DAMAGE.
*/
-#ident "$Id: iir_pci.c 1.2 2003/08/26 12:29:55 achim Exp $"
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
diff --git a/sys/dev/iscsi/initiator/isc_sm.c b/sys/dev/iscsi/initiator/isc_sm.c
index 3f4f377..ec9d346 100644
--- a/sys/dev/iscsi/initiator/isc_sm.c
+++ b/sys/dev/iscsi/initiator/isc_sm.c
@@ -399,7 +399,7 @@ ism_recv(isc_session_t *sp, pduq_t *pq)
if(sp->flags & ISC_STALLED) {
sdebug(4, "window opened: max=0x%x exp=0x%x opcode=0x%x cmd=0x%x cws=%d.",
sn->maxCmd, sn->expCmd, bhs->opcode, sn->cmd, sp->cws);
- sp->flags &= ~ISC_STALLED;;
+ sp->flags &= ~ISC_STALLED;
}
}
}
diff --git a/sys/dev/isp/isp.c b/sys/dev/isp/isp.c
index 2a4718c..7ea8274 100644
--- a/sys/dev/isp/isp.c
+++ b/sys/dev/isp/isp.c
@@ -6658,8 +6658,8 @@ isp_mbox_continue(ispsoftc_t *isp)
ptr = isp->isp_mbxworkp;
switch (isp->isp_lastmbxcmd) {
case MBOX_WRITE_RAM_WORD:
- mbs.param[1] = isp->isp_mbxwrk1++;;
- mbs.param[2] = *ptr++;;
+ mbs.param[1] = isp->isp_mbxwrk1++;
+ mbs.param[2] = *ptr++;
break;
case MBOX_READ_RAM_WORD:
*ptr++ = isp->isp_mboxtmp[2];
@@ -6669,7 +6669,7 @@ isp_mbox_continue(ispsoftc_t *isp)
offset = isp->isp_mbxwrk1;
offset |= isp->isp_mbxwrk8 << 16;
- mbs.param[2] = *ptr++;;
+ mbs.param[2] = *ptr++;
mbs.param[1] = offset;
mbs.param[8] = offset >> 16;
isp->isp_mbxwrk1 = ++offset;
diff --git a/sys/dev/isp/isp_library.c b/sys/dev/isp/isp_library.c
index 5e64309..acc2492 100644
--- a/sys/dev/isp/isp_library.c
+++ b/sys/dev/isp/isp_library.c
@@ -670,7 +670,7 @@ isp_clear_commands(ispsoftc_t *isp)
} else {
ct_entry_t *ctio = (ct_entry_t *) local;
ctio->ct_syshandle = handle & 0xffff;
- ctio->ct_status = CT_HBA_RESET & 0xff;;
+ ctio->ct_status = CT_HBA_RESET & 0xff;
ctio->ct_header.rqs_entry_type = RQSTYPE_CTIO;
}
isp_async(isp, ISPASYNC_TARGET_ACTION, local);
diff --git a/sys/dev/iwn/if_iwn.c b/sys/dev/iwn/if_iwn.c
index 9e032f7..3eab670 100644
--- a/sys/dev/iwn/if_iwn.c
+++ b/sys/dev/iwn/if_iwn.c
@@ -171,8 +171,10 @@ void iwn_set_led(struct iwn_softc *, uint8_t, uint8_t, uint8_t);
int iwn_set_critical_temp(struct iwn_softc *);
int iwn_set_timing(struct iwn_softc *, struct ieee80211_node *);
void iwn4965_power_calibration(struct iwn_softc *, int);
-int iwn4965_set_txpower(struct iwn_softc *, int);
-int iwn5000_set_txpower(struct iwn_softc *, int);
+int iwn4965_set_txpower(struct iwn_softc *,
+ struct ieee80211_channel *, int);
+int iwn5000_set_txpower(struct iwn_softc *,
+ struct ieee80211_channel *, int);
int iwn4965_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
int iwn5000_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
int iwn_get_noise(const struct iwn_rx_general_stats *);
@@ -3694,13 +3696,16 @@ iwn_set_timing(struct iwn_softc *sc, struct ieee80211_node *ni)
void
iwn4965_power_calibration(struct iwn_softc *sc, int temp)
{
+ struct ifnet *ifp = sc->sc_ifp;
+ struct ieee80211com *ic = ifp->if_l2com;
+
/* Adjust TX power if need be (delta >= 3 degC.) */
DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d->%d\n",
__func__, sc->temp, temp);
if (abs(temp - sc->temp) >= 3) {
/* Record temperature of last calibration. */
sc->temp = temp;
- (void)iwn4965_set_txpower(sc, 1);
+ (void)iwn4965_set_txpower(sc, ic->ic_bsschan, 1);
}
}
@@ -3710,7 +3715,8 @@ iwn4965_power_calibration(struct iwn_softc *sc, int temp)
* the current temperature and the current voltage.
*/
int
-iwn4965_set_txpower(struct iwn_softc *sc, int async)
+iwn4965_set_txpower(struct iwn_softc *sc, struct ieee80211_channel *ch,
+ int async)
{
/* Fixed-point arithmetic division using a n-bit fractional part. */
#define fdivround(a, b, n) \
@@ -3723,7 +3729,6 @@ iwn4965_set_txpower(struct iwn_softc *sc, int async)
struct ifnet *ifp = sc->sc_ifp;
struct ieee80211com *ic = ifp->if_l2com;
struct iwn_ucode_info *uc = &sc->ucode_info;
- struct ieee80211_channel *ch;
struct iwn4965_cmd_txpower cmd;
struct iwn4965_eeprom_chan_samples *chans;
int32_t vdiff, tdiff;
@@ -3731,11 +3736,10 @@ iwn4965_set_txpower(struct iwn_softc *sc, int async)
const uint8_t *rf_gain, *dsp_gain;
uint8_t chan;
- /* Retrieve current channel from last RXON. */
- chan = sc->rxon.chan;
+ /* Retrieve channel number. */
+ chan = ieee80211_chan2ieee(ic, ch);
DPRINTF(sc, IWN_DEBUG_RESET, "setting TX power for channel %d\n",
chan);
- ch = &ic->ic_channels[chan];
memset(&cmd, 0, sizeof cmd);
cmd.band = IEEE80211_IS_CHAN_5GHZ(ch) ? 0 : 1;
@@ -3863,7 +3867,8 @@ iwn4965_set_txpower(struct iwn_softc *sc, int async)
}
int
-iwn5000_set_txpower(struct iwn_softc *sc, int async)
+iwn5000_set_txpower(struct iwn_softc *sc, struct ieee80211_channel *ch,
+ int async)
{
struct iwn5000_cmd_txpower cmd;
@@ -3928,7 +3933,7 @@ iwn5000_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
DPRINTF(sc, IWN_DEBUG_RECV, "%s: agc %d rssi %d %d %d "
"result %d\n", __func__, agc,
- phy->rssi[0], phy->rssi[2], phy->rssi[4],
+ phy->rssi[0], phy->rssi[1], phy->rssi[2],
rssi - agc - IWN_RSSI_TO_DBM);
return rssi - agc - IWN_RSSI_TO_DBM;
}
@@ -4519,7 +4524,7 @@ iwn_config(struct iwn_softc *sc)
}
/* Configuration has changed, set TX power accordingly. */
- error = hal->set_txpower(sc, 0);
+ error = hal->set_txpower(sc, ic->ic_curchan, 0);
if (error != 0) {
device_printf(sc->sc_dev,
"%s: could not set TX power\n", __func__);
@@ -4765,7 +4770,7 @@ iwn_auth(struct iwn_softc *sc, struct ieee80211vap *vap)
}
/* Configuration has changed, set TX power accordingly. */
- error = hal->set_txpower(sc, 1);
+ error = hal->set_txpower(sc, ni->ni_chan, 1);
if (error != 0) {
device_printf(sc->sc_dev,
"%s: could not set Tx power, error %d\n", __func__, error);
@@ -4882,7 +4887,7 @@ iwn_run(struct iwn_softc *sc, struct ieee80211vap *vap)
/* Configuration has changed, set TX power accordingly. */
- error = hal->set_txpower(sc, 1);
+ error = hal->set_txpower(sc, ni->ni_chan, 1);
if (error != 0) {
device_printf(sc->sc_dev,
"%s: could not set Tx power, error %d\n", __func__, error);
diff --git a/sys/dev/iwn/if_iwnvar.h b/sys/dev/iwn/if_iwnvar.h
index 432ece6..98c9c94 100644
--- a/sys/dev/iwn/if_iwnvar.h
+++ b/sys/dev/iwn/if_iwnvar.h
@@ -166,7 +166,8 @@ struct iwn_hal {
uint16_t);
int (*get_temperature)(struct iwn_softc *);
int (*get_rssi)(struct iwn_softc *, struct iwn_rx_stat *);
- int (*set_txpower)(struct iwn_softc *, int);
+ int (*set_txpower)(struct iwn_softc *,
+ struct ieee80211_channel *, int);
int (*init_gains)(struct iwn_softc *);
int (*set_gains)(struct iwn_softc *);
int (*add_node)(struct iwn_softc *, struct iwn_node_info *,
diff --git a/sys/dev/ixgbe/ixgbe.c b/sys/dev/ixgbe/ixgbe.c
index 10a0e04..bde8b94 100644
--- a/sys/dev/ixgbe/ixgbe.c
+++ b/sys/dev/ixgbe/ixgbe.c
@@ -4743,7 +4743,7 @@ static void
ixgbe_reinit_fdir(void *context, int pending)
{
struct adapter *adapter = context;
- struct ifnet *ifp = adapter->ifp;;
+ struct ifnet *ifp = adapter->ifp;
if (adapter->fdir_reinit != 1) /* Shouldn't happen */
return;
@@ -4763,7 +4763,7 @@ ixgbe_reinit_fdir(void *context, int pending)
static void
ixgbe_update_stats_counters(struct adapter *adapter)
{
- struct ifnet *ifp = adapter->ifp;;
+ struct ifnet *ifp = adapter->ifp;
struct ixgbe_hw *hw = &adapter->hw;
u32 missed_rx = 0, bprc, lxon, lxoff, total;
u64 total_missed_rx = 0;
diff --git a/sys/dev/jme/if_jme.c b/sys/dev/jme/if_jme.c
index eb8b630..d6d17a7 100644
--- a/sys/dev/jme/if_jme.c
+++ b/sys/dev/jme/if_jme.c
@@ -462,15 +462,7 @@ jme_reg_macaddr(struct jme_softc *sc)
if ((par0 == 0 && par1 == 0) ||
(par0 == 0xFFFFFFFF && par1 == 0xFFFF)) {
device_printf(sc->jme_dev,
- "generating fake ethernet address.\n");
- par0 = arc4random();
- /* Set OUI to JMicron. */
- sc->jme_eaddr[0] = 0x02; /* U/L bit set. */
- sc->jme_eaddr[1] = 0x1B;
- sc->jme_eaddr[2] = 0x8C;
- sc->jme_eaddr[3] = (par0 >> 16) & 0xff;
- sc->jme_eaddr[4] = (par0 >> 8) & 0xff;
- sc->jme_eaddr[5] = par0 & 0xff;
+ "Failed to retrieve Ethernet address.\n");
} else {
sc->jme_eaddr[0] = (par0 >> 0) & 0xFF;
sc->jme_eaddr[1] = (par0 >> 8) & 0xFF;
diff --git a/sys/dev/lmc/if_lmc.c b/sys/dev/lmc/if_lmc.c
index 23f6da9..a2cb24e 100644
--- a/sys/dev/lmc/if_lmc.c
+++ b/sys/dev/lmc/if_lmc.c
@@ -4842,7 +4842,7 @@ setup_ifnet(struct ifnet *ifp)
if_initname(ifp, device_get_name(sc->dev), device_get_unit(sc->dev));
# elif defined(__NetBSD__)
strcpy(ifp->if_xname, sc->dev.dv_xname);
-# elif __OpenBSD__
+# elif defined(__OpenBSD__)
bcopy(sc->dev.dv_xname, ifp->if_xname, IFNAMSIZ);
# elif defined(__bsdi__)
ifp->if_name = sc->dev.dv_cfdata->cf_driver->cd_name;
diff --git a/sys/dev/malo/if_malo.c b/sys/dev/malo/if_malo.c
index dd88aa6..21354ef 100644
--- a/sys/dev/malo/if_malo.c
+++ b/sys/dev/malo/if_malo.c
@@ -2108,7 +2108,7 @@ malo_rx_proc(void *arg, int npending)
* payload prior to constructing the header.
*/
m = bf->bf_m;
- data = mtod(m, uint8_t *);;
+ data = mtod(m, uint8_t *);
hdrlen = ieee80211_anyhdrsize(data + sizeof(uint16_t));
off = sizeof(uint16_t) + sizeof(struct ieee80211_frame_addr4);
diff --git a/sys/dev/mge/if_mge.c b/sys/dev/mge/if_mge.c
index 30d485e..eacc3ed 100644
--- a/sys/dev/mge/if_mge.c
+++ b/sys/dev/mge/if_mge.c
@@ -1150,7 +1150,7 @@ mge_intr_tx_locked(struct mge_softc *sc)
break;
sc->tx_desc_used_idx =
- (++sc->tx_desc_used_idx) % MGE_TX_DESC_NUM;;
+ (++sc->tx_desc_used_idx) % MGE_TX_DESC_NUM;
sc->tx_desc_used_count--;
/* Update collision statistics */
diff --git a/sys/dev/mly/mly.c b/sys/dev/mly/mly.c
index 1f61542..b26c90a 100644
--- a/sys/dev/mly/mly.c
+++ b/sys/dev/mly/mly.c
@@ -117,9 +117,9 @@ static void mly_printstate(struct mly_softc *sc);
static void mly_print_command(struct mly_command *mc);
static void mly_print_packet(struct mly_command *mc);
static void mly_panic(struct mly_softc *sc, char *reason);
+static int mly_timeout(struct mly_softc *sc);
#endif
void mly_print_controller(int controller);
-static int mly_timeout(struct mly_softc *sc);
static d_open_t mly_user_open;
@@ -2981,6 +2981,7 @@ mly_user_health(struct mly_softc *sc, struct mly_user_health *uh)
return(error);
}
+#ifdef MLY_DEBUG
static int
mly_timeout(struct mly_softc *sc)
{
@@ -3000,3 +3001,4 @@ mly_timeout(struct mly_softc *sc)
return (0);
}
+#endif
diff --git a/sys/dev/mxge/if_mxge.c b/sys/dev/mxge/if_mxge.c
index d424b49..3febc48 100644
--- a/sys/dev/mxge/if_mxge.c
+++ b/sys/dev/mxge/if_mxge.c
@@ -3173,23 +3173,23 @@ mxge_alloc_slice_rings(struct mxge_slice_state *ss, int rx_ring_entries,
bytes = rx_ring_entries * sizeof (*ss->rx_small.shadow);
ss->rx_small.shadow = malloc(bytes, M_DEVBUF, M_ZERO|M_WAITOK);
if (ss->rx_small.shadow == NULL)
- return err;;
+ return err;
bytes = rx_ring_entries * sizeof (*ss->rx_big.shadow);
ss->rx_big.shadow = malloc(bytes, M_DEVBUF, M_ZERO|M_WAITOK);
if (ss->rx_big.shadow == NULL)
- return err;;
+ return err;
/* allocate the rx host info rings */
bytes = rx_ring_entries * sizeof (*ss->rx_small.info);
ss->rx_small.info = malloc(bytes, M_DEVBUF, M_ZERO|M_WAITOK);
if (ss->rx_small.info == NULL)
- return err;;
+ return err;
bytes = rx_ring_entries * sizeof (*ss->rx_big.info);
ss->rx_big.info = malloc(bytes, M_DEVBUF, M_ZERO|M_WAITOK);
if (ss->rx_big.info == NULL)
- return err;;
+ return err;
/* allocate the rx busdma resources */
err = bus_dma_tag_create(sc->parent_dmat, /* parent */
@@ -3207,7 +3207,7 @@ mxge_alloc_slice_rings(struct mxge_slice_state *ss, int rx_ring_entries,
if (err != 0) {
device_printf(sc->dev, "Err %d allocating rx_small dmat\n",
err);
- return err;;
+ return err;
}
err = bus_dma_tag_create(sc->parent_dmat, /* parent */
@@ -3234,7 +3234,7 @@ mxge_alloc_slice_rings(struct mxge_slice_state *ss, int rx_ring_entries,
if (err != 0) {
device_printf(sc->dev, "Err %d allocating rx_big dmat\n",
err);
- return err;;
+ return err;
}
for (i = 0; i <= ss->rx_small.mask; i++) {
err = bus_dmamap_create(ss->rx_small.dmat, 0,
@@ -3242,7 +3242,7 @@ mxge_alloc_slice_rings(struct mxge_slice_state *ss, int rx_ring_entries,
if (err != 0) {
device_printf(sc->dev, "Err %d rx_small dmamap\n",
err);
- return err;;
+ return err;
}
}
err = bus_dmamap_create(ss->rx_small.dmat, 0,
@@ -3250,7 +3250,7 @@ mxge_alloc_slice_rings(struct mxge_slice_state *ss, int rx_ring_entries,
if (err != 0) {
device_printf(sc->dev, "Err %d extra rx_small dmamap\n",
err);
- return err;;
+ return err;
}
for (i = 0; i <= ss->rx_big.mask; i++) {
@@ -3259,7 +3259,7 @@ mxge_alloc_slice_rings(struct mxge_slice_state *ss, int rx_ring_entries,
if (err != 0) {
device_printf(sc->dev, "Err %d rx_big dmamap\n",
err);
- return err;;
+ return err;
}
}
err = bus_dmamap_create(ss->rx_big.dmat, 0,
@@ -3267,7 +3267,7 @@ mxge_alloc_slice_rings(struct mxge_slice_state *ss, int rx_ring_entries,
if (err != 0) {
device_printf(sc->dev, "Err %d extra rx_big dmamap\n",
err);
- return err;;
+ return err;
}
/* now allocate TX resouces */
@@ -3287,7 +3287,7 @@ mxge_alloc_slice_rings(struct mxge_slice_state *ss, int rx_ring_entries,
sizeof (*ss->tx.req_list) * (ss->tx.max_desc + 4);
ss->tx.req_bytes = malloc(bytes, M_DEVBUF, M_WAITOK);
if (ss->tx.req_bytes == NULL)
- return err;;
+ return err;
/* ensure req_list entries are aligned to 8 bytes */
ss->tx.req_list = (mcp_kreq_ether_send_t *)
((unsigned long)(ss->tx.req_bytes + 7) & ~7UL);
@@ -3297,13 +3297,13 @@ mxge_alloc_slice_rings(struct mxge_slice_state *ss, int rx_ring_entries,
ss->tx.seg_list = (bus_dma_segment_t *)
malloc(bytes, M_DEVBUF, M_WAITOK);
if (ss->tx.seg_list == NULL)
- return err;;
+ return err;
/* allocate the tx host info ring */
bytes = tx_ring_entries * sizeof (*ss->tx.info);
ss->tx.info = malloc(bytes, M_DEVBUF, M_ZERO|M_WAITOK);
if (ss->tx.info == NULL)
- return err;;
+ return err;
/* allocate the tx busdma resources */
err = bus_dma_tag_create(sc->parent_dmat, /* parent */
@@ -3322,7 +3322,7 @@ mxge_alloc_slice_rings(struct mxge_slice_state *ss, int rx_ring_entries,
if (err != 0) {
device_printf(sc->dev, "Err %d allocating tx dmat\n",
err);
- return err;;
+ return err;
}
/* now use these tags to setup dmamaps for each slot
@@ -3333,7 +3333,7 @@ mxge_alloc_slice_rings(struct mxge_slice_state *ss, int rx_ring_entries,
if (err != 0) {
device_printf(sc->dev, "Err %d tx dmamap\n",
err);
- return err;;
+ return err;
}
}
return 0;
diff --git a/sys/dev/patm/if_patm_intr.c b/sys/dev/patm/if_patm_intr.c
index a13125a..79cb248 100644
--- a/sys/dev/patm/if_patm_intr.c
+++ b/sys/dev/patm/if_patm_intr.c
@@ -381,7 +381,7 @@ patm_feed_lbufs(struct patm_softc *sc)
static void
patm_intr_tsif(struct patm_softc *sc)
{
- struct idt_tsqe *tsqe = sc->tsq_next;;
+ struct idt_tsqe *tsqe = sc->tsq_next;
struct idt_tsqe *prev = NULL;
uint32_t stamp;
diff --git a/sys/dev/pdq/if_fea.c b/sys/dev/pdq/if_fea.c
index 4c70a02..bcdbfc0 100644
--- a/sys/dev/pdq/if_fea.c
+++ b/sys/dev/pdq/if_fea.c
@@ -140,7 +140,7 @@ pdq_eisa_probe (dev)
u_int32_t maddr;
u_int32_t msize;
- u_int32_t eisa_id = eisa_get_id(dev);;
+ u_int32_t eisa_id = eisa_get_id(dev);
desc = pdq_eisa_match(eisa_id);
if (!desc) {
diff --git a/sys/dev/rmi/sec/desc.h b/sys/dev/rmi/sec/desc.h
deleted file mode 100755
index 5757e13..0000000
--- a/sys/dev/rmi/sec/desc.h
+++ /dev/null
@@ -1,3067 +0,0 @@
-/*-
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD */
-#ifndef _DESC_H_
-#define _DESC_H_
-
-
-#define ONE_BIT 0x0000000000000001ULL
-#define TWO_BITS 0x0000000000000003ULL
-#define THREE_BITS 0x0000000000000007ULL
-#define FOUR_BITS 0x000000000000000fULL
-#define FIVE_BITS 0x000000000000001fULL
-#define SIX_BITS 0x000000000000003fULL
-#define SEVEN_BITS 0x000000000000007fULL
-#define EIGHT_BITS 0x00000000000000ffULL
-#define NINE_BITS 0x00000000000001ffULL
-#define ELEVEN_BITS 0x00000000000007ffULL
-#define TWELVE_BITS 0x0000000000000fffULL
-#define FOURTEEN_BITS 0x0000000000003fffULL
-#define TWENTYFOUR_BITS 0x0000000000ffffffULL
-#define THIRTY_TWO_BITS 0x00000000ffffffffULL
-#define THIRTY_FIVE_BITS 0x00000007ffffffffULL
-#define FOURTY_BITS 0x000000ffffffffffULL
-
-#define MSG_IN_CTL_LEN_BASE 40
-#define MSG_IN_CTL_ADDR_BASE 0
-
-#define GET_FIELD(word,field) \
- ((word) & (field ## _MASK)) >> (field ## _LSB)
-
-#define FIELD_VALUE(field,value) (((value) & (field ## _BITS)) << (field ## _LSB))
-
-/*
- * NOTE: this macro expects 'word' to be uninitialized (i.e. zeroed)
- */
-#define SET_FIELD(word,field,value) \
- { (word) |= (((value) & (field ## _BITS)) << (field ## _LSB)); }
-
-/*
- * This macro clears 'word', then sets the value
- */
-#define CLEAR_SET_FIELD(word,field,value) \
- { (word) &= ~((field ## _BITS) << (field ## _LSB)); \
- (word) |= (((value) & (field ## _BITS)) << (field ## _LSB)); }
-
-/*
- * NOTE: May be used to build value specific mask
- * (e.g. GEN_MASK(CTL_DSC_CPHR_3DES,CTL_DSC_CPHR_LSB)
- */
-#define GEN_MASK(bits,lsb) ((bits) << (lsb))
-
-
-
-
-/*
- * Security block data and control exchange
- *
- * A 2-word message ring descriptor is used to pass a pointer to the control descriptor data structure
- * and a pointer to the packet descriptor data structure:
- *
- * 63 61 60 54 53 52 49 48 45 44 40
- * 39 5 4 0
- * ---------------------------------------------------------------------------------------------------------------------------------------------------------
- * | Ctrl | Resp Dest Id Entry0 | IF_L2ALLOC | UNUSED | Control Length | UNUSED
- * | 35 MSB of address of control descriptor data structure | Software Scratch0
- * |
- * ---------------------------------------------------------------------------------------------------------------------------------------------------------
- * 3 7 1 4 4 5
- * 35 5
- *
- * 63 61 60 54 53 52 51 50 46 45 44 40 39 5 4 0
- * ---------------------------------------------------------------------------------------------------------------------------------------------------------
- * | Ctrl | UNUSED | WRB_COH | WRB_L2ALLOC | DF_PTR_L2ALLOC | UNUSED | Data Length | UNUSED | 35 MSB of address of packet descriptor data structure | UNUSED |
- * ---------------------------------------------------------------------------------------------------------------------------------------------------------
- * 3 7 1 1 1 5 1 5 35 5
- *
- * Addresses assumed to be cache-line aligned, i.e., Address[4:0] ignored (using 5'h00 instead)
- *
- * Control length is the number of control cachelines to be read so user needs
- * to round up
- * the control length to closest integer multiple of 32 bytes. Note that at
- * present (08/12/04)
- * the longest (sensical) ctrl structure is <= 416 bytes, i.e., 13 cachelines.
- *
- * The packet descriptor data structure size is fixed at 1 cacheline (32 bytes).
- * This effectively makes "Data Length" a Load/NoLoad bit. NoLoad causes an abort.
- *
- *
- * Upon completion of operation, the security block returns a 2-word free descriptor
- * in the following format:
- *
- * 63 61 60 54 53 52 51 49 48 47 40 39 0
- * ----------------------------------------------------------------------------------------------------------------------------
- * | Ctrl | Destination Id | 2'b00 | Desc Ctrl | 1'b0 | Instruction Error | Address of control descriptor data structure |
- * ----------------------------------------------------------------------------------------------------------------------------
- * | Ctrl | Destination Id | 2'b00 | Desc Ctrl | 1'b0 | Data Error | Address of packet descriptor data structure |
- * ----------------------------------------------------------------------------------------------------------------------------
- *
- * The Instruction and Data Error codes are enumerated in the
- * ControlDescriptor and PacketDescriptor sections below
- *
- */
-
-
-/*
- * Operating assumptions
- * =====================
- *
- *
- * -> For all IpSec ops, I assume that all the IP/IPSec/TCP headers
- * and the data are present at the specified source addresses.
- * I also assume that all necessary header data already exists
- * at the destination. Additionally, in AH I assume that all
- * mutable fields (IP.{TOS, Flags, Offset, TTL, Header_Checksum})
- * and the AH.Authentication_Data have been zeroed by the client.
- *
- *
- * -> In principle, the HW can calculate TCP checksums on both
- * incoming and outgoing data; however, since the TCP header
- * contains the TCP checksum of the plain payload and the header
- * is encrypted, two passes would be necessary to do checksum + encryption
- * for outgoing messages;
- * therefore the checksum engine will likely only be used during decryption
- * (incoming).
- *
- *
- * -> For all operations involving TCP checksum, I assume the client has filled
- * the TCP checksum field with the appropriate value:
- *
- * - 0 for generation phase
- * - actual value for verification phase (expecting 0 result)
- *
- *
- * -> For ESP tunnel, the original IP header exists between the end of the
- * ESP header and the beginning of the TCP header; it is assumed that the
- * maximum length of this header is 16 k(32bit)words (used in CkSum_Offset).
- *
- *
- * -> The authentication data is merely written to the destination address;
- * the client is left with the task of comparing to the data in packet
- * in decrypt.
- *
- * -> PacketDescriptor_t.dstLLWMask relevant to AES CTR mode only but it will
- * affect all AES-related operations. It will not affect DES/3DES/bypass ops.
- * The mask is applied to data as it emerges from the AES engine for the sole
- * purpose of providing the authenticator and cksum engines with correct data.
- * CAVEAT: the HW does not mask the incoming data. It is the user's responsibility
- * to set to 0 the corresponding data in memory. If the surplus data is not masked
- * in memory, cksum/auth results will be incorrect if those engines receive data
- * straight from memory (i.e., not from cipher, as it happens while decoding)
- */
-
-/*
- * Fragmentation and offset related notes
- * ======================================
- *
- *
- * A) Rebuilding packets from fragments on dword boundaries. The discussion
- * below is exemplified by tests memcpy_all_off_frags and memcpy_same_off_frags
- *
- * 1) The Offset before data/iv on first fragment is ALWAYS written back
- * Non-zero dst dword or global offsets may cause more data to be
- * written than the user-specified length.
- *
- *
- * Example:
- * --------
- *
- * Below is a source (first fragment) packet (@ ADD0 cache-aligned address).
- * Assume we just copy it and relevant data starts on
- * dword 3 so Cipher_Offset = IV_Offset = 3 (dwords).
- * D0X denotes relevant data and G denotes dont care data.
- * Offset data is also copied so Packet_Legth = 9 (dwords) * 8 = 72 (bytes)
- * Segment_src_address = ADD0
- *
- * If we want to, e.g., copy so that the relevant (i.e., D0X) data
- * starts at (cache-aligned address) ADD1, we need to specify
- * Dst_dword_offset = 1 so D00 is moved from dword position 3 to 0 on next cache-line
- * Cipher_dst_address = ADD1 - 0x20 so D00 is written to ADD1
- *
- * Note that the security engine always writes full cachelines
- * therefore, data written to dword0 0 of ADD1 (denoted w/ ?) is what the sec pipe
- * write back buffer contained from previous op.
- *
- *
- * SOURCE: DESTINATION:
- * ------- ------------
- *
- * Segment_src_address = ADD0 Cipher_dst_address = ADD1 - 0x20
- * Packet_Legth = 72 Dst_dword_offset = 1
- * Cipher_Offset = 3
- * IV_Offset = 3
- * Use_IV = ANY
- *
- *
- *
- * 3 2 1 0 3 2 1 0
- * ----------------------- -----------------------
- * | D00 | G | G | G | <- ADD0 | G | G | G | ? | <- ADD1 - 0x20
- * ----------------------- -----------------------
- * | D04 | D03 | D02 | D01 | | D03 | D02 | D01 | D00 | <- ADD1
- * ----------------------- -----------------------
- * | | | | D05 | | | | D05 | D04 |
- * ----------------------- -----------------------
- *
- * 2) On fragments following the first, IV_Offset is overloaded to mean data offset
- * (number of dwords to skip from beginning of cacheline before starting processing)
- * and Use_IV is overloaded to mean do writeback the offset (in the clear).
- * These fields in combination with Dst_dword_offset allow packet fragments with
- * arbitrary boundaries/lengthd to be reasembled.
- *
- *
- * Example:
- * --------
- *
- * Assume data above was first fragment of a packet we'd like to merge to
- * (second) fragment below located at ADD2. The written data should follow
- * the previous data without gaps or overwrites. To achieve this, one should
- * assert the "Next" field on the previous fragment and use self-explanatory
- * set of parameters below
- *
- *
- * SOURCE: DESTINATION:
- * ------- ------------
- *
- * Segment_src_address = ADD2 Cipher_dst_address = ADD1 + 0x20
- * Packet_Legth = 104 Dst_dword_offset = 1
- * IV_Offset = 1
- * Use_IV = 0
- *
- *
- *
- * 3 2 1 0 3 2 1 0
- * ----------------------- -----------------------
- * | D12 | D11 | D10 | G | <- ADD2 | G | G | G | ? | <- ADD1 - 0x20
- * ----------------------- -----------------------
- * | D16 | D15 | D14 | D13 | | D03 | D02 | D01 | D00 | <- ADD1
- * ----------------------- -----------------------
- * | D1a | D19 | D18 | D17 | | D11 | D10 | D05 | D04 | <- ADD1 + 0x20
- * ----------------------- -----------------------
- * | | | | D1b | | D15 | D14 | D13 | D12 |
- * ----------------------- -----------------------
- * | D19 | D18 | D17 | D16 |
- * -----------------------
- * | | | D1b | D1a |
- * -----------------------
- *
- * It is note-worthy that the merging can only be achieved if Use_IV is 0. Indeed, the security
- * engine always writes full lines, therefore ADD1 + 0x20 will be re-written. Setting Use_IV to 0
- * will allow the sec pipe write back buffer to preserve D04, D05 from previous frag and only
- * receive D10, D11 thereby preserving the integrity of the previous data.
- *
- * 3) On fragments following the first, !UseIV in combination w/ Dst_dword_offset >= (4 - IV_Offset)
- * will cause a wraparound of the write thus achieving all 16 possible (Initial_Location, Final_Location)
- * combinations for the data.
- *
- *
- * Example:
- * --------
- *
- * Contiguously merging 2 data sets above with a third located at ADD3. If this is the last fragment,
- * reset its Next bit.
- *
- *
- * SOURCE: DESTINATION:
- * ------- ------------
- *
- * Segment_src_address = ADD3 Cipher_dst_address = ADD1 + 0x80
- * Packet_Legth = 152 Dst_dword_offset = 3
- * IV_Offset = 3
- * Use_IV = 0
- *
- *
- *
- * 3 2 1 0 3 2 1 0
- * ----------------------- -----------------------
- * | D20 | G | G | G | <- ADD2 | G | G | G | ? | <- ADD1 - 0x20
- * ----------------------- -----------------------
- * | D24 | D23 | D22 | D21 | | D03 | D02 | D01 | D00 | <- ADD1
- * ----------------------- -----------------------
- * | D28 | D27 | D26 | D25 | | D11 | D10 | D05 | D04 | <- ADD1 + 0x20
- * ----------------------- -----------------------
- * | D2c | D2b | D2a | D29 | | D15 | D14 | D13 | D12 |
- * ----------------------- -----------------------
- * | | D2f | D2e | D2d | | D19 | D18 | D17 | D16 |
- * ----------------------- -----------------------
- * | D21 | D20 | D1b | D1a | <- ADD1 + 0x80
- * -----------------------
- * | D25 | D24 | D23 | D22 |
- * -----------------------
- * | D29 | D28 | D27 | D26 |
- * -----------------------
- * | D2d | D2c | D2b | D2a |
- * -----------------------
- * |(D2d)|(D2c)| D2f | D2e |
- * -----------------------
- *
- * It is worth noticing that always writing full-lines causes the last 2 dwords in the reconstituted
- * packet to be unnecessarily written: (D2d) and (D2c)
- *
- *
- *
- * B) Implications of fragmentation on AES
- *
- * 1) AES is a 128 bit block cipher; therefore it requires an even dword total data length
- * Data fragments (provided there are more than 1) are allowed to have odd dword
- * data lengths provided the total length (cumulated over fragments) is an even dword
- * count; an error will be generated otherwise, upon receiving the last fragment descriptor
- * (see error conditions below).
- *
- * 2) While using fragments with AES, a fragment (other than first) starting with a != 0 (IV) offset
- * while the subsequent total dword count given to AES is odd may not be required to write
- * its offset (UseIV). Doing so will cause an error (see error conditions below).
- *
- *
- * Example:
- * --------
- *
- * Suppose the first fragment has an odd DATA dword count and USES AES (as seen below)
- *
- * SOURCE: DESTINATION:
- * ------- ------------
- *
- * Segment_src_address = ADD0 Cipher_dst_address = ADD1
- * Packet_Legth = 64 Dst_dword_offset = 1
- * Cipher_Offset = 3
- * IV_Offset = 1
- * Use_IV = 1
- * Cipher = Any AES
- * Next = 1
- *
- *
- *
- *
- * 3 2 1 0 3 2 1 0
- * ----------------------- -----------------------
- * | D00 | IV1 | IV0 | G | <- ADD0 | E00 | IV1 | IV0 | G | <- ADD1
- * ----------------------- -----------------------
- * | D04 | D03 | D02 | D01 | | X | E03 | E02 | E01 |
- * ----------------------- -----------------------
- *
- * At the end of processing of the previous fragment, the AES engine input buffer has D04
- * and waits for next dword, therefore the writeback buffer cannot finish writing the fragment
- * to destination (X instead of E04).
- *
- * If a second fragment now arrives with a non-0 offset and requires the offset data to be
- * written to destination, the previous write (still needing the arrival of the last dword
- * required by the AES to complete the previous operation) cannot complete before the present
- * should start causing a deadlock.
- */
-
-/*
- * Command Control Word for Message Ring Descriptor
- */
-
-/* #define MSG_CMD_CTL_CTL */
-#define MSG_CMD_CTL_CTL_LSB 61
-#define MSG_CMD_CTL_CTL_BITS THREE_BITS
-#define MSG_CMD_CTL_CTL_MASK (MSG_CMD_CTL_CTL_BITS << MSG_CMD_CTL_CTL_LSB)
-
-/* #define MSG_CMD_CTL_ID */
-#define MSG_CMD_CTL_ID_LSB 54
-#define MSG_CMD_CTL_ID_BITS SEVEN_BITS
-#define MSG_CMD_CTL_ID_MASK (MSG_CMD_CTL_ID_BITS << MSG_CMD_CTL_ID_LSB)
-
-/* #define MSG_CMD_CTL_LEN */
-#define MSG_CMD_CTL_LEN_LSB 45
-#define MSG_CMD_CTL_LEN_BITS FOUR_BITS
-#define MSG_CMD_CTL_LEN_MASK (MSG_CMD_CTL_LEN_BITS << MSG_CMD_CTL_LEN_LSB)
-
-
-/* #define MSG_CMD_CTL_ADDR */
-#define MSG_CMD_CTL_ADDR_LSB 0
-#define MSG_CMD_CTL_ADDR_BITS FOURTY_BITS
-#define MSG_CMD_CTL_ADDR_MASK (MSG_CMD_CTL_ADDR_BITS << MSG_CMD_CTL_ADDR_LSB)
-
-#define MSG_CMD_CTL_MASK (MSG_CMD_CTL_CTL_MASK | \
- MSG_CMD_CTL_LEN_MASK | MSG_CMD_CTL_ADDR_MASK)
-
-/*
- * Command Data Word for Message Ring Descriptor
- */
-
-/* #define MSG_IN_DATA_CTL */
-#define MSG_CMD_DATA_CTL_LSB 61
-#define MSG_CMD_DATA_CTL_BITS THREE_BITS
-#define MSG_CMD_DATA_CTL_MASK (MSG_CMD_DATA_CTL_BITS << MSG_CMD_DATA_CTL_LSB)
-
-/* #define MSG_CMD_DATA_LEN */
-#define MSG_CMD_DATA_LEN_LOAD 1
-#define MSG_CMD_DATA_LEN_LSB 45
-#define MSG_CMD_DATA_LEN_BITS ONE_BIT
-#define MSG_CMD_DATA_LEN_MASK (MSG_CMD_DATA_LEN_BITS << MSG_CMD_DATA_LEN_LSB)
-
-/* #define MSG_CMD_DATA_ADDR */
-#define MSG_CMD_DATA_ADDR_LSB 0
-#define MSG_CMD_DATA_ADDR_BITS FOURTY_BITS
-#define MSG_CMD_DATA_ADDR_MASK (MSG_CMD_DATA_ADDR_BITS << MSG_CMD_DATA_ADDR_LSB)
-
-#define MSG_CMD_DATA_MASK (MSG_CMD_DATA_CTL_MASK | \
- MSG_CMD_DATA_LEN_MASK | MSG_CMD_DATA_ADDR_MASK)
-
-
-/*
- * Upon completion of operation, the Sec block returns a 2-word free descriptor
- * in the following format:
- *
- * 63 61 60 54 53 52 51 49 48 40 39 0
- * ----------------------------------------------------------------------------
- * | Ctrl | Destination Id | 2'b00 | Desc Ctrl | Control Error | Source Address |
- * ----------------------------------------------------------------------------
- * | Ctrl | Destination Id | 2'b00 | Desc Ctrl | Data Error | Dest Address |
- * ----------------------------------------------------------------------------
- *
- * The Control and Data Error codes are enumerated below
- *
- * Error conditions
- * ================
- *
- * Control Error Code Control Error Condition
- * ------------------ ---------------------------
- * 9'h000 No Error
- * 9'h001 Unknown Cipher Op ( Cipher == 3'h{6,7})
- * 9'h002 Unknown or Illegal Mode ((Mode == 3'h{2,3,4} & !AES) | (Mode == 3'h{5,6,7}))
- * 9'h004 Unsupported CkSum Src (CkSum_Src == 2'h{2,3} & CKSUM)
- * 9'h008 Forbidden CFB Mask (AES & CFBMode & UseNewKeysCFBMask & CFBMask[7] & (| CFBMask[6:0]))
- * 9'h010 Unknown Ctrl Op ((| Ctrl[63:37]) | (| Ctrl[15:14]))
- * 9'h020 UNUSED
- * 9'h040 UNUSED
- * 9'h080 Data Read Error
- * 9'h100 Descriptor Ctrl Field Error (D0.Ctrl != SOP || D1.Ctrl != EOP)
- *
- * Data Error Code Data Error Condition
- * --------------- --------------------
- * 9'h000 No Error
- * 9'h001 Insufficient Data To Cipher (Packet_Length <= (Cipher_Offset or IV_Offset))
- * 9'h002 Illegal IV Location ((Cipher_Offset < IV_Offset) | (Cipher_Offset <= IV_Offset & AES & ~CTR))
- * 9'h004 Illegal Wordcount To AES (Packet_Length[3] != Cipher_Offset[0] & AES)
- * 9'h008 Illegal Pad And ByteCount Spec (Hash_Byte_Count != 0 & !Pad_Hash)
- * 9'h010 Insufficient Data To CkSum ({Packet_Length, 1'b0} <= CkSum_Offset)
- * 9'h020 Unknown Data Op ((| dstLLWMask[63:60]) | (| dstLLWMask[57:40]) | (| authDst[63:40]) | (| ckSumDst[63:40]))
- * 9'h040 Insufficient Data To Auth ({Packet_Length} <= Auth_Offset)
- * 9'h080 Data Read Error
- * 9'h100 UNUSED
- */
-
-/*
- * Result Control Word for Message Ring Descriptor
- */
-
-/* #define MSG_RSLT_CTL_CTL */
-#define MSG_RSLT_CTL_CTL_LSB 61
-#define MSG_RSLT_CTL_CTL_BITS THREE_BITS
-#define MSG_RSLT_CTL_CTL_MASK \
- (MSG_RSLT_CTL_CTL_BITS << MSG_RSLT_CTL_CTL_LSB)
-
-/* #define MSG_RSLT_CTL_DST_ID */
-#define MSG_RSLT_CTL_DST_ID_LSB 54
-#define MSG_RSLT_CTL_DST_ID_BITS SEVEN_BITS
-#define MSG_RSLT_CTL_DST_ID_MASK \
- (MSG_RSLT_CTL_DST_ID_BITS << MSG_RSLT_CTL_DST_ID_LSB)
-
-/* #define MSG_RSLT_CTL_DSC_CTL */
-#define MSG_RSLT_CTL_DSC_CTL_LSB 49
-#define MSG_RSLT_CTL_DSC_CTL_BITS THREE_BITS
-#define MSG_RSLT_CTL_DSC_CTL_MASK \
- (MSG_RSLT_CTL_DSC_CTL_BITS << MSG_RSLT_CTL_DSC_CTL_LSB)
-
-/* #define MSG_RSLT_CTL_INST_ERR */
-#define MSG_RSLT_CTL_INST_ERR_LSB 40
-#define MSG_RSLT_CTL_INST_ERR_BITS NINE_BITS
-#define MSG_RSLT_CTL_INST_ERR_MASK \
- (MSG_RSLT_CTL_INST_ERR_BITS << MSG_RSLT_CTL_INST_ERR_LSB)
-
-/* #define MSG_RSLT_CTL_DSC_ADDR */
-#define MSG_RSLT_CTL_DSC_ADDR_LSB 0
-#define MSG_RSLT_CTL_DSC_ADDR_BITS FOURTY_BITS
-#define MSG_RSLT_CTL_DSC_ADDR_MASK \
- (MSG_RSLT_CTL_DSC_ADDR_BITS << MSG_RSLT_CTL_DSC_ADDR_LSB)
-
-/* #define MSG_RSLT_CTL_MASK */
-#define MSG_RSLT_CTL_MASK \
- (MSG_RSLT_CTL_CTRL_MASK | MSG_RSLT_CTL_DST_ID_MASK | \
- MSG_RSLT_CTL_DSC_CTL_MASK | MSG_RSLT_CTL_INST_ERR_MASK | \
- MSG_RSLT_CTL_DSC_ADDR_MASK)
-
-/*
- * Result Data Word for Message Ring Descriptor
- */
-/* #define MSG_RSLT_DATA_CTL */
-#define MSG_RSLT_DATA_CTL_LSB 61
-#define MSG_RSLT_DATA_CTL_BITS THREE_BITS
-#define MSG_RSLT_DATA_CTL_MASK \
- (MSG_RSLT_DATA_CTL_BITS << MSG_RSLT_DATA_CTL_LSB)
-
-/* #define MSG_RSLT_DATA_DST_ID */
-#define MSG_RSLT_DATA_DST_ID_LSB 54
-#define MSG_RSLT_DATA_DST_ID_BITS SEVEN_BITS
-#define MSG_RSLT_DATA_DST_ID_MASK \
- (MSG_RSLT_DATA_DST_ID_BITS << MSG_RSLT_DATA_DST_ID_LSB)
-
-/* #define MSG_RSLT_DATA_DSC_CTL */
-#define MSG_RSLT_DATA_DSC_CTL_LSB 49
-#define MSG_RSLT_DATA_DSC_CTL_BITS THREE_BITS
-#define MSG_RSLT_DATA_DSC_CTL_MASK \
- (MSG_RSLT_DATA_DSC_CTL_BITS << MSG_RSLT_DATA_DSC_CTL_LSB)
-
-/* #define MSG_RSLT_DATA_INST_ERR */
-#define MSG_RSLT_DATA_INST_ERR_LSB 40
-#define MSG_RSLT_DATA_INST_ERR_BITS NINE_BITS
-#define MSG_RSLT_DATA_INST_ERR_MASK \
- (MSG_RSLT_DATA_INST_ERR_BITS << MSG_RSLT_DATA_INST_ERR_LSB)
-
-/* #define MSG_RSLT_DATA_DSC_ADDR */
-#define MSG_RSLT_DATA_DSC_ADDR_LSB 0
-#define MSG_RSLT_DATA_DSC_ADDR_BITS FOURTY_BITS
-#define MSG_RSLT_DATA_DSC_ADDR_MASK \
- (MSG_RSLT_DATA_DSC_ADDR_BITS << MSG_RSLT_DATA_DSC_ADDR_LSB)
-
-#define MSG_RSLT_DATA_MASK \
- (MSG_RSLT_DATA_CTRL_MASK | MSG_RSLT_DATA_DST_ID_MASK | \
- MSG_RSLT_DATA_DSC_CTL_MASK | MSG_RSLT_DATA_INST_ERR_MASK | \
- MSG_RSLT_DATA_DSC_ADDR_MASK)
-
-
-/*
- * Common Message Definitions
- *
- */
-
-/* #define MSG_CTL_OP_ADDR */
-#define MSG_CTL_OP_ADDR_LSB 0
-#define MSG_CTL_OP_ADDR_BITS FOURTY_BITS
-#define MSG_CTL_OP_ADDR_MASK (MSG_CTL_OP_ADDR_BITS << MSG_CTL_OP_ADDR_LSB)
-
-#define MSG_CTL_OP_TYPE
-#define MSG_CTL_OP_TYPE_LSB 3
-#define MSG_CTL_OP_TYPE_BITS TWO_BITS
-#define MSG_CTL_OP_TYPE_MASK \
- (MSG_CTL_OP_TYPE_BITS << MSG_CTL_OP_TYPE_LSB)
-
-#define MSG0_CTL_OP_ENGINE_SYMKEY 0x01
-#define MSG0_CTL_OP_ENGINE_PUBKEY 0x02
-
-#define MSG1_CTL_OP_SYMKEY_PIPE0 0x00
-#define MSG1_CTL_OP_SYMKEY_PIPE1 0x01
-#define MSG1_CTL_OP_SYMKEY_PIPE2 0x02
-#define MSG1_CTL_OP_SYMKEY_PIPE3 0x03
-
-#define MSG1_CTL_OP_PUBKEY_PIPE0 0x00
-#define MSG1_CTL_OP_PUBKEY_PIPE1 0x01
-#define MSG1_CTL_OP_PUBKEY_PIPE2 0x02
-#define MSG1_CTL_OP_PUBKEY_PIPE3 0x03
-
-
-/* /----------------------------------------\
- * | |
- * | ControlDescriptor_s datastructure |
- * | |
- * \----------------------------------------/
- *
- *
- * ControlDescriptor_t.Instruction
- * -------------------------------
- *
- * 63 44 43 42 41 40 39 35 34 32 31 29 28
- * --------------------------------------------------------------------------------------------------------------------
- * || UNUSED || OverrideCipher | Arc4Wait4Save | SaveArc4State | LoadArc4State | Arc4KeyLen | Cipher | Mode | InCp_Key || ... CONT ...
- * --------------------------------------------------------------------------------------------------------------------
- * 20 1 1 1 1 5 3 3 1
- * <-----------------------------------------------CIPHER--------------------------------------------------->
- *
- * 27 25 24 23 22 21 20 19 17 16 15 0
- * -----------------------------------------------------------------------------
- * || UNUSED | Hash_Hi | HMAC | Hash_Lo | InHs_Key || UNUSED || CkSum || UNUSED ||
- * -----------------------------------------------------------------------------
- * 3 1 1 2 1 3 1 16
- * <---------------------HASH---------------------><-----------CKSUM----------->
- *
- * X0 CIPHER.Arc4Wait4Save = If op is Arc4 and it requires state saving, then
- * setting this bit will cause the current op to
- * delay subsequent op loading until saved state data
- * becomes visible.
- * CIPHER.OverrideCipher = Override encryption if PacketDescriptor_t.dstDataSettings.CipherPrefix
- * is set; data will be copied out (and optionally auth/cksum)
- * in the clear. This is used in GCM mode if auth only as we
- * still need E(K, 0) calculated by cipher. Engine behavior is
- * undefined if this bit is set and CipherPrefix is not.
- * X0 SaveArc4State = Save Arc4 state at the end of Arc4 operation
- * X0 LoadArc4State = Load Arc4 state at the beginning of an Arc4 operation
- * This overriden by the InCp_Key setting for Arc4
- * Arc4KeyLen = Length in bytes of Arc4 key (0 is interpreted as 32)
- * Ignored for other ciphers
- * For ARC4, IFetch/IDecode will always read exactly 4
- * consecutive dwords into its CipherKey{0,3} regardless
- * of this quantity; it will however only use the specified
- * number of bytes.
- * Cipher = 3'b000 Bypass
- * 3'b001 DES
- * 3'b010 3DES
- * 3'b011 AES 128-bit key
- * 3'b100 AES 192-bit key
- * 3'b101 AES 256-bit key
- * 3'b110 ARC4
- * 3'b111 Kasumi f8
- * Remainder UNDEFINED
- * Mode = 3'b000 ECB
- * 3'b001 CBC
- * 3'b010 CFB (AES only, otherwise undefined)
- * 3'b011 OFB (AES only, otherwise undefined)
- * 3'b100 CTR (AES only, otherwise undefined)
- * 3'b101 F8 (AES only, otherwise undefined)
- * Remainder UNDEFINED
- * InCp_Key = 1'b0 Preserve old Cipher Keys
- * 1'b1 Load new Cipher Keys from memory to local registers
- * and recalculate the Arc4 Sbox if Arc4 Cipher chosen;
- * This overrides LoadArc4State setting.
- * HASH.HMAC = 1'b0 Hash without HMAC
- * 1'b1 Hash with HMAC
- * Needs to be set to 0 for GCM and Kasumi F9 authenticators
- * otherwise unpredictable results will be generated
- * Hash = 2'b00 Hash NOP
- * 2'b01 MD5
- * 2'b10 SHA-1
- * 2'b11 SHA-256
- * 3'b100 SHA-384
- * 3'b101 SHA-512
- * 3'b110 GCM
- * 3'b111 Kasumi f9
- * InHs_Key = 1'b0 Preserve old HMAC Keys
- * If GCM is selected as authenticator, leaving this bit
- * at 0 will cause the engine to use the old H value.
- * It will use the old SCI inside the decoder if
- * CFBMask[1:0] == 2'b11.
- * If Kasumi F9 authenticator, using 0 preserves
- * old keys (IK) in decoder.
- * 1'b1 Load new HMAC Keys from memory to local registers
- * Setting this bit while Cipher=Arc4 and LoadArc4State=1
- * causes the decoder to load the Arc4 state from the
- * cacheline following the HMAC keys (Whether HASH.HMAC
- * is set or not).
- * If GCM is selected as authenticator, setting this bit
- * causes both H (16 bytes) and SCI (8 bytes) to be loaded
- * from memory to the decoder. H will be loaded to the engine
- * but SCI is only loaded to the engine if CFBMask[1:0] == 2'b11.
- * If Kasumi F9 authenticator, using 1 loads new keys (IK)
- * from memory to decoder.
- * CHECKSUM.CkSum = 1'b0 CkSum NOP
- * 1'b1 INTERNET_CHECKSUM
- *
- *
- *
- */
-
- /* #define CTRL_DSC_OVERRIDECIPHER */
-#define CTL_DSC_OVERRIDECIPHER_OFF 0
-#define CTL_DSC_OVERRIDECIPHER_ON 1
-#define CTL_DSC_OVERRIDECIPHER_LSB 43
-#define CTL_DSC_OVERRIDECIPHER_BITS ONE_BIT
-#define CTL_DSC_OVERRIDECIPHER_MASK (CTL_DSC_OVERRIDECIPHER_BITS << CTL_DSC_OVERRIDECIPHER_LSB)
-
-/* #define CTRL_DSC_ARC4_WAIT4SAVE */
-#define CTL_DSC_ARC4_WAIT4SAVE_OFF 0
-#define CTL_DSC_ARC4_WAIT4SAVE_ON 1
-#define CTL_DSC_ARC4_WAIT4SAVE_LSB 42
-#define CTL_DSC_ARC4_WAIT4SAVE_BITS ONE_BIT
-#define CTL_DSC_ARC4_WAIT4SAVE_MASK (CTL_DSC_ARC4_WAIT4SAVE_BITS << CTL_DSC_ARC4_WAIT4SAVE_LSB)
-
-/* #define CTRL_DSC_ARC4_SAVESTATE */
-#define CTL_DSC_ARC4_SAVESTATE_OFF 0
-#define CTL_DSC_ARC4_SAVESTATE_ON 1
-#define CTL_DSC_ARC4_SAVESTATE_LSB 41
-#define CTL_DSC_ARC4_SAVESTATE_BITS ONE_BIT
-#define CTL_DSC_ARC4_SAVESTATE_MASK (CTL_DSC_ARC4_SAVESTATE_BITS << CTL_DSC_ARC4_SAVESTATE_LSB)
-
-/* #define CTRL_DSC_ARC4_LOADSTATE */
-#define CTL_DSC_ARC4_LOADSTATE_OFF 0
-#define CTL_DSC_ARC4_LOADSTATE_ON 1
-#define CTL_DSC_ARC4_LOADSTATE_LSB 40
-#define CTL_DSC_ARC4_LOADSTATE_BITS ONE_BIT
-#define CTL_DSC_ARC4_LOADSTATE_MASK (CTL_DSC_ARC4_LOADSTATE_BITS << CTL_DSC_ARC4_LOADSTATE_LSB)
-
-/* #define CTRL_DSC_ARC4_KEYLEN */
-#define CTL_DSC_ARC4_KEYLEN_LSB 35
-#define CTL_DSC_ARC4_KEYLEN_BITS FIVE_BITS
-#define CTL_DSC_ARC4_KEYLEN_MASK (CTL_DSC_ARC4_KEYLEN_BITS << CTL_DSC_ARC4_KEYLEN_LSB)
-
-/* #define CTL_DSC_CPHR (cipher) */
-#define CTL_DSC_CPHR_BYPASS 0 /* undefined */
-#define CTL_DSC_CPHR_DES 1
-#define CTL_DSC_CPHR_3DES 2
-#define CTL_DSC_CPHR_AES128 3
-#define CTL_DSC_CPHR_AES192 4
-#define CTL_DSC_CPHR_AES256 5
-#define CTL_DSC_CPHR_ARC4 6
-#define CTL_DSC_CPHR_KASUMI_F8 7
-#define CTL_DSC_CPHR_LSB 32
-#define CTL_DSC_CPHR_BITS THREE_BITS
-#define CTL_DSC_CPHR_MASK (CTL_DSC_CPHR_BITS << CTL_DSC_CPHR_LSB)
-
-/* #define CTL_DSC_MODE */
-#define CTL_DSC_MODE_ECB 0
-#define CTL_DSC_MODE_CBC 1
-#define CTL_DSC_MODE_CFB 2
-#define CTL_DSC_MODE_OFB 3
-#define CTL_DSC_MODE_CTR 4
-#define CTL_DSC_MODE_F8 5
-#define CTL_DSC_MODE_LSB 29
-#define CTL_DSC_MODE_BITS THREE_BITS
-#define CTL_DSC_MODE_MASK (CTL_DSC_MODE_BITS << CTL_DSC_MODE_LSB)
-
-/* #define CTL_DSC_ICPHR */
-#define CTL_DSC_ICPHR_OKY 0 /* Old Keys */
-#define CTL_DSC_ICPHR_NKY 1 /* New Keys */
-#define CTL_DSC_ICPHR_LSB 28
-#define CTL_DSC_ICPHR_BITS ONE_BIT
-#define CTL_DSC_ICPHR_MASK (CTL_DSC_ICPHR_BITS << CTL_DSC_ICPHR_LSB)
-
-/* #define CTL_DSC_HASHHI */
-#define CTL_DSC_HASHHI_LSB 24
-#define CTL_DSC_HASHHI_BITS ONE_BIT
-#define CTL_DSC_HASHHI_MASK (CTL_DSC_HASHHI_BITS << CTL_DSC_HASHHI_LSB)
-
-/* #define CTL_DSC_HMAC */
-#define CTL_DSC_HMAC_OFF 0
-#define CTL_DSC_HMAC_ON 1
-#define CTL_DSC_HMAC_LSB 23
-#define CTL_DSC_HMAC_BITS ONE_BIT
-#define CTL_DSC_HMAC_MASK (CTL_DSC_HMAC_BITS << CTL_DSC_HMAC_LSB)
-
-/* #define CTL_DSC_HASH */
-#define CTL_DSC_HASH_NOP 0
-#define CTL_DSC_HASH_MD5 1
-#define CTL_DSC_HASH_SHA1 2
-#define CTL_DSC_HASH_SHA256 3
-#define CTL_DSC_HASH_SHA384 4
-#define CTL_DSC_HASH_SHA512 5
-#define CTL_DSC_HASH_GCM 6
-#define CTL_DSC_HASH_KASUMI_F9 7
-#define CTL_DSC_HASH_LSB 21
-#define CTL_DSC_HASH_BITS TWO_BITS
-#define CTL_DSC_HASH_MASK (CTL_DSC_HASH_BITS << CTL_DSC_HASH_LSB)
-
-/* #define CTL_DSC_IHASH */
-#define CTL_DSC_IHASH_OLD 0
-#define CTL_DSC_IHASH_NEW 1
-#define CTL_DSC_IHASH_LSB 20
-#define CTL_DSC_IHASH_BITS ONE_BIT
-#define CTL_DSC_IHASH_MASK (CTL_DSC_IHASH_BITS << CTL_DSC_IHASH_LSB)
-
-/* #define CTL_DSC_CKSUM */
-#define CTL_DSC_CKSUM_NOP 0
-#define CTL_DSC_CKSUM_IP 1
-#define CTL_DSC_CKSUM_LSB 16
-#define CTL_DSC_CKSUM_BITS ONE_BIT
-#define CTL_DSC_CKSUM_MASK (CTL_DSC_CKSUM_BITS << CTL_DSC_CKSUM_LSB)
-
-
-/*
- * Component strcts and unions defining CipherHashInfo_u
- */
-
-/* AES256, (ECB, CBC, OFB, CTR, CFB), HMAC (MD5, SHA-1, SHA-256) - 96 bytes */
-typedef struct AES256HMAC_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t cipherKey3;
- uint64_t hmacKey0;
- uint64_t hmacKey1;
- uint64_t hmacKey2;
- uint64_t hmacKey3;
- uint64_t hmacKey4;
- uint64_t hmacKey5;
- uint64_t hmacKey6;
- uint64_t hmacKey7;
-} AES256HMAC_t, *AES256HMAC_pt;
-
-/* AES256, (ECB, CBC, OFB, CTR, CFB), HMAC (SHA-384, SHA-512) - 160 bytes */
-typedef struct AES256HMAC2_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t cipherKey3;
- uint64_t hmacKey0;
- uint64_t hmacKey1;
- uint64_t hmacKey2;
- uint64_t hmacKey3;
- uint64_t hmacKey4;
- uint64_t hmacKey5;
- uint64_t hmacKey6;
- uint64_t hmacKey7;
- uint64_t hmacKey8;
- uint64_t hmacKey9;
- uint64_t hmacKey10;
- uint64_t hmacKey11;
- uint64_t hmacKey12;
- uint64_t hmacKey13;
- uint64_t hmacKey14;
- uint64_t hmacKey15;
-} AES256HMAC2_t, *AES256HMAC2_pt;
-
-/* AES256, (ECB, CBC, OFB, CTR, CFB), GCM - 56 bytes */
-typedef struct AES256GCM_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t cipherKey3;
- uint64_t GCMH0;
- uint64_t GCMH1;
- uint64_t GCMSCI;
-} AES256GCM_t, *AES256GCM_pt;
-
-/* AES256, (ECB, CBC, OFB, CTR, CFB), F9 - 56 bytes */
-typedef struct AES256F9_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t cipherKey3;
- uint64_t authKey0;
- uint64_t authKey1;
-} AES256F9_t, *AES256F9_pt;
-
-/* AES256, (ECB, CBC, OFB, CTR, CFB), Non-HMAC (MD5, SHA-1, SHA-256) - 32 bytes */
-typedef struct AES256_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t cipherKey3;
-} AES256_t, *AES256_pt;
-
-
-/* All AES192 possibilities */
-
-/* AES192, (ECB, CBC, OFB, CTR, CFB), HMAC (MD5, SHA-1, SHA-192) - 88 bytes */
-typedef struct AES192HMAC_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t hmacKey0;
- uint64_t hmacKey1;
- uint64_t hmacKey2;
- uint64_t hmacKey3;
- uint64_t hmacKey4;
- uint64_t hmacKey5;
- uint64_t hmacKey6;
- uint64_t hmacKey7;
-} AES192HMAC_t, *AES192HMAC_pt;
-
-/* AES192, (ECB, CBC, OFB, CTR, CFB), HMAC (SHA-384, SHA-512) - 152 bytes */
-typedef struct AES192HMAC2_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t hmacKey0;
- uint64_t hmacKey1;
- uint64_t hmacKey2;
- uint64_t hmacKey3;
- uint64_t hmacKey4;
- uint64_t hmacKey5;
- uint64_t hmacKey6;
- uint64_t hmacKey7;
- uint64_t hmacKey8;
- uint64_t hmacKey9;
- uint64_t hmacKey10;
- uint64_t hmacKey11;
- uint64_t hmacKey12;
- uint64_t hmacKey13;
- uint64_t hmacKey14;
- uint64_t hmacKey15;
-} AES192HMAC2_t, *AES192HMAC2_pt;
-
-/* AES192, (ECB, CBC, OFB, CTR, CFB), GCM - 48 bytes */
-typedef struct AES192GCM_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t GCMH0;
- uint64_t GCMH1;
- uint64_t GCMSCI;
-} AES192GCM_t, *AES192GCM_pt;
-
-/* AES192, (ECB, CBC, OFB, CTR, CFB), F9 - 48 bytes */
-typedef struct AES192F9_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t authKey0;
- uint64_t authKey1;
-} AES192F9_t, *AES192F9_pt;
-
-/* AES192, (ECB, CBC, OFB, CTR, CFB), Non-HMAC (MD5, SHA-1, SHA-192) - 24 bytes */
-typedef struct AES192_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
-} AES192_t, *AES192_pt;
-
-
-/* All AES128 possibilities */
-
-/* AES128, (ECB, CBC, OFB, CTR, CFB), HMAC (MD5, SHA-1, SHA-128) - 80 bytes */
-typedef struct AES128HMAC_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t hmacKey0;
- uint64_t hmacKey1;
- uint64_t hmacKey2;
- uint64_t hmacKey3;
- uint64_t hmacKey4;
- uint64_t hmacKey5;
- uint64_t hmacKey6;
- uint64_t hmacKey7;
-} AES128HMAC_t, *AES128HMAC_pt;
-
-/* AES128, (ECB, CBC, OFB, CTR, CFB), HMAC (SHA-384, SHA-612) - 144 bytes */
-typedef struct AES128HMAC2_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t hmacKey0;
- uint64_t hmacKey1;
- uint64_t hmacKey2;
- uint64_t hmacKey3;
- uint64_t hmacKey4;
- uint64_t hmacKey5;
- uint64_t hmacKey6;
- uint64_t hmacKey7;
- uint64_t hmacKey8;
- uint64_t hmacKey9;
- uint64_t hmacKey10;
- uint64_t hmacKey11;
- uint64_t hmacKey12;
- uint64_t hmacKey13;
- uint64_t hmacKey14;
- uint64_t hmacKey15;
-} AES128HMAC2_t, *AES128HMAC2_pt;
-
-/* AES128, (ECB, CBC, OFB, CTR, CFB), GCM - 40 bytes */
-typedef struct AES128GCM_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t GCMH0;
- uint64_t GCMH1;
- uint64_t GCMSCI;
-} AES128GCM_t, *AES128GCM_pt;
-
-/* AES128, (ECB, CBC, OFB, CTR, CFB), F9 - 48 bytes */
-typedef struct AES128F9_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t authKey0;
- uint64_t authKey1;
-} AES128F9_t, *AES128F9_pt;
-
-/* AES128, (ECB, CBC, OFB, CTR, CFB), Non-HMAC (MD5, SHA-1, SHA-128) - 16 bytes */
-typedef struct AES128_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
-} AES128_t, *AES128_pt;
-
-/* AES128, (OFB F8), Non-HMAC (MD5, SHA-1, SHA-256) - 32 bytes */
-typedef struct AES128F8_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKeyMask0;
- uint64_t cipherKeyMask1;
-} AES128F8_t, *AES128F8_pt;
-
-/* AES128, (OFB F8), HMAC (MD5, SHA-1, SHA-256) - 96 bytes */
-typedef struct AES128F8HMAC_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKeyMask0;
- uint64_t cipherKeyMask1;
- uint64_t hmacKey0;
- uint64_t hmacKey1;
- uint64_t hmacKey2;
- uint64_t hmacKey3;
- uint64_t hmacKey4;
- uint64_t hmacKey5;
- uint64_t hmacKey6;
- uint64_t hmacKey7;
-} AES128F8HMAC_t, *AES128F8HMAC_pt;
-
-/* AES128, (OFB F8), HMAC (SHA-384, SHA-512) - 160 bytes */
-typedef struct AES128F8HMAC2_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKeyMask0;
- uint64_t cipherKeyMask1;
- uint64_t hmacKey0;
- uint64_t hmacKey1;
- uint64_t hmacKey2;
- uint64_t hmacKey3;
- uint64_t hmacKey4;
- uint64_t hmacKey5;
- uint64_t hmacKey6;
- uint64_t hmacKey7;
- uint64_t hmacKey8;
- uint64_t hmacKey9;
- uint64_t hmacKey10;
- uint64_t hmacKey11;
- uint64_t hmacKey12;
- uint64_t hmacKey13;
- uint64_t hmacKey14;
- uint64_t hmacKey15;
-} AES128F8HMAC2_t, *AES128F8HMAC2_pt;
-
-/* AES192, (OFB F8), Non-HMAC (MD5, SHA-1, SHA-256) - 48 bytes */
-typedef struct AES192F8_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t cipherKeyMask0;
- uint64_t cipherKeyMask1;
- uint64_t cipherKeyMask2;
-} AES192F8_t, *AES192F8_pt;
-
-/* AES192, (OFB F8), HMAC (MD5, SHA-1, SHA-256) - 112 bytes */
-typedef struct AES192F8HMAC_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t cipherKeyMask0;
- uint64_t cipherKeyMask1;
- uint64_t cipherKeyMask2;
- uint64_t hmacKey0;
- uint64_t hmacKey1;
- uint64_t hmacKey2;
- uint64_t hmacKey3;
- uint64_t hmacKey4;
- uint64_t hmacKey5;
- uint64_t hmacKey6;
- uint64_t hmacKey7;
-} AES192F8HMAC_t, *AES192F8HMAC_pt;
-
-/* AES192, (OFB F8), HMAC (SHA-384, SHA-512) - 176 bytes */
-typedef struct AES192F8HMAC2_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t cipherKeyMask0;
- uint64_t cipherKeyMask1;
- uint64_t cipherKeyMask2;
- uint64_t hmacKey0;
- uint64_t hmacKey1;
- uint64_t hmacKey2;
- uint64_t hmacKey3;
- uint64_t hmacKey4;
- uint64_t hmacKey5;
- uint64_t hmacKey6;
- uint64_t hmacKey7;
- uint64_t hmacKey8;
- uint64_t hmacKey9;
- uint64_t hmacKey10;
- uint64_t hmacKey11;
- uint64_t hmacKey12;
- uint64_t hmacKey13;
- uint64_t hmacKey14;
- uint64_t hmacKey15;
-} AES192F8HMAC2_t, *AES192F8HMAC2_pt;
-
-/* AES256, (OFB F8), Non-HMAC (MD5, SHA-1, SHA-256) - 64 bytes */
-typedef struct AES256F8_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t cipherKey3;
- uint64_t cipherKeyMask0;
- uint64_t cipherKeyMask1;
- uint64_t cipherKeyMask2;
- uint64_t cipherKeyMask3;
-} AES256F8_t, *AES256F8_pt;
-
-/* AES256, (OFB F8), HMAC (MD5, SHA-1, SHA-256) - 128 bytes */
-typedef struct AES256F8HMAC_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t cipherKey3;
- uint64_t cipherKeyMask0;
- uint64_t cipherKeyMask1;
- uint64_t cipherKeyMask2;
- uint64_t cipherKeyMask3;
- uint64_t hmacKey0;
- uint64_t hmacKey1;
- uint64_t hmacKey2;
- uint64_t hmacKey3;
- uint64_t hmacKey4;
- uint64_t hmacKey5;
- uint64_t hmacKey6;
- uint64_t hmacKey7;
-} AES256F8HMAC_t, *AES256F8HMAC_pt;
-
-/* AES256, (OFB F8), HMAC (SHA-384, SHA-512) - 192 bytes */
-typedef struct AES256F8HMAC2_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t cipherKey3;
- uint64_t cipherKeyMask0;
- uint64_t cipherKeyMask1;
- uint64_t cipherKeyMask2;
- uint64_t cipherKeyMask3;
- uint64_t hmacKey0;
- uint64_t hmacKey1;
- uint64_t hmacKey2;
- uint64_t hmacKey3;
- uint64_t hmacKey4;
- uint64_t hmacKey5;
- uint64_t hmacKey6;
- uint64_t hmacKey7;
- uint64_t hmacKey8;
- uint64_t hmacKey9;
- uint64_t hmacKey10;
- uint64_t hmacKey11;
- uint64_t hmacKey12;
- uint64_t hmacKey13;
- uint64_t hmacKey14;
- uint64_t hmacKey15;
-} AES256F8HMAC2_t, *AES256F8HMAC2_pt;
-
-/* AES256, (F8), GCM - 40 bytes */
-typedef struct AES128F8GCM_s {
- uint64_t cipherKey0;
- uint64_t cipherKey2;
- uint64_t GCMH0;
- uint64_t GCMH1;
- uint64_t GCMSCI;
-} AES128F8GCM_t, *AES128F8GCM_pt;
-
-/* AES256, (F8), GCM - 48 bytes */
-typedef struct AES192F8GCM_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t GCMH0;
- uint64_t GCMH1;
- uint64_t GCMSCI;
-} AES192F8GCM_t, *AES192F8GCM_pt;
-
-/* AES256, (F8), GCM - 56 bytes */
-typedef struct AES256F8GCM_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t cipherKey3;
- uint64_t GCMH0;
- uint64_t GCMH1;
- uint64_t GCMSCI;
-} AES256F8GCM_t, *AES256F8GCM_pt;
-
-/* AES256, (F8), F9 - 40 bytes */
-typedef struct AES128F8F9_s {
- uint64_t cipherKey0;
- uint64_t cipherKey2;
- uint64_t authKey0;
- uint64_t authKey1;
-} AES128F8F9_t, *AES128F8F9_pt;
-
-/* AES256, (F8), F9 - 48 bytes */
-typedef struct AES192F8F9_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t authKey0;
- uint64_t authKey1;
-} AES192F8F9_t, *AES192F8F9_pt;
-
-/* AES256F8, (F8), F9 - 56 bytes */
-typedef struct AES256F8F9_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t cipherKey3;
- uint64_t authKey0;
- uint64_t authKey1;
-} AES256F8F9_t, *AES256F8F9_pt;
-
-/* All DES possibilities */
-
-/* DES, (ECB, CBC), HMAC (MD5, SHA-1, SHA-128) - 72 bytes */
-typedef struct DESHMAC_s {
- uint64_t cipherKey0;
- uint64_t hmacKey0;
- uint64_t hmacKey1;
- uint64_t hmacKey2;
- uint64_t hmacKey3;
- uint64_t hmacKey4;
- uint64_t hmacKey5;
- uint64_t hmacKey6;
- uint64_t hmacKey7;
-} DESHMAC_t, *DESHMAC_pt;
-
-/* DES, (ECB, CBC), HMAC (SHA-384, SHA-512) - 136 bytes */
-typedef struct DESHMAC2_s {
- uint64_t cipherKey0;
- uint64_t hmacKey0;
- uint64_t hmacKey1;
- uint64_t hmacKey2;
- uint64_t hmacKey3;
- uint64_t hmacKey4;
- uint64_t hmacKey5;
- uint64_t hmacKey6;
- uint64_t hmacKey7;
- uint64_t hmacKey8;
- uint64_t hmacKey9;
- uint64_t hmacKey10;
- uint64_t hmacKey11;
- uint64_t hmacKey12;
- uint64_t hmacKey13;
- uint64_t hmacKey14;
- uint64_t hmacKey15;
-} DESHMAC2_t, *DESHMAC2_pt;
-
-/* DES, (ECB, CBC), GCM - 32 bytes */
-typedef struct DESGCM_s {
- uint64_t cipherKey0;
- uint64_t GCMH0;
- uint64_t GCMH1;
- uint64_t GCMSCI;
-} DESGCM_t, *DESGCM_pt;
-
-/* DES, (ECB, CBC), F9 - 32 bytes */
-typedef struct DESF9_s {
- uint64_t cipherKey0;
- uint64_t authKey0;
- uint64_t authKey1;
-} DESF9_t, *DESF9_pt;
-
-/* DES, (ECB, CBC), Non-HMAC (MD5, SHA-1, SHA-128) - 9 bytes */
-typedef struct DES_s {
- uint64_t cipherKey0;
-} DES_t, *DES_pt;
-
-
-/* All 3DES possibilities */
-
-/* 3DES, (ECB, CBC), HMAC (MD5, SHA-1, SHA-128) - 88 bytes */
-typedef struct DES3HMAC_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t hmacKey0;
- uint64_t hmacKey1;
- uint64_t hmacKey2;
- uint64_t hmacKey3;
- uint64_t hmacKey4;
- uint64_t hmacKey5;
- uint64_t hmacKey6;
- uint64_t hmacKey7;
-} DES3HMAC_t, *DES3HMAC_pt;
-
-/* 3DES, (ECB, CBC), HMAC (SHA-384, SHA-512) - 152 bytes */
-typedef struct DES3HMAC2_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t hmacKey0;
- uint64_t hmacKey1;
- uint64_t hmacKey2;
- uint64_t hmacKey3;
- uint64_t hmacKey4;
- uint64_t hmacKey5;
- uint64_t hmacKey6;
- uint64_t hmacKey7;
- uint64_t hmacKey8;
- uint64_t hmacKey9;
- uint64_t hmacKey10;
- uint64_t hmacKey11;
- uint64_t hmacKey12;
- uint64_t hmacKey13;
- uint64_t hmacKey14;
- uint64_t hmacKey15;
-} DES3HMAC2_t, *DES3HMAC2_pt;
-
-/* 3DES, (ECB, CBC), GCM - 48 bytes */
-typedef struct DES3GCM_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t GCMH0;
- uint64_t GCMH1;
- uint64_t GCMSCI;
-} DES3GCM_t, *DES3GCM_pt;
-
-/* 3DES, (ECB, CBC), GCM - 48 bytes */
-typedef struct DES3F9_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t authKey0;
- uint64_t authKey1;
-} DES3F9_t, *DES3F9_pt;
-
-/* 3DES, (ECB, CBC), Non-HMAC (MD5, SHA-1, SHA-128) - 24 bytes */
-typedef struct DES3_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
-} DES3_t, *DES3_pt;
-
-
-/* HMAC only - no cipher */
-
-/* HMAC (MD5, SHA-1, SHA-128) - 64 bytes */
-typedef struct HMAC_s {
- uint64_t hmacKey0;
- uint64_t hmacKey1;
- uint64_t hmacKey2;
- uint64_t hmacKey3;
- uint64_t hmacKey4;
- uint64_t hmacKey5;
- uint64_t hmacKey6;
- uint64_t hmacKey7;
-} HMAC_t, *HMAC_pt;
-
-/* HMAC (SHA-384, SHA-512) - 128 bytes */
-typedef struct HMAC2_s {
- uint64_t hmacKey0;
- uint64_t hmacKey1;
- uint64_t hmacKey2;
- uint64_t hmacKey3;
- uint64_t hmacKey4;
- uint64_t hmacKey5;
- uint64_t hmacKey6;
- uint64_t hmacKey7;
- uint64_t hmacKey8;
- uint64_t hmacKey9;
- uint64_t hmacKey10;
- uint64_t hmacKey11;
- uint64_t hmacKey12;
- uint64_t hmacKey13;
- uint64_t hmacKey14;
- uint64_t hmacKey15;
-} HMAC2_t, *HMAC2_pt;
-
-/* GCM - 24 bytes */
-typedef struct GCM_s {
- uint64_t GCMH0;
- uint64_t GCMH1;
- uint64_t GCMSCI;
-} GCM_t, *GCM_pt;
-
-/* F9 - 24 bytes */
-typedef struct F9_s {
- uint64_t authKey0;
- uint64_t authKey1;
-} F9_t, *F9_pt;
-
-/* All ARC4 possibilities */
-/* ARC4, HMAC (MD5, SHA-1, SHA-256) - 96 bytes */
-typedef struct ARC4HMAC_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t cipherKey3;
- uint64_t hmacKey0;
- uint64_t hmacKey1;
- uint64_t hmacKey2;
- uint64_t hmacKey3;
- uint64_t hmacKey4;
- uint64_t hmacKey5;
- uint64_t hmacKey6;
- uint64_t hmacKey7;
-} ARC4HMAC_t, *ARC4HMAC_pt;
-
-/* ARC4, HMAC (SHA-384, SHA-512) - 160 bytes */
-typedef struct ARC4HMAC2_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t cipherKey3;
- uint64_t hmacKey0;
- uint64_t hmacKey1;
- uint64_t hmacKey2;
- uint64_t hmacKey3;
- uint64_t hmacKey4;
- uint64_t hmacKey5;
- uint64_t hmacKey6;
- uint64_t hmacKey7;
- uint64_t hmacKey8;
- uint64_t hmacKey9;
- uint64_t hmacKey10;
- uint64_t hmacKey11;
- uint64_t hmacKey12;
- uint64_t hmacKey13;
- uint64_t hmacKey14;
- uint64_t hmacKey15;
-} ARC4HMAC2_t, *ARC4HMAC2_pt;
-
-/* ARC4, GCM - 56 bytes */
-typedef struct ARC4GCM_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t cipherKey3;
- uint64_t GCMH0;
- uint64_t GCMH1;
- uint64_t GCMSCI;
-} ARC4GCM_t, *ARC4GCM_pt;
-
-/* ARC4, F9 - 56 bytes */
-typedef struct ARC4F9_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t cipherKey3;
- uint64_t authKey0;
- uint64_t authKey1;
-} ARC4F9_t, *ARC4F9_pt;
-
-/* ARC4, HMAC (MD5, SHA-1, SHA-256) - 408 bytes (not including 8 bytes from instruction) */
-typedef struct ARC4StateHMAC_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t cipherKey3;
- uint64_t hmacKey0;
- uint64_t hmacKey1;
- uint64_t hmacKey2;
- uint64_t hmacKey3;
- uint64_t hmacKey4;
- uint64_t hmacKey5;
- uint64_t hmacKey6;
- uint64_t hmacKey7;
- uint64_t PAD0;
- uint64_t PAD1;
- uint64_t PAD2;
- uint64_t Arc4SboxData0;
- uint64_t Arc4SboxData1;
- uint64_t Arc4SboxData2;
- uint64_t Arc4SboxData3;
- uint64_t Arc4SboxData4;
- uint64_t Arc4SboxData5;
- uint64_t Arc4SboxData6;
- uint64_t Arc4SboxData7;
- uint64_t Arc4SboxData8;
- uint64_t Arc4SboxData9;
- uint64_t Arc4SboxData10;
- uint64_t Arc4SboxData11;
- uint64_t Arc4SboxData12;
- uint64_t Arc4SboxData13;
- uint64_t Arc4SboxData14;
- uint64_t Arc4SboxData15;
- uint64_t Arc4SboxData16;
- uint64_t Arc4SboxData17;
- uint64_t Arc4SboxData18;
- uint64_t Arc4SboxData19;
- uint64_t Arc4SboxData20;
- uint64_t Arc4SboxData21;
- uint64_t Arc4SboxData22;
- uint64_t Arc4SboxData23;
- uint64_t Arc4SboxData24;
- uint64_t Arc4SboxData25;
- uint64_t Arc4SboxData26;
- uint64_t Arc4SboxData27;
- uint64_t Arc4SboxData28;
- uint64_t Arc4SboxData29;
- uint64_t Arc4SboxData30;
- uint64_t Arc4SboxData31;
- uint64_t Arc4IJData;
- uint64_t PAD3;
- uint64_t PAD4;
- uint64_t PAD5;
-} ARC4StateHMAC_t, *ARC4StateHMAC_pt;
-
-/* ARC4, HMAC (SHA-384, SHA-512) - 480 bytes (not including 8 bytes from instruction) */
-typedef struct ARC4StateHMAC2_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t cipherKey3;
- uint64_t hmacKey0;
- uint64_t hmacKey1;
- uint64_t hmacKey2;
- uint64_t hmacKey3;
- uint64_t hmacKey4;
- uint64_t hmacKey5;
- uint64_t hmacKey6;
- uint64_t hmacKey7;
- uint64_t hmacKey8;
- uint64_t hmacKey9;
- uint64_t hmacKey10;
- uint64_t hmacKey11;
- uint64_t hmacKey12;
- uint64_t hmacKey13;
- uint64_t hmacKey14;
- uint64_t hmacKey15;
- uint64_t PAD0;
- uint64_t PAD1;
- uint64_t PAD2;
- uint64_t Arc4SboxData0;
- uint64_t Arc4SboxData1;
- uint64_t Arc4SboxData2;
- uint64_t Arc4SboxData3;
- uint64_t Arc4SboxData4;
- uint64_t Arc4SboxData5;
- uint64_t Arc4SboxData6;
- uint64_t Arc4SboxData7;
- uint64_t Arc4SboxData8;
- uint64_t Arc4SboxData9;
- uint64_t Arc4SboxData10;
- uint64_t Arc4SboxData11;
- uint64_t Arc4SboxData12;
- uint64_t Arc4SboxData13;
- uint64_t Arc4SboxData14;
- uint64_t Arc4SboxData15;
- uint64_t Arc4SboxData16;
- uint64_t Arc4SboxData17;
- uint64_t Arc4SboxData18;
- uint64_t Arc4SboxData19;
- uint64_t Arc4SboxData20;
- uint64_t Arc4SboxData21;
- uint64_t Arc4SboxData22;
- uint64_t Arc4SboxData23;
- uint64_t Arc4SboxData24;
- uint64_t Arc4SboxData25;
- uint64_t Arc4SboxData26;
- uint64_t Arc4SboxData27;
- uint64_t Arc4SboxData28;
- uint64_t Arc4SboxData29;
- uint64_t Arc4SboxData30;
- uint64_t Arc4SboxData31;
- uint64_t Arc4IJData;
- uint64_t PAD3;
- uint64_t PAD4;
- uint64_t PAD5;
-} ARC4StateHMAC2_t, *ARC4StateHMAC2_pt;
-
-/* ARC4, GCM - 408 bytes (not including 8 bytes from instruction) */
-typedef struct ARC4StateGCM_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t cipherKey3;
- uint64_t GCMH0;
- uint64_t GCMH1;
- uint64_t GCMSCI;
- uint64_t PAD0;
- uint64_t PAD1;
- uint64_t PAD2;
- uint64_t PAD3;
- uint64_t PAD4;
- uint64_t PAD5;
- uint64_t PAD6;
- uint64_t PAD7;
- uint64_t Arc4SboxData0;
- uint64_t Arc4SboxData1;
- uint64_t Arc4SboxData2;
- uint64_t Arc4SboxData3;
- uint64_t Arc4SboxData4;
- uint64_t Arc4SboxData5;
- uint64_t Arc4SboxData6;
- uint64_t Arc4SboxData7;
- uint64_t Arc4SboxData8;
- uint64_t Arc4SboxData9;
- uint64_t Arc4SboxData10;
- uint64_t Arc4SboxData11;
- uint64_t Arc4SboxData12;
- uint64_t Arc4SboxData13;
- uint64_t Arc4SboxData14;
- uint64_t Arc4SboxData15;
- uint64_t Arc4SboxData16;
- uint64_t Arc4SboxData17;
- uint64_t Arc4SboxData18;
- uint64_t Arc4SboxData19;
- uint64_t Arc4SboxData20;
- uint64_t Arc4SboxData21;
- uint64_t Arc4SboxData22;
- uint64_t Arc4SboxData23;
- uint64_t Arc4SboxData24;
- uint64_t Arc4SboxData25;
- uint64_t Arc4SboxData26;
- uint64_t Arc4SboxData27;
- uint64_t Arc4SboxData28;
- uint64_t Arc4SboxData29;
- uint64_t Arc4SboxData30;
- uint64_t Arc4SboxData31;
- uint64_t Arc4IJData;
- uint64_t PAD8;
- uint64_t PAD9;
- uint64_t PAD10;
-} ARC4StateGCM_t, *ARC4StateGCM_pt;
-
-/* ARC4, F9 - 408 bytes (not including 8 bytes from instruction) */
-typedef struct ARC4StateF9_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t cipherKey3;
- uint64_t authKey0;
- uint64_t authKey1;
- uint64_t PAD0;
- uint64_t PAD1;
- uint64_t PAD2;
- uint64_t PAD3;
- uint64_t PAD4;
- uint64_t PAD5;
- uint64_t PAD6;
- uint64_t PAD7;
- uint64_t PAD8;
- uint64_t Arc4SboxData0;
- uint64_t Arc4SboxData1;
- uint64_t Arc4SboxData2;
- uint64_t Arc4SboxData3;
- uint64_t Arc4SboxData4;
- uint64_t Arc4SboxData5;
- uint64_t Arc4SboxData6;
- uint64_t Arc4SboxData7;
- uint64_t Arc4SboxData8;
- uint64_t Arc4SboxData9;
- uint64_t Arc4SboxData10;
- uint64_t Arc4SboxData11;
- uint64_t Arc4SboxData12;
- uint64_t Arc4SboxData13;
- uint64_t Arc4SboxData14;
- uint64_t Arc4SboxData15;
- uint64_t Arc4SboxData16;
- uint64_t Arc4SboxData17;
- uint64_t Arc4SboxData18;
- uint64_t Arc4SboxData19;
- uint64_t Arc4SboxData20;
- uint64_t Arc4SboxData21;
- uint64_t Arc4SboxData22;
- uint64_t Arc4SboxData23;
- uint64_t Arc4SboxData24;
- uint64_t Arc4SboxData25;
- uint64_t Arc4SboxData26;
- uint64_t Arc4SboxData27;
- uint64_t Arc4SboxData28;
- uint64_t Arc4SboxData29;
- uint64_t Arc4SboxData30;
- uint64_t Arc4SboxData31;
- uint64_t Arc4IJData;
- uint64_t PAD9;
- uint64_t PAD10;
- uint64_t PAD11;
-} ARC4StateF9_t, *ARC4StateF9_pt;
-
-/* ARC4, Non-HMAC (MD5, SHA-1, SHA-256) - 32 bytes */
-typedef struct ARC4_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t cipherKey3;
-} ARC4_t, *ARC4_pt;
-
-/* ARC4, Non-HMAC (MD5, SHA-1, SHA-256) - 344 bytes (not including 8 bytes from instruction) */
-typedef struct ARC4State_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t cipherKey2;
- uint64_t cipherKey3;
- uint64_t PAD0;
- uint64_t PAD1;
- uint64_t PAD2;
- uint64_t Arc4SboxData0;
- uint64_t Arc4SboxData1;
- uint64_t Arc4SboxData2;
- uint64_t Arc4SboxData3;
- uint64_t Arc4SboxData4;
- uint64_t Arc4SboxData5;
- uint64_t Arc4SboxData6;
- uint64_t Arc4SboxData7;
- uint64_t Arc4SboxData8;
- uint64_t Arc4SboxData9;
- uint64_t Arc4SboxData10;
- uint64_t Arc4SboxData11;
- uint64_t Arc4SboxData12;
- uint64_t Arc4SboxData13;
- uint64_t Arc4SboxData14;
- uint64_t Arc4SboxData15;
- uint64_t Arc4SboxData16;
- uint64_t Arc4SboxData17;
- uint64_t Arc4SboxData18;
- uint64_t Arc4SboxData19;
- uint64_t Arc4SboxData20;
- uint64_t Arc4SboxData21;
- uint64_t Arc4SboxData22;
- uint64_t Arc4SboxData23;
- uint64_t Arc4SboxData24;
- uint64_t Arc4SboxData25;
- uint64_t Arc4SboxData26;
- uint64_t Arc4SboxData27;
- uint64_t Arc4SboxData28;
- uint64_t Arc4SboxData29;
- uint64_t Arc4SboxData30;
- uint64_t Arc4SboxData31;
- uint64_t Arc4IJData;
- uint64_t PAD3;
- uint64_t PAD4;
- uint64_t PAD5;
-} ARC4State_t, *ARC4State_pt;
-
-/* Kasumi f8 - 32 bytes */
-typedef struct KASUMIF8_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
-} KASUMIF8_t, *KASUMIF8_pt;
-
-/* Kasumi f8 + HMAC (MD5, SHA-1, SHA-256) - 80 bytes */
-typedef struct KASUMIF8HMAC_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t hmacKey0;
- uint64_t hmacKey1;
- uint64_t hmacKey2;
- uint64_t hmacKey3;
- uint64_t hmacKey4;
- uint64_t hmacKey5;
- uint64_t hmacKey6;
- uint64_t hmacKey7;
-} KASUMIF8HMAC_t, *KASUMIF8HMAC_pt;
-
-/* Kasumi f8 + HMAC (SHA-384, SHA-512) - 144 bytes */
-typedef struct KASUMIF8HMAC2_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t hmacKey0;
- uint64_t hmacKey1;
- uint64_t hmacKey2;
- uint64_t hmacKey3;
- uint64_t hmacKey4;
- uint64_t hmacKey5;
- uint64_t hmacKey6;
- uint64_t hmacKey7;
- uint64_t hmacKey8;
- uint64_t hmacKey9;
- uint64_t hmacKey10;
- uint64_t hmacKey11;
- uint64_t hmacKey12;
- uint64_t hmacKey13;
- uint64_t hmacKey14;
- uint64_t hmacKey15;
-} KASUMIF8HMAC2_t, *KASUMIF8HMAC2_pt;
-
-/* Kasumi f8 + GCM - 144 bytes */
-typedef struct KASUMIF8GCM_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t GCMH0;
- uint64_t GCMH1;
- uint64_t GCMSCI;
-} KASUMIF8GCM_t, *KASUMIF8GCM_pt;
-
-/* Kasumi f8 + f9 - 32 bytes */
-typedef struct KASUMIF8F9_s {
- uint64_t cipherKey0;
- uint64_t cipherKey1;
- uint64_t authKey0;
- uint64_t authKey1;
-} KASUMIF8F9_t, *KASUMIF8F9_pt;
-
-typedef union CipherHashInfo_u {
- AES256HMAC_t infoAES256HMAC;
- AES256_t infoAES256;
- AES192HMAC_t infoAES192HMAC;
- AES192_t infoAES192;
- AES128HMAC_t infoAES128HMAC;
- AES128_t infoAES128;
- DESHMAC_t infoDESHMAC;
- DES_t infoDES;
- DES3HMAC_t info3DESHMAC;
- DES3_t info3DES;
- HMAC_t infoHMAC;
- /* ARC4 */
- ARC4HMAC_t infoARC4HMAC;
- ARC4StateHMAC_t infoARC4StateHMAC;
- ARC4_t infoARC4;
- ARC4State_t infoARC4State;
- /* AES mode F8 */
- AES256F8HMAC_t infoAES256F8HMAC;
- AES256F8_t infoAES256F8;
- AES192F8HMAC_t infoAES192F8HMAC;
- AES192F8_t infoAES192F8;
- AES128F8HMAC_t infoAES128F8HMAC;
- AES128F8_t infoAES128F8;
- /* KASUMI F8 */
- KASUMIF8HMAC_t infoKASUMIF8HMAC;
- KASUMIF8_t infoKASUMIF8;
- /* GCM */
- GCM_t infoGCM;
- AES256F8GCM_t infoAES256F8GCM;
- AES192F8GCM_t infoAES192F8GCM;
- AES128F8GCM_t infoAES128F8GCM;
- AES256GCM_t infoAES256GCM;
- AES192GCM_t infoAES192GCM;
- AES128GCM_t infoAES128GCM;
- DESGCM_t infoDESGCM;
- DES3GCM_t info3DESGCM;
- ARC4GCM_t infoARC4GCM;
- ARC4StateGCM_t infoARC4StateGCM;
- KASUMIF8GCM_t infoKASUMIF8GCM;
- /* HMAC2 */
- HMAC2_t infoHMAC2;
- AES256F8HMAC2_t infoAES256F8HMAC2;
- AES192F8HMAC2_t infoAES192F8HMAC2;
- AES128F8HMAC2_t infoAES128F8HMAC2;
- AES256HMAC2_t infoAES256HMAC2;
- AES192HMAC2_t infoAES192HMAC2;
- AES128HMAC2_t infoAES128HMAC2;
- DESHMAC2_t infoDESHMAC2;
- DES3HMAC2_t info3DESHMAC2;
- ARC4HMAC2_t infoARC4HMAC2;
- ARC4StateHMAC2_t infoARC4StateHMAC2;
- KASUMIF8HMAC2_t infoKASUMIF8HMAC2;
- /* F9 */
- F9_t infoF9;
- AES256F8F9_t infoAES256F8F9;
- AES192F8F9_t infoAES192F8F9;
- AES128F8F9_t infoAES128F8F9;
- AES256F9_t infoAES256F9;
- AES192F9_t infoAES192F9;
- AES128F9_t infoAES128F9;
- DESF9_t infoDESF9;
- DES3F9_t info3DESF9;
- ARC4F9_t infoARC4F9;
- ARC4StateF9_t infoARC4StateF9;
- KASUMIF8F9_t infoKASUMIF8F9;
-} CipherHashInfo_t, *CipherHashInfo_pt;
-
-
-/*
- *
- * ControlDescriptor_s datastructure
- *
- */
-
-typedef struct ControlDescriptor_s {
- uint64_t instruction;
- CipherHashInfo_t cipherHashInfo;
-} ControlDescriptor_t, *ControlDescriptor_pt;
-
-
-
-
-/* **********************************************************************
- * PacketDescriptor_t
- * **********************************************************************
- */
-
-/* /--------------------------------------------\
- * | |
- * | New PacketDescriptor_s datastructure |
- * | |
- * \--------------------------------------------/
- *
- *
- *
- * PacketDescriptor_t.srcLengthIVOffUseIVNext
- * ------------------------------------------
- *
- * 63 62 61 59 58 57 56 54 53 43
- * ------------------------------------------------------------------------------------------------
- * || Load HMAC key || Pad Hash || Hash Byte Count || Next || Use IV || IV Offset || Packet length || ... CONT ...
- * ------------------------------------------------------------------------------------------------
- * 1 1 3 1 1 3 11
- *
- *
- * 42 41 40 39 5 4 3 2
- * 0
- * ----------------------------------------------------------------------------------------------------
- * || NLHMAC || Break || Wait || Segment src address || SRTCP || Reserved || Global src data offset ||
- * ----------------------------------------------------------------------------------------------------
- * 1 1 1 35 1 1 3
- *
- *
- *
- * Load HMAC key = 1'b0 Preserve old HMAC key stored in Auth engine (moot if HASH.HMAC == 0)
- * 1'b1 Load HMAC key from ID registers at beginning of op
- * If GCM is selected as authenticator, setting this bit
- * will cause the H value from ID to be loaded to the engine
- * If Kasumi F9 is selected as authenticator, setting this bit
- * will cause the IK value from ID to be loaded to the engine.
- * Pad Hash = 1'b0 HASH will assume the data was padded to be a multiple
- * of 512 bits in length and that the last 64 bit word
- * expresses the total datalength in bits seen by HASH engine
- * 1'b1 The data was not padded to be a multiple of 512 bits in length;
- * The Hash engine will do its own padding to generate the correct digest.
- * Ignored by GCM (always does its own padding)
- * Hash Byte Count Number of BYTES on last 64-bit data word to use in digest calculation RELEVANT ONLY IF Pad Hash IS SET
- * 3'b000 Use all 8
- * 3'b001 Use first (MS) byte only (0-out rest), i.e., 0xddXXXXXXXXXXXXXX
- * 3'b010 Use first 2 bytes only (0-out rest), i.e., 0xddddXXXXXXXXXXXX ... etc
- * Next = 1'b0 Finish (return msg descriptor) at end of operation
- * 1'b1 Grab the next PacketDescriptor (i.e. next cache-line) when the current is complete.
- * This allows for fragmentation/defragmentation and processing of large (>16kB) packets.
- * The sequence of adjacent PacketDescriptor acts as a contiguous linked list of
- * pointers to the actual packets with Next==0 on the last PacketDescriptor to end processing.
- * Use IV = 1'b0 On first frag: Use old IV
- * On subsequent frags: Do not write out to DST the (dword) offset data
- * 1'b1 On first frag: Use data @ Segment_address + IV_Offset as IV
- * On subsequent frags: Do write out to DST the (dword) offset data
- * IV Offset = On first frag: Offset IN NB OF 8 BYTE WORDS (dwords) from beginning of packet
- * (i.e. (Potentially byte-shifted) Segment address) to cipher IV
- * On subsequent frags: Offset to beginning of data to process; data to offset won't
- * be given to engines and will be written out to dst in the clear.
- * ON SUBSEQUENT FRAGS, IV_Offset MAY NOT EXCEED 3; LARGER VALUES WILL CAUSE AN ERROR
- * SEE ERROR CONDITIONS BELOW
- * Packet length = Nb double words to stream in (Including Segment address->CP/IV/Auth/CkSum offsets)
- * This is the total amount of data (x8 in bytes) read (+1 dword if "Global src data offset" != 0)
- * This is the total amount of data (x8 in bytes) written (+1 dword if "Global dst data offset" != 0, if Dst dword offset == 0)
- * If Packet length == 11'h7ff and (Global src data offset != 0 or Global dst data offset != 0)
- * the operation is aborted (no mem writes occur)
- * and the "Insufficient Data To Cipher" error flag is raised
- * NLHMAC = No last to hmac. Setting this to 1 will prevent the transmission of the last DWORD
- * to the authenticator, i.e., the DWORD before last will be designated as last for the purposes of authentication.
- * Break = Break a wait (see below) state - causes the operation to be flushed and free descriptor to be returned.
- * Activated if DFetch blocked by Wait and Wait still active.
- * AS OF 02/10/2005 THIS FEATURE IS EXPERIMENTAL
- * Wait = Setting that bit causes the operation to block in DFetch stage.
- * DFetch will keep polling the memory location until the bit is reset at which time
- * the pipe resumes normal operation. This feature is convenient for software dealing with fragmented packets.
- * AS OF 02/10/2005 THIS FEATURE IS EXPERIMENTAL
- * Segment src address = 35 MSB of pointer to src data (i.e., cache-line aligned)
- * SRTCP = Bypass the cipher for the last 4 bytes of data, i.e. the last 4 bytes will be sent to memory
- * and the authenticator in the clear. Applicable to last packet descriptor andlast frag only.
- * This accommodates a requirement of SRTCP.
- * Global src data offset = Nb BYTES to right-shift data by before presenting it to engines
- * (0-7); allows realignment of byte-aligned, non-double-word aligned data
- *
- * PacketDescriptor_t.dstDataSettings
- * ----------------------------------
- *
- *
- * 63 62 60 59 58 56 55 54 53 52 41 40
- * ------------------------------------------------------------------------------------------------------------
- * || CipherPrefix | Arc4ByteCount | E/D | Cipher_Offset || Hash_Offset | Hash_Src || CkSum_Offset | CkSum_Src || ... CONT ...
- * ------------------------------------------------------------------------------------------------------------
- * 1 3 1 3 2 1 12 1
- * <-----------------------CIPHER-----------------------><---------HASH-----------><-------CHECKSUM----------->
- *
- *
- * CipherPrefix = 128'b0 will be sent to the selected cipher
- * KEEP VALUE ON ALL FRAGS after the IV is loaded, before the actual data goes in.
- * The result of that encryption (aka E(K, 0))will be stored
- * locally and XOR-ed with the auth digest to create the final
- * digest at the end of the auth OP:
- * This is covered by the GCM spec
- * AesPrefix = 1'b1 -> Force E=Cipher(K,0) before start of data encr.
- * -> Digest ^= E
- * AesPrefix = 1'b0 -> Regular digest
- * This flag is ignored if no cipher is chosen (Bypass condition)
- * X0 Arc4ByteCount = Number of BYTES on last 64-bit data word to encrypt
- * 3'b000 Encrypt all 8
- * 3'b001 Encrypt first (MS) byte only i.e., 0xddXXXXXXXXXXXXXX
- * 3'b010 Encrypt first 2 bytes only i.e., 0xddddXXXXXXXXXXXX ... etc
- * In reality, all are encrypted, however, the SBOX
- * is not written past the last byte to encrypt
- * E/D = 1'b0 Decrypt
- * 1'b1 Encrypt
- * Overloaded to also mean IV byte offset for first frag
- * Cipher_Offset = Nb of words between the first data segment
- * and word on which to start cipher operation
- * (64 BIT WORDS !!!)
- * Hash_Offset = Nb of words between the first data segment
- * and word on which to start hashing
- * (64 bit words)
- * Hash_Src = 1'b0 DMA channel
- * 1'b1 Cipher if word count exceeded Cipher_Offset;
- * DMA channel otherwise
- * CkSum_Offset = Nb of words between the first data segment
- * and word on which to start
- * checksum calculation (32 BIT WORDS !!!)
- * CkSum_Src = 1'b0 DMA channel
- * 1'b1 Cipher if word count exceeded Cipher_Offset
- * DMA channel otherwise
- * Cipher dst address = 35 MSB of pointer to dst location (i.e., cache-line aligned)
- * Dst dword offset = Nb of double-words to left-shift data from spec'ed Cipher dst address before writing it to memory
- * Global dst data offset = Nb BYTES to left-shift (double-word boundary aligned) data by before writing it to memory
- *
- *
- * PacketDescriptor_t.authDstNonceLow
- * ----------------------------------
- *
- * 63 40 39 5 4 0
- * -----------------------------------------------------
- * || Nonce_Low || Auth_dst_address || Cipher_Offset_Hi ||
- * -----------------------------------------------------
- * 24 35 5
- *
- *
- *
- * Nonce_Low = Nonce[23:0] 24 least significant bits of 32-bit long nonce
- * Used by AES in counter mode
- * Auth_dst_address = 35 MSB of pointer to authentication dst location (i.e., cache-line aligned)
- * X0 Cipher_Offset_Hi = On first frag: 5 MSB of 8-bit Cipher_offset; will be concatenated to
- * the top of PacketDescriptor_t.dstDataSettings.Cipher_Offset
- * On subsequent frags: Ignored
- *
- *
- * PacketDescriptor_t.ckSumDstNonceHiCFBMaskLLWMask
- * ------------------------------------------------
- *
- *
- * 63 61 60 58 57 56 55 48 47 40 39 5 4 0
- * -------------------------------------------------------------------------------------------------------------------
- * || Hash_Byte_Offset || Packet length bytes || LLWMask || CFB_Mask || Nonce_Hi || CkSum_dst_address || IV_Offset_Hi ||
- * -------------------------------------------------------------------------------------------------------------------
- * 3 3 2 8 8 35 5
- *
- *
- * Hash_Byte_Offset = On first frag: Additional offset in bytes to be added to Hash_Offset
- * to obtain the full offset applied to the data before
- * submitting it to authenticator
- * On subsequent frags: Same
- * Packet length bytes = On one fragment payloads: Ignored (i.e. assumed to be 0, last dword used in its entirety)
- * On fragments before last: Number of bytes on last fragment dword
- * On last fragment: Ignored (i.e. assumed to be 0, last dword used in its entirety)
- * LLWMask, aka, Last_long_word_mask = 2'b00 Give last 128 bit word from AES engine to auth/cksum/wrbbufer as is - applicable in AES CTR only
- * 2'b11 Mask (zero-out) 32 least significant bits
- * 2'b10 Mask 64 LSBs
- * 2'b01 Mask 96 LSBs
- * If the GCM authenticator is used, setting LLWMask to 2'b10 or 2'b01
- * will also prevent the transmission of the last DWORD
- * to the authenticator, i.e., the DWORD before last will
- * be designated as last for the purposes of authentication.
- * CFB_Mask = 8 bit mask used by AES in CFB mode
- * In CTR mode:
- * CFB_Mask[1:0] = 2'b00 -> Counter[127:0] = {Nonce[31:0], IV0[63:0], 4'h00000001} (only 1 IV exp
-ected) regular CTR
- * 2'b01 -> Counter[127:0] = {Nonce[31:0], IV0[63:0], IV1[31:0]} (2 IV expected
-) CCMP
- * 2'b10 -> Counter[127:0] = {IV1[63:0], IV0[31:0], Nonce[31:0]} (2 IV expected
-) GCM with SCI
- * 2'b11 -> Counter[127:0] = {IDecode.SCI[63:0], IV0[31:0], Nonce[31:0]} (1 IV expected
-) GCM w/o SCI
- * Nonce_Hi = Nonce[31:24] 8 most significant bits of 32-bit long nonce
- * Used by AES in counter mode
- * CkSum_dst_address = 35 MSB of pointer to cksum dst location (i.e., cache-line aligned)
- * X0 IV_Offset_Hi = On first frag: 5 MSB of 8-bit IV offset; will be concatenated to
- * the top of PacketDescriptor_t.srcLengthIVOffUseIVNext.IV_Offset
- * On subsequent frags: Ignored
- */
-
-/* #define PKT_DSC_LOADHMACKEY */
-#define PKT_DSC_LOADHMACKEY_OLD 0
-#define PKT_DSC_LOADHMACKEY_LOAD 1
-#define PKT_DSC_LOADHMACKEY_LSB 63
-#define PKT_DSC_LOADHMACKEY_BITS ONE_BIT
-#define PKT_DSC_LOADHMACKEY_MASK \
- (PKT_DSC_LOADHMACKEY_BITS << PKT_DSC_LOADHMACKEY_LSB)
-
-/* #define PKT_DSC_PADHASH */
-#define PKT_DSC_PADHASH_PADDED 0
-#define PKT_DSC_PADHASH_PAD 1 /* requires padding */
-#define PKT_DSC_PADHASH_LSB 62
-#define PKT_DSC_PADHASH_BITS ONE_BIT
-#define PKT_DSC_PADHASH_MASK (PKT_DSC_PADHASH_BITS << PKT_DSC_PADHASH_LSB)
-
-/* #define PKT_DSC_HASHBYTES */
-#define PKT_DSC_HASHBYTES_ALL8 0
-#define PKT_DSC_HASHBYTES_MSB 1
-#define PKT_DSC_HASHBYTES_MSW 2
-#define PKT_DSC_HASHBYTES_LSB 59
-#define PKT_DSC_HASHBYTES_BITS THREE_BITS
-#define PKT_DSC_HASHBYTES_MASK \
- (PKT_DSC_HASHBYTES_BITS << PKT_DSC_HASHBYTES_LSB)
-
-/* #define PKT_DSC_NEXT */
-#define PKT_DSC_NEXT_FINISH 0
-#define PKT_DSC_NEXT_DO 1
-#define PKT_DSC_NEXT_LSB 58
-#define PKT_DSC_NEXT_BITS ONE_BIT
-#define PKT_DSC_NEXT_MASK (PKT_DSC_NEXT_BITS << PKT_DSC_NEXT_LSB)
-
-/* #define PKT_DSC_IV */
-#define PKT_DSC_IV_OLD 0
-#define PKT_DSC_IV_NEW 1
-#define PKT_DSC_IV_LSB 57
-#define PKT_DSC_IV_BITS ONE_BIT
-#define PKT_DSC_IV_MASK (PKT_DSC_IV_BITS << PKT_DSC_IV_LSB)
-
-/* #define PKT_DSC_IVOFF */
-#define PKT_DSC_IVOFF_LSB 54
-#define PKT_DSC_IVOFF_BITS THREE_BITS
-#define PKT_DSC_IVOFF_MASK (PKT_DSC_IVOFF_BITS << PKT_DSC_IVOFF_LSB)
-
-/* #define PKT_DSC_PKTLEN */
-#define PKT_DSC_PKTLEN_LSB 43
-#define PKT_DSC_PKTLEN_BITS ELEVEN_BITS
-#define PKT_DSC_PKTLEN_MASK (PKT_DSC_PKTLEN_BITS << PKT_DSC_PKTLEN_LSB)
-
-/* #define PKT_DSC_NLHMAC */
-#define PKT_DSC_NLHMAC_LSB 42
-#define PKT_DSC_NLHMAC_BITS ONE_BIT
-#define PKT_DSC_NLHMAC_MASK (PKT_DSC_NLHMAC_BITS << PKT_DSC_NLHMAC_LSB)
-
-/* #define PKT_DSC_BREAK */
-#define PKT_DSC_BREAK_OLD 0
-#define PKT_DSC_BREAK_NEW 1
-#define PKT_DSC_BREAK_LSB 41
-#define PKT_DSC_BREAK_BITS ONE_BIT
-#define PKT_DSC_BREAK_MASK (PKT_DSC_BREAK_BITS << PKT_DSC_BREAK_LSB)
-
-/* #define PKT_DSC_WAIT */
-#define PKT_DSC_WAIT_OLD 0
-#define PKT_DSC_WAIT_NEW 1
-#define PKT_DSC_WAIT_LSB 40
-#define PKT_DSC_WAIT_BITS ONE_BIT
-#define PKT_DSC_WAIT_MASK (PKT_DSC_WAIT_BITS << PKT_DSC_WAIT_LSB)
-
-/* #define PKT_DSC_SEGADDR */
-#define PKT_DSC_SEGADDR_LSB 5
-#define PKT_DSC_SEGADDR_BITS FOURTY_BITS
-#define PKT_DSC_SEGADDR_MASK \
- (PKT_DSC_SEGADDR_BITS << PKT_DSC_SEGADDR_LSB)
-
-/* #define PKT_DSC_SRTCP */
-#define PKT_DSC_SRTCP_OFF 0
-#define PKT_DSC_SRTCP_ON 1
-#define PKT_DSC_SRTCP_LSB 4
-#define PKT_DSC_SRTCP_BITS ONE_BIT
-#define PKT_DSC_SRTCP_MASK (PKT_DSC_SRTCP_BITS << PKT_DSC_SRTCP_LSB)
-
-#define PKT_DSC_SEGOFFSET_LSB 0
-#define PKT_DSC_SEGOFFSET_BITS THREE_BITS
-#define PKT_DSC_SEGOFFSET_MASK \
- (PKT_DSC_SEGOFFSET_BITS << PKT_DSC_SEGOFFSET_LSB)
-
-/* **********************************************************************
- * PacketDescriptor_t.dstDataSettings
- * **********************************************************************
- */
-/* #define PKT_DSC_ARC4BYTECOUNT */
-#define PKT_DSC_ARC4BYTECOUNT_ALL8 0
-#define PKT_DSC_ARC4BYTECOUNT_MSB 1
-#define PKT_DSC_ARC4BYTECOUNT_MSW 2
-#define PKT_DSC_ARC4BYTECOUNT_LSB 60
-#define PKT_DSC_ARC4BYTECOUNT_BITS THREE_BITS
-#define PKT_DSC_ARC4BYTECOUNT_MASK (PKT_DSC_ARC4BYTECOUNT_BITS << PKT_DSC_ARC4BYTECOUNT_LSB)
-
-/* #define PKT_DSC_SYM_OP (symmetric key operation) */
-#define PKT_DSC_SYM_OP_DECRYPT 0
-#define PKT_DSC_SYM_OP_ENCRYPT 1
-#define PKT_DSC_SYM_OP_LSB 59
-#define PKT_DSC_SYM_OP_BITS ONE_BIT
-#define PKT_DSC_SYM_OP_MASK (PKT_DSC_SYM_OP_BITS << PKT_DSC_SYM_OP_LSB)
-
-/* #define PKT_DSC_CPHROFF */
-#define PKT_DSC_CPHROFF_LSB 56
-#define PKT_DSC_CPHROFF_BITS THREE_BITS
-#define PKT_DSC_CPHROFF_MASK (PKT_DSC_CPHROFF_BITS << PKT_DSC_CPHROFF_LSB)
-
-/* #define PKT_DSC_HASHOFF */
-#define PKT_DSC_HASHOFF_LSB 54
-#define PKT_DSC_HASHOFF_BITS TWO_BITS
-#define PKT_DSC_HASHOFF_MASK (PKT_DSC_HASHOFF_BITS << PKT_DSC_HASHOFF_LSB)
-
-/* #define PKT_DSC_HASHSRC */
-#define PKT_DSC_HASHSRC_DMA 0
-#define PKT_DSC_HASHSRC_CIPHER 1
-#define PKT_DSC_HASHSRC_LSB 53
-#define PKT_DSC_HASHSRC_BITS ONE_BIT
-#define PKT_DSC_HASHSRC_MASK (PKT_DSC_HASHSRC_BITS << PKT_DSC_HASHSRC_LSB)
-
-/* #define PKT_DSC_CKSUMOFF */
-#define PKT_DSC_CKSUMOFF_LSB 41
-#define PKT_DSC_CKSUMOFF_BITS TWELVE_BITS
-#define PKT_DSC_CKSUMOFF_MASK (PKT_DSC_CKSUMOFF_BITS << PKT_DSC_CKSUMOFF_LSB)
-
-/* #define PKT_DSC_CKSUMSRC */
-#define PKT_DSC_CKSUMSRC_DMA 0
-#define PKT_DSC_CKSUMSRC_CIPHER 1
-#define PKT_DSC_CKSUMSRC_LSB 40
-#define PKT_DSC_CKSUMSRC_BITS ONE_BIT
-#define PKT_DSC_CKSUMSRC_MASK (PKT_DSC_CKSUMSRC_BITS << PKT_DSC_CKSUMSRC_LSB)
-
-/* #define PKT_DSC_CPHR_DST_ADDR */
-#define PKT_DSC_CPHR_DST_ADDR_LSB 0
-#define PKT_DSC_CPHR_DST_ADDR_BITS FOURTY_BITS
-#define PKT_DSC_CPHR_DST_ADDR_MASK \
- (PKT_DSC_CPHR_DST_ADDR_BITS << PKT_DSC_CPHR_DST_ADDR_LSB)
-
-/* #define PKT_DSC_CPHR_DST_DWOFFSET */
-#define PKT_DSC_CPHR_DST_DWOFFSET_LSB 3
-#define PKT_DSC_CPHR_DST_DWOFFSET_BITS TWO_BITS
-#define PKT_DSC_CPHR_DST_DWOFFSET_MASK \
- (PKT_DSC_CPHR_DST_DWOFFSET_BITS << PKT_DSC_CPHR_DST_DWOFFSET_LSB)
-
- /* #define PKT_DSC_CPHR_DST_OFFSET */
-#define PKT_DSC_CPHR_DST_OFFSET_LSB 0
-#define PKT_DSC_CPHR_DST_OFFSET_BITS THREE_BITS
-#define PKT_DSC_CPHR_DST_OFFSET_MASK \
- (PKT_DSC_CPHR_DST_OFFSET_BITS << PKT_DSC_CPHR_DST_OFFSET_LSB)
-
-/* **********************************************************************
- * PacketDescriptor_t.authDstNonceLow
- * **********************************************************************
- */
-/* #define PKT_DSC_NONCE_LOW */
-#define PKT_DSC_NONCE_LOW_LSB 40
-#define PKT_DSC_NONCE_LOW_BITS TWENTYFOUR_BITS
-#define PKT_DSC_NONCE_LOW_MASK \
- (PKT_DSC_NONCE_LOW_BITS << PKT_DSC_NONCE_LOW_LSB)
-
-/* #define PKT_DSC_AUTH_DST_ADDR */
-#define PKT_DSC_AUTH_DST_ADDR_LSB 0
-#define PKT_DSC_AUTH_DST_ADDR_BITS FOURTY_BITS
-#define PKT_DSC_AUTH_DST_ADDR_MASK \
- (PKT_DSC_AUTH_DST_ADDR_BITS << PKT_DSC_AUTH_DST_ADDR_LSB)
-
-/* #define PKT_DSC_CIPH_OFF_HI */
-#define PKT_DSC_CIPH_OFF_HI_LSB 0
-#define PKT_DSC_CIPH_OFF_HI_BITS FIVE_BITS
-#define PKT_DSC_CIPH_OFF_HI_MASK (PKT_DSC_CIPH_OFF_HI_BITS << PKT_DSC_CIPH_OFF_HI_LSB)
-
-/* **********************************************************************
- * PacketDescriptor_t.ckSumDstNonceHiCFBMaskLLWMask
- * **********************************************************************
- */
-/* #define PKT_DSC_HASH_BYTE_OFF */
-#define PKT_DSC_HASH_BYTE_OFF_LSB 61
-#define PKT_DSC_HASH_BYTE_OFF_BITS THREE_BITS
-#define PKT_DSC_HASH_BYTE_OFF_MASK (PKT_DSC_HASH_BYTE_OFF_BITS << PKT_DSC_HASH_BYTE_OFF_LSB)
-
-/* #define PKT_DSC_PKTLEN_BYTES */
-#define PKT_DSC_PKTLEN_BYTES_LSB 58
-#define PKT_DSC_PKTLEN_BYTES_BITS THREE_BITS
-#define PKT_DSC_PKTLEN_BYTES_MASK (PKT_DSC_PKTLEN_BYTES_BITS << PKT_DSC_PKTLEN_BYTES_LSB)
-
-/* #define PKT_DSC_LASTWORD */
-#define PKT_DSC_LASTWORD_128 0
-#define PKT_DSC_LASTWORD_96MASK 1
-#define PKT_DSC_LASTWORD_64MASK 2
-#define PKT_DSC_LASTWORD_32MASK 3
-#define PKT_DSC_LASTWORD_LSB 56
-#define PKT_DSC_LASTWORD_BITS TWO_BITS
-#define PKT_DSC_LASTWORD_MASK (PKT_DSC_LASTWORD_BITS << PKT_DSC_LASTWORD_LSB)
-
-/* #define PKT_DSC_CFB_MASK */
-#define PKT_DSC_CFB_MASK_LSB 48
-#define PKT_DSC_CFB_MASK_BITS EIGHT_BITS
-#define PKT_DSC_CFB_MASK_MASK (PKT_DSC_CFB_MASK_BITS << PKT_DSC_CFB_MASK_LSB)
-
-/* #define PKT_DSC_NONCE_HI */
-#define PKT_DSC_NONCE_HI_LSB 40
-#define PKT_DSC_NONCE_HI_BITS EIGHT_BITS
-#define PKT_DSC_NONCE_HI_MASK (PKT_DSC_NONCE_HI_BITS << PKT_DSC_NONCE_HI_LSB)
-
-/* #define PKT_DSC_CKSUM_DST_ADDR */
-#define PKT_DSC_CKSUM_DST_ADDR_LSB 5
-#define PKT_DSC_CKSUM_DST_ADDR_BITS THIRTY_FIVE_BITS
-#define PKT_DSC_CKSUM_DST_ADDR_MASK (PKT_DSC_CKSUM_DST_ADDR_BITS << PKT_DSC_CKSUM_DST_ADDR_LSB)
-
-/* #define PKT_DSC_IV_OFF_HI */
-#define PKT_DSC_IV_OFF_HI_LSB 0
-#define PKT_DSC_IV_OFF_HI_BITS FIVE_BITS
-#define PKT_DSC_IV_OFF_HI_MASK (PKT_DSC_IV_OFF_HI_BITS << PKT_DSC_IV_OFF_HI_LSB)
-
-
-/* ******************************************************************
- * Control Error Code and Conditions
- * ******************************************************************
- */
-#define CTL_ERR_NONE 0x0000 /* No Error */
-#define CTL_ERR_CIPHER_OP 0x0001 /* Unknown Cipher Op */
-#define CTL_ERR_MODE 0x0002 /* Unknown or Not Allowed Mode */
-#define CTL_ERR_CHKSUM_SRC 0x0004 /* Unknown CkSum Src - UNUSED */
-#define CTL_ERR_CFB_MASK 0x0008 /* Forbidden CFB Mask - UNUSED */
-#define CTL_ERR_OP 0x0010 /* Unknown Ctrl Op - UNUSED */
-#define CTL_ERR_UNDEF1 0x0020 /* UNUSED */
-#define CTL_ERR_UNDEF2 0x0040 /* UNUSED */
-#define CTL_ERR_DATA_READ 0x0080 /* Data Read Error */
-#define CTL_ERR_DESC_CTRL 0x0100 /* Descriptor Ctrl Field Error */
-
-#define CTL_ERR_TIMEOUT 0x1000 /* Message Response Timeout */
-
-/* ******************************************************************
- * Data Error Code and Conditions
- * ******************************************************************
- */
-#define DATA_ERR_NONE 0x0000 /* No Error */
-#define DATA_ERR_LEN_CIPHER 0x0001 /* Not Enough Data To Cipher */
-#define DATA_ERR_IV_ADDR 0x0002 /* Illegal IV Loacation */
-#define DATA_ERR_WD_LEN_AES 0x0004 /* Illegal Nb Words To AES */
-#define DATA_ERR_BYTE_COUNT 0x0008 /* Illegal Pad And ByteCount Spec */
-#define DATA_ERR_LEN_CKSUM 0x0010 /* Not Enough Data To CkSum */
-#define DATA_ERR_OP 0x0020 /* Unknown Data Op */
-#define DATA_ERR_UNDEF1 0x0040 /* UNUSED */
-#define DATA_ERR_READ 0x0080 /* Data Read Error */
-#define DATA_ERR_WRITE 0x0100 /* Data Write Error */
-
-
-/*
- * Common Descriptor
- * NOTE: Size of struct is size of cacheline.
- */
-
-typedef struct OperationDescriptor_s {
- uint64_t phys_self;
- uint32_t stn_id;
- uint32_t flags;
- uint32_t cpu;
- uint32_t seq_num;
- uint64_t reserved;
-} OperationDescriptor_t, *OperationDescriptor_pt;
-
-
-/*
- * This defines the security data descriptor format
- */
-typedef struct PacketDescriptor_s {
- uint64_t srcLengthIVOffUseIVNext;
- uint64_t dstDataSettings;
- uint64_t authDstNonceLow;
- uint64_t ckSumDstNonceHiCFBMaskLLWMask;
-} PacketDescriptor_t, *PacketDescriptor_pt;
-
-typedef struct {
- uint8_t *user_auth;
- uint8_t *user_src;
- uint8_t *user_dest;
- uint8_t *user_state;
- uint8_t *kern_auth;
- uint8_t *kern_src;
- uint8_t *kern_dest;
- uint8_t *kern_state;
- uint8_t *aligned_auth;
- uint8_t *aligned_src;
- uint8_t *aligned_dest;
- uint8_t *aligned_state;
-} xlr_sec_drv_user_t, *xlr_sec_drv_user_pt;
-
-typedef struct symkey_desc {
- OperationDescriptor_t op_ctl; /* size is cacheline */
- PacketDescriptor_t pkt_desc[2]; /* size is cacheline */
- ControlDescriptor_t ctl_desc; /* makes this aligned */
- uint64_t control; /* message word0 */
- uint64_t data; /* message word1 */
- uint64_t ctl_result;
- uint64_t data_result;
- struct symkey_desc *alloc; /* real allocated addr */
- xlr_sec_drv_user_t user;
- //volatile atomic_t flag_complete;
- //struct semaphore sem_complete;
- //wait_queue_t submit_wait;
-
- uint8_t *next_src_buf;
- uint32_t next_src_len;
-
- uint8_t *next_dest_buf;
- uint32_t next_dest_len;
-
- uint8_t *next_auth_dest;
- uint8_t *next_cksum_dest;
-
- void *ses;
-} symkey_desc_t, *symkey_desc_pt;
-
-
-/*
- * **************************************************************************
- * RSA Block
- * **************************************************************************
- */
-
-/*
- * RSA and ECC Block
- * =================
- *
- * A 2-word message ring descriptor is used to pass all information
- * pertaining to the RSA or ECC operation:
- *
- * 63 61 60 54 53 52 40 39 5 4 3 2 0
- * -----------------------------------------------------------------------------------------------------
- * | Ctrl | Op Class | Valid Op | Op Ctrl0 | Source Addr | Software Scratch0 | Global src data offset |
- * -----------------------------------------------------------------------------------------------------
- * 3 7 1 13 35 2 3
- *
- *
- * 63 61 60 54 53 52 51 50 40 39 5 4 3 2 0
- * --------------------------------------------------------------------------------------------------------------------------------
- * | Ctrl | Destination Id | WRB_COH | WRB_L2ALLOC | DF_L2ALLOC | Op Ctrl1 | Dest Addr | Software Scratch1 | Global dst data offset |
- * --------------------------------------------------------------------------------------------------------------------------------
- * 3 7 1 1 1 11 35 2 3
- *
- *
- * Op Class = 7'h0_0 Modular exponentiation
- * 7'h0_1 ECC (including prime modular ops and binary GF ops)
- * REMAINDER UNDEF
- *
- * Valid Op = 1'b1 Will cause operation to start; descriptors sent back at end of operation
- * 1'b0 No operation performed; descriptors sent back right away
- *
- * RSA ECC
- * === ===
- * Op Ctrl0 = BlockWidth[1] {TYPE[6:0], FUNCTION[5:0]}
- * LoadConstant[1]
- * ExponentWidth[10:0]
- * RSA Only
- * ========
- * Block Width = 1'b1 1024 bit op
- * = 1'b0 512 bit op
- * Load Constant = 1'b1 Load constant from data structure
- * 1'b0 Preserve old constant (this assumes
- * Source Addr points to RSAData_pt->Exponent
- * or that the length of Constant is 0)
- * Exponent Width = 11-bit expression of exponent width EXPRESSED IN NUMBER OF BITS
- *
- * ECC Only
- * ========
- *
- * TYPE = 7'h0_0 ECC prime 160
- * 7'h0_1 ECC prime 192
- * 7'h0_2 ECC prime 224
- * 7'h0_3 ECC prime 256
- * 7'h0_4 ECC prime 384
- * 7'h0_5 ECC prime 512
- *
- * 7'h0_6 through 7'h1_f UNDEF
- *
- * 7'h2_0 ECC bin 163
- * 7'h2_1 ECC bin 191
- * 7'h2_2 ECC bin 233
- *
- * 7'h2_3 through 7'h6_f UNDEF
- *
- * 7'h7_0 ECC UC load
- *
- * 7'b7_1 through 7'b7_f UNDEF
- *
- * Prime field Binary field
- * =========== ============
- * FUNCTION = 6'h0_0 Point multiplication R = k.P Point multiplication R = k.P
- * 6'h0_1 Point addition R = P + Q Binary GF inversion C(x) = 1 / A(x) mod F(x)
- * 6'h0_2 Point double R = 2 x P Binary GF multiplication C(x) = B(x) * A(x) mod F(x)
- * 6'h0_3 Point verification R ? Binary GF addition C(x) = B(x) + A(x) mod F(x)
- * 6'h0_4 Modular addition c = x + y mod m UNDEF
- * 6'h0_5 Modular substraction c = x - y mod m UNDEF
- * 6'h0_6 Modular multiplication c = x * y mod m UNDEF
- * 6'h0_7 Modular division c = x / y mod m UNDEF
- * 6'h0_8 Modular inversion c = 1 / y mod m UNDEF
- * 6'h0_9 Modular reduction c = x mod m UNDEF
- *
- * 6'h0_a
- * through UNDEF UNDEF
- * 6'h3_f
- *
- * Source Addr = 35 MSB of pointer to source address (i.e., cache-line aligned)
- *
- * Software Scratch0 = Two bit field ignored by engine and returned as is in free descriptor
- *
- * Global src data offset = Nb BYTES to right-shift data by before presenting it to engines
- * (0-7); allows realignment of byte-aligned, non-double-word aligned data
- *
- * RSA ECC
- * === ===
- * OpCtrl1 = ModulusWidth[10:0] Not used
- * RSA Only
- * ========
- * Modulus Width = 11-bit expression of modulus width EXPRESSED IN NUMBER OF BITS
- *
- * Dest Addr = 35 MSB of pointer to destination address (i.e., cache-line aligned)
- *
- * Software Scratch1 = Two bit field ignored by engine and returned as is in free descriptor
- *
- * Global dst data offset = Nb BYTES to left-shift (double-word boundary aligned) data by before writing it to memory
- *
- *
- */
-
-/*
- * ECC data formats
- */
-
-/**********************************************************
- * *
- * ECC prime data formats *
- * *
- **********************************************************
- *
- *
- * The size of all quantities below is that of the precision
- * of the chosen op (160, 192, ...) ROUNDED UP to a multiple
- * of 8 bytes, i.e., 3 dwords (160, 192), 4 dwords (224, 256)
- * 6 dwords (384) and 8 dwords (512) and padded with zeroes
- * when necessary.
- *
- * The only exception to this is the key quantity (k) which
- * needs to be rounded up to 32 bytes in all cases and padded
- * with zeroes; therefore the key needs to be 4 dwords (160, 192,
- * 224, 256) or 8 dwords (384, 512)
- *
- * The total lengths in dwords that are read and in
- * bytes that are written, for each operation and
- * length group, are specified at the bottom of each
- * datastructure.
- *
- * In all that follows, m is the modulus and cst is the constant,
- * cst = 2 ^ (2*length + 4) mod m . a and b are the curve
- * parameters.
- *
- * 0) UC load
- *
- * DATA IN DATA OUT
- * ======= ========
- * src+glb_off-> Dword_0 N/A
- * .
- * .
- * .
- * Dword_331
- * 332 dw
- *
- * 1) Point multiplication R(x_r, y_r) = k . P(x_p, y_p)
- *
- * DATA IN DATA OUT
- * ======= ========
- * src+glb_off-> x_p dst+glb_off-> x_r
- * x_p y_r
- * y_p 2x(3/4/6/8)=
- * y_p 6/8/12/16 dw
- * a
- * k
- * m
- * cst
- * 7x(3/4/6/8)+(4/4/8/8)=
- * 25/32/50/64 dw
- *
- * 2) Point addition R(x_r, y_r) = P(x_p, y_p) + Q(x_q, y_q)
- *
- * DATA IN DATA OUT
- * ======= ========
- * src+glb_off-> x_p dst+glb_off-> x_r
- * y_p y_r
- * x_q 2x(3/4/6/8)=
- * y_q 6/8/12/16 dw
- * a
- * m
- * cst
- * 7x(3/4/6/8)=
- * 21/28/42/56 dw
- *
- * 3) Point double R(x_r, y_r) = 2 . P(x_p, y_p)
- *
- * DATA IN DATA OUT
- * ======= ========
- * src+glb_off-> x_p dst+glb_off-> x_r
- * y_p y_r
- * a 2x(3/4/6/8)=
- * m 6/8/12/16 dw
- * cst
- * 5x(3/4/6/8)=
- * 15/20/30/40 dw
- *
- * 4) Point verification Is_On_Curve = P(x_p, y_p) on curve ? 1 : 0
- *
- * DATA IN DATA OUT
- * ======= ========
- * src+glb_off-> x_p dst+glb_off-> Is_On_Curve
- * y_p 1 dw
- * a
- * b
- * m
- * cst
- * 6x(3/4/6/8)=
- * 18/24/36/48 dw
- *
- * 5) Modular addition c = x + y mod m
- *
- * DATA IN DATA OUT
- * ======= ========
- * src+glb_off-> x dst+glb_off-> c
- * y 3/4/6/8 dw
- * m
- * 3x(3/4/6/8)=
- * 9/12/18/24 dw
- *
- * 6) Modular substraction c = x - y mod m
- *
- * DATA IN DATA OUT
- * ======= ========
- * src+glb_off-> x dst+glb_off-> c
- * y 3/4/6/8 dw
- * m
- * 3x(3/4/6/8)=
- * 9/12/18/24 dw
- *
- * 7) Modular multiplication c = x * y mod m
- *
- * DATA IN DATA OUT
- * ======= ========
- * src+glb_off-> x dst+glb_off-> c
- * y 3/4/6/8 dw
- * m
- * cst
- * 4x(3/4/6/8)=
- * 12/16/24/32 dw
- *
- * 8) Modular division c = x / y mod m
- *
- * DATA IN DATA OUT
- * ======= ========
- * src+glb_off-> y dst+glb_off-> c
- * x 3/4/6/8 dw
- * m
- * 3x(3/4/6/8)=
- * 9/12/18/24 dw
- *
- * 9) Modular inversion c = 1 / y mod m
- *
- * DATA IN DATA OUT
- * ======= ========
- * src+glb_off-> y dst+glb_off-> c
- * m 3/4/6/8 dw
- * 2x(3/4/6/8)=
- * 6/8/12/16 dw
- *
- * 10) Modular reduction c = x mod m
- *
- * DATA IN DATA OUT
- * ======= ========
- * src+glb_off-> x dst+glb_off-> c
- * m 3/4/6/8 dw
- * 2x(3/4/6/8)=
- * 6/8/12/16 dw
- *
- */
-
-/**********************************************************
- * *
- * ECC binary data formats *
- * *
- **********************************************************
- *
- *
- * The size of all quantities below is that of the precision
- * of the chosen op (163, 191, 233) ROUNDED UP to a multiple
- * of 8 bytes, i.e. 3 dwords for (163, 191) and 4 dwords for
- * (233), padded with zeroes as necessary.
- *
- * The total lengths in dwords that are read and written,
- * for each operation and length group, are specified
- * at the bottom of each datastructure.
- * In all that follows, b is the curve parameter.
- *
- * 1) Point multiplication R(x_r, y_r) = k . P(x_p, y_p)
- *
- * DATA IN DATA OUT
- * ======= ========
- * src+glb_off-> b dst+glb_off-> x_r
- * k y_r
- * x_p 2x(3/4)
- * y_p 6/8 dw
- * 4x(3/4)=
- * 12/16 dw
- *
- * 2) Binary GF inversion C(x) = 1 / A(x) mod F(x)
- *
- * DATA IN DATA OUT
- * ======= ========
- * src+glb_off-> A dst+glb_off-> C
- * 1x(3/4)= 1x(3/4)
- * 3/4 dw 3/4 dw
- *
- * 3) Binary GF multiplication C(x) = B(x) * A(x) mod F(x)
- *
- * DATA IN DATA OUT
- * ======= ========
- * src+glb_off-> A dst+glb_off-> C
- * B 1x(3/4)
- * 2x(3/4)= 3/4 dw
- * 6/8 dw
- *
- * 4) Binary GF addition C(x) = B(x) + A(x) mod F(x)
- *
- * DATA IN DATA OUT
- * ======= ========
- * src+glb_off-> A dst+glb_off-> C
- * B 1x(3/4)
- * 2x(3/4)= 3/4 dw
- * 6/8dw
- *
- */
-
-/*
- * RSA data format
- */
-
-/*
- * IMPORTANT NOTE:
- *
- * As specified in the datastructures below,
- * the engine assumes all data (including
- * exponent and modulus) to be adjacent on
- * dword boundaries, e.g.,
- *
- * Operation length = 512 bits
- * Exponent length = 16 bits
- * Modulus length = 512 bits
- *
- * The engine expects to read:
- *
- * 63 0
- * -----------------------
- * | | Constant0
- * -----------------------
- * | | Constant1
- * -----------------------
- * | | Constant2
- * -----------------------
- * | | Constant3
- * -----------------------
- * | | Constant4
- * -----------------------
- * | | Constant5
- * -----------------------
- * | | Constant6
- * -----------------------
- * | | Constant7
- * -----------------------
- * | IGNORED |B1|B0| Exponent0 (Exponent length = 16 bits = 2 bytes, so only 2 least significant bytes of exponent used)
- * -----------------------
- * | | Modulus0
- * -----------------------
- * | | Modulus1
- * -----------------------
- * | | Modulus2
- * -----------------------
- * | | Modulus3
- * -----------------------
- * | | Modulus4
- * -----------------------
- * | | Modulus5
- * -----------------------
- * | | Modulus6
- * -----------------------
- * | | Modulus7
- * -----------------------
- * | | Message0
- * -----------------------
- * | | Message1
- * -----------------------
- * | | Message2
- * -----------------------
- * | | Message3
- * -----------------------
- * | | Message4
- * -----------------------
- * | | Message5
- * -----------------------
- * | | Message6
- * -----------------------
- * | | Message7
- * -----------------------
- *
- */
-
-/* #define PUBKEY_CTL_CTL */
-#define PUBKEY_CTL_CTL_LSB 61
-#define PUBKEY_CTL_CTL_BITS THREE_BITS
-#define PUBKEY_CTL_CTL_MASK (PUBKEY_CTL_CTL_BITS << PUBKEY_CTL_CTL_LSB)
-
-/* #define PUBKEY_CTL_OP_CLASS */
-#define PUBKEY_CTL_OP_CLASS_RSA 0
-#define PUBKEY_CTL_OP_CLASS_ECC 1
-#define PUBKEY_CTL_OP_CLASS_LSB 54
-#define PUBKEY_CTL_OP_CLASS_BITS SEVEN_BITS
-#define PUBKEY_CTL_OP_CLASS_MASK (PUBKEY_CTL_OP_CLASS_BITS << PUBKEY_CTL_OP_CLASS_LSB)
-
-/* #define PUBKEY_CTL_VALID */
-#define PUBKEY_CTL_VALID_FALSE 0
-#define PUBKEY_CTL_VALID_TRUE 1
-#define PUBKEY_CTL_VALID_LSB 53
-#define PUBKEY_CTL_VALID_BITS ONE_BIT
-#define PUBKEY_CTL_VALID_MASK \
- (PUBKEY_CTL_VALID_BITS << PUBKEY_CTL_VALID_LSB)
-
-/* #define PUBKEY_CTL_ECC_TYPE */
-#define PUBKEY_CTL_ECC_TYPE_PRIME_160 0
-#define PUBKEY_CTL_ECC_TYPE_PRIME_192 1
-#define PUBKEY_CTL_ECC_TYPE_PRIME_224 2
-#define PUBKEY_CTL_ECC_TYPE_PRIME_256 3
-#define PUBKEY_CTL_ECC_TYPE_PRIME_384 4
-#define PUBKEY_CTL_ECC_TYPE_PRIME_512 5
-#define PUBKEY_CTL_ECC_TYPE_BIN_163 0x20
-#define PUBKEY_CTL_ECC_TYPE_BIN_191 0x21
-#define PUBKEY_CTL_ECC_TYPE_BIN_233 0x22
-#define PUBKEY_CTL_ECC_TYPE_UC_LOAD 0x70
-#define PUBKEY_CTL_ECC_TYPE_LSB 46
-#define PUBKEY_CTL_ECC_TYPE_BITS SEVEN_BITS
-#define PUBKEY_CTL_ECC_TYPE_MASK (PUBKEY_CTL_ECC_TYPE_BITS << PUBKEY_CTL_ECC_TYPE_LSB)
-
-/* #define PUBKEY_CTL_ECC_FUNCTION */
-#define PUBKEY_CTL_ECC_FUNCTION_NOP 0
-#define PUBKEY_CTL_ECC_FUNCTION_POINT_MUL 0
-#define PUBKEY_CTL_ECC_FUNCTION_POINT_ADD 1
-#define PUBKEY_CTL_ECC_FUNCTION_POINT_DBL 2
-#define PUBKEY_CTL_ECC_FUNCTION_POINT_VFY 3
-#define PUBKEY_CTL_ECC_FUNCTION_MODULAR_ADD 4
-#define PUBKEY_CTL_ECC_FUNCTION_MODULAR_SUB 5
-#define PUBKEY_CTL_ECC_FUNCTION_MODULAR_MUL 6
-#define PUBKEY_CTL_ECC_FUNCTION_MODULAR_DIV 7
-#define PUBKEY_CTL_ECC_FUNCTION_MODULAR_INV 8
-#define PUBKEY_CTL_ECC_FUNCTION_MODULAR_RED 9
-#define PUBKEY_CTL_ECC_FUNCTION_LSB 40
-#define PUBKEY_CTL_ECC_FUNCTION_BITS SIX_BITS
-#define PUBKEY_CTL_ECC_FUNCTION_MASK (PUBKEY_CTL_ECC_FUNCTION_BITS << PUBKEY_CTL_ECC_FUNCTION_LSB)
-
-/* #define PUBKEY_CTL_BLKWIDTH */
-#define PUBKEY_CTL_BLKWIDTH_512 0
-#define PUBKEY_CTL_BLKWIDTH_1024 1
-#define PUBKEY_CTL_BLKWIDTH_LSB 52
-#define PUBKEY_CTL_BLKWIDTH_BITS ONE_BIT
-#define PUBKEY_CTL_BLKWIDTH_MASK \
- (PUBKEY_CTL_BLKWIDTH_BITS << PUBKEY_CTL_BLKWIDTH_LSB)
-
-/* #define PUBKEY_CTL_LD_CONST */
-#define PUBKEY_CTL_LD_CONST_OLD 0
-#define PUBKEY_CTL_LD_CONST_NEW 1
-#define PUBKEY_CTL_LD_CONST_LSB 51
-#define PUBKEY_CTL_LD_CONST_BITS ONE_BIT
-#define PUBKEY_CTL_LD_CONST_MASK \
- (PUBKEY_CTL_LD_CONST_BITS << PUBKEY_CTL_LD_CONST_LSB)
-
-/* #define PUBKEY_CTL_EXPWIDTH */
-#define PUBKEY_CTL_EXPWIDTH_LSB 40
-#define PUBKEY_CTL_EXPWIDTH_BITS ELEVEN_BITS
-#define PUBKEY_CTL_EXPWIDTH_MASK \
- (PUBKEY_CTL_EXPWIDTH_BITS << PUBKEY_CTL_EXPWIDTH_LSB)
-
-/* #define PUBKEY_CTL_SRCADDR */
-#define PUBKEY_CTL_SRCADDR_LSB 0
-#define PUBKEY_CTL_SRCADDR_BITS FOURTY_BITS
-#define PUBKEY_CTL_SRCADDR_MASK \
- (PUBKEY_CTL_SRCADDR_BITS << PUBKEY_CTL_SRCADDR_LSB)
-
-/* #define PUBKEY_CTL_SRC_OFFSET */
-#define PUBKEY_CTL_SRC_OFFSET_LSB 0
-#define PUBKEY_CTL_SRC_OFFSET_BITS THREE_BITS
-#define PUBKEY_CTL_SRC_OFFSET_MASK \
- (PUBKEY_CTL_SRC_OFFSET_BITS << PUBKEY_CTL_SRC_OFFSET_LSB)
-
-
-/* #define PUBKEY_CTL1_CTL */
-#define PUBKEY_CTL1_CTL_LSB 61
-#define PUBKEY_CTL1_CTL_BITS THREE_BITS
-#define PUBKEY_CTL1_CTL_MASK (PUBKEY_CTL_CTL_BITS << PUBKEY_CTL_CTL_LSB)
-
-/* #define PUBKEY_CTL1_MODWIDTH */
-#define PUBKEY_CTL1_MODWIDTH_LSB 40
-#define PUBKEY_CTL1_MODWIDTH_BITS ELEVEN_BITS
-#define PUBKEY_CTL1_MODWIDTH_MASK \
- (PUBKEY_CTL1_MODWIDTH_BITS << PUBKEY_CTL1_MODWIDTH_LSB)
-
-/* #define PUBKEY_CTL1_DSTADDR */
-#define PUBKEY_CTL1_DSTADDR_LSB 0
-#define PUBKEY_CTL1_DSTADDR_BITS FOURTY_BITS
-#define PUBKEY_CTL1_DSTADDR_MASK \
- (PUBKEY_CTL1_DSTADDR_BITS << PUBKEY_CTL1_DSTADDR_LSB)
-
-/* #define PUBKEY_CTL1_DST_OFFSET */
-#define PUBKEY_CTL1_DST_OFFSET_LSB 0
-#define PUBKEY_CTL1_DST_OFFSET_BITS THREE_BITS
-#define PUBKEY_CTL1_DST_OFFSET_MASK \
- (PUBKEY_CTL1_DST_OFFSET_BITS << PUBKEY_CTL1_DST_OFFSET_LSB)
-
-/*
- * Upon completion of operation, the RSA block returns a 2-word free descriptor
- * in the following format:
- *
- * 63 61 60 54 53 52 51 49 48 40 39 5 4 3 2 0
- * -------------------------------------------------------------------------------------------------------------------------
- * | Ctrl | Destination Id | 2'b00 | Desc Ctrl | Control Error | Source Address | Software Scratch0 | Global src data offset |
- * -------------------------------------------------------------------------------------------------------------------------
- * | Ctrl | Destination Id | 2'b00 | Desc Ctrl | Data Error | Dest Address | Software Scratch1 | Global dst data offset |
- * -------------------------------------------------------------------------------------------------------------------------
- *
- * The Control and Data Error codes are enumerated below
- *
- * Error conditions
- * ================
- *
- * Control Error Code Control Error Condition
- * ------------------ -----------------------
- * 9'h000 No Error
- * 9'h001 Undefined Op Class
- * 9'h002 Undefined ECC TYPE (ECC only)
- * 9'h004 Undefined ECC FUNCTION (ECC only)
- * 9'h008 ECC timeout (ECC only)
- * 9'h010 UNUSED
- * 9'h020 UNUSED
- * 9'h040 UNUSED
- * 9'h080 Data Read Error
- * 9'h100 Descriptor Ctrl Field Error (D0.Ctrl != SOP || D1.Ctrl != EOP)
- *
- * Data Error Code Data Error Condition
- * --------------- --------------------
- * 9'h000 No Error
- * 9'h001 Exponent Width > Block Width (RSA Only)
- * 9'h002 Modulus Width > Block Width (RSA Only)
- * 9'h004 UNUSED
- * 9'h008 UNUSED
- * 9'h010 UNUSED
- * 9'h020 UNUSED
- * 9'h040 UNUSED
- * 9'h080 Data Read Error
- * 9'h100 UNUSED
- */
-
-/*
- * Result Data Word for Message Ring Descriptor
- */
-
-/* #define PUBKEY_RSLT_CTL_CTL */
-#define PUBKEY_RSLT_CTL_CTL_LSB 61
-#define PUBKEY_RSLT_CTL_CTL_BITS THREE_BITS
-#define PUBKEY_RSLT_CTL_CTL_MASK \
- (PUBKEY_RSLT_CTL_CTL_BITS << PUBKEY_RSLT_CTL_CTL_LSB)
-
-/* #define PUBKEY_RSLT_CTL_DST_ID */
-#define PUBKEY_RSLT_CTL_DST_ID_LSB 54
-#define PUBKEY_RSLT_CTL_DST_ID_BITS SEVEN_BITS
-#define PUBKEY_RSLT_CTL_DST_ID_MASK \
- (PUBKEY_RSLT_CTL_DST_ID_BITS << PUBKEY_RSLT_CTL_DST_ID_LSB)
-
-/* #define PUBKEY_RSLT_CTL_DESC_CTL */
-#define PUBKEY_RSLT_CTL_DESC_CTL_LSB 49
-#define PUBKEY_RSLT_CTL_DESC_CTL_BITS THREE_BITS
-#define PUBKEY_RSLT_CTL_DESC_CTL_MASK \
- (PUBKEY_RSLT_CTL_DESC_CTL_BITS << PUBKEY_RSLT_CTL_DESC_CTL_LSB)
-
-
-/* #define PUBKEY_RSLT_CTL_ERROR */
-#define PUBKEY_RSLT_CTL_ERROR_LSB 40
-#define PUBKEY_RSLT_CTL_ERROR_BITS NINE_BITS
-#define PUBKEY_RSLT_CTL_ERROR_MASK \
- (PUBKEY_RSLT_CTL_ERROR_BITS << PUBKEY_RSLT_CTL_ERROR_LSB)
-
-/* #define PUBKEY_RSLT_CTL_SRCADDR */
-#define PUBKEY_RSLT_CTL_SRCADDR_LSB 0
-#define PUBKEY_RSLT_CTL_SRCADDR_BITS FOURTY_BITS
-#define PUBKEY_RSLT_CTL_SRCADDR_MASK \
- (PUBKEY_RSLT_CTL_SRCADDR_BITS << PUBKEY_RSLT_CTL_SRCADDR_LSB)
-
-
-/* #define PUBKEY_RSLT_DATA_CTL */
-#define PUBKEY_RSLT_DATA_CTL_LSB 61
-#define PUBKEY_RSLT_DATA_CTL_BITS THREE_BITS
-#define PUBKEY_RSLT_DATA_CTL_MASK \
- (PUBKEY_RSLT_DATA_CTL_BITS << PUBKEY_RSLT_DATA_CTL_LSB)
-
-/* #define PUBKEY_RSLT_DATA_DST_ID */
-#define PUBKEY_RSLT_DATA_DST_ID_LSB 54
-#define PUBKEY_RSLT_DATA_DST_ID_BITS SEVEN_BITS
-#define PUBKEY_RSLT_DATA_DST_ID_MASK \
- (PUBKEY_RSLT_DATA_DST_ID_BITS << PUBKEY_RSLT_DATA_DST_ID_LSB)
-
-/* #define PUBKEY_RSLT_DATA_DESC_CTL */
-#define PUBKEY_RSLT_DATA_DESC_CTL_LSB 49
-#define PUBKEY_RSLT_DATA_DESC_CTL_BITS THREE_BITS
-#define PUBKEY_RSLT_DATA_DESC_CTL_MASK \
- (PUBKEY_RSLT_DATA_DESC_CTL_BITS << PUBKEY_RSLT_DATA_DESC_CTL_LSB)
-
-/* #define PUBKEY_RSLT_DATA_ERROR */
-#define PUBKEY_RSLT_DATA_ERROR_LSB 40
-#define PUBKEY_RSLT_DATA_ERROR_BITS NINE_BITS
-#define PUBKEY_RSLT_DATA_ERROR_MASK \
- (PUBKEY_RSLT_DATA_ERROR_BITS << PUBKEY_RSLT_DATA_ERROR_LSB)
-
-/* #define PUBKEY_RSLT_DATA_DSTADDR */
-#define PUBKEY_RSLT_DATA_DSTADDR_LSB 40
-#define PUBKEY_RSLT_DATA_DSTADDR_BITS FOURTY_BITS
-#define PUBKEY_RSLT_DATA_DSTADDR_MASK \
- (PUBKEY_RSLT_DATA_DSTADDR_BITS << PUBKEY_RSLT_DATA_DSTADDR_LSB)
-
-/*
- * ******************************************************************
- * RSA Block - Data Error Code and Conditions
- * ******************************************************************
- */
-
-#define PK_CTL_ERR_NONE 0x0000 /* No Error */
-#define PK_CTL_ERR_OP_CLASS 0x0001 /* Undefined Op Class */
-#define PK_CTL_ERR_ECC_TYPE 0x0002 /* Undefined ECC TYPE (ECC only) */
-#define PK_CTL_ERR_ECC_FUNCT 0x0004 /* Undefined ECC FUNCTION (ECC only) */
-#define PK_CTL_ERR_ECC_TIMEOUT 0x0008 /* ECC timeout (ECC only) */
-#define PK_CTL_ERR_READ 0x0080 /* Data Read Error */
-#define PK_CTL_ERR_DESC 0x0100 /* Descriptor Ctrl Field Error
- * (D0.Ctrl != SOP || D1.Ctrl != EOP) */
-#define PK_CTL_ERR_TIMEOUT 0x1000 /* Message Responce Timeout */
-
-#define PK_DATA_ERR_NONE 0x0000 /* No Error */
-#define PK_DATA_ERR_EXP_WIDTH 0x0001 /* Exponent Width > Block Width */
-#define PK_DATA_ERR_MOD_WIDTH 0x0002 /* Modulus Width > Block Width */
-#define PK_DATA_ERR_READ 0x0080 /* Data Read Error */
-
-
-/*
- * This defines the RSA data format
- */
-/*
- * typedef struct RSAData_s {
- * uint64_t Constant;
- * uint64_t Exponent;
- * uint64_t Modulus;
- * uint64_t Message;
- *} RSAData_t, *RSAData_pt;
- *
- * typedef RSAData_t DHData_t;
- * typedef RSAData_pt DHData_pt;
- */
-
-typedef struct UserPubData_s {
- uint8_t *source;
- uint8_t *user_result;
- uint32_t result_length;
-} UserPubData_t, *UserPubData_pt;
-
-typedef struct pubkey_desc {
- OperationDescriptor_t op_ctl; /* size is cacheline */
- uint8_t source[1024];
- uint8_t dest[256]; /* 1024 makes cacheline-aligned */
- uint64_t control0;
- uint64_t control1;
- uint64_t ctl_result;
- uint64_t data_result;
- struct pubkey_desc *alloc;
- UserPubData_t kern; /* ptrs for temp buffers */
- //volatile atomic_t flag_complete;
- //struct semaphore sem_complete;
- //wait_queue_t submit_wait;
-} pubkey_desc_t, *pubkey_desc_pt;
-
-/*
- * KASUMI F8 and F9 use the IV0/IV1 fields :
- *
- * 63 41 40 39 37 36 32 31 0
- * ----------------------------------------------------------------------------
- * | |FX/DIRECTION| | F8/BEARER | F8/COUNT | IV0
- * ----------------------------------------------------------------------------
- * 1 5 32
- *
- * 63 32 31 0
- * ----------------------------------------------------------------------------
- * | F9/FRESH | F9/COUNT | IV1
- * ----------------------------------------------------------------------------
- * 32 32
- */
-#endif /* _XLR_SEC_DESC_H_ */
diff --git a/sys/dev/rmi/sec/rmilib.c b/sys/dev/rmi/sec/rmilib.c
deleted file mode 100644
index 219ef6c..0000000
--- a/sys/dev/rmi/sec/rmilib.c
+++ /dev/null
@@ -1,3172 +0,0 @@
-/*-
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD */
-
-#include <sys/cdefs.h>
-
-#include <sys/param.h>
-#include <sys/types.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/malloc.h>
-#include <sys/bus.h>
-#include <machine/bus.h>
-#include <machine/md_var.h>
-#include <machine/mips-exts.h>
-#include <machine/cpuregs.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-
-#include <opencrypto/cryptodev.h>
-
-
-#include <mips/xlr/iomap.h>
-#include <mips/xlr/pic.h>
-#include <mips/xlr/shared_structs.h>
-#include <mips/xlr/iomap.h>
-#include <mips/xlr/msgring.h>
-#include <mips/xlr/board.h>
-#include <dev/rmi/sec/rmilib.h>
-#include <dev/rmi/sec/desc.h>
-
-
-// static int msgrng_stnid_pk0 = MSGRNG_STNID_PK0;
-
-/*#define RMI_SEC_DEBUG */
-
-#define SMP_CACHE_BYTES XLR_CACHELINE_SIZE
-#define NUM_CHUNKS(size, bits) ( ((size)>>(bits)) + (((size)&((1<<(bits))-1))?1:0) )
-
-static const char nib2hex[] = "0123456789ABCDEF";
-symkey_desc_pt g_desc;
-struct xlr_sec_command *g_cmd;
-
-#ifdef XLR_SEC_CMD_DEBUG
-static void
- decode_symkey_desc(symkey_desc_pt desc, uint32_t cfg_vector);
-
-#endif
-
-void print_buf(char *desc, void *data, int len);
-
-static int
- xlr_sec_cipher_hash_command(xlr_sec_io_pt op, symkey_desc_pt desc, uint8_t);
-
-static xlr_sec_error_t
-xlr_sec_setup_descriptor(xlr_sec_io_pt op,
- unsigned int flags,
- symkey_desc_pt desc,
- uint32_t * cfg_vector);
-
-static
-xlr_sec_error_t
-xlr_sec_setup_packet(xlr_sec_io_pt op,
- symkey_desc_pt desc,
- unsigned int flags,
- uint64_t * data,
- PacketDescriptor_pt pkt_desc,
- ControlDescriptor_pt ctl_desc,
- uint32_t vector,
- PacketDescriptor_pt next_pkt_desc,
- uint8_t multi_frag_flag);
-
-static int
- xlr_sec_submit_message(symkey_desc_pt desc, uint32_t cfg_vector);
-
-static
-xlr_sec_error_t
-xlr_sec_setup_cipher(xlr_sec_io_pt op,
- ControlDescriptor_pt ctl_desc,
- uint32_t * vector);
-
-static
-xlr_sec_error_t
-xlr_sec_setup_digest(xlr_sec_io_pt op,
- ControlDescriptor_pt ctl_desc,
- uint32_t * vector);
-
-static
-xlr_sec_error_t
-xlr_sec_setup_cksum(xlr_sec_io_pt op,
- ControlDescriptor_pt ctl_desc);
-
-static
-xlr_sec_error_t
-xlr_sec_control_setup(xlr_sec_io_pt op,
- unsigned int flags,
- uint64_t * control,
- ControlDescriptor_pt ctl_desc,
- xlr_sec_drv_user_t * user,
- uint32_t vector);
-
-
-xlr_sec_error_t
-xlr_sec_submit_op(symkey_desc_pt desc);
-
-static void xlr_sec_free_desc(symkey_desc_pt desc);
-
-void
-xlr_sec_msgring_handler(int bucket, int size, int code, int stid,
- struct msgrng_msg *msg, void *data);
-
-
-void
-xlr_sec_init(struct xlr_sec_softc *sc)
-{
- unsigned int i;
- xlr_reg_t *mmio;
-
-
- mmio = sc->mmio = xlr_io_mmio(XLR_IO_SECURITY_OFFSET);
-
- xlr_write_reg(mmio, SEC_DMA_CREDIT, SEC_DMA_CREDIT_CONFIG);
-
-
- xlr_write_reg(mmio, SEC_CONFIG2, SEC_CFG2_ROUND_ROBIN_ON);
-
- for (i = 0; i < 8; i++)
- xlr_write_reg(mmio,
- SEC_MSG_BUCKET0_SIZE + i,
- xlr_is_xls() ?
- xls_bucket_sizes.bucket[MSGRNG_STNID_SEC + i] :
- bucket_sizes.bucket[MSGRNG_STNID_SEC + i]);
-
- for (i = 0; i < 128; i++)
- xlr_write_reg(mmio,
- SEC_CC_CPU0_0 + i,
- xlr_is_xls() ?
- xls_cc_table_sec.counters[i >> 3][i & 0x07] :
- cc_table_sec.counters[i >> 3][i & 0x07]);
-
-
- /*
- * Register a bucket handler with the phoenix messaging subsystem
- * For now, register handler for bucket 0->5 in msg stn 0
- */
- if (register_msgring_handler(TX_STN_SAE, xlr_sec_msgring_handler, NULL)) {
- panic("Couldn't register msgring handler 0\n");
- }
- return;
-}
-
-
-
-int
-xlr_sec_setup(struct xlr_sec_session *ses,
- struct xlr_sec_command *cmd,
- symkey_desc_pt desc
-)
-{
- xlr_sec_io_pt op;
- int size, ret_val;
- int iv_len;
-
-
- desc->ses = ses;
- op = &cmd->op;
- if (op == NULL)
- return (-ENOMEM);
-
-
-
- desc->ctl_desc.instruction = 0;
- memset(&desc->ctl_desc.cipherHashInfo, 0, sizeof(CipherHashInfo_t));
- desc->control = 0;
-
- desc->pkt_desc[0].srcLengthIVOffUseIVNext = 0;
- desc->pkt_desc[0].dstDataSettings = 0;
- desc->pkt_desc[0].authDstNonceLow = 0;
- desc->pkt_desc[0].ckSumDstNonceHiCFBMaskLLWMask = 0;
- desc->pkt_desc[1].srcLengthIVOffUseIVNext = 0;
- desc->pkt_desc[1].dstDataSettings = 0;
- desc->pkt_desc[1].authDstNonceLow = 0;
- desc->pkt_desc[1].ckSumDstNonceHiCFBMaskLLWMask = 0;
-
- desc->data = 0;
- desc->ctl_result = 0;
- desc->data_result = 0;
-
-
- if (op->flags & XLR_SEC_FLAGS_HIGH_PRIORITY)
- if (!xlr_is_xls())
- desc->op_ctl.stn_id++;
-
- desc->user.user_src = (uint8_t *) (unsigned long)op->source_buf;
- desc->user.user_dest = (uint8_t *) (unsigned long)op->dest_buf;
- desc->user.user_auth = (uint8_t *) (unsigned long)op->auth_dest;
-
-
- if ((op->cipher_type == XLR_SEC_CIPHER_TYPE_ARC4) &&
- (!op->rc4_state && (op->rc4_loadstate || op->rc4_savestate))) {
- printf(" ** Load/Save State and no State **");
- xlr_sec_free_desc(desc);
- return (-EINVAL);
- }
- desc->user.user_state = (uint8_t *) (unsigned long)op->rc4_state;
-
-
- switch (op->cipher_type) {
- case XLR_SEC_CIPHER_TYPE_NONE:
- iv_len = 0;
- break;
- case XLR_SEC_CIPHER_TYPE_DES:
- case XLR_SEC_CIPHER_TYPE_3DES:
- iv_len = XLR_SEC_DES_IV_LENGTH;
- break;
- case XLR_SEC_CIPHER_TYPE_AES128:
- case XLR_SEC_CIPHER_TYPE_AES192:
- case XLR_SEC_CIPHER_TYPE_AES256:
- iv_len = XLR_SEC_AES_IV_LENGTH;
- break;
- case XLR_SEC_CIPHER_TYPE_ARC4:
- iv_len = XLR_SEC_ARC4_IV_LENGTH;
- break;
- case XLR_SEC_CIPHER_TYPE_KASUMI_F8:
- iv_len = XLR_SEC_KASUMI_F8_IV_LENGTH;
- break;
-
- default:
- printf(" ** Undefined Cipher Type **");
- xlr_sec_free_desc(desc);
- return (-EINVAL);
- }
-
-
-
-
- size = op->source_buf_size + iv_len;
-
- /*
- * make sure that there are enough bytes for aes based stream
- * ciphers
- */
- if (op->cipher_mode == XLR_SEC_CIPHER_MODE_F8 ||
- op->cipher_mode == XLR_SEC_CIPHER_MODE_CTR)
- size += XLR_SEC_AES_BLOCK_SIZE - 1;
-
- if (op->cipher_type == XLR_SEC_CIPHER_TYPE_NONE) {
- if (op->source_buf_size != 0) {
- memcpy(desc->user.aligned_src, (uint8_t *) (unsigned long)op->source_buf,
- op->source_buf_size);
- }
- } else {
- if (ses->multi_frag_flag) {
- /* copy IV into temporary kernel source buffer */
- memcpy(desc->user.aligned_src, &op->initial_vector[0], iv_len);
-
- /* copy input data to temporary kernel source buffer */
- memcpy((uint8_t *) (desc->user.aligned_src + iv_len),
- (uint8_t *) (unsigned long)op->source_buf, SEC_MAX_FRAG_LEN);
-
- desc->next_src_len = op->source_buf_size - SEC_MAX_FRAG_LEN;
- memcpy((uint8_t *) (desc->next_src_buf),
- (uint8_t *) (unsigned long)(op->source_buf + SEC_MAX_FRAG_LEN),
- desc->next_src_len);
-
- op->source_buf_size = SEC_MAX_FRAG_LEN;
- op->source_buf_size += iv_len;
- } else {
- /* copy IV into temporary kernel source buffer */
- memcpy(desc->user.aligned_src, &op->initial_vector[0], iv_len);
-
- /* copy input data to temporary kernel source buffer */
- memcpy((uint8_t *) (desc->user.aligned_src + iv_len),
- (uint8_t *) (unsigned long)op->source_buf, op->source_buf_size);
- op->source_buf_size += iv_len;
- }
- }
-
-
-
- /* Set source to new kernel space */
- op->source_buf = (uint64_t) (unsigned long)desc->user.aligned_src;
-
-
- /*
- * Build new dest buffer, for Cipher output only
- */
- if (op->cipher_type == XLR_SEC_CIPHER_TYPE_NONE) {
- /*
- * Digest Engine *NEEDS* this, otherwise it will write at
- * 0[x]
- */
- op->dest_buf = (uint64_t) (unsigned long)desc->user.aligned_src;
- } else {
- /* DEBUG -dpk */
- XLR_SEC_CMD_DIAG("dest_buf_size = %d \n", op->dest_buf_size);
-
- size = op->dest_buf_size + iv_len;
-
- /*
- * make sure that there are enough bytes for aes based
- * stream ciphers
- */
- if (op->cipher_mode == XLR_SEC_CIPHER_MODE_F8 ||
- op->cipher_mode == XLR_SEC_CIPHER_MODE_CTR)
- size += XLR_SEC_AES_BLOCK_SIZE - 1;
- op->dest_buf = (uint64_t) (unsigned long)desc->user.aligned_dest;
-
- }
-
- ret_val = xlr_sec_cipher_hash_command(op, desc, ses->multi_frag_flag);
-
- return (ret_val);
-
-}
-
-static int
-xlr_sec_cipher_hash_command(xlr_sec_io_pt op, symkey_desc_pt desc,
- uint8_t multi_frag_flag)
-{
- xlr_sec_error_t err;
- uint32_t cfg_vector;
- unsigned int setup_flags = 0;
-
- err = XLR_SEC_ERR_NONE;
- cfg_vector = 0;
-
- if ((op->digest_type == XLR_SEC_DIGEST_TYPE_NONE) &&
- (op->cipher_type != XLR_SEC_CIPHER_TYPE_ARC4) &&
- (op->cipher_mode != XLR_SEC_CIPHER_MODE_F8) &&
- (op->cipher_type != XLR_SEC_CIPHER_TYPE_KASUMI_F8) &&
- (op->source_buf_size & 0x7)) {
- printf("Invalid Cipher Block Size, data len=%d\n",
- op->source_buf_size);
- return (-EINVAL);
- }
- do {
-
- if ((op->cipher_type == XLR_SEC_CIPHER_TYPE_3DES) &&
- (op->cipher_op == XLR_SEC_CIPHER_OP_DECRYPT))
- setup_flags = XLR_SEC_SETUP_OP_FLIP_3DES_KEY;
-
- err = xlr_sec_setup_descriptor(op,
- setup_flags,
- desc, &cfg_vector);
- if (err != XLR_SEC_ERR_NONE)
- break;
-
- err = xlr_sec_setup_packet(op,
- desc,
- op->digest_type != XLR_SEC_DIGEST_TYPE_NONE ?
- XLR_SEC_SETUP_OP_CIPHER_HMAC : 0,
- &desc->data,
- &desc->pkt_desc[0],
- &desc->ctl_desc,
- cfg_vector,
- &desc->pkt_desc[1],
- multi_frag_flag);
- if (err != XLR_SEC_ERR_NONE)
- break;
- } while (0);
- if (err != XLR_SEC_ERR_NONE) {
- return (EINVAL);
- }
- err = xlr_sec_submit_message(desc, cfg_vector);
- return err;
-}
-
-
-static xlr_sec_error_t
-xlr_sec_setup_descriptor(xlr_sec_io_pt op,
- unsigned int flags,
- symkey_desc_pt desc,
- uint32_t * cfg_vector)
-{
- xlr_sec_error_t err;
-
- XLR_SEC_CMD_DIAG("xlr_sec_setup_descriptor: ENTER\n");
-
-
- if ((err = xlr_sec_setup_cipher(op, &desc->ctl_desc, cfg_vector)) != XLR_SEC_ERR_NONE) {
- XLR_SEC_CMD_DIAG("xlr_sec_setup_descriptor: xlr_sec_setup_cipher done err %d\n",
- (int)err);
- return err;
- }
- if (op->digest_type != XLR_SEC_DIGEST_TYPE_NONE) {
- if ((err = xlr_sec_setup_digest(op, &desc->ctl_desc, cfg_vector)) != XLR_SEC_ERR_NONE) {
- XLR_SEC_CMD_DIAG("xlr_sec_setup_descriptor: xlr_sec_setup_digest done err %d\n",
- (int)err);
- return err;
- }
- }
- if ((err = xlr_sec_setup_cksum(op, &desc->ctl_desc)) != XLR_SEC_ERR_NONE) {
- XLR_SEC_CMD_DIAG("xlr_sec_setup_descriptor: xlr_sec_setup_cksum done err %d\n",
- (int)err);
- return err;
- }
- if ((err = xlr_sec_control_setup(op,
- flags,
- &desc->control,
- &desc->ctl_desc,
- &desc->user,
- *cfg_vector)) != XLR_SEC_ERR_NONE) {
- XLR_SEC_CMD_DIAG("xlr_sec_setup_descriptor: xlr_sec_control_setup done err %d\n",
- (int)err);
- return err;
- }
- XLR_SEC_CMD_DIAG("xlr_sec_setup_descriptor: DONE\n");
- return err;
-}
-
-
-
-static
-xlr_sec_error_t
-xlr_sec_setup_packet(xlr_sec_io_pt op,
- symkey_desc_pt desc,
- unsigned int flags,
- uint64_t * data,
- PacketDescriptor_pt pkt_desc,
- ControlDescriptor_pt ctl_desc,
- uint32_t vector,
- PacketDescriptor_pt next_pkt_desc,
- uint8_t multi_frag_flag)
-{
- uint32_t len, next_len = 0, len_dwords, last_u64_bytes;
- uint64_t addr;
- uint64_t seg_addr, next_seg_addr = 0;
- uint64_t byte_offset, global_offset;
- uint32_t cipher_offset_dwords;
-
- XLR_SEC_CMD_DIAG("xlr_sec_setup_packet: ENTER vector = %04x\n", vector);
-
- /* physical address of the source buffer */
- addr = (uint64_t) vtophys((void *)(unsigned long)op->source_buf);
- /* cache-aligned base of the source buffer */
- seg_addr = (addr & ~(SMP_CACHE_BYTES - 1));
- /* offset in bytes to the source buffer start from the segment base */
- byte_offset = addr - seg_addr;
- /* global offset: 0-7 bytes */
- global_offset = byte_offset & 0x7;
-
-
- /*
- * op->source_buf_size is expected to be the Nb double words to
- * stream in (Including Segment address->CP/IV/Auth/CkSum offsets)
- */
-
- /*
- * adjusted length of the whole thing, accounting for the added
- * head, sans global_offset (per Paul S.)
- */
-
- len = op->source_buf_size + byte_offset - global_offset;
- if (multi_frag_flag) {
- next_seg_addr = (uint64_t) vtophys((void *)(unsigned long)(desc->next_src_buf));
- next_seg_addr = (next_seg_addr & ~(SMP_CACHE_BYTES - 1));
- next_len = desc->next_src_len;
- }
- /* length of the whole thing in dwords */
- len_dwords = NUM_CHUNKS(len, 3);
- /* number of bytes in the last chunk (len % 8) */
- last_u64_bytes = len & 0x07;
-
- if (op->cipher_offset & 0x7) {
- printf("** cipher_offset(%d) fails 64-bit word alignment **",
- op->cipher_offset);
-
- return XLR_SEC_ERR_CIPHER_MODE; /* ! fix ! */
- }
- /*
- * global_offset is only three bits, so work the number of the whole
- * 8-byte words into the global offset. both offset and
- * cipher_offset are byte counts
- */
- cipher_offset_dwords = (op->iv_offset + byte_offset) >> 3;
-
-
- if (op->cipher_mode == XLR_SEC_CIPHER_MODE_F8 ||
- op->cipher_mode == XLR_SEC_CIPHER_MODE_CTR) {
- if (multi_frag_flag) {
- int nlhmac = ((op->source_buf_size + global_offset + 7 - op->cipher_offset) >> 3) & 1;
-
- pkt_desc->srcLengthIVOffUseIVNext =
-
- FIELD_VALUE(PKT_DSC_HASHBYTES, len & 7) |
- FIELD_VALUE(PKT_DSC_IVOFF, cipher_offset_dwords) |
- FIELD_VALUE(PKT_DSC_PKTLEN, nlhmac + ((len + 7) >> 3)) |
- FIELD_VALUE(PKT_DSC_NLHMAC, nlhmac) |
- FIELD_VALUE(PKT_DSC_BREAK, 0) |
- FIELD_VALUE(PKT_DSC_WAIT, 1) |
- FIELD_VALUE(PKT_DSC_NEXT, 1) |
- FIELD_VALUE(PKT_DSC_SEGADDR, seg_addr >> (PKT_DSC_SEGADDR_LSB)) |
- FIELD_VALUE(PKT_DSC_SEGOFFSET, global_offset);
- } else {
- int nlhmac = ((op->source_buf_size + global_offset + 7 - op->cipher_offset) >> 3) & 1;
-
- pkt_desc->srcLengthIVOffUseIVNext =
- FIELD_VALUE(PKT_DSC_HASHBYTES, len & 7) |
- FIELD_VALUE(PKT_DSC_IVOFF, cipher_offset_dwords) |
- FIELD_VALUE(PKT_DSC_PKTLEN, nlhmac + ((len + 7) >> 3)) |
- FIELD_VALUE(PKT_DSC_NLHMAC, nlhmac) |
- FIELD_VALUE(PKT_DSC_BREAK, 0) |
- FIELD_VALUE(PKT_DSC_WAIT, 0) |
- FIELD_VALUE(PKT_DSC_SEGADDR, seg_addr >> (PKT_DSC_SEGADDR_LSB)) |
- FIELD_VALUE(PKT_DSC_SEGOFFSET, global_offset);
-
- }
- } else {
- if (multi_frag_flag) {
- pkt_desc->srcLengthIVOffUseIVNext =
-
- FIELD_VALUE(PKT_DSC_HASHBYTES, len & 7) |
- FIELD_VALUE(PKT_DSC_IVOFF, cipher_offset_dwords) |
- FIELD_VALUE(PKT_DSC_PKTLEN, (len + 7) >> 3) |
- FIELD_VALUE(PKT_DSC_BREAK, 0) |
- FIELD_VALUE(PKT_DSC_WAIT, 0) |
- FIELD_VALUE(PKT_DSC_NEXT, 1) |
- FIELD_VALUE(PKT_DSC_SEGADDR, seg_addr >> (PKT_DSC_SEGADDR_LSB)) |
- FIELD_VALUE(PKT_DSC_SEGOFFSET, global_offset);
-
-
- next_pkt_desc->srcLengthIVOffUseIVNext =
- FIELD_VALUE(PKT_DSC_HASHBYTES, (next_len & 7)) |
- FIELD_VALUE(PKT_DSC_IVOFF, 0) |
- FIELD_VALUE(PKT_DSC_PKTLEN, (next_len + 7) >> 3) |
- FIELD_VALUE(PKT_DSC_BREAK, 0) |
- FIELD_VALUE(PKT_DSC_WAIT, 0) |
- FIELD_VALUE(PKT_DSC_NEXT, 0) |
- FIELD_VALUE(PKT_DSC_SEGADDR, next_seg_addr >> (PKT_DSC_SEGADDR_LSB)) |
- FIELD_VALUE(PKT_DSC_SEGOFFSET, 0);
-
-
- } else {
- pkt_desc->srcLengthIVOffUseIVNext =
- FIELD_VALUE(PKT_DSC_HASHBYTES, len & 7) |
- FIELD_VALUE(PKT_DSC_IVOFF, cipher_offset_dwords) |
- FIELD_VALUE(PKT_DSC_PKTLEN, (len + 7) >> 3) |
- FIELD_VALUE(PKT_DSC_BREAK, 0) |
- FIELD_VALUE(PKT_DSC_WAIT, 0) |
- FIELD_VALUE(PKT_DSC_SEGADDR, seg_addr >> (PKT_DSC_SEGADDR_LSB)) |
- FIELD_VALUE(PKT_DSC_SEGOFFSET, global_offset);
-
-
- }
- }
-
- switch (op->pkt_hmac) {
- case XLR_SEC_LOADHMACKEY_MODE_OLD:
- CLEAR_SET_FIELD(pkt_desc->srcLengthIVOffUseIVNext,
- PKT_DSC_LOADHMACKEY, PKT_DSC_LOADHMACKEY_OLD);
- if (multi_frag_flag) {
- CLEAR_SET_FIELD(next_pkt_desc->srcLengthIVOffUseIVNext,
- PKT_DSC_LOADHMACKEY, PKT_DSC_LOADHMACKEY_OLD);
-
- }
- break;
- case XLR_SEC_LOADHMACKEY_MODE_LOAD:
- CLEAR_SET_FIELD(pkt_desc->srcLengthIVOffUseIVNext,
- PKT_DSC_LOADHMACKEY, PKT_DSC_LOADHMACKEY_LOAD);
- if (multi_frag_flag) {
- CLEAR_SET_FIELD(next_pkt_desc->srcLengthIVOffUseIVNext,
- PKT_DSC_LOADHMACKEY, PKT_DSC_LOADHMACKEY_LOAD);
-
- }
- break;
- default:
- if (vector & (XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_F9)) {
- XLR_SEC_CMD_DIAG("xlr_sec_setup_packet: ERR_LOADHMACKEY_MODE EXIT\n");
- return XLR_SEC_ERR_LOADHMACKEY_MODE;
- }
- break;
- }
-
- switch (op->pkt_hash) {
- case XLR_SEC_PADHASH_PADDED:
- CLEAR_SET_FIELD(pkt_desc->srcLengthIVOffUseIVNext,
- PKT_DSC_PADHASH, PKT_DSC_PADHASH_PADDED);
- if (multi_frag_flag) {
- CLEAR_SET_FIELD(next_pkt_desc->srcLengthIVOffUseIVNext,
- PKT_DSC_PADHASH, PKT_DSC_PADHASH_PADDED);
- }
- break;
- case XLR_SEC_PADHASH_PAD:
- CLEAR_SET_FIELD(pkt_desc->srcLengthIVOffUseIVNext,
- PKT_DSC_PADHASH, PKT_DSC_PADHASH_PAD);
- if (multi_frag_flag) {
- CLEAR_SET_FIELD(next_pkt_desc->srcLengthIVOffUseIVNext,
- PKT_DSC_PADHASH, PKT_DSC_PADHASH_PAD);
- }
- break;
- default:
- if (vector & (XLR_SEC_VECTOR_MAC | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_HMAC2)) {
- XLR_SEC_CMD_DIAG("xlr_sec_setup_packet: ERR_PADHASH_MODE EXIT\n");
- return XLR_SEC_ERR_PADHASH_MODE;
- }
- break;
- }
-
- switch (op->pkt_iv) {
- case XLR_SEC_PKT_IV_OLD:
- CLEAR_SET_FIELD(pkt_desc->srcLengthIVOffUseIVNext,
- PKT_DSC_IV, PKT_DSC_IV_OLD);
- if (multi_frag_flag) {
- CLEAR_SET_FIELD(next_pkt_desc->srcLengthIVOffUseIVNext,
- PKT_DSC_IV, PKT_DSC_IV_OLD);
-
- }
- break;
- case XLR_SEC_PKT_IV_NEW:
- CLEAR_SET_FIELD(pkt_desc->srcLengthIVOffUseIVNext,
- PKT_DSC_IV, PKT_DSC_IV_NEW);
- if (multi_frag_flag) {
- CLEAR_SET_FIELD(next_pkt_desc->srcLengthIVOffUseIVNext,
- PKT_DSC_IV, PKT_DSC_IV_NEW);
-
- }
- break;
- default:
- if (vector & XLR_SEC_VECTOR_CIPHER) {
- XLR_SEC_CMD_DIAG("xlr_sec_setup_packet: ERR_PKT_IV_MODE EXIT\n");
- return XLR_SEC_ERR_PKT_IV_MODE;
- }
- break;
- }
-
- XLR_SEC_CMD_DIAG("xlr_sec_setup_packet: src_buf=%llx phys_src_buf=%llx \n",
- (unsigned long long)op->source_buf, (unsigned long long)addr);
-
- XLR_SEC_CMD_DIAG("xlr_sec_setup_packet: seg_addr=%llx offset=%lld\n",
- (unsigned long long)seg_addr, (unsigned long long)byte_offset);
-
- XLR_SEC_CMD_DIAG("xlr_sec_setup_packet: global src offset: %d, iv_offset=%d\n",
- cipher_offset_dwords, op->iv_offset);
-
- XLR_SEC_CMD_DIAG("xlr_sec_setup_packet: src_buf_sz=%d PKT_LEN=%d\n",
- op->source_buf_size, len_dwords);
-
- /*
- * same operation with the destination. cipher offset affects this,
- * as well
- */
- if (multi_frag_flag) {
- next_seg_addr = (uint64_t) vtophys((void *)(unsigned long)(desc->next_dest_buf));
- next_seg_addr = (next_seg_addr & ~(SMP_CACHE_BYTES - 1));
- }
- addr = (uint64_t) vtophys((void *)(unsigned long)op->dest_buf);
- seg_addr = (addr & ~(SMP_CACHE_BYTES - 1));
- byte_offset = addr - seg_addr;
- global_offset = byte_offset & 0x7;
-
- XLR_SEC_CMD_DIAG("xlr_sec_setup_packet: dest_buf=%llx phys_dest_buf=%llx \n",
- (unsigned long long)op->dest_buf, (unsigned long long)addr);
-
- XLR_SEC_CMD_DIAG("xlr_sec_setup_packet: seg_addr=%llx offset=%lld\n",
- (unsigned long long)seg_addr, (unsigned long long)byte_offset);
-
- /*
- * Dest Address = (Cipher Dest Address) + (Cipher Offset) + (Global
- * Dest Data Offset)
- *
- * Cipher Dest Address - Cache-line (0xffffffffe0) Cipher Offset -
- * Which (64-bit) Word in Cacheline (0-3) Global Dest Data Offset -
- * Number of Bytes in (64-bit) Word before data
- *
- * It must be set for Digest-only Ops, since the Digest engine will
- * write data to this address.
- */
- cipher_offset_dwords = (op->cipher_offset + byte_offset) >> 3;
-
-
- pkt_desc->dstDataSettings =
- /* SYM_OP, HASHSRC */
- FIELD_VALUE(PKT_DSC_CPHROFF, cipher_offset_dwords) |
- FIELD_VALUE(PKT_DSC_HASHOFF, (op->digest_offset + byte_offset) >> 3) |
- FIELD_VALUE(PKT_DSC_CPHR_DST_ADDR, seg_addr) |
- FIELD_VALUE(PKT_DSC_CPHR_DST_DWOFFSET, 0) |
- FIELD_VALUE(PKT_DSC_CPHR_DST_OFFSET, global_offset);
-
- if (multi_frag_flag) {
- next_pkt_desc->dstDataSettings =
- /* SYM_OP, HASHSRC */
- FIELD_VALUE(PKT_DSC_CPHROFF, cipher_offset_dwords) |
- FIELD_VALUE(PKT_DSC_HASHOFF, (op->digest_offset + byte_offset) >> 3) |
- FIELD_VALUE(PKT_DSC_CPHR_DST_ADDR, next_seg_addr) |
- FIELD_VALUE(PKT_DSC_CPHR_DST_DWOFFSET, 0) |
- FIELD_VALUE(PKT_DSC_CPHR_DST_OFFSET, global_offset);
-
- }
- if (op->cipher_type == XLR_SEC_CIPHER_TYPE_ARC4)
- pkt_desc->dstDataSettings |= FIELD_VALUE(PKT_DSC_ARC4BYTECOUNT, last_u64_bytes);
-
- if (op->cipher_type != XLR_SEC_CIPHER_TYPE_NONE) {
- switch (op->cipher_op) {
- case XLR_SEC_CIPHER_OP_ENCRYPT:
- CLEAR_SET_FIELD(pkt_desc->dstDataSettings,
- PKT_DSC_SYM_OP, PKT_DSC_SYM_OP_ENCRYPT);
- if (multi_frag_flag) {
- CLEAR_SET_FIELD(next_pkt_desc->dstDataSettings,
- PKT_DSC_SYM_OP, PKT_DSC_SYM_OP_ENCRYPT);
-
- }
- break;
- case XLR_SEC_CIPHER_OP_DECRYPT:
- CLEAR_SET_FIELD(pkt_desc->dstDataSettings,
- PKT_DSC_SYM_OP, PKT_DSC_SYM_OP_DECRYPT);
- if (multi_frag_flag) {
- CLEAR_SET_FIELD(next_pkt_desc->dstDataSettings,
- PKT_DSC_SYM_OP, PKT_DSC_SYM_OP_DECRYPT);
-
- }
- break;
- default:
- XLR_SEC_CMD_DIAG("xlr_sec_setup_packet: ERR_CIPHER_OP EXIT\n");
- return XLR_SEC_ERR_CIPHER_OP;
- }
- }
- if (flags & XLR_SEC_SETUP_OP_HMAC) {
- switch (op->digest_src) {
- case XLR_SEC_DIGEST_SRC_DMA:
- CLEAR_SET_FIELD(pkt_desc->dstDataSettings,
- PKT_DSC_HASHSRC, PKT_DSC_HASHSRC_DMA);
- if (multi_frag_flag) {
- CLEAR_SET_FIELD(next_pkt_desc->dstDataSettings,
- PKT_DSC_HASHSRC, PKT_DSC_HASHSRC_DMA);
-
- }
- break;
- case XLR_SEC_DIGEST_SRC_CPHR:
- CLEAR_SET_FIELD(pkt_desc->dstDataSettings,
- PKT_DSC_HASHSRC, PKT_DSC_HASHSRC_CIPHER);
- if (multi_frag_flag) {
- CLEAR_SET_FIELD(next_pkt_desc->dstDataSettings,
- PKT_DSC_HASHSRC, PKT_DSC_HASHSRC_CIPHER);
- }
- break;
- default:
- XLR_SEC_CMD_DIAG("xlr_sec_setup_packet: ERR_DIGEST_SRC EXIT\n");
- return XLR_SEC_ERR_DIGEST_SRC;
- }
- }
- if (op->cksum_type != XLR_SEC_CKSUM_TYPE_NOP) {
- switch (op->cksum_src) {
- case XLR_SEC_CKSUM_SRC_DMA:
- CLEAR_SET_FIELD(pkt_desc->dstDataSettings,
- PKT_DSC_CKSUMSRC, PKT_DSC_CKSUMSRC_DMA);
- if (multi_frag_flag) {
- CLEAR_SET_FIELD(next_pkt_desc->dstDataSettings,
- PKT_DSC_CKSUMSRC, PKT_DSC_CKSUMSRC_DMA);
- }
- break;
- case XLR_SEC_CKSUM_SRC_CIPHER:
- CLEAR_SET_FIELD(next_pkt_desc->dstDataSettings,
- PKT_DSC_CKSUMSRC, PKT_DSC_CKSUMSRC_CIPHER);
- if (multi_frag_flag) {
- CLEAR_SET_FIELD(next_pkt_desc->dstDataSettings,
- PKT_DSC_CKSUMSRC, PKT_DSC_CKSUMSRC_CIPHER);
- }
- break;
- default:
- XLR_SEC_CMD_DIAG("xlr_sec_setup_packet: ERR_CKSUM_SRC EXIT\n");
- return XLR_SEC_ERR_CKSUM_SRC;
- }
- }
- pkt_desc->ckSumDstNonceHiCFBMaskLLWMask =
- FIELD_VALUE(PKT_DSC_HASH_BYTE_OFF, (op->digest_offset & 0x7)) |
- FIELD_VALUE(PKT_DSC_PKTLEN_BYTES, 0) |
- /* NONCE_HI, PKT_DSC_LASTWORD, CFB_MASK, CKSUM_DST_ADDR */
- FIELD_VALUE(PKT_DSC_IV_OFF_HI, 0);
-
- if (multi_frag_flag) {
- next_pkt_desc->ckSumDstNonceHiCFBMaskLLWMask =
- FIELD_VALUE(PKT_DSC_HASH_BYTE_OFF, (op->digest_offset & 0x7)) |
- FIELD_VALUE(PKT_DSC_PKTLEN_BYTES, 0) |
- /* NONCE_HI, PKT_DSC_LASTWORD, CFB_MASK, CKSUM_DST_ADDR */
- FIELD_VALUE(PKT_DSC_IV_OFF_HI, 0);
-
- }
- switch (op->pkt_lastword) {
- case XLR_SEC_LASTWORD_128:
- CLEAR_SET_FIELD(pkt_desc->ckSumDstNonceHiCFBMaskLLWMask,
- PKT_DSC_LASTWORD, PKT_DSC_LASTWORD_128);
- if (multi_frag_flag) {
- CLEAR_SET_FIELD(next_pkt_desc->ckSumDstNonceHiCFBMaskLLWMask,
- PKT_DSC_LASTWORD, PKT_DSC_LASTWORD_128);
-
- }
- break;
- case XLR_SEC_LASTWORD_96MASK:
- CLEAR_SET_FIELD(pkt_desc->ckSumDstNonceHiCFBMaskLLWMask,
- PKT_DSC_LASTWORD, PKT_DSC_LASTWORD_96MASK);
- if (multi_frag_flag) {
- CLEAR_SET_FIELD(next_pkt_desc->ckSumDstNonceHiCFBMaskLLWMask,
- PKT_DSC_LASTWORD, PKT_DSC_LASTWORD_96MASK);
- }
- break;
- case XLR_SEC_LASTWORD_64MASK:
- CLEAR_SET_FIELD(pkt_desc->ckSumDstNonceHiCFBMaskLLWMask,
- PKT_DSC_LASTWORD, PKT_DSC_LASTWORD_64MASK);
- if (multi_frag_flag) {
- CLEAR_SET_FIELD(next_pkt_desc->ckSumDstNonceHiCFBMaskLLWMask,
- PKT_DSC_LASTWORD, PKT_DSC_LASTWORD_64MASK);
- }
- break;
- case XLR_SEC_LASTWORD_32MASK:
- CLEAR_SET_FIELD(pkt_desc->ckSumDstNonceHiCFBMaskLLWMask,
- PKT_DSC_LASTWORD, PKT_DSC_LASTWORD_32MASK);
- if (multi_frag_flag) {
- CLEAR_SET_FIELD(next_pkt_desc->ckSumDstNonceHiCFBMaskLLWMask,
- PKT_DSC_LASTWORD, PKT_DSC_LASTWORD_32MASK);
- }
- break;
- default:
- XLR_SEC_CMD_DIAG("xlr_sec_setup_packet: ERR_LASTWORD_MODE EXIT\n");
- return XLR_SEC_ERR_LASTWORD_MODE;
- }
- CLEAR_SET_FIELD(pkt_desc->ckSumDstNonceHiCFBMaskLLWMask,
- PKT_DSC_CFB_MASK, op->cfb_mask);
- CLEAR_SET_FIELD(pkt_desc->ckSumDstNonceHiCFBMaskLLWMask,
- PKT_DSC_NONCE_HI, htonl(op->nonce) >> 24);
- CLEAR_SET_FIELD(pkt_desc->authDstNonceLow,
- PKT_DSC_NONCE_LOW, htonl(op->nonce) & 0xffffff);
-
- if (multi_frag_flag) {
- CLEAR_SET_FIELD(next_pkt_desc->ckSumDstNonceHiCFBMaskLLWMask,
- PKT_DSC_CFB_MASK, op->cfb_mask);
- CLEAR_SET_FIELD(next_pkt_desc->ckSumDstNonceHiCFBMaskLLWMask,
- PKT_DSC_NONCE_HI, htonl(op->nonce) >> 24);
- CLEAR_SET_FIELD(next_pkt_desc->authDstNonceLow,
- PKT_DSC_NONCE_LOW, htonl(op->nonce) & 0xffffff);
-
-
- }
- /* Auth Dest Address must be Cacheline aligned on input */
- if (vector & (XLR_SEC_VECTOR_MAC | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_F9)) {
- pkt_desc->authDstNonceLow |=
- /* NONCE_LOW */
- FIELD_VALUE(PKT_DSC_AUTH_DST_ADDR,
- (uint64_t) vtophys((void *)(unsigned long)op->auth_dest)) |
- FIELD_VALUE(PKT_DSC_CIPH_OFF_HI, 0);
-
-
- if (multi_frag_flag) {
- next_pkt_desc->authDstNonceLow |=
- /* NONCE_LOW */
- FIELD_VALUE(PKT_DSC_AUTH_DST_ADDR,
- (uint64_t) vtophys((void *)(unsigned long)desc->next_auth_dest)) |
- FIELD_VALUE(PKT_DSC_CIPH_OFF_HI, 0);
-
-
- }
- }
- /* CkSum Dest Address must be Cacheline aligned on input */
- if (op->cksum_type == XLR_SEC_CKSUM_TYPE_IP) {
- CLEAR_SET_FIELD(pkt_desc->ckSumDstNonceHiCFBMaskLLWMask,
- PKT_DSC_CKSUM_DST_ADDR,
- (uint64_t) vtophys((void *)(unsigned long)op->cksum_dest));
-
- if (multi_frag_flag) {
- CLEAR_SET_FIELD(next_pkt_desc->ckSumDstNonceHiCFBMaskLLWMask,
- PKT_DSC_CKSUM_DST_ADDR,
- (uint64_t) vtophys((void *)(unsigned long)desc->next_cksum_dest));
-
- }
- }
- /*
- * XLR_SEC_CMD_DIAG (" xlr_sec_setup_packet(): pkt_desc=%llx
- * phys_pkt_desc=%llx \n", (unsigned long long)pkt_desc, (unsigned
- * long long)virt_to_phys(pkt_desc)); (unsigned long long)pkt_desc,
- * (unsigned long long)vtophys(pkt_desc));
- */
- XLR_SEC_CMD_DIAG(" xlr_sec_setup_packet(): pkt_desc=%p phys_pkt_desc=%llx \n",
- pkt_desc, (unsigned long long)vtophys(pkt_desc));
-
-
-
- CLEAR_SET_FIELD(*data, MSG_CMD_DATA_ADDR, ((uint64_t) vtophys(pkt_desc)));
- CLEAR_SET_FIELD(*data, MSG_CMD_DATA_CTL, SEC_EOP);
- CLEAR_SET_FIELD(*data, MSG_CMD_DATA_LEN, MSG_CMD_DATA_LEN_LOAD);
-
-
- XLR_SEC_CMD_DIAG("xlr_sec_setup_packet: DONE\n");
-
-#ifdef RMI_SEC_DEBUG
-
- {
- printf("data desc\n");
- printf("srcLengthIVOffUseIVNext = 0x%llx\n", pkt_desc->srcLengthIVOffUseIVNext);
- printf("dstDataSettings = 0x%llx\n", pkt_desc->dstDataSettings);
- printf("authDstNonceLow = 0x%llx\n", pkt_desc->authDstNonceLow);
- printf("ckSumDstNonceHiCFBMaskLLWMask = 0x%llx\n", pkt_desc->ckSumDstNonceHiCFBMaskLLWMask);
- }
-
- if (multi_frag_flag) {
-
- printf("next data desc\n");
- printf("srcLengthIVOffUseIVNext = 0x%llx\n", next_pkt_desc->srcLengthIVOffUseIVNext);
- printf("dstDataSettings = 0x%llx\n", next_pkt_desc->dstDataSettings);
- printf("authDstNonceLow = 0x%llx\n", next_pkt_desc->authDstNonceLow);
- printf("ckSumDstNonceHiCFBMaskLLWMask = 0x%llx\n", next_pkt_desc->ckSumDstNonceHiCFBMaskLLWMask);
- }
-#endif
-
-#ifdef SYMBOL
- if (op->cipher_type == XLR_SEC_CIPHER_TYPE_ARC4) {
- op->source_buf -= 0;
- op->source_buf_size += 0;
- op->dest_buf -= 0;
- }
-#endif
- return XLR_SEC_ERR_NONE;
-}
-
-
-static int
-identify_symkey_ctl_error(uint32_t code, xlr_sec_error_t err)
-{
- int ret_val = EINVAL;
-
- switch (code) {
- case CTL_ERR_NONE:
- XLR_SEC_CMD_DIAG("XLR_SEC_SEC: CTL Error: No Error\n");
- ret_val = 0;
- break;
- case CTL_ERR_CIPHER_OP:
- XLR_SEC_CMD_DIAG("XLR_SEC_SEC: CTL Error(CTL_ERR_CIPHER_OP) - Unknown Cipher Op \n");
- break;
- case CTL_ERR_MODE:
- XLR_SEC_CMD_DIAG("XLR_SEC_SEC: CTL Error(CTL_ERR_MODE) - "
- "Unknown or Not Allowed Mode \n");
- break;
- case CTL_ERR_CHKSUM_SRC:
- XLR_SEC_CMD_DIAG("XLR_SEC_SEC: CTL Error(CTL_ERR_CHKSUM_SRC) - Unknown CkSum Src\n");
- break;
- case CTL_ERR_CFB_MASK:
- XLR_SEC_CMD_DIAG("XLR_SEC_SEC: CTL Error(CTL_ERR_CFB_MASK) - Forbidden CFB Mask \n");
- break;
- case CTL_ERR_OP:
- XLR_SEC_CMD_DIAG("XLR_SEC_SEC: CTL Error(CTL_ERR_OP) - Unknown Ctrl Op \n");
- break;
- case CTL_ERR_DATA_READ:
- XLR_SEC_CMD_DIAG("XLR_SEC_SEC: CTL Error(CTL_ERR_DATA_READ) - Data Read Error\n");
- break;
- case CTL_ERR_DESC_CTRL:
- XLR_SEC_CMD_DIAG("XLR_SEC_SEC: CTL Error(CTL_ERR_DESC_CTRL) - "
- "Descriptor Ctrl Field Error \n");
- break;
- case CTL_ERR_UNDEF1:
- case CTL_ERR_UNDEF2:
- default:
- XLR_SEC_CMD_DIAG("XLR_SEC_SEC: CTL Error: UNKNOWN CODE=%d \n", code);
- break;
- }
- return ret_val;
-}
-
-static
-int
-identify_symkey_data_error(uint32_t code, xlr_sec_error_t err)
-{
- int ret_val = -EINVAL;
-
- switch (code) {
- case DATA_ERR_NONE:
- XLR_SEC_CMD_DIAG("XLR_SEC_SEC: DATA Error No Error\n");
- ret_val = 0;
- break;
- case DATA_ERR_LEN_CIPHER:
- XLR_SEC_CMD_DIAG("XLR_SEC_SEC: DATA Error() - Not Enough Data To Cipher\n");
- break;
- case DATA_ERR_IV_ADDR:
- XLR_SEC_CMD_DIAG("XLR_SEC_SEC: DATA Error() - Illegal IV Loacation\n");
- break;
- case DATA_ERR_WD_LEN_AES:
- XLR_SEC_CMD_DIAG("XLR_SEC_SEC: DATA Error() - Illegal Nb Words To AES\n");
- break;
- case DATA_ERR_BYTE_COUNT:
- XLR_SEC_CMD_DIAG("XLR_SEC_SEC: DATA Error() - Illegal Pad And ByteCount Spec\n");
- break;
- case DATA_ERR_LEN_CKSUM:
- XLR_SEC_CMD_DIAG("XLR_SEC_SEC: DATA Error() - Not Enough Data To CkSum\n");
- break;
- case DATA_ERR_OP:
- XLR_SEC_CMD_DIAG("XLR_SEC_SEC: DATA Error() - Unknown Data Op \n");
- break;
- case DATA_ERR_READ:
- XLR_SEC_CMD_DIAG("XLR_SEC_SEC: DATA Error() - Data Read Error \n");
- break;
- case DATA_ERR_WRITE:
- XLR_SEC_CMD_DIAG("XLR_SEC_SEC: DATA Error() - Data Write Error \n");
- break;
- case DATA_ERR_UNDEF1:
- default:
- XLR_SEC_CMD_DIAG("XLR_SEC_SEC: DATA Error - UNKNOWN CODE=%d \n", code);
- break;
- }
- return ret_val;
-}
-
-
-static int
-xlr_sec_submit_message(symkey_desc_pt desc, uint32_t cfg_vector)
-{
- xlr_sec_error_t err;
- uint32_t ctl_error, data_error;
- int ret_val = 0;
-
- XLR_SEC_CMD_DIAG("xlr_sec_submit_message: ENTER\n");
-
- err = XLR_SEC_ERR_NONE;
-
- XLR_SEC_CMD_DIAG_SYM_DESC(desc, cfg_vector);
-
- do {
- /* For now, send message and wait for response */
- err = xlr_sec_submit_op(desc);
-
- XLR_SEC_CMD_DIAG("xlr_sec_submit_message: err = %d \n", (uint32_t) err);
-
- if (err != XLR_SEC_ERR_NONE) {
- ret_val = (EINVAL);
- break;
- }
- ctl_error = desc->ctl_result;
- data_error = desc->data_result;
-
- XLR_SEC_CMD_DIAG("xlr_sec_submit_message: ctl_error = %x data_error = %x\n",
- ctl_error, data_error);
-
- if ((ret_val = identify_symkey_ctl_error(ctl_error, err)) == 0)
- ret_val = identify_symkey_data_error(data_error, err);
-
- XLR_SEC_CMD_DIAG("xlr_sec_submit_message: identify error = %d \n", ret_val);
-
- } while (0);
-
- XLR_SEC_CMD_DIAG("xlr_sec_submit_message: DONE\n");
- return (ret_val);
-}
-
-
-static
-xlr_sec_error_t
-xlr_sec_setup_cipher(xlr_sec_io_pt op,
- ControlDescriptor_pt ctl_desc,
- uint32_t * vector)
-{
- uint32_t aes_flag = 0;
- uint32_t cipher_vector = 0;
-
- XLR_SEC_CMD_DIAG("xlr_sec_setup_cipher: ENTER vector = %04x\n", *vector);
-
- switch (op->cipher_type) {
- case XLR_SEC_CIPHER_TYPE_NONE:
- SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_BYPASS);
- XLR_SEC_CMD_DIAG("xlr_sec_setup_cipher: CIPHER_TYPE_NONE EXIT\n");
- return XLR_SEC_ERR_NONE;
- case XLR_SEC_CIPHER_TYPE_DES:
- cipher_vector |= XLR_SEC_VECTOR_CIPHER_DES;
- SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_DES);
- break;
- case XLR_SEC_CIPHER_TYPE_3DES:
- cipher_vector |= XLR_SEC_VECTOR_CIPHER_3DES;
- SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_3DES);
- break;
- case XLR_SEC_CIPHER_TYPE_AES128:
- aes_flag = 1;
- cipher_vector |= XLR_SEC_VECTOR_CIPHER_AES128;
- SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_AES128);
- break;
- case XLR_SEC_CIPHER_TYPE_AES192:
- aes_flag = 1;
- cipher_vector |= XLR_SEC_VECTOR_CIPHER_AES192;
- SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_AES192);
- break;
- case XLR_SEC_CIPHER_TYPE_AES256:
- aes_flag = 1;
- cipher_vector |= XLR_SEC_VECTOR_CIPHER_AES256;
- SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_AES256);
- break;
- case XLR_SEC_CIPHER_TYPE_ARC4:
- cipher_vector |= XLR_SEC_VECTOR_CIPHER_ARC4;
- SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_ARC4);
- SET_FIELD(ctl_desc->instruction, CTL_DSC_ARC4_KEYLEN,
- op->rc4_key_len);
- SET_FIELD(ctl_desc->instruction, CTL_DSC_ARC4_LOADSTATE,
- op->rc4_loadstate);
- SET_FIELD(ctl_desc->instruction, CTL_DSC_ARC4_SAVESTATE,
- op->rc4_savestate);
- if (op->rc4_loadstate || op->rc4_savestate)
- cipher_vector |= XLR_SEC_VECTOR_STATE;
- break;
- case XLR_SEC_CIPHER_TYPE_KASUMI_F8:
- aes_flag = 1;
- cipher_vector |= XLR_SEC_VECTOR_CIPHER_KASUMI_F8;
- SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_KASUMI_F8);
- break;
- default:
- XLR_SEC_CMD_DIAG("xlr_sec_setup_cipher: ERR_CIPHER_TYPE EXIT\n");
- return XLR_SEC_ERR_CIPHER_TYPE;
- }
-
- switch (op->cipher_mode) {
- case XLR_SEC_CIPHER_MODE_ECB:
- if (aes_flag == 1)
- cipher_vector |= XLR_SEC_VECTOR_MODE_ECB_CBC_OFB;
- else
- cipher_vector |= XLR_SEC_VECTOR_MODE_ECB_CBC;
- SET_FIELD(ctl_desc->instruction, CTL_DSC_MODE, CTL_DSC_MODE_ECB);
- break;
- case XLR_SEC_CIPHER_MODE_CBC:
- if (aes_flag == 1)
- cipher_vector |= XLR_SEC_VECTOR_MODE_ECB_CBC_OFB;
- else
- cipher_vector |= XLR_SEC_VECTOR_MODE_ECB_CBC;
- SET_FIELD(ctl_desc->instruction, CTL_DSC_MODE, CTL_DSC_MODE_CBC);
- break;
- case XLR_SEC_CIPHER_MODE_OFB:
- if (aes_flag == 0) {
- XLR_SEC_CMD_DIAG("xlr_sec_setup_cipher: ERR_CIPHER_MODE EXIT\n");
- return XLR_SEC_ERR_CIPHER_MODE;
- }
- cipher_vector |= XLR_SEC_VECTOR_MODE_ECB_CBC_OFB;
- SET_FIELD(ctl_desc->instruction, CTL_DSC_MODE, CTL_DSC_MODE_OFB);
- break;
- case XLR_SEC_CIPHER_MODE_CTR:
- if (aes_flag == 0) {
- XLR_SEC_CMD_DIAG("xlr_sec_setup_cipher: ERR_CIPHER_MODE EXIT\n");
- return XLR_SEC_ERR_CIPHER_MODE;
- }
- cipher_vector |= XLR_SEC_VECTOR_MODE_CTR_CFB;
- SET_FIELD(ctl_desc->instruction, CTL_DSC_MODE, CTL_DSC_MODE_CTR);
- break;
- case XLR_SEC_CIPHER_MODE_CFB:
- if (aes_flag == 0) {
- XLR_SEC_CMD_DIAG("xlr_sec_setup_cipher: ERR_CIPHER_MODE EXIT\n");
- return XLR_SEC_ERR_CIPHER_MODE;
- }
- cipher_vector |= XLR_SEC_VECTOR_MODE_CTR_CFB;
- SET_FIELD(ctl_desc->instruction, CTL_DSC_MODE, CTL_DSC_MODE_CFB);
- break;
- case XLR_SEC_CIPHER_MODE_F8:
- if (aes_flag == 0) {
- XLR_SEC_CMD_DIAG("xlr_sec_setup_cipher: ERR_CIPHER_MODE EXIT\n");
- return XLR_SEC_ERR_CIPHER_MODE;
- }
- cipher_vector |= XLR_SEC_VECTOR_MODE_F8;
- SET_FIELD(ctl_desc->instruction, CTL_DSC_MODE, CTL_DSC_MODE_F8);
- break;
- default:
- if (!(cipher_vector & (XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_CIPHER_KASUMI_F8))) {
- XLR_SEC_CMD_DIAG("xlr_sec_setup_cipher: ERR_CIPHER_MODE EXIT\n");
- return XLR_SEC_ERR_CIPHER_MODE;
- }
- }
-
- switch (op->cipher_init) {
- case XLR_SEC_CIPHER_INIT_OK:
- SET_FIELD(ctl_desc->instruction,
- CTL_DSC_ICPHR, CTL_DSC_ICPHR_OKY);
- break;
-
- case XLR_SEC_CIPHER_INIT_NK:
- SET_FIELD(ctl_desc->instruction,
- CTL_DSC_ICPHR, CTL_DSC_ICPHR_NKY);
- break;
- default:
- XLR_SEC_CMD_DIAG("xlr_sec_setup_cipher: ERR_CIPHER_INIT EXIT\n");
- return XLR_SEC_ERR_CIPHER_INIT;
- }
-
- *vector |= cipher_vector;
-
- XLR_SEC_CMD_DIAG("xlr_sec_setup_cipher: EXIT vector = %04x\n", *vector);
-
- return XLR_SEC_ERR_NONE;
-}
-
-
-static
-xlr_sec_error_t
-xlr_sec_setup_digest(xlr_sec_io_pt op,
- ControlDescriptor_pt ctl_desc,
- uint32_t * vector)
-{
- uint32_t hash_flag = 0;
- uint32_t hmac_flag = 0;
- uint32_t digest_vector = 0;
-
- XLR_SEC_CMD_DIAG("xlr_sec_setup_digest: ENTER vector = %04x\n", *vector);
-
- switch (op->digest_type) {
- case XLR_SEC_DIGEST_TYPE_MD5:
- digest_vector |= XLR_SEC_VECTOR_MAC;
- SET_FIELD(ctl_desc->instruction, CTL_DSC_HASH, CTL_DSC_HASH_MD5);
- break;
- case XLR_SEC_DIGEST_TYPE_SHA1:
- digest_vector |= XLR_SEC_VECTOR_MAC;
- SET_FIELD(ctl_desc->instruction, CTL_DSC_HASH, CTL_DSC_HASH_SHA1);
- break;
- case XLR_SEC_DIGEST_TYPE_SHA256:
- digest_vector |= XLR_SEC_VECTOR_MAC;
- SET_FIELD(ctl_desc->instruction, CTL_DSC_HASH, CTL_DSC_HASH_SHA256);
- break;
- case XLR_SEC_DIGEST_TYPE_SHA384:
- digest_vector |= XLR_SEC_VECTOR_MAC;
- SET_FIELD(ctl_desc->instruction, CTL_DSC_HASHHI, CTL_DSC_HASH_SHA384 >> 2);
- SET_FIELD(ctl_desc->instruction, CTL_DSC_HASH, CTL_DSC_HASH_SHA384);
- break;
- case XLR_SEC_DIGEST_TYPE_SHA512:
- digest_vector |= XLR_SEC_VECTOR_MAC;
- SET_FIELD(ctl_desc->instruction, CTL_DSC_HASHHI, CTL_DSC_HASH_SHA512 >> 2);
- SET_FIELD(ctl_desc->instruction, CTL_DSC_HASH, CTL_DSC_HASH_SHA512);
- break;
- case XLR_SEC_DIGEST_TYPE_GCM:
- hash_flag = 1;
- digest_vector |= XLR_SEC_VECTOR_GCM;
- SET_FIELD(ctl_desc->instruction, CTL_DSC_HASHHI, CTL_DSC_HASH_GCM >> 2);
- SET_FIELD(ctl_desc->instruction, CTL_DSC_HASH, CTL_DSC_HASH_GCM);
- break;
- case XLR_SEC_DIGEST_TYPE_KASUMI_F9:
- hash_flag = 1;
- digest_vector |= XLR_SEC_VECTOR_F9;
- SET_FIELD(ctl_desc->instruction, CTL_DSC_HASHHI, CTL_DSC_HASH_KASUMI_F9 >> 2);
- SET_FIELD(ctl_desc->instruction, CTL_DSC_HASH, CTL_DSC_HASH_KASUMI_F9);
- break;
- case XLR_SEC_DIGEST_TYPE_HMAC_MD5:
- hmac_flag = 1;
- digest_vector |= XLR_SEC_VECTOR_HMAC;
- SET_FIELD(ctl_desc->instruction, CTL_DSC_HASH, CTL_DSC_HASH_MD5);
- break;
- case XLR_SEC_DIGEST_TYPE_HMAC_SHA1:
- hmac_flag = 1;
- digest_vector |= XLR_SEC_VECTOR_HMAC;
- SET_FIELD(ctl_desc->instruction, CTL_DSC_HASH, CTL_DSC_HASH_SHA1);
- break;
- case XLR_SEC_DIGEST_TYPE_HMAC_SHA256:
- hmac_flag = 1;
- digest_vector |= XLR_SEC_VECTOR_HMAC;
- SET_FIELD(ctl_desc->instruction, CTL_DSC_HASH, CTL_DSC_HASH_SHA256);
- break;
- case XLR_SEC_DIGEST_TYPE_HMAC_SHA384:
- hmac_flag = 1;
- digest_vector |= XLR_SEC_VECTOR_HMAC2;
- SET_FIELD(ctl_desc->instruction, CTL_DSC_HASHHI, CTL_DSC_HASH_SHA384 >> 2);
- SET_FIELD(ctl_desc->instruction, CTL_DSC_HASH, CTL_DSC_HASH_SHA384);
- break;
- case XLR_SEC_DIGEST_TYPE_HMAC_SHA512:
- hmac_flag = 1;
- digest_vector |= XLR_SEC_VECTOR_HMAC2;
- SET_FIELD(ctl_desc->instruction, CTL_DSC_HASHHI, CTL_DSC_HASH_SHA512 >> 2);
- SET_FIELD(ctl_desc->instruction, CTL_DSC_HASH, CTL_DSC_HASH_SHA512);
- break;
- default:
- return XLR_SEC_ERR_DIGEST_TYPE;
- }
-
- if (hmac_flag == 1) {
- SET_FIELD(ctl_desc->instruction, CTL_DSC_HMAC, CTL_DSC_HMAC_ON);
-
- }
- if (hmac_flag || hash_flag) {
- switch (op->digest_init) {
- case XLR_SEC_DIGEST_INIT_OLDKEY:
- SET_FIELD(ctl_desc->instruction, CTL_DSC_IHASH, CTL_DSC_IHASH_OLD);
- break;
- case XLR_SEC_DIGEST_INIT_NEWKEY:
- SET_FIELD(ctl_desc->instruction, CTL_DSC_IHASH, CTL_DSC_IHASH_NEW);
- break;
- default:
- return XLR_SEC_ERR_DIGEST_INIT;
- }
- } /* hmac_flag */
- *vector |= digest_vector;
-
- XLR_SEC_CMD_DIAG("xlr_sec_setup_digest: EXIT vector = %04x\n", *vector);
-
- return XLR_SEC_ERR_NONE;
-}
-
-static
-xlr_sec_error_t
-xlr_sec_setup_cksum(xlr_sec_io_pt op,
- ControlDescriptor_pt ctl_desc)
-{
- switch (op->cksum_type) {
- case XLR_SEC_CKSUM_TYPE_NOP:
- SET_FIELD(ctl_desc->instruction, CTL_DSC_CKSUM, CTL_DSC_CKSUM_NOP);
- return XLR_SEC_ERR_NONE;
- case XLR_SEC_CKSUM_TYPE_IP:
- SET_FIELD(ctl_desc->instruction, CTL_DSC_CKSUM, CTL_DSC_CKSUM_IP);
- break;
- default:
- return XLR_SEC_ERR_CKSUM_TYPE;
- }
-
- return XLR_SEC_ERR_NONE;
-}
-
-
-static
-xlr_sec_error_t
-xlr_sec_control_setup(xlr_sec_io_pt op,
- unsigned int flags,
- uint64_t * control,
- ControlDescriptor_pt ctl_desc,
- xlr_sec_drv_user_t * user,
- uint32_t vector)
-{
- uint64_t *hmac_key = NULL;
- uint64_t *cipher_key = NULL;
- uint64_t *cipher_state = NULL;
- uint32_t ctl_size = 0;
- uint64_t ctl_addr = 0;
- uint32_t cipher_keylen = 0;
- uint32_t hmac_keylen = 0;
- uint32_t ctl_len;
-
-#ifdef SYM_DEBUG
- XLR_SEC_CMD_DIAG(" ENTER vector = %04x\n", vector);
-#endif
-
-
- switch (vector) {
- case XLR_SEC_VECTOR_MAC:
- XLR_SEC_CMD_DIAG(" XLR_SEC_VECTOR_MAC \n");
- ctl_size = sizeof(HMAC_t);
- break;
- case XLR_SEC_VECTOR_HMAC:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_HMAC \n");
- hmac_key = &ctl_desc->cipherHashInfo.infoHMAC.hmacKey0;
- hmac_keylen = sizeof(HMAC_t);
- ctl_size = sizeof(HMAC_t);
- break;
- case XLR_SEC_VECTOR_CIPHER_ARC4:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_ARC4\n");
- cipher_key = &ctl_desc->cipherHashInfo.infoARC4.cipherKey0;
- cipher_keylen = op->rc4_key_len;
- ctl_size = sizeof(ARC4_t);
- break;
- case XLR_SEC_VECTOR_CIPHER_ARC4__HMAC:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_ARC4__HMAC\n");
- cipher_key = &ctl_desc->cipherHashInfo.infoARC4HMAC.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoARC4HMAC.hmacKey0;
- cipher_keylen = op->rc4_key_len;
- hmac_keylen = sizeof(HMAC_t);
- ctl_size = sizeof(ARC4HMAC_t);
- break;
- case XLR_SEC_VECTOR_CIPHER_ARC4__STATE:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_ARC4__STATE\n");
- cipher_key = &ctl_desc->cipherHashInfo.infoARC4State.cipherKey0;
- cipher_state =
- &ctl_desc->cipherHashInfo.infoARC4State.Arc4SboxData0;
- cipher_keylen = op->rc4_key_len;
- ctl_size = sizeof(ARC4State_t);
- break;
- case XLR_SEC_VECTOR_CIPHER_ARC4__HMAC__STATE:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_ARC4__HMAC__STATE\n");
- cipher_key = &ctl_desc->cipherHashInfo.infoARC4StateHMAC.cipherKey0;
- cipher_state =
- &ctl_desc->cipherHashInfo.infoARC4StateHMAC.Arc4SboxData0;
- hmac_key = &ctl_desc->cipherHashInfo.infoARC4StateHMAC.hmacKey0;
- cipher_keylen = op->rc4_key_len;
- hmac_keylen = sizeof(HMAC_t);
- ctl_size = sizeof(ARC4StateHMAC_t);
- break;
- case XLR_SEC_VECTOR_CIPHER_KASUMI_F8:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_KASUMI_F8\n");
- cipher_key = &ctl_desc->cipherHashInfo.infoKASUMIF8.cipherKey0;
- cipher_keylen = XLR_SEC_KASUMI_F8_KEY_LENGTH;
- ctl_size = sizeof(KASUMIF8_t);
- break;
- case XLR_SEC_VECTOR_CIPHER_KASUMI_F8__HMAC:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_KASUMI_F8__HMAC\n");
- cipher_key = &ctl_desc->cipherHashInfo.infoKASUMIF8HMAC.cipherKey0;
- cipher_keylen = XLR_SEC_KASUMI_F8_KEY_LENGTH;
- hmac_key = &ctl_desc->cipherHashInfo.infoKASUMIF8HMAC.hmacKey0;
- hmac_keylen = sizeof(HMAC_t);
- ctl_size = sizeof(KASUMIF8HMAC_t);
- break;
- case XLR_SEC_VECTOR_CIPHER_KASUMI_F8__HMAC2:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_KASUMI_F8__HMAC2\n");
- cipher_key = &ctl_desc->cipherHashInfo.infoKASUMIF8HMAC2.cipherKey0;
- cipher_keylen = XLR_SEC_KASUMI_F8_KEY_LENGTH;
- hmac_key = &ctl_desc->cipherHashInfo.infoKASUMIF8HMAC2.hmacKey0;
- hmac_keylen = sizeof(HMAC2_t);
- ctl_size = sizeof(KASUMIF8HMAC2_t);
- break;
- case XLR_SEC_VECTOR_CIPHER_KASUMI_F8__GCM:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_KASUMI_F8__GCM\n");
- cipher_key = &ctl_desc->cipherHashInfo.infoKASUMIF8GCM.cipherKey0;
- cipher_keylen = XLR_SEC_KASUMI_F8_KEY_LENGTH;
- hmac_key = &ctl_desc->cipherHashInfo.infoKASUMIF8GCM.GCMH0;
- hmac_keylen = sizeof(GCM_t);
- ctl_size = sizeof(KASUMIF8GCM_t);
- break;
- case XLR_SEC_VECTOR_CIPHER_KASUMI_F8__F9:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_KASUMI_F8__F9\n");
- cipher_key = &ctl_desc->cipherHashInfo.infoKASUMIF8F9.cipherKey0;
- cipher_keylen = XLR_SEC_KASUMI_F8_KEY_LENGTH;
- hmac_key = &ctl_desc->cipherHashInfo.infoKASUMIF8F9.authKey0;
- hmac_keylen = sizeof(F9_t);
- ctl_size = sizeof(KASUMIF8F9_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_DES__HMAC__MODE_ECB_CBC:
- XLR_SEC_CMD_DIAG(" XLR_SEC_VECTOR__CIPHER_DES__HMAC__MODE_ECB_CBC \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoDESHMAC.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoDESHMAC.hmacKey0;
- hmac_keylen = sizeof(HMAC_t);
- cipher_keylen = XLR_SEC_DES_KEY_LENGTH;
- ctl_size = sizeof(DESHMAC_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_DES__MODE_ECB_CBC:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_DES__MODE_ECB_CBC \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoDES.cipherKey0;
- cipher_keylen = XLR_SEC_DES_KEY_LENGTH;
- ctl_size = sizeof(DES_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_3DES__HMAC__MODE_ECB_CBC:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_3DES__HMAC__MODE_ECB_CBC \n");
- cipher_key = &ctl_desc->cipherHashInfo.info3DESHMAC.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.info3DESHMAC.hmacKey0;
- cipher_keylen = XLR_SEC_3DES_KEY_LENGTH;
- hmac_keylen = sizeof(HMAC_t);
- ctl_size = sizeof(DES3HMAC_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_3DES__MODE_ECB_CBC:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_3DES__MODE_ECB_CBC \n");
- cipher_key = &ctl_desc->cipherHashInfo.info3DES.cipherKey0;
- cipher_keylen = XLR_SEC_3DES_KEY_LENGTH;
- ctl_size = sizeof(DES3_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_CTR_CFB:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_CTR_CFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES128HMAC.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES128HMAC.hmacKey0;
- cipher_keylen = XLR_SEC_AES128_KEY_LENGTH;
- hmac_keylen = sizeof(HMAC_t);
- ctl_size = sizeof(AES128HMAC_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__MODE_CTR_CFB:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES128__MODE_CTR_CFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES128.cipherKey0;
- cipher_keylen = XLR_SEC_AES128_KEY_LENGTH;
- ctl_size = sizeof(AES128_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_ECB_CBC_OFB:
- XLR_SEC_CMD_DIAG(" XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_ECB_CBC_OFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES128HMAC.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES128HMAC.hmacKey0;
- cipher_keylen = XLR_SEC_AES128_KEY_LENGTH;
- hmac_keylen = sizeof(HMAC_t);
- ctl_size = sizeof(AES128HMAC_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__MODE_ECB_CBC_OFB:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES128__MODE_ECB_CBC_OFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES128.cipherKey0;
- cipher_keylen = XLR_SEC_AES128_KEY_LENGTH;
- ctl_size = sizeof(AES128_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_F8:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_F8 \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES128F8HMAC.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES128F8HMAC.hmacKey0;
- cipher_keylen = XLR_SEC_AES128F8_KEY_LENGTH;
- hmac_keylen = sizeof(HMAC_t);
- ctl_size = sizeof(AES128F8HMAC_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__MODE_F8:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES128__MODE_F8 \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES128F8.cipherKey0;
- cipher_keylen = XLR_SEC_AES128F8_KEY_LENGTH;
- ctl_size = sizeof(AES128F8_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_CTR_CFB:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_CTR_CFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES192HMAC.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES192HMAC.hmacKey0;
- cipher_keylen = XLR_SEC_AES192_KEY_LENGTH;
- hmac_keylen = sizeof(HMAC_t);
- ctl_size = sizeof(AES192HMAC_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__MODE_CTR_CFB:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__MODE_CTR_CFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES192.cipherKey0;
- cipher_keylen = XLR_SEC_AES192_KEY_LENGTH;
- ctl_size = sizeof(AES192_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_ECB_CBC_OFB:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_ECB_CBC_OFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES192HMAC.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES192HMAC.hmacKey0;
- cipher_keylen = XLR_SEC_AES192_KEY_LENGTH;
- hmac_keylen = sizeof(HMAC_t);
- ctl_size = sizeof(AES192HMAC_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__MODE_ECB_CBC_OFB:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__MODE_ECB_CBC_OFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES192.cipherKey0;
- cipher_keylen = XLR_SEC_AES192_KEY_LENGTH;
- ctl_size = sizeof(AES192_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_F8:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_F8 \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES192F8HMAC.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES192F8HMAC.hmacKey0;
- cipher_keylen = XLR_SEC_AES192F8_KEY_LENGTH;
- hmac_keylen = sizeof(HMAC_t);
- ctl_size = sizeof(AES192F8HMAC_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__MODE_F8:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__MODE_F8 \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES192F8.cipherKey0;
- cipher_keylen = XLR_SEC_AES192F8_KEY_LENGTH;
- ctl_size = sizeof(AES192F8_t);
- break;
-
- case XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_CTR_CFB:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_CTR_CFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES256HMAC.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES256HMAC.hmacKey0;
- cipher_keylen = XLR_SEC_AES256_KEY_LENGTH;
- hmac_keylen = sizeof(HMAC_t);
- ctl_size = sizeof(AES256HMAC_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES256__MODE_CTR_CFB:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__MODE_CTR_CFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES256.cipherKey0;
- cipher_keylen = XLR_SEC_AES256_KEY_LENGTH;
- ctl_size = sizeof(AES256_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_ECB_CBC_OFB:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_ECB_CBC_OFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES256HMAC.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES256HMAC.hmacKey0;
- cipher_keylen = XLR_SEC_AES256_KEY_LENGTH;
- hmac_keylen = sizeof(HMAC_t);
- ctl_size = sizeof(AES256HMAC_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES256__MODE_ECB_CBC_OFB:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__MODE_ECB_CBC_OFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES256.cipherKey0;
- cipher_keylen = XLR_SEC_AES256_KEY_LENGTH;
- ctl_size = sizeof(AES256_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_F8:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_F8 \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES256F8HMAC.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES256F8HMAC.hmacKey0;
- cipher_keylen = XLR_SEC_AES256F8_KEY_LENGTH;
- hmac_keylen = sizeof(HMAC_t);
- ctl_size = sizeof(AES256F8HMAC_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES256__MODE_F8:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__MODE_F8 \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES256F8.cipherKey0;
- cipher_keylen = XLR_SEC_AES256F8_KEY_LENGTH;
- ctl_size = sizeof(AES256F8_t);
- break;
- case XLR_SEC_VECTOR_HMAC2:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_HMAC2 \n");
- hmac_key = &ctl_desc->cipherHashInfo.infoHMAC2.hmacKey0;
- hmac_keylen = sizeof(HMAC2_t);
- ctl_size = sizeof(HMAC2_t);
- break;
- case XLR_SEC_VECTOR_CIPHER_ARC4__HMAC2:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_ARC4__HMAC2\n");
- cipher_key = &ctl_desc->cipherHashInfo.infoARC4HMAC2.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoARC4HMAC2.hmacKey0;
- cipher_keylen = op->rc4_key_len;
- hmac_keylen = sizeof(HMAC2_t);
- ctl_size = sizeof(ARC4HMAC2_t);
- break;
- case XLR_SEC_VECTOR_CIPHER_ARC4__HMAC2__STATE:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_ARC4__HMAC2__STATE\n");
- cipher_key = &ctl_desc->cipherHashInfo.infoARC4StateHMAC2.cipherKey0;
- cipher_state =
- &ctl_desc->cipherHashInfo.infoARC4StateHMAC2.Arc4SboxData0;
- hmac_key = &ctl_desc->cipherHashInfo.infoARC4StateHMAC2.hmacKey0;
- cipher_keylen = op->rc4_key_len;
- hmac_keylen = sizeof(HMAC2_t);
- ctl_size = sizeof(ARC4StateHMAC2_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_DES__HMAC2__MODE_ECB_CBC:
- XLR_SEC_CMD_DIAG(" XLR_SEC_VECTOR__CIPHER_DES__HMAC2__MODE_ECB_CBC \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoDESHMAC2.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoDESHMAC2.hmacKey0;
- hmac_keylen = sizeof(HMAC2_t);
- cipher_keylen = XLR_SEC_DES_KEY_LENGTH;
- ctl_size = sizeof(DESHMAC2_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_3DES__HMAC2__MODE_ECB_CBC:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_3DES__HMAC2__MODE_ECB_CBC \n");
- cipher_key = &ctl_desc->cipherHashInfo.info3DESHMAC2.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.info3DESHMAC2.hmacKey0;
- cipher_keylen = XLR_SEC_3DES_KEY_LENGTH;
- hmac_keylen = sizeof(HMAC2_t);
- ctl_size = sizeof(DES3HMAC2_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_CTR_CFB:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_CTR_CFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES128HMAC2.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES128HMAC2.hmacKey0;
- cipher_keylen = XLR_SEC_AES128_KEY_LENGTH;
- hmac_keylen = sizeof(HMAC2_t);
- ctl_size = sizeof(AES128HMAC2_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_ECB_CBC_OFB:
- XLR_SEC_CMD_DIAG(" XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_ECB_CBC_OFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES128HMAC2.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES128HMAC2.hmacKey0;
- cipher_keylen = XLR_SEC_AES128_KEY_LENGTH;
- hmac_keylen = sizeof(HMAC2_t);
- ctl_size = sizeof(AES128HMAC2_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_F8:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_F8 \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES128F8HMAC2.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES128F8HMAC2.hmacKey0;
- cipher_keylen = XLR_SEC_AES128F8_KEY_LENGTH;
- hmac_keylen = sizeof(HMAC2_t);
- ctl_size = sizeof(AES128F8HMAC2_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_CTR_CFB:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_CTR_CFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES192HMAC2.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES192HMAC2.hmacKey0;
- cipher_keylen = XLR_SEC_AES192_KEY_LENGTH;
- hmac_keylen = sizeof(HMAC2_t);
- ctl_size = sizeof(AES192HMAC2_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_ECB_CBC_OFB:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_ECB_CBC_OFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES192HMAC2.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES192HMAC2.hmacKey0;
- cipher_keylen = XLR_SEC_AES192_KEY_LENGTH;
- hmac_keylen = sizeof(HMAC2_t);
- ctl_size = sizeof(AES192HMAC2_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_F8:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_F8 \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES192F8HMAC2.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES192F8HMAC2.hmacKey0;
- cipher_keylen = XLR_SEC_AES192F8_KEY_LENGTH;
- hmac_keylen = sizeof(HMAC2_t);
- ctl_size = sizeof(AES192F8HMAC2_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_CTR_CFB:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_CTR_CFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES256HMAC2.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES256HMAC2.hmacKey0;
- cipher_keylen = XLR_SEC_AES256_KEY_LENGTH;
- hmac_keylen = sizeof(HMAC2_t);
- ctl_size = sizeof(AES256HMAC2_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_ECB_CBC_OFB:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_ECB_CBC_OFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES256HMAC2.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES256HMAC2.hmacKey0;
- cipher_keylen = XLR_SEC_AES256_KEY_LENGTH;
- hmac_keylen = sizeof(HMAC2_t);
- ctl_size = sizeof(AES256HMAC2_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_F8:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_F8 \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES256F8HMAC2.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES256F8HMAC2.hmacKey0;
- cipher_keylen = XLR_SEC_AES256F8_KEY_LENGTH;
- hmac_keylen = sizeof(HMAC2_t);
- ctl_size = sizeof(AES256F8HMAC2_t);
- break;
- case XLR_SEC_VECTOR_GCM:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_GCM \n");
- hmac_key = &ctl_desc->cipherHashInfo.infoGCM.GCMH0;
- hmac_keylen = sizeof(GCM_t);
- ctl_size = sizeof(GCM_t);
- break;
- case XLR_SEC_VECTOR_CIPHER_ARC4__GCM:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_ARC4__GCM\n");
- cipher_key = &ctl_desc->cipherHashInfo.infoARC4GCM.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoARC4GCM.GCMH0;
- cipher_keylen = op->rc4_key_len;
- hmac_keylen = sizeof(GCM_t);
- ctl_size = sizeof(ARC4GCM_t);
- break;
- case XLR_SEC_VECTOR_CIPHER_ARC4__GCM__STATE:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_ARC4__GCM__STATE\n");
- cipher_key = &ctl_desc->cipherHashInfo.infoARC4StateGCM.cipherKey0;
- cipher_state =
- &ctl_desc->cipherHashInfo.infoARC4StateGCM.Arc4SboxData0;
- hmac_key = &ctl_desc->cipherHashInfo.infoARC4StateGCM.GCMH0;
- cipher_keylen = op->rc4_key_len;
- hmac_keylen = sizeof(GCM_t);
- ctl_size = sizeof(ARC4StateGCM_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_DES__GCM__MODE_ECB_CBC:
- XLR_SEC_CMD_DIAG(" XLR_SEC_VECTOR__CIPHER_DES__GCM__MODE_ECB_CBC \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoDESGCM.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoDESGCM.GCMH0;
- hmac_keylen = sizeof(GCM_t);
- cipher_keylen = XLR_SEC_DES_KEY_LENGTH;
- ctl_size = sizeof(DESGCM_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_3DES__GCM__MODE_ECB_CBC:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_3DES__GCM__MODE_ECB_CBC \n");
- cipher_key = &ctl_desc->cipherHashInfo.info3DESGCM.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.info3DESGCM.GCMH0;
- cipher_keylen = XLR_SEC_3DES_KEY_LENGTH;
- hmac_keylen = sizeof(GCM_t);
- ctl_size = sizeof(DES3GCM_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_CTR_CFB:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_CTR_CFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES128GCM.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES128GCM.GCMH0;
- cipher_keylen = XLR_SEC_AES128_KEY_LENGTH;
- hmac_keylen = sizeof(GCM_t);
- ctl_size = sizeof(AES128GCM_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_ECB_CBC_OFB:
- XLR_SEC_CMD_DIAG(" XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_ECB_CBC_OFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES128GCM.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES128GCM.GCMH0;
- cipher_keylen = XLR_SEC_AES128_KEY_LENGTH;
- hmac_keylen = sizeof(GCM_t);
- ctl_size = sizeof(AES128GCM_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_F8:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_F8 \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES128F8GCM.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES128F8GCM.GCMH0;
- cipher_keylen = XLR_SEC_AES128F8_KEY_LENGTH;
- hmac_keylen = sizeof(GCM_t);
- ctl_size = sizeof(AES128F8GCM_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_CTR_CFB:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_CTR_CFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES192GCM.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES192GCM.GCMH0;
- cipher_keylen = XLR_SEC_AES192_KEY_LENGTH;
- hmac_keylen = sizeof(GCM_t);
- ctl_size = sizeof(AES192GCM_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_ECB_CBC_OFB:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_ECB_CBC_OFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES192GCM.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES192GCM.GCMH0;
- cipher_keylen = XLR_SEC_AES192_KEY_LENGTH;
- hmac_keylen = sizeof(GCM_t);
- ctl_size = sizeof(AES192GCM_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_F8:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_F8 \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES192F8GCM.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES192F8GCM.GCMH0;
- cipher_keylen = XLR_SEC_AES192F8_KEY_LENGTH;
- hmac_keylen = sizeof(GCM_t);
- ctl_size = sizeof(AES192F8GCM_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_CTR_CFB:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_CTR_CFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES256GCM.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES256GCM.GCMH0;
- cipher_keylen = XLR_SEC_AES256_KEY_LENGTH;
- hmac_keylen = sizeof(GCM_t);
- ctl_size = sizeof(AES256GCM_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_ECB_CBC_OFB:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_ECB_CBC_OFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES256GCM.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES256GCM.GCMH0;
- cipher_keylen = XLR_SEC_AES256_KEY_LENGTH;
- hmac_keylen = sizeof(GCM_t);
- ctl_size = sizeof(AES256GCM_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_F8:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_F8 \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES256F8GCM.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES256F8GCM.GCMH0;
- cipher_keylen = XLR_SEC_AES256F8_KEY_LENGTH;
- hmac_keylen = sizeof(GCM_t);
- ctl_size = sizeof(AES256F8GCM_t);
- break;
- case XLR_SEC_VECTOR_F9:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_F9 \n");
- hmac_key = &ctl_desc->cipherHashInfo.infoF9.authKey0;
- hmac_keylen = sizeof(F9_t);
- ctl_size = sizeof(F9_t);
- break;
- case XLR_SEC_VECTOR_CIPHER_ARC4__F9:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_ARC4__F9\n");
- cipher_key = &ctl_desc->cipherHashInfo.infoARC4F9.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoARC4F9.authKey0;
- cipher_keylen = op->rc4_key_len;
- hmac_keylen = sizeof(F9_t);
- ctl_size = sizeof(ARC4F9_t);
- break;
- case XLR_SEC_VECTOR_CIPHER_ARC4__F9__STATE:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR_CIPHER_ARC4__F9__STATE\n");
- cipher_key = &ctl_desc->cipherHashInfo.infoARC4StateF9.cipherKey0;
- cipher_state =
- &ctl_desc->cipherHashInfo.infoARC4StateF9.Arc4SboxData0;
- hmac_key = &ctl_desc->cipherHashInfo.infoARC4StateF9.authKey0;
- cipher_keylen = op->rc4_key_len;
- hmac_keylen = sizeof(F9_t);
- ctl_size = sizeof(ARC4StateF9_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_DES__F9__MODE_ECB_CBC:
- XLR_SEC_CMD_DIAG(" XLR_SEC_VECTOR__CIPHER_DES__F9__MODE_ECB_CBC \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoDESF9.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoDESF9.authKey0;
- hmac_keylen = sizeof(F9_t);
- cipher_keylen = XLR_SEC_DES_KEY_LENGTH;
- ctl_size = sizeof(DESF9_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_3DES__F9__MODE_ECB_CBC:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_3DES__F9__MODE_ECB_CBC \n");
- cipher_key = &ctl_desc->cipherHashInfo.info3DESF9.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.info3DESF9.authKey0;
- cipher_keylen = XLR_SEC_3DES_KEY_LENGTH;
- hmac_keylen = sizeof(F9_t);
- ctl_size = sizeof(DES3F9_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_CTR_CFB:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_CTR_CFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES128F9.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES128F9.authKey0;
- cipher_keylen = XLR_SEC_AES128_KEY_LENGTH;
- hmac_keylen = sizeof(F9_t);
- ctl_size = sizeof(AES128F9_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_ECB_CBC_OFB:
- XLR_SEC_CMD_DIAG(" XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_ECB_CBC_OFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES128F9.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES128F9.authKey0;
- cipher_keylen = XLR_SEC_AES128_KEY_LENGTH;
- hmac_keylen = sizeof(F9_t);
- ctl_size = sizeof(AES128F9_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_F8:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_F8 \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES128F8F9.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES128F8F9.authKey0;
- cipher_keylen = XLR_SEC_AES128F8_KEY_LENGTH;
- hmac_keylen = sizeof(F9_t);
- ctl_size = sizeof(AES128F8F9_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_CTR_CFB:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_CTR_CFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES192F9.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES192F9.authKey0;
- cipher_keylen = XLR_SEC_AES192_KEY_LENGTH;
- hmac_keylen = sizeof(F9_t);
- ctl_size = sizeof(AES192F9_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_ECB_CBC_OFB:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_ECB_CBC_OFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES192F9.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES192F9.authKey0;
- cipher_keylen = XLR_SEC_AES192_KEY_LENGTH;
- hmac_keylen = sizeof(F9_t);
- ctl_size = sizeof(AES192F9_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_F8:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_F8 \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES192F8F9.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES192F8F9.authKey0;
- cipher_keylen = XLR_SEC_AES192F8_KEY_LENGTH;
- hmac_keylen = sizeof(F9_t);
- ctl_size = sizeof(AES192F8F9_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_CTR_CFB:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_CTR_CFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES256F9.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES256F9.authKey0;
- cipher_keylen = XLR_SEC_AES256_KEY_LENGTH;
- hmac_keylen = sizeof(F9_t);
- ctl_size = sizeof(AES256F9_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_ECB_CBC_OFB:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_ECB_CBC_OFB \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES256F9.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES256F9.authKey0;
- cipher_keylen = XLR_SEC_AES256_KEY_LENGTH;
- hmac_keylen = sizeof(F9_t);
- ctl_size = sizeof(AES256F9_t);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_F8:
- XLR_SEC_CMD_DIAG("XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_F8 \n");
- cipher_key = &ctl_desc->cipherHashInfo.infoAES256F8F9.cipherKey0;
- hmac_key = &ctl_desc->cipherHashInfo.infoAES256F8F9.authKey0;
- cipher_keylen = XLR_SEC_AES256F8_KEY_LENGTH;
- hmac_keylen = sizeof(F9_t);
- ctl_size = sizeof(AES256F8F9_t);
- break;
-
- default:
- XLR_SEC_CMD_DIAG("default \n");
- return XLR_SEC_ERR_CONTROL_VECTOR;
- }
-
- if ((cipher_key != NULL) && !(flags & XLR_SEC_SETUP_OP_PRESERVE_CIPHER_KEY))
- memcpy(cipher_key, &op->crypt_key[0], cipher_keylen);
-
- if ((hmac_key != NULL) && !(flags & XLR_SEC_SETUP_OP_PRESERVE_HMAC_KEY))
- memcpy(hmac_key, &op->mac_key[0], hmac_keylen);
- if (cipher_state) {
- if (op->rc4_loadstate)
- memcpy(cipher_state, (void *)(unsigned long)op->rc4_state,
- XLR_SEC_MAX_RC4_STATE_SIZE);
- if (op->rc4_savestate)
- user->aligned_state = (char *)cipher_state;
- }
- if (flags & XLR_SEC_SETUP_OP_FLIP_3DES_KEY) {
- uint64_t temp;
-
- temp = ctl_desc->cipherHashInfo.info3DES.cipherKey0;
- ctl_desc->cipherHashInfo.info3DES.cipherKey0 =
- ctl_desc->cipherHashInfo.info3DES.cipherKey2;
- ctl_desc->cipherHashInfo.info3DES.cipherKey2 = temp;
- }
- /*
- * Control length is the number of control cachelines to be read so
- * user needs to round up the control length to closest integer
- * multiple of 32 bytes.
- */
- ctl_size += sizeof(ctl_desc->instruction);
- ctl_len = NUM_CHUNKS(ctl_size, 5);
- XLR_SEC_CMD_DIAG("ctl_size in bytes: %u, in cachelines: %u\n", ctl_size, ctl_len);
- CLEAR_SET_FIELD(*control, MSG_CMD_CTL_LEN, ctl_len);
-
- ctl_addr = (uint64_t) vtophys(ctl_desc);
- CLEAR_SET_FIELD(*control, MSG_CMD_CTL_ADDR, ctl_addr);
-
- XLR_SEC_CMD_DIAG(" xlr_sec_control_setup(): ctl_desc=%p ctl_addr=%llx \n",
- ctl_desc, (unsigned long long)ctl_addr);
-
- CLEAR_SET_FIELD(*control, MSG_CMD_CTL_CTL, SEC_SOP);
-
- return XLR_SEC_ERR_NONE;
-}
-
-
-xlr_sec_error_t
-xlr_sec_submit_op(symkey_desc_pt desc)
-{
- struct msgrng_msg send_msg;
-
- int rsp_dest_id, cpu, hard_cpu, hard_thread;
- int code, retries;
- unsigned long msgrng_flags = 0;
-
- /* threads (0-3) are orthogonal to buckets 0-3 */
- cpu = xlr_cpu_id();
-
- hard_cpu = cpu >> 2;
- hard_thread = cpu & 0x3;/* thread id */
- rsp_dest_id = (hard_cpu << 3) + hard_thread;
-
- desc->op_ctl.cpu = hard_cpu;
- desc->op_ctl.flags = 0; /* called from kernel thread */
-
- XLR_SEC_CMD_DIAG("[%s]:%d: cpu=0x%x hard_cpu=0x%x hard_thrd=0x%x id=0x%x \n",
- __FUNCTION__, __LINE__, cpu, hard_cpu, hard_thread, rsp_dest_id);
-
- /*
- * Set DestId in Message Control Word. This tells the Security
- * Engine which bucket to send the reply to for this CPU
- */
- CLEAR_SET_FIELD(desc->control, MSG_CMD_CTL_ID, rsp_dest_id);
- CLEAR_SET_FIELD(desc->data, MSG_CMD_CTL_ID, rsp_dest_id);
-
- CLEAR_SET_FIELD(desc->control, MSG_CTL_OP_TYPE, MSG0_CTL_OP_ENGINE_SYMKEY);
- CLEAR_SET_FIELD(desc->data, MSG_CTL_OP_TYPE, MSG1_CTL_OP_SYMKEY_PIPE0);
-
- send_msg.msg0 = desc->control | (1ULL << 53);
- send_msg.msg1 = desc->data | (1ULL << 53) | (1ULL << 52);
- send_msg.msg2 = send_msg.msg3 = 0;
-
- desc->op_ctl.flags = 1;
- //in_interrupt(); /* ipsec softirq ? */
-
- XLR_SEC_CMD_DIAG("[%s]: IN_IRQ=%d msg0=0x%llx msg1=0x%llx \n",
- __FUNCTION__, desc->op_ctl.flags, send_msg.msg0, send_msg.msg1);
-
-
-
- retries = 100;
-
- while (retries--) {
- msgrng_flags_save(msgrng_flags);
-
- code = message_send_retry(SEC_MSGRING_WORDSIZE,
- MSGRNG_CODE_SEC,
- desc->op_ctl.stn_id,
- &send_msg);
-
-
- msgrng_flags_restore(msgrng_flags);
-
- if (code == 0)
- break;
- }
-
-
- return (XLR_SEC_ERR_NONE);
-}
-
-
-
-symkey_desc_pt
-xlr_sec_allocate_desc(void *session_ptr)
-{
- uint64_t addr;
- symkey_desc_pt aligned, new;
-
- new = (symkey_desc_pt) malloc(sizeof(symkey_desc_t),
- M_DEVBUF, M_NOWAIT | M_ZERO);
-
- if (new == NULL)
- return (NULL);
-
- new->ses = session_ptr;
-
- new->user.kern_src = new->user.aligned_src =
- (uint8_t *) contigmalloc(256 * 1024 + 1024,
- M_DEVBUF, M_NOWAIT | M_ZERO,
- 0, 0xffffffff, XLR_CACHELINE_SIZE, 0);
-
- if (new->user.kern_src == NULL) {
- printf("ERROR - malloc failed for user.kern_src\n");
- return NULL;
- }
- new->user.aligned_dest = new->user.kern_dest =
- (uint8_t *) contigmalloc(257 * 1024,
- M_DEVBUF, M_NOWAIT | M_ZERO,
- 0, 0xffffffff, XLR_CACHELINE_SIZE, 0);
-
- if (new->user.aligned_dest == NULL) {
- printf("ERROR - malloc failed for user.aligned_dest\n");
- return NULL;
- }
- new->next_src_buf = (uint8_t *) contigmalloc(256 * 1024 + 1024,
- M_DEVBUF, M_NOWAIT | M_ZERO,
- 0, 0xffffffff, XLR_CACHELINE_SIZE, 0);
-
- if (new->next_src_buf == NULL) {
- printf("ERROR - malloc failed for next_src_buf\n");
- return NULL;
- }
- new->next_dest_buf =
- (uint8_t *) contigmalloc(257 * 1024,
- M_DEVBUF, M_NOWAIT | M_ZERO,
- 0, 0xffffffff, XLR_CACHELINE_SIZE, 0);
-
- if (new->next_dest_buf == NULL) {
- printf("ERROR - malloc failed for next_dest_buf\n");
- return NULL;
- }
- new->user.kern_auth = new->user.user_auth = NULL;
- new->user.aligned_auth = new->user.user_auth = NULL;
-
-
- /* find cacheline alignment */
- aligned = new;
- addr = (uint64_t) vtophys(new);
-
- /* save for free */
- aligned->alloc = new;
-
- /* setup common control info */
- aligned->op_ctl.phys_self = addr;
- aligned->op_ctl.stn_id = MSGRNG_STNID_SEC0;
-
- return (aligned);
-}
-
-
-static void
-xlr_sec_free_desc(symkey_desc_pt desc)
-{
- if ((desc == NULL) || (desc->alloc == NULL)) {
- printf("%s: NULL descriptor \n", __FUNCTION__);
- return;
- }
- contigfree(desc, sizeof(symkey_desc_t), M_DEVBUF);
-
-
- return;
-}
-
-void
-print_buf(char *desc, void *data, int len)
-{
- uint8_t *dp;
- int i;
-
- DPRINT("%s: ", desc); /* newline done in for-loop */
- dp = data;
- for (i = 0; i < len; i++, dp++) {
- if ((i % 16) == 0)
- DPRINT("\n");
- DPRINT(" %c%c",
- nib2hex[(((*dp) & 0xf0) >> 4)],
- nib2hex[((*dp) & 0x0f)]);
- }
- DPRINT("\n");
-}
-
-
-#ifdef XLR_SEC_CMD_DEBUG
-static void
-decode_symkey_desc(symkey_desc_pt desc, uint32_t cfg_vector)
-{
-
- unsigned long long word;
-
- /* uint8_t *info; */
- /* int i; */
-
- DPRINT("MSG - CTL: \n");
- DPRINT("\t CTRL = %lld \n",
- GET_FIELD(desc->control, MSG_CMD_CTL_CTL));
- DPRINT("\t CTRL LEN = %lld \n",
- GET_FIELD(desc->control, MSG_CMD_CTL_LEN));
- DPRINT("\t CTRL ADDR = %llx \n\n",
- GET_FIELD(desc->control, MSG_CMD_CTL_ADDR));
-
- DPRINT("MSG - DATA: \n");
- DPRINT("\t CTRL = %lld \n",
- GET_FIELD(desc->data, MSG_CMD_DATA_CTL));
- DPRINT("\t DATA LEN = %lld \n",
- GET_FIELD(desc->data, MSG_CMD_DATA_LEN));
- DPRINT("\t DATA ADDR = %llx \n\n",
- GET_FIELD(desc->data, MSG_CMD_DATA_ADDR));
-
- DPRINT("CONTROL DESCRIPTOR: \n");
- word = desc->ctl_desc.instruction;
- DPRINT("\tINSTRUCTION: %llx\n", word);
- DPRINT("\t\tOVERRIDE CIPH = %lld \n", GET_FIELD(word, CTL_DSC_OVERRIDECIPHER));
- DPRINT("\t\tARC4 WAIT = %lld \n", GET_FIELD(word, CTL_DSC_ARC4_WAIT4SAVE));
- DPRINT("\t\tARC4 SAVE = %lld \n", GET_FIELD(word, CTL_DSC_ARC4_SAVESTATE));
- DPRINT("\t\tARC4 LOAD = %lld \n", GET_FIELD(word, CTL_DSC_ARC4_LOADSTATE));
- DPRINT("\t\tARC4 KEYLEN = %lld \n", GET_FIELD(word, CTL_DSC_ARC4_KEYLEN));
- DPRINT("\t\tCIPHER = %lld \n", GET_FIELD(word, CTL_DSC_CPHR));
- DPRINT("\t\tCIPHER MODE = %lld \n", GET_FIELD(word, CTL_DSC_MODE));
- DPRINT("\t\tINIT CIPHER = %lld \n", GET_FIELD(word, CTL_DSC_ICPHR));
- DPRINT("\t\tHMAC = %lld \n", GET_FIELD(word, CTL_DSC_HMAC));
- DPRINT("\t\tHASH ALG = %lld \n", GET_FIELD(word, CTL_DSC_HASH) | (GET_FIELD(word, CTL_DSC_HASHHI) << 2));
- DPRINT("\t\tINIT HASH = %lld \n", GET_FIELD(word, CTL_DSC_IHASH));
- DPRINT("\t\tCHKSUM = %lld \n", GET_FIELD(word, CTL_DSC_CKSUM));
- DPRINT("\tCIPHER HASH INFO: \n");
-#if 0
- info = (uint8_t *) & desc->ctl_desc->cipherHashInfo;
- for (i = 0; i < sizeof(CipherHashInfo_t); i++, info++) {
- DPRINT(" %02x", *info);
- if (i && (i % 16) == 0)
- DPRINT("\n");
- }
- DPRINT("\n\n");
-#endif
-
- switch (cfg_vector) {
- case XLR_SEC_VECTOR_CIPHER_ARC4:
- DPRINT("VECTOR: XLR_SEC_VECTOR_CIPHER_ARC4 \n");
- print_buf("ARC4 Key",
- &desc->ctl_desc.cipherHashInfo.infoARC4.cipherKey0,
- GET_FIELD(word, CTL_DSC_ARC4_KEYLEN));
- break;
- case XLR_SEC_VECTOR_CIPHER_ARC4__HMAC:
- DPRINT("VECTOR: XLR_SEC_VECTOR_CIPHER_ARC4__HMAC \n");
- print_buf("ARC4 Key",
- &desc->ctl_desc.cipherHashInfo.infoARC4HMAC.cipherKey0,
- GET_FIELD(word, CTL_DSC_ARC4_KEYLEN));
- print_buf("HMAC Key",
- &desc->ctl_desc.cipherHashInfo.infoARC4HMAC.hmacKey0,
- sizeof(HMAC_t));
- break;
- case XLR_SEC_VECTOR_CIPHER_ARC4__STATE:
- DPRINT("VECTOR: XLR_SEC_VECTOR_CIPHER_ARC4__STATE \n");
- print_buf("ARC4 Key",
- &desc->ctl_desc.cipherHashInfo.infoARC4State.cipherKey0,
- GET_FIELD(word, CTL_DSC_ARC4_KEYLEN));
- break;
- case XLR_SEC_VECTOR_CIPHER_ARC4__HMAC__STATE:
- DPRINT("VECTOR: XLR_SEC_VECTOR_CIPHER_ARC4__HMAC__STATE \n");
- print_buf("ARC4 Key",
- &desc->ctl_desc.cipherHashInfo.infoARC4StateHMAC.cipherKey0,
- GET_FIELD(word, CTL_DSC_ARC4_KEYLEN));
- print_buf("HMAC Key",
- &desc->ctl_desc.cipherHashInfo.infoARC4StateHMAC.hmacKey0,
- sizeof(HMAC_t));
- break;
- case XLR_SEC_VECTOR_CIPHER_KASUMI_F8:
- DPRINT("VECTOR: XLR_SEC_VECTOR_CIPHER_KASUMI_F8 \n");
- print_buf("KASUMI_F8 Key",
- &desc->ctl_desc.cipherHashInfo.infoKASUMIF8.cipherKey0,
- XLR_SEC_KASUMI_F8_KEY_LENGTH);
- break;
- case XLR_SEC_VECTOR_CIPHER_KASUMI_F8__HMAC:
- DPRINT("XLR_SEC_VECTOR_CIPHER_KASUMI_F8__HMAC\n");
- print_buf("KASUMI_F8 Key",
- &desc->ctl_desc.cipherHashInfo.infoKASUMIF8HMAC.cipherKey0,
- XLR_SEC_KASUMI_F8_KEY_LENGTH);
- print_buf("HMAC Key",
- &desc->ctl_desc.cipherHashInfo.infoKASUMIF8HMAC.hmacKey0,
- sizeof(HMAC_t));
- break;
- case XLR_SEC_VECTOR_CIPHER_KASUMI_F8__HMAC2:
- DPRINT("XLR_SEC_VECTOR_CIPHER_KASUMI_F8__HMAC2\n");
- print_buf("KASUMI_F8 Key",
- &desc->ctl_desc.cipherHashInfo.infoKASUMIF8HMAC2.cipherKey0,
- XLR_SEC_KASUMI_F8_KEY_LENGTH);
- print_buf("HMAC2 Key",
- &desc->ctl_desc.cipherHashInfo.infoKASUMIF8HMAC2.hmacKey0,
- sizeof(HMAC2_t));
- break;
- case XLR_SEC_VECTOR_CIPHER_KASUMI_F8__GCM:
- DPRINT("XLR_SEC_VECTOR_CIPHER_KASUMI_F8__GCM\n");
- print_buf("KASUMI_F8 Key",
- &desc->ctl_desc.cipherHashInfo.infoKASUMIF8GCM.cipherKey0,
- XLR_SEC_KASUMI_F8_KEY_LENGTH);
- print_buf("GCM Key",
- &desc->ctl_desc.cipherHashInfo.infoKASUMIF8GCM.GCMH0,
- sizeof(GCM_t));
- break;
- case XLR_SEC_VECTOR_CIPHER_KASUMI_F8__F9:
- DPRINT("XLR_SEC_VECTOR_CIPHER_KASUMI_F8__F9\n");
- print_buf("KASUMI_F8 Key",
- &desc->ctl_desc.cipherHashInfo.infoKASUMIF8F9.cipherKey0,
- XLR_SEC_KASUMI_F8_KEY_LENGTH);
- print_buf("F9 Key",
- &desc->ctl_desc.cipherHashInfo.infoKASUMIF8F9.authKey0,
- sizeof(F9_t));
- break;
- case XLR_SEC_VECTOR_MAC:
- DPRINT("VECTOR: XLR_SEC_VECTOR_MAC \n");
- DPRINT("MAC-ONLY - No Info\n");
- break;
- case XLR_SEC_VECTOR_HMAC:
- DPRINT("VECTOR: XLR_SEC_VECTOR_HMAC \n");
- print_buf("HMAC Key",
- &desc->ctl_desc.cipherHashInfo.infoHMAC.hmacKey0,
- sizeof(HMAC_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_DES__HMAC__MODE_ECB_CBC:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_DES__HMAC__MODE_ECB_CBC \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoDESHMAC.cipherKey0,
- XLR_SEC_DES_KEY_LENGTH);
- print_buf("HMAC Key",
- &desc->ctl_desc.cipherHashInfo.infoDESHMAC.hmacKey0,
- sizeof(HMAC_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_DES__MODE_ECB_CBC:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_DES__MODE_ECB_CBC \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoDES.cipherKey0,
- XLR_SEC_DES_KEY_LENGTH);
- break;
- case XLR_SEC_VECTOR__CIPHER_3DES__HMAC__MODE_ECB_CBC:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_3DES__HMAC__MODE_ECB_CBC \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.info3DESHMAC.cipherKey0,
- XLR_SEC_3DES_KEY_LENGTH);
- print_buf("HMAC Key",
- &desc->ctl_desc.cipherHashInfo.info3DESHMAC.hmacKey0,
- sizeof(HMAC_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_3DES__MODE_ECB_CBC:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_3DES__MODE_ECB_CBC \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.info3DES.cipherKey0,
- XLR_SEC_3DES_KEY_LENGTH);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_CTR_CFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_CTR_CFB \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES128HMAC.cipherKey0,
- XLR_SEC_AES128_KEY_LENGTH);
- print_buf("HMAC Key",
- &desc->ctl_desc.cipherHashInfo.infoAES128HMAC.hmacKey0,
- sizeof(HMAC_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__MODE_CTR_CFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES128__MODE_CTR_CFB \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES128.cipherKey0,
- XLR_SEC_AES128_KEY_LENGTH);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_ECB_CBC_OFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_ECB_CBC_OFB\n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES128HMAC.cipherKey0,
- XLR_SEC_AES128_KEY_LENGTH);
- print_buf("HMAC Key",
- &desc->ctl_desc.cipherHashInfo.infoAES128HMAC.hmacKey0,
- sizeof(HMAC_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__MODE_ECB_CBC_OFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES128__MODE_ECB_CBC_OFB \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES128.cipherKey0,
- XLR_SEC_AES128_KEY_LENGTH);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_CTR_CFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_CTR_CFB \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES192HMAC.cipherKey0,
- XLR_SEC_AES192_KEY_LENGTH);
- print_buf("HMAC Key",
- &desc->ctl_desc.cipherHashInfo.infoAES192HMAC.hmacKey0,
- sizeof(HMAC_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__MODE_CTR_CFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES192__MODE_CTR_CFB \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES192.cipherKey0,
- XLR_SEC_AES192_KEY_LENGTH);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_ECB_CBC_OFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_ECB_CBC_OFB\n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES192HMAC.cipherKey0,
- XLR_SEC_AES192_KEY_LENGTH);
- print_buf("HMAC Key",
- &desc->ctl_desc.cipherHashInfo.infoAES192HMAC.hmacKey0,
- sizeof(HMAC_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__MODE_ECB_CBC_OFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES192__MODE_ECB_CBC_OFB \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES192.cipherKey0,
- XLR_SEC_AES192_KEY_LENGTH);
- break;
-
- case XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_CTR_CFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_CTR_CFB \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES256HMAC.cipherKey0,
- XLR_SEC_AES256_KEY_LENGTH);
- print_buf("HMAC Key",
- &desc->ctl_desc.cipherHashInfo.infoAES256HMAC.hmacKey0,
- sizeof(HMAC_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_AES256__MODE_CTR_CFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES256__MODE_CTR_CFB \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES256.cipherKey0,
- XLR_SEC_AES256_KEY_LENGTH);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_ECB_CBC_OFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_ECB_CBC_OFB \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES256HMAC.cipherKey0,
- XLR_SEC_AES256_KEY_LENGTH);
- print_buf("HMAC Key",
- &desc->ctl_desc.cipherHashInfo.infoAES256HMAC.hmacKey0,
- sizeof(HMAC_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_AES256__MODE_ECB_CBC_OFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES256__MODE_ECB_CBC_OFB \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES256.cipherKey0,
- XLR_SEC_AES256_KEY_LENGTH);
- break;
- case XLR_SEC_VECTOR_CIPHER_ARC4__HMAC2:
- DPRINT("VECTOR: XLR_SEC_VECTOR_CIPHER_ARC4__HMAC2 \n");
- print_buf("ARC4 Key",
- &desc->ctl_desc.cipherHashInfo.infoARC4HMAC2.cipherKey0,
- GET_FIELD(word, CTL_DSC_ARC4_KEYLEN));
- print_buf("HMAC2 Key",
- &desc->ctl_desc.cipherHashInfo.infoARC4HMAC2.hmacKey0,
- sizeof(HMAC2_t));
- break;
- case XLR_SEC_VECTOR_CIPHER_ARC4__HMAC2__STATE:
- DPRINT("VECTOR: XLR_SEC_VECTOR_CIPHER_ARC4__HMAC2__STATE \n");
- print_buf("ARC4 Key",
- &desc->ctl_desc.cipherHashInfo.infoARC4StateHMAC2.cipherKey0,
- GET_FIELD(word, CTL_DSC_ARC4_KEYLEN));
- print_buf("HMAC2 Key",
- &desc->ctl_desc.cipherHashInfo.infoARC4StateHMAC2.hmacKey0,
- sizeof(HMAC2_t));
- break;
- case XLR_SEC_VECTOR_HMAC2:
- DPRINT("VECTOR: XLR_SEC_VECTOR_HMAC2 \n");
- print_buf("HMAC2 Key",
- &desc->ctl_desc.cipherHashInfo.infoHMAC2.hmacKey0,
- sizeof(HMAC2_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_DES__HMAC2__MODE_ECB_CBC:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_DES__HMAC2__MODE_ECB_CBC \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoDESHMAC2.cipherKey0,
- XLR_SEC_DES_KEY_LENGTH);
- print_buf("HMAC2 Key",
- &desc->ctl_desc.cipherHashInfo.infoDESHMAC2.hmacKey0,
- sizeof(HMAC2_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_3DES__HMAC2__MODE_ECB_CBC:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_3DES__HMAC2__MODE_ECB_CBC \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.info3DESHMAC2.cipherKey0,
- XLR_SEC_3DES_KEY_LENGTH);
- print_buf("HMAC2 Key",
- &desc->ctl_desc.cipherHashInfo.info3DESHMAC2.hmacKey0,
- sizeof(HMAC2_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_CTR_CFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_CTR_CFB \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES128HMAC2.cipherKey0,
- XLR_SEC_AES128_KEY_LENGTH);
- print_buf("HMAC2 Key",
- &desc->ctl_desc.cipherHashInfo.infoAES128HMAC2.hmacKey0,
- sizeof(HMAC2_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_ECB_CBC_OFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_ECB_CBC_OFB\n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES128HMAC2.cipherKey0,
- XLR_SEC_AES128_KEY_LENGTH);
- print_buf("HMAC2 Key",
- &desc->ctl_desc.cipherHashInfo.infoAES128HMAC2.hmacKey0,
- sizeof(HMAC2_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_CTR_CFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_CTR_CFB \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES192HMAC2.cipherKey0,
- XLR_SEC_AES192_KEY_LENGTH);
- print_buf("HMAC2 Key",
- &desc->ctl_desc.cipherHashInfo.infoAES192HMAC2.hmacKey0,
- sizeof(HMAC2_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_ECB_CBC_OFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_ECB_CBC_OFB\n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES192HMAC2.cipherKey0,
- XLR_SEC_AES192_KEY_LENGTH);
- print_buf("HMAC2 Key",
- &desc->ctl_desc.cipherHashInfo.infoAES192HMAC2.hmacKey0,
- sizeof(HMAC2_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_CTR_CFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_CTR_CFB \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES256HMAC2.cipherKey0,
- XLR_SEC_AES256_KEY_LENGTH);
- print_buf("HMAC2 Key",
- &desc->ctl_desc.cipherHashInfo.infoAES256HMAC2.hmacKey0,
- sizeof(HMAC2_t));
- break;
-
- case XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_ECB_CBC_OFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_ECB_CBC_OFB \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES256HMAC2.cipherKey0,
- XLR_SEC_AES256_KEY_LENGTH);
- print_buf("HMAC2 Key",
- &desc->ctl_desc.cipherHashInfo.infoAES256HMAC2.hmacKey0,
- sizeof(HMAC2_t));
- break;
- case XLR_SEC_VECTOR_CIPHER_ARC4__GCM:
- DPRINT("VECTOR: XLR_SEC_VECTOR_CIPHER_ARC4__GCM \n");
- print_buf("ARC4 Key",
- &desc->ctl_desc.cipherHashInfo.infoARC4GCM.cipherKey0,
- GET_FIELD(word, CTL_DSC_ARC4_KEYLEN));
- print_buf("GCM Key",
- &desc->ctl_desc.cipherHashInfo.infoARC4GCM.GCMH0,
- sizeof(GCM_t));
- break;
- case XLR_SEC_VECTOR_CIPHER_ARC4__GCM__STATE:
- DPRINT("VECTOR: XLR_SEC_VECTOR_CIPHER_ARC4__GCM__STATE \n");
- print_buf("ARC4 Key",
- &desc->ctl_desc.cipherHashInfo.infoARC4StateGCM.cipherKey0,
- GET_FIELD(word, CTL_DSC_ARC4_KEYLEN));
- print_buf("GCM Key",
- &desc->ctl_desc.cipherHashInfo.infoARC4StateGCM.GCMH0,
- sizeof(GCM_t));
- break;
- case XLR_SEC_VECTOR_GCM:
- DPRINT("VECTOR: XLR_SEC_VECTOR_GCM \n");
- print_buf("GCM Key",
- &desc->ctl_desc.cipherHashInfo.infoGCM.GCMH0,
- sizeof(GCM_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_DES__GCM__MODE_ECB_CBC:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_DES__GCM__MODE_ECB_CBC \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoDESGCM.cipherKey0,
- XLR_SEC_DES_KEY_LENGTH);
- print_buf("GCM Key",
- &desc->ctl_desc.cipherHashInfo.infoDESGCM.GCMH0,
- sizeof(GCM_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_3DES__GCM__MODE_ECB_CBC:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_3DES__GCM__MODE_ECB_CBC \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.info3DESGCM.cipherKey0,
- XLR_SEC_3DES_KEY_LENGTH);
- print_buf("GCM Key",
- &desc->ctl_desc.cipherHashInfo.info3DESGCM.GCMH0,
- sizeof(GCM_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_CTR_CFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_CTR_CFB \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES128GCM.cipherKey0,
- XLR_SEC_AES128_KEY_LENGTH);
- print_buf("GCM Key",
- &desc->ctl_desc.cipherHashInfo.infoAES128GCM.GCMH0,
- XLR_SEC_AES128_KEY_LENGTH);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_ECB_CBC_OFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_ECB_CBC_OFB\n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES128GCM.cipherKey0,
- XLR_SEC_AES128_KEY_LENGTH);
- print_buf("GCM Key",
- &desc->ctl_desc.cipherHashInfo.infoAES128GCM.GCMH0,
- XLR_SEC_AES128_KEY_LENGTH);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_CTR_CFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_CTR_CFB \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES192GCM.cipherKey0,
- XLR_SEC_AES192_KEY_LENGTH);
- print_buf("GCM Key",
- &desc->ctl_desc.cipherHashInfo.infoAES192GCM.GCMH0,
- XLR_SEC_AES192_KEY_LENGTH);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_ECB_CBC_OFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_ECB_CBC_OFB\n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES192GCM.cipherKey0,
- XLR_SEC_AES192_KEY_LENGTH);
- print_buf("GCM Key",
- &desc->ctl_desc.cipherHashInfo.infoAES192GCM.GCMH0,
- XLR_SEC_AES192_KEY_LENGTH);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_CTR_CFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_CTR_CFB \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES256GCM.cipherKey0,
- XLR_SEC_AES256_KEY_LENGTH);
- print_buf("GCM Key",
- &desc->ctl_desc.cipherHashInfo.infoAES256GCM.GCMH0,
- XLR_SEC_AES256_KEY_LENGTH);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_ECB_CBC_OFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_ECB_CBC_OFB \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES256GCM.cipherKey0,
- XLR_SEC_AES256_KEY_LENGTH);
- print_buf("GCM Key",
- &desc->ctl_desc.cipherHashInfo.infoAES256GCM.GCMH0,
- XLR_SEC_AES256_KEY_LENGTH);
- break;
- case XLR_SEC_VECTOR_CIPHER_ARC4__F9:
- DPRINT("VECTOR: XLR_SEC_VECTOR_CIPHER_ARC4__F9 \n");
- print_buf("ARC4 Key",
- &desc->ctl_desc.cipherHashInfo.infoARC4F9.cipherKey0,
- GET_FIELD(word, CTL_DSC_ARC4_KEYLEN));
- print_buf("F9 Key",
- &desc->ctl_desc.cipherHashInfo.infoARC4F9.authKey0,
- sizeof(F9_t));
- break;
- case XLR_SEC_VECTOR_CIPHER_ARC4__F9__STATE:
- DPRINT("VECTOR: XLR_SEC_VECTOR_CIPHER_ARC4__F9__STATE \n");
- print_buf("ARC4 Key",
- &desc->ctl_desc.cipherHashInfo.infoARC4StateF9.cipherKey0,
- GET_FIELD(word, CTL_DSC_ARC4_KEYLEN));
- print_buf("F9 Key",
- &desc->ctl_desc.cipherHashInfo.infoARC4StateF9.authKey0,
- sizeof(F9_t));
- break;
- case XLR_SEC_VECTOR_F9:
- DPRINT("VECTOR: XLR_SEC_VECTOR_F9 \n");
- print_buf("F9 Key",
- &desc->ctl_desc.cipherHashInfo.infoF9.authKey0,
- sizeof(F9_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_DES__F9__MODE_ECB_CBC:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_DES__F9__MODE_ECB_CBC \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoDESF9.cipherKey0,
- XLR_SEC_DES_KEY_LENGTH);
- print_buf("F9 Key",
- &desc->ctl_desc.cipherHashInfo.infoDESF9.authKey0,
- sizeof(F9_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_3DES__F9__MODE_ECB_CBC:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_3DES__F9__MODE_ECB_CBC \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.info3DESF9.cipherKey0,
- XLR_SEC_3DES_KEY_LENGTH);
- print_buf("F9 Key",
- &desc->ctl_desc.cipherHashInfo.info3DESF9.authKey0,
- sizeof(F9_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_CTR_CFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_CTR_CFB \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES128F9.cipherKey0,
- XLR_SEC_AES128_KEY_LENGTH);
- print_buf("F9 Key",
- &desc->ctl_desc.cipherHashInfo.infoAES128F9.authKey0,
- sizeof(F9_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_ECB_CBC_OFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_ECB_CBC_OFB\n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES128F9.cipherKey0,
- XLR_SEC_AES128_KEY_LENGTH);
- print_buf("F9 Key",
- &desc->ctl_desc.cipherHashInfo.infoAES128F9.authKey0,
- sizeof(F9_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_CTR_CFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_CTR_CFB \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES192F9.cipherKey0,
- XLR_SEC_AES192_KEY_LENGTH);
- print_buf("F9 Key",
- &desc->ctl_desc.cipherHashInfo.infoAES192F9.authKey0,
- sizeof(F9_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_ECB_CBC_OFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_ECB_CBC_OFB\n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES192F9.cipherKey0,
- XLR_SEC_AES192_KEY_LENGTH);
- print_buf("F9 Key",
- &desc->ctl_desc.cipherHashInfo.infoAES192F9.authKey0,
- sizeof(F9_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_CTR_CFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_CTR_CFB \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES256F9.cipherKey0,
- XLR_SEC_AES256_KEY_LENGTH);
- print_buf("F9 Key",
- &desc->ctl_desc.cipherHashInfo.infoAES256F9.authKey0,
- sizeof(F9_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_ECB_CBC_OFB:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_ECB_CBC_OFB \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES256F9.cipherKey0,
- XLR_SEC_AES256_KEY_LENGTH);
- print_buf("F9 Key",
- &desc->ctl_desc.cipherHashInfo.infoAES256F9.authKey0,
- sizeof(F9_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_F8:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_F8 \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES128F8HMAC.cipherKey0,
- XLR_SEC_AES128F8_KEY_LENGTH);
- print_buf("HMAC Key",
- &desc->ctl_desc.cipherHashInfo.infoAES128F8HMAC.hmacKey0,
- sizeof(HMAC_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__MODE_F8:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES128__MODE_F8 \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES128F8.cipherKey0,
- XLR_SEC_AES128F8_KEY_LENGTH);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_F8:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_F8 \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES192F8HMAC.cipherKey0,
- XLR_SEC_AES192F8_KEY_LENGTH);
- print_buf("HMAC Key",
- &desc->ctl_desc.cipherHashInfo.infoAES192F8HMAC.hmacKey0,
- sizeof(HMAC_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__MODE_F8:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES192__MODE_F8 \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES192F8.cipherKey0,
- XLR_SEC_AES192F8_KEY_LENGTH);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_F8:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_F8 \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES256F8HMAC.cipherKey0,
- XLR_SEC_AES256F8_KEY_LENGTH);
- print_buf("HMAC Key",
- &desc->ctl_desc.cipherHashInfo.infoAES256HMAC.hmacKey0,
- sizeof(HMAC_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_AES256__MODE_F8:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES256__MODE_F8 \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES256F8.cipherKey0,
- XLR_SEC_AES256F8_KEY_LENGTH);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_F8:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_F8 \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES128F8HMAC2.cipherKey0,
- XLR_SEC_AES128F8_KEY_LENGTH);
- print_buf("HMAC2 Key",
- &desc->ctl_desc.cipherHashInfo.infoAES128F8HMAC2.hmacKey0,
- sizeof(HMAC2_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_F8:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_F8 \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES192F8HMAC2.cipherKey0,
- XLR_SEC_AES192F8_KEY_LENGTH);
- print_buf("HMAC2 Key",
- &desc->ctl_desc.cipherHashInfo.infoAES192F8HMAC2.hmacKey0,
- sizeof(HMAC2_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_F8:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_F8 \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES256F8HMAC2.cipherKey0,
- XLR_SEC_AES256F8_KEY_LENGTH);
- print_buf("HMAC2 Key",
- &desc->ctl_desc.cipherHashInfo.infoAES256F8HMAC2.hmacKey0,
- sizeof(HMAC2_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_F8:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_F8 \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES128F8GCM.cipherKey0,
- XLR_SEC_AES128F8_KEY_LENGTH);
- print_buf("GCM Key",
- &desc->ctl_desc.cipherHashInfo.infoAES128GCM.GCMH0,
- XLR_SEC_AES128_KEY_LENGTH);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_F8:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_F8 \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES192F8GCM.cipherKey0,
- XLR_SEC_AES192_KEY_LENGTH);
- print_buf("GCM Key",
- &desc->ctl_desc.cipherHashInfo.infoAES192F8GCM.GCMH0,
- XLR_SEC_AES192_KEY_LENGTH);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_F8:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_F8 \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES256F8GCM.cipherKey0,
- XLR_SEC_AES256F8_KEY_LENGTH);
- print_buf("GCM Key",
- &desc->ctl_desc.cipherHashInfo.infoAES256F8GCM.GCMH0,
- XLR_SEC_AES256_KEY_LENGTH);
- break;
- case XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_F8:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_F8 \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES128F8F9.cipherKey0,
- XLR_SEC_AES128F8_KEY_LENGTH);
- print_buf("F9 Key",
- &desc->ctl_desc.cipherHashInfo.infoAES128F8F9.authKey0,
- sizeof(F9_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_F8:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_F8 \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES192F8F9.cipherKey0,
- XLR_SEC_AES192F8_KEY_LENGTH);
- print_buf("F9 Key",
- &desc->ctl_desc.cipherHashInfo.infoAES192F8F9.authKey0,
- sizeof(F9_t));
- break;
- case XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_F8:
- DPRINT("VECTOR: XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_F8 \n");
- print_buf("CIPHER Key",
- &desc->ctl_desc.cipherHashInfo.infoAES256F8F9.cipherKey0,
- XLR_SEC_AES256F8_KEY_LENGTH);
- print_buf("F9 Key",
- &desc->ctl_desc.cipherHashInfo.infoAES256F8F9.authKey0,
- sizeof(F9_t));
- break;
-
- default:
- DPRINT("VECTOR: ???? \n");
- DPRINT(">>> WHAT THE HECK !!! <<< \n");
- break;
- }
- DPRINT("PACKET DESCRIPTOR: \n");
- word = desc->pkt_desc.srcLengthIVOffUseIVNext;
- DPRINT("\tSrcLengthIVOffsetIVNext: %llx\n", word);
- DPRINT("\t\tLoad HMAC = %lld \n",
- GET_FIELD(word, PKT_DSC_LOADHMACKEY));
- DPRINT("\t\tPad Hash = %lld \n",
- GET_FIELD(word, PKT_DSC_PADHASH));
- DPRINT("\t\tHash Byte Count = %lld \n",
- GET_FIELD(word, PKT_DSC_HASHBYTES));
- DPRINT("\t\tNext = %lld \n",
- GET_FIELD(word, PKT_DSC_NEXT));
- DPRINT("\t\tUse IV = %lld \n",
- GET_FIELD(word, PKT_DSC_IV));
- DPRINT("\t\tIV Offset = %lld \n",
- GET_FIELD(word, PKT_DSC_IVOFF));
- DPRINT("\t\tPacket Length = %lld \n",
- GET_FIELD(word, PKT_DSC_PKTLEN));
- DPRINT("\t\tNLHMAC = %lld \n", GET_FIELD(word, PKT_DSC_NLHMAC));
- DPRINT("\t\tBreak = %lld \n", GET_FIELD(word, PKT_DSC_BREAK));
- DPRINT("\t\tWait = %lld \n", GET_FIELD(word, PKT_DSC_WAIT));
- DPRINT("\t\tSegment Src Addr = %llx \n",
- (GET_FIELD(word, PKT_DSC_SEGADDR) << 5) & 0xffffffffffULL);
- DPRINT("\t\tSRTCP = %lld \n", GET_FIELD(word, PKT_DSC_SRTCP));
- DPRINT("\t\tGlobal Src Offset = %lld \n",
- GET_FIELD(word, PKT_DSC_SEGOFFSET));
-
- word = desc->pkt_desc.dstDataSettings;
- DPRINT("\tdstDataSettings: %llx \n", word);
- DPRINT("\t\tArc4 Byte Count = %lld \n", GET_FIELD(word,
- PKT_DSC_ARC4BYTECOUNT));
- DPRINT("\t\tSym Operation = %lld \n", GET_FIELD(word, PKT_DSC_SYM_OP));
- DPRINT("\t\tCipher Offset = %lld \n", GET_FIELD(word, PKT_DSC_CPHROFF));
- DPRINT("\t\tHash Offset = %lld \n", GET_FIELD(word, PKT_DSC_HASHOFF));
- DPRINT("\t\tHash Source = %lld \n", GET_FIELD(word, PKT_DSC_HASHSRC));
- DPRINT("\t\tChecksum Offset = %lld \n", GET_FIELD(word,
- PKT_DSC_CKSUMOFF));
- DPRINT("\t\tChecksum Source = %lld \n", GET_FIELD(word,
- PKT_DSC_CKSUMSRC));
- DPRINT("\t\tCipher Dest Addr = %llx \n", GET_FIELD(word,
- PKT_DSC_CPHR_DST_ADDR));
- DPRINT("\t\tCipher Dest Dword = %lld \n", GET_FIELD(word,
- PKT_DSC_CPHR_DST_DWOFFSET));
- DPRINT("\t\tCipher Dest Offset= %lld \n", GET_FIELD(word,
- PKT_DSC_CPHR_DST_OFFSET));
- word = desc->pkt_desc.authDstNonceLow;
- DPRINT("\tauthDstNonceLow: %llx \n", word);
- DPRINT("\t\tNonce Low 24 = %lld \n", GET_FIELD(word,
- PKT_DSC_NONCE_LOW));
- DPRINT("\t\tauthDst = %llx \n", GET_FIELD(word,
- PKT_DSC_AUTH_DST_ADDR));
- DPRINT("\t\tCipher Offset High= %lld \n", GET_FIELD(word,
- PKT_DSC_CIPH_OFF_HI));
- word = desc->pkt_desc.ckSumDstNonceHiCFBMaskLLWMask;
- DPRINT("\tckSumDstNonceHiCFBMaskLLWMask: %llx \n", word);
- DPRINT("\t\tHash Byte off = %lld \n", GET_FIELD(word, PKT_DSC_HASH_BYTE_OFF));
- DPRINT("\t\tPacket Len bytes = %lld \n", GET_FIELD(word, PKT_DSC_PKTLEN_BYTES));
- DPRINT("\t\tLast Long Word Mask = %lld \n", GET_FIELD(word,
- PKT_DSC_LASTWORD));
- DPRINT("\t\tCipher Dst Address = %llx \n", GET_FIELD(word,
- PKT_DSC_CPHR_DST_ADDR));
- DPRINT("\t\tGlobal Dst Offset = %lld \n", GET_FIELD(word,
- PKT_DSC_CPHR_DST_OFFSET));
-
- DPRINT("CFG_VECTOR = %04x\n", cfg_vector);
- DPRINT("\n\n");
-}
-
-#endif
-
-
-
-/* This function is called from an interrupt handler */
-void
-xlr_sec_msgring_handler(int bucket, int size, int code, int stid,
- struct msgrng_msg *msg, void *data)
-{
- uint64_t error;
- uint64_t addr, sec_eng, sec_pipe;
- xlr_sec_io_pt op = NULL;
- symkey_desc_pt desc = NULL;
- struct xlr_sec_session *ses = NULL;
- struct xlr_sec_command *cmd = NULL;
-
-
- if (code != MSGRNG_CODE_SEC) {
- panic("xlr_sec_msgring_handler: bad code = %d,"
- " expected code = %d\n",
- code, MSGRNG_CODE_SEC);
- }
- if ((stid < MSGRNG_STNID_SEC0) || (stid > MSGRNG_STNID_PK0)) {
- panic("xlr_sec_msgring_handler: bad stn id = %d, expect %d - %d\n",
- stid, MSGRNG_STNID_SEC0, MSGRNG_STNID_PK0);
- }
- /*
- * The Submit() operation encodes the engine and pipe in these two
- * separate fields. This allows use to verify the result type with
- * the submitted operation type.
- */
- sec_eng = GET_FIELD(msg->msg0, MSG_CTL_OP_TYPE);
- sec_pipe = GET_FIELD(msg->msg1, MSG_CTL_OP_TYPE);
-
-
- error = msg->msg0 >> 40 & 0x1ff;
- if (error)
- printf("ctrl error = 0x%llx\n", error);
- error = msg->msg1 >> 40 & 0x1ff;
- if (error)
- printf("data error = 0x%llx\n", error);
-
-
- XLR_SEC_CMD_DIAG("[%s]: eng=%lld pipe=%lld\n",
- __FUNCTION__, sec_eng, sec_pipe);
-
- /* Symmetric Key Operation ? */
- if (sec_eng == MSG0_CTL_OP_ENGINE_SYMKEY) {
-
- /*
- * The data descriptor address allows us to associate the
- * response with the submitted operation. Address is 40-bit
- * cacheline aligned address. We need to zero bit 0-4 since
- * they are used for the engine and pipe Id.
- */
- addr = GET_FIELD(msg->msg1, MSG_RSLT_DATA_DSC_ADDR);
-
- addr = addr & ~((1 << 5) - 1);
- if (!addr) {
- panic("[%s:STNID_SEC]: NULL symkey addr!\n", __FUNCTION__);
-
- }
- /*
- * The adddress points to the data descriptor. The operation
- * descriptor is defined with the 32-byte cacheline size in
- * mind. It allows the code to use this address to
- * reference the symkey descriptor. (ref: xlr_sec_desc.h)
- */
- addr = addr - sizeof(OperationDescriptor_t);
- desc = (symkey_desc_pt) MIPS_PHYS_TO_KSEG0(addr);
-
- if (!desc) {
- printf("\nerror : not getting desc back correctly \n");
- panic("[%s:STNID_SEC]: NULL symkey data descriptor!\n", __FUNCTION__);
- }
- ses = (struct xlr_sec_session *)desc->ses;
- if (!ses) {
- printf("\n error : not getting ses back correctly \n");
- panic("[%s:STNID_SEC]: NULL symkey data descriptor!\n", __FUNCTION__);
- }
- cmd = &ses->cmd;
- if (!cmd) {
- printf("\n error : not getting cmd back correctly \n");
- panic("[%s:STNID_SEC]: NULL symkey data descriptor!\n", __FUNCTION__);
- }
- op = &cmd->op;
- if (!op) {
- printf("\n error : not getting op back correctly \n");
- panic("[%s:STNID_SEC]: NULL symkey data descriptor!\n", __FUNCTION__);
- }
- XLR_SEC_CMD_DIAG("[%s:STNID_SEC]: addr=0x%llx desc=%p alloc=%p \n",
- __FUNCTION__, addr, desc, desc->alloc);
-
- XLR_SEC_CMD_DIAG("[%s:STNID_SEC]: op_ctl=%p phys_self=%llx stn_id=%d \n",
- __FUNCTION__, &desc->op_ctl, desc->op_ctl.phys_self,
- desc->op_ctl.stn_id);
-
- if (addr != desc->op_ctl.phys_self) {
- XLR_SEC_CMD_DIAG("[%s:STNID_SEC]: Control Descriptor fails Self-Verify !\n",
- __FUNCTION__);
- printf("[%s:STNID_SEC]: Control Descriptor fails Self-Verify !\n",
- __FUNCTION__);
- printf("[%s:STNID_SEC]: addr=0x%llx desc=%p alloc=%p \n",
- __FUNCTION__, (unsigned long long)addr, desc, desc->alloc);
- printf("[%s:STNID_SEC]: op_ctl=%p phys_self=%llx stn_id=%d \n",
- __FUNCTION__, &desc->op_ctl, (unsigned long long)desc->op_ctl.phys_self,
- desc->op_ctl.stn_id);
-
- }
- if (desc->op_ctl.stn_id != MSGRNG_STNID_SEC0 &&
- desc->op_ctl.stn_id != MSGRNG_STNID_SEC1) {
- XLR_SEC_CMD_DIAG("[%s:STNID_SEC]: Operation Type Mismatch !\n",
- __FUNCTION__);
- printf("[%s:STNID_SEC]: Operation Type Mismatch !\n",
- __FUNCTION__);
- printf("[%s:STNID_SEC]: addr=0x%llx desc=%p alloc=%p \n",
- __FUNCTION__, (unsigned long long)addr, desc, desc->alloc);
- printf("[%s:STNID_SEC]: op_ctl=%p phys_self=%llx stn_id=%d \n",
- __FUNCTION__, &desc->op_ctl, (unsigned long long)desc->op_ctl.phys_self,
- desc->op_ctl.stn_id);
- }
- desc->ctl_result = GET_FIELD(msg->msg0, MSG_RSLT_CTL_INST_ERR);
- desc->data_result = GET_FIELD(msg->msg1, MSG_RSLT_DATA_INST_ERR);
-
- XLR_SEC_CMD_DIAG("[%s:STNID_SEC]: cpu=%d ctl_result=0x%llx data_result=%llx\n",
- __FUNCTION__, desc->op_ctl.cpu,
- desc->ctl_result, desc->data_result);
-
- }
-#if 0
- else if (sec_eng == MSG0_CTL_OP_ENGINE_PUBKEY) {
- pubkey_desc_pt desc;
-
- if (sec_pipe != MSG1_CTL_OP_PUBKEY_PIPE0) {
- /* response to uc load */
- /*
- * XLR_SEC_CMD_DIAG("[%s:STNID_SEC]: ecc cpu=%d
- * ctl_result=0x%llx data_result=%llx\n",
- * __FUNCTION__, desc->op_ctl.cpu, desc->ctl_result,
- * desc->data_result);
- */
- return;
- }
- /*
- * The data descriptor address allows us to associate the
- * response with the submitted operation. Address is 40-bit
- * cacheline aligned address. We need to zero bit 0-4 since
- * they are used for the engine and pipe Id.
- */
- addr = GET_FIELD(msg->msg0, PUBKEY_RSLT_CTL_SRCADDR);
- addr = addr & ~((1 << 5) - 1);
- if (!addr) {
- panic("[%s:STNID_SEC]: NULL pubkey ctrl desc!\n", __FUNCTION__);
- }
- /*
- * The adddress points to the data descriptor. The operation
- * descriptor is defined with the 32-byte cacheline size in
- * mind. It allows the code to use this address to
- * reference the symkey descriptor. (ref: xlr_sec_desc.h)
- */
- addr = addr - sizeof(OperationDescriptor_t);
-
- /* Get pointer to pubkey Descriptor */
- desc = (pubkey_desc_pt) (unsigned long)addr;
- if (!desc) {
- panic("[%s:STNID_SEC]: NULL pubkey data descriptor!\n", __FUNCTION__);
- }
- XLR_SEC_CMD_DIAG("[%s:STNID_PK0]: addr=0x%llx desc=%p alloc=%p \n",
- __FUNCTION__, addr, desc, desc->alloc);
-
- XLR_SEC_CMD_DIAG("[%s:STNID_PK0]: op_ctl=%p phys_self=%llx stn_id=%d \n",
- __FUNCTION__, &desc->op_ctl, desc->op_ctl.phys_self,
- desc->op_ctl.stn_id);
-
- if (addr != desc->op_ctl.phys_self) {
- XLR_SEC_CMD_DIAG("[%s:STNID_PK0]: Control Descriptor fails Self-Verify !\n",
- __FUNCTION__);
- }
- if (desc->op_ctl.stn_id != msgrng_stnid_pk0) {
- XLR_SEC_CMD_DIAG("[%s:STNID_PK0]: Operation Type Mismatch ! \n",
- __FUNCTION__);
- }
- desc->ctl_result = GET_FIELD(msg->msg0, PUBKEY_RSLT_CTL_ERROR);
- desc->data_result = GET_FIELD(msg->msg1, PUBKEY_RSLT_DATA_ERROR);
-
- XLR_SEC_CMD_DIAG("[%s:STNID_PK0]: ctl_result=0x%llx data_result=%llx\n",
- __FUNCTION__, desc->ctl_result, desc->data_result);
-
- }
-#endif
- else {
- printf("[%s]: HANDLER bad id = %d\n", __FUNCTION__, stid);
- }
-#ifdef RMI_SEC_DEBUG
- if (ses->multi_frag_flag) {
- int i;
- char *ptr;
-
- printf("\n RETURNED DATA: \n");
-
- ptr = (char *)(unsigned long)(desc->user.aligned_dest + cmd->op.cipher_offset);
- for (i = 0; i < SEC_MAX_FRAG_LEN; i++) {
- printf("%c ", (char)*ptr++);
- if ((i % 10) == 0)
- printf("\n");
- }
-
- printf("second desc\n");
- ptr = (char *)(unsigned long)(desc->next_dest_buf);
- for (i = 0; i < desc->next_src_len; i++) {
- printf("%c ", (char)*ptr++);
- if ((i % 10) == 0)
- printf("\n");
- }
- }
-#endif
-
-
- /* Copy cipher-data to User-space */
- if (op->cipher_type != XLR_SEC_CIPHER_TYPE_NONE) {
-
- size = op->dest_buf_size;
-
- /* DEBUG -dpk */
- XLR_SEC_CMD_DIAG("cipher: to_addr=%p from_addr=%p size=%d \n",
- desc->user.user_dest, desc->user.aligned_dest, size);
-
- if (ses->multi_frag_flag) {
- crypto_copyback(cmd->crp->crp_flags, cmd->crp->crp_buf, 0,
- SEC_MAX_FRAG_LEN, (caddr_t)(long)desc->user.aligned_dest + op->cipher_offset);
- crypto_copyback(cmd->crp->crp_flags, cmd->crp->crp_buf + SEC_MAX_FRAG_LEN, 0,
- desc->next_src_len, (caddr_t)(long)desc->next_dest_buf);
- crypto_done(cmd->crp);
- } else {
- crypto_copyback(cmd->crp->crp_flags, cmd->crp->crp_buf, 0,
- cmd->op.dest_buf_size, (caddr_t)(long)desc->user.aligned_dest + op->cipher_offset);
- crypto_done(cmd->crp);
-
- }
-
-
- }
- /* Copy digest to User-space */
- if (op->digest_type != XLR_SEC_DIGEST_TYPE_NONE) {
-
- int offset = 0;
-
- switch (op->digest_type) {
- case XLR_SEC_DIGEST_TYPE_MD5:
- size = XLR_SEC_MD5_LENGTH;
- break;
- case XLR_SEC_DIGEST_TYPE_SHA1:
- size = XLR_SEC_SHA1_LENGTH;
- break;
- case XLR_SEC_DIGEST_TYPE_SHA256:
- size = XLR_SEC_SHA256_LENGTH;
- break;
- case XLR_SEC_DIGEST_TYPE_SHA384:
- size = XLR_SEC_SHA384_LENGTH;
- break;
- case XLR_SEC_DIGEST_TYPE_SHA512:
- size = XLR_SEC_SHA512_LENGTH;
- break;
- case XLR_SEC_DIGEST_TYPE_GCM:
- size = XLR_SEC_GCM_LENGTH;
- break;
- case XLR_SEC_DIGEST_TYPE_KASUMI_F9:
- offset = 4;
- size = XLR_SEC_KASUMI_F9_RESULT_LENGTH;
- break;
- default:
- size = 0;
- }
-
- XLR_SEC_CMD_DIAG("digest: to_addr=%p from_addr=%p size=%d \n",
- desc->user.user_auth, desc->user.aligned_auth, size);
- memcpy(desc->user.user_auth, desc->user.aligned_auth + offset, size);
- op->auth_dest = (uint64_t) (unsigned long)desc->user.user_auth;
- }
- if (op->cipher_type == XLR_SEC_CIPHER_TYPE_ARC4 &&
- op->rc4_savestate) {
-
- size = XLR_SEC_MAX_RC4_STATE_SIZE;
-
- XLR_SEC_CMD_DIAG("state: to_addr=%p from_addr=%p size=%d \n",
- desc->user.user_state, desc->user.aligned_state, size);
- op->rc4_state = (uint64_t) (unsigned long)desc->user.user_state;
- }
- return;
-}
diff --git a/sys/dev/rmi/sec/rmilib.h b/sys/dev/rmi/sec/rmilib.h
deleted file mode 100644
index 060b9db..0000000
--- a/sys/dev/rmi/sec/rmilib.h
+++ /dev/null
@@ -1,997 +0,0 @@
-/*-
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD */
-
-#ifndef _RMILIB_H_
-#define _RMILIB_H_
-
-#include <dev/rmi/sec/desc.h>
-#include <mips/xlr/iomap.h>
-
-/*#define XLR_SEC_CMD_DEBUG*/
-
-#ifdef XLR_SEC_CMD_DEBUG
-#define DPRINT printf
-#define XLR_SEC_CMD_DIAG(fmt, args...) { \
- DPRINT(fmt, ##args); \
- }
-#define XLR_SEC_CMD_DIAG_SYM_DESC(desc, vec) { \
- decode_symkey_desc ((desc), (vec)); \
- }
-#else
-#define DPRINT(fmt, args...)
-#define XLR_SEC_CMD_DIAG(fmt, args...)
-#define XLR_SEC_CMD_DIAG_SYM_DESC(desc, vec)
-#endif
-
-
-
-
-
-
-/*
-#include <mips/include/pmap.h>
-
-#define OS_ALLOC_KERNEL(size) kmalloc((size), GFP_KERNEL)
-#define virt_to_phys(x) vtophys((vm_offset_t)(x))
-*/
-/*
- * Cryptographic parameter definitions
- */
-#define XLR_SEC_DES_KEY_LENGTH 8 /* Bytes */
-#define XLR_SEC_3DES_KEY_LENGTH 24 /* Bytes */
-#define XLR_SEC_AES128_KEY_LENGTH 16 /* Bytes */
-#define XLR_SEC_AES192_KEY_LENGTH 24 /* Bytes */
-#define XLR_SEC_AES256_KEY_LENGTH 32 /* Bytes */
-#define XLR_SEC_AES128F8_KEY_LENGTH 32 /* Bytes */
-#define XLR_SEC_AES192F8_KEY_LENGTH 48 /* Bytes */
-#define XLR_SEC_AES256F8_KEY_LENGTH 64 /* Bytes */
-#define XLR_SEC_KASUMI_F8_KEY_LENGTH 16 /* Bytes */
-#define XLR_SEC_MAX_CRYPT_KEY_LENGTH XLR_SEC_AES256F8_KEY_LENGTH
-
-
-#define XLR_SEC_DES_IV_LENGTH 8 /* Bytes */
-#define XLR_SEC_AES_IV_LENGTH 16 /* Bytes */
-#define XLR_SEC_ARC4_IV_LENGTH 0 /* Bytes */
-#define XLR_SEC_KASUMI_F8_IV_LENGTH 16 /* Bytes */
-#define XLR_SEC_MAX_IV_LENGTH 16 /* Bytes */
-#define XLR_SEC_IV_LENGTH_BYTES 8 /* Bytes */
-
-#define XLR_SEC_AES_BLOCK_SIZE 16 /* Bytes */
-#define XLR_SEC_DES_BLOCK_SIZE 8 /* Bytes */
-#define XLR_SEC_3DES_BLOCK_SIZE 8 /* Bytes */
-
-#define XLR_SEC_MD5_BLOCK_SIZE 64 /* Bytes */
-#define XLR_SEC_SHA1_BLOCK_SIZE 64 /* Bytes */
-#define XLR_SEC_SHA256_BLOCK_SIZE 64 /* Bytes */
-#define XLR_SEC_SHA384_BLOCK_SIZE 128 /* Bytes */
-#define XLR_SEC_SHA512_BLOCK_SIZE 128 /* Bytes */
-#define XLR_SEC_GCM_BLOCK_SIZE 16 /* XXX: Bytes */
-#define XLR_SEC_KASUMI_F9_BLOCK_SIZE 16 /* XXX: Bytes */
-#define XLR_SEC_MAX_BLOCK_SIZE 64 /* Max of MD5/SHA */
-#define XLR_SEC_MD5_LENGTH 16 /* Bytes */
-#define XLR_SEC_SHA1_LENGTH 20 /* Bytes */
-#define XLR_SEC_SHA256_LENGTH 32 /* Bytes */
-#define XLR_SEC_SHA384_LENGTH 64 /* Bytes */
-#define XLR_SEC_SHA512_LENGTH 64 /* Bytes */
-#define XLR_SEC_GCM_LENGTH 16 /* Bytes */
-#define XLR_SEC_KASUMI_F9_LENGTH 16 /* Bytes */
-#define XLR_SEC_KASUMI_F9_RESULT_LENGTH 4 /* Bytes */
-#define XLR_SEC_HMAC_LENGTH 64 /* Max of MD5/SHA/SHA256 */
-#define XLR_SEC_MAX_AUTH_KEY_LENGTH XLR_SEC_SHA512_BLOCK_SIZE
-#define XLR_SEC_MAX_RC4_STATE_SIZE 264 /* char s[256], int i, int j */
-
-/* Status code is used by the SRL to indicate status */
-typedef unsigned int xlr_sec_status_t;
-
-/*
- * Status codes
- */
-#define XLR_SEC_STATUS_SUCCESS 0
-#define XLR_SEC_STATUS_NO_DEVICE -1
-#define XLR_SEC_STATUS_TIMEOUT -2
-#define XLR_SEC_STATUS_INVALID_PARAMETER -3
-#define XLR_SEC_STATUS_DEVICE_FAILED -4
-#define XLR_SEC_STATUS_DEVICE_BUSY -5
-#define XLR_SEC_STATUS_NO_RESOURCE -6
-#define XLR_SEC_STATUS_CANCELLED -7
-
-/*
- * Flags
- */
-#define XLR_SEC_FLAGS_HIGH_PRIORITY 1
-
-/* Error code is used to indicate any errors */
-typedef int xlr_sec_error_t;
-
-/*
- */
-#define XLR_SEC_ERR_NONE 0
-#define XLR_SEC_ERR_CIPHER_OP -1
-#define XLR_SEC_ERR_CIPHER_TYPE -2
-#define XLR_SEC_ERR_CIPHER_MODE -3
-#define XLR_SEC_ERR_CIPHER_INIT -4
-#define XLR_SEC_ERR_DIGEST_TYPE -5
-#define XLR_SEC_ERR_DIGEST_INIT -6
-#define XLR_SEC_ERR_DIGEST_SRC -7
-#define XLR_SEC_ERR_CKSUM_TYPE -8
-#define XLR_SEC_ERR_CKSUM_SRC -9
-#define XLR_SEC_ERR_ALLOC -10
-#define XLR_SEC_ERR_CONTROL_VECTOR -11
-#define XLR_SEC_ERR_LOADHMACKEY_MODE -12
-#define XLR_SEC_ERR_PADHASH_MODE -13
-#define XLR_SEC_ERR_HASHBYTES_MODE -14
-#define XLR_SEC_ERR_NEXT_MODE -15
-#define XLR_SEC_ERR_PKT_IV_MODE -16
-#define XLR_SEC_ERR_LASTWORD_MODE -17
-#define XLR_SEC_ERR_PUBKEY_OP -18
-#define XLR_SEC_ERR_SYMKEY_MSGSND -19
-#define XLR_SEC_ERR_PUBKEY_MSGSND -20
-#define XLR_SEC_ERR_SYMKEY_GETSEM -21
-#define XLR_SEC_ERR_PUBKEY_GETSEM -22
-
-/*
- * Descriptor Vector quantities
- * (helps to identify descriptor type per operation)
- */
-#define XLR_SEC_VECTOR_CIPHER_DES 0x0001
-#define XLR_SEC_VECTOR_CIPHER_3DES 0x0002
-#define XLR_SEC_VECTOR_CIPHER_AES128 0x0004
-#define XLR_SEC_VECTOR_CIPHER_AES192 0x0008
-#define XLR_SEC_VECTOR_CIPHER_AES256 0x0010
-#define XLR_SEC_VECTOR_CIPHER_ARC4 0x0020
-#define XLR_SEC_VECTOR_CIPHER_AES (XLR_SEC_VECTOR_CIPHER_AES128 | \
- XLR_SEC_VECTOR_CIPHER_AES192 | \
- XLR_SEC_VECTOR_CIPHER_AES256)
-#define XLR_SEC_VECTOR_CIPHER (XLR_SEC_VECTOR_CIPHER_DES | \
- XLR_SEC_VECTOR_CIPHER_3DES | \
- XLR_SEC_VECTOR_CIPHER_AES128 | \
- XLR_SEC_VECTOR_CIPHER_AES192 | \
- XLR_SEC_VECTOR_CIPHER_AES256 | \
- XLR_SEC_VECTOR_CIPHER_ARC4)
-
-#define XLR_SEC_VECTOR_HMAC 0x0040
-#define XLR_SEC_VECTOR_MAC 0x0080
-#define XLR_SEC_VECTOR_MODE_CTR_CFB 0x0100
-#define XLR_SEC_VECTOR_MODE_ECB_CBC_OFB 0x0200
-#define XLR_SEC_VECTOR_MODE_ECB_CBC 0x0400
-#define XLR_SEC_VECTOR_STATE 0x0800
-#define XLR_SEC_VECTOR_CIPHER_KASUMI_F8 0x01000
-#define XLR_SEC_VECTOR_HMAC2 0x02000
-#define XLR_SEC_VECTOR_GCM 0x04000
-#define XLR_SEC_VECTOR_F9 0x08000
-#define XLR_SEC_VECTOR_MODE_F8 0x10000
-
-#define XLR_SEC_VECTOR_CIPHER_ARC4__HMAC \
-(XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_HMAC)
-#define XLR_SEC_VECTOR_CIPHER_ARC4__STATE \
-(XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_STATE)
-#define XLR_SEC_VECTOR_CIPHER_ARC4__HMAC__STATE \
-(XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_STATE)
-
-#define XLR_SEC_VECTOR__CIPHER_DES__HMAC__MODE_ECB_CBC \
-(XLR_SEC_VECTOR_CIPHER_DES | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_ECB_CBC)
-
-#define XLR_SEC_VECTOR__CIPHER_DES__MODE_ECB_CBC \
-(XLR_SEC_VECTOR_CIPHER_DES | XLR_SEC_VECTOR_MODE_ECB_CBC)
-
-#define XLR_SEC_VECTOR__CIPHER_3DES__HMAC__MODE_ECB_CBC \
-(XLR_SEC_VECTOR_CIPHER_3DES | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_ECB_CBC)
-
-#define XLR_SEC_VECTOR__CIPHER_3DES__MODE_ECB_CBC \
-(XLR_SEC_VECTOR_CIPHER_3DES | XLR_SEC_VECTOR_MODE_ECB_CBC)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__HMAC__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_F8)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_MODE_F8)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__HMAC__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_F8)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_MODE_F8)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__HMAC__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_HMAC | XLR_SEC_VECTOR_MODE_F8)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_MODE_F8)
-
-#define XLR_SEC_VECTOR_CIPHER_KASUMI_F8__F9 \
-(XLR_SEC_VECTOR_CIPHER_KASUMI_F8 | XLR_SEC_VECTOR_F9)
-
-#define XLR_SEC_VECTOR_CIPHER_KASUMI_F8__HMAC \
-(XLR_SEC_VECTOR_CIPHER_KASUMI_F8 | XLR_SEC_VECTOR_HMAC)
-
-#define XLR_SEC_VECTOR_CIPHER_KASUMI_F8__HMAC2 \
-(XLR_SEC_VECTOR_CIPHER_KASUMI_F8 | XLR_SEC_VECTOR_HMAC2)
-
-#define XLR_SEC_VECTOR_CIPHER_KASUMI_F8__GCM \
-(XLR_SEC_VECTOR_CIPHER_KASUMI_F8 | XLR_SEC_VECTOR_GCM)
-
-#define XLR_SEC_VECTOR_CIPHER_ARC4__HMAC2 \
-(XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_HMAC2)
-
-#define XLR_SEC_VECTOR_CIPHER_ARC4__HMAC2__STATE \
-(XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_STATE)
-
-#define XLR_SEC_VECTOR__CIPHER_DES__HMAC2__MODE_ECB_CBC \
-(XLR_SEC_VECTOR_CIPHER_DES | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_ECB_CBC)
-
-#define XLR_SEC_VECTOR__CIPHER_3DES__HMAC2__MODE_ECB_CBC \
-(XLR_SEC_VECTOR_CIPHER_3DES | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_ECB_CBC)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__HMAC2__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_F8)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__HMAC2__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_F8)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__HMAC2__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_HMAC2 | XLR_SEC_VECTOR_MODE_F8)
-
-#define XLR_SEC_VECTOR_CIPHER_ARC4__GCM \
-(XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_GCM)
-
-#define XLR_SEC_VECTOR_CIPHER_ARC4__GCM__STATE \
-(XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_STATE)
-
-#define XLR_SEC_VECTOR__CIPHER_DES__GCM__MODE_ECB_CBC \
-(XLR_SEC_VECTOR_CIPHER_DES | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_ECB_CBC)
-
-#define XLR_SEC_VECTOR__CIPHER_3DES__GCM__MODE_ECB_CBC \
-(XLR_SEC_VECTOR_CIPHER_3DES | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_ECB_CBC)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__GCM__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_F8)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__GCM__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_F8)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__GCM__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_GCM | XLR_SEC_VECTOR_MODE_F8)
-
-#define XLR_SEC_VECTOR_CIPHER_ARC4__F9 \
-(XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_F9)
-
-#define XLR_SEC_VECTOR_CIPHER_ARC4__F9__STATE \
-(XLR_SEC_VECTOR_CIPHER_ARC4 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_STATE)
-
-#define XLR_SEC_VECTOR__CIPHER_DES__F9__MODE_ECB_CBC \
-(XLR_SEC_VECTOR_CIPHER_DES | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_ECB_CBC)
-
-#define XLR_SEC_VECTOR__CIPHER_3DES__F9__MODE_ECB_CBC \
-(XLR_SEC_VECTOR_CIPHER_3DES | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_ECB_CBC)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_CTR_CFB \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_CTR_CFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_ECB_CBC_OFB \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_ECB_CBC_OFB)
-
-#define XLR_SEC_VECTOR__CIPHER_AES128__F9__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES128 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_F8)
-
-#define XLR_SEC_VECTOR__CIPHER_AES192__F9__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES192 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_F8)
-
-#define XLR_SEC_VECTOR__CIPHER_AES256__F9__MODE_F8 \
-(XLR_SEC_VECTOR_CIPHER_AES256 | XLR_SEC_VECTOR_F9 | XLR_SEC_VECTOR_MODE_F8)
-
-/*
- * Cipher Modes
- */
-typedef enum {
- XLR_SEC_CIPHER_MODE_NONE = 0,
- XLR_SEC_CIPHER_MODE_PASS = 1,
- XLR_SEC_CIPHER_MODE_ECB,
- XLR_SEC_CIPHER_MODE_CBC,
- XLR_SEC_CIPHER_MODE_OFB,
- XLR_SEC_CIPHER_MODE_CTR,
- XLR_SEC_CIPHER_MODE_CFB,
- XLR_SEC_CIPHER_MODE_F8
-} XLR_SEC_CIPHER_MODE;
-
-typedef enum {
- XLR_SEC_CIPHER_OP_NONE = 0,
- XLR_SEC_CIPHER_OP_ENCRYPT = 1,
- XLR_SEC_CIPHER_OP_DECRYPT
-} XLR_SEC_CIPHER_OP;
-
-typedef enum {
- XLR_SEC_CIPHER_TYPE_UNSUPPORTED = -1,
- XLR_SEC_CIPHER_TYPE_NONE = 0,
- XLR_SEC_CIPHER_TYPE_DES,
- XLR_SEC_CIPHER_TYPE_3DES,
- XLR_SEC_CIPHER_TYPE_AES128,
- XLR_SEC_CIPHER_TYPE_AES192,
- XLR_SEC_CIPHER_TYPE_AES256,
- XLR_SEC_CIPHER_TYPE_ARC4,
- XLR_SEC_CIPHER_TYPE_KASUMI_F8
-} XLR_SEC_CIPHER_TYPE;
-
-typedef enum {
- XLR_SEC_CIPHER_INIT_OK = 1, /* Preserve old Keys */
- XLR_SEC_CIPHER_INIT_NK /* Load new Keys */
-} XLR_SEC_CIPHER_INIT;
-
-
-/*
- * Hash Modes
- */
-typedef enum {
- XLR_SEC_DIGEST_TYPE_UNSUPPORTED = -1,
- XLR_SEC_DIGEST_TYPE_NONE = 0,
- XLR_SEC_DIGEST_TYPE_MD5,
- XLR_SEC_DIGEST_TYPE_SHA1,
- XLR_SEC_DIGEST_TYPE_SHA256,
- XLR_SEC_DIGEST_TYPE_SHA384,
- XLR_SEC_DIGEST_TYPE_SHA512,
- XLR_SEC_DIGEST_TYPE_GCM,
- XLR_SEC_DIGEST_TYPE_KASUMI_F9,
- XLR_SEC_DIGEST_TYPE_HMAC_MD5,
- XLR_SEC_DIGEST_TYPE_HMAC_SHA1,
- XLR_SEC_DIGEST_TYPE_HMAC_SHA256,
- XLR_SEC_DIGEST_TYPE_HMAC_SHA384,
- XLR_SEC_DIGEST_TYPE_HMAC_SHA512,
- XLR_SEC_DIGEST_TYPE_HMAC_AES_CBC,
- XLR_SEC_DIGEST_TYPE_HMAC_AES_XCBC
-} XLR_SEC_DIGEST_TYPE;
-
-typedef enum {
- XLR_SEC_DIGEST_INIT_OLDKEY = 1, /* Preserve old key HMAC key stored in
- * ID registers (moot if HASH.HMAC ==
- * 0) */
- XLR_SEC_DIGEST_INIT_NEWKEY /* Load new HMAC key from memory ctrl
- * section to ID registers */
-} XLR_SEC_DIGEST_INIT;
-
-typedef enum {
- XLR_SEC_DIGEST_SRC_DMA = 1, /* DMA channel */
- XLR_SEC_DIGEST_SRC_CPHR /* Cipher if word count exceeded
- * Cipher_Offset; else DMA */
-} XLR_SEC_DIGEST_SRC;
-
-/*
- * Checksum Modes
- */
-typedef enum {
- XLR_SEC_CKSUM_TYPE_NOP = 1,
- XLR_SEC_CKSUM_TYPE_IP
-} XLR_SEC_CKSUM_TYPE;
-
-typedef enum {
- XLR_SEC_CKSUM_SRC_DMA = 1,
- XLR_SEC_CKSUM_SRC_CIPHER
-} XLR_SEC_CKSUM_SRC;
-
-/*
- * Packet Modes
- */
-typedef enum {
- XLR_SEC_LOADHMACKEY_MODE_OLD = 1,
- XLR_SEC_LOADHMACKEY_MODE_LOAD
-} XLR_SEC_LOADHMACKEY_MODE;
-
-typedef enum {
- XLR_SEC_PADHASH_PADDED = 1,
- XLR_SEC_PADHASH_PAD
-} XLR_SEC_PADHASH_MODE;
-
-typedef enum {
- XLR_SEC_HASHBYTES_ALL8 = 1,
- XLR_SEC_HASHBYTES_MSB,
- XLR_SEC_HASHBYTES_MSW
-} XLR_SEC_HASHBYTES_MODE;
-
-typedef enum {
- XLR_SEC_NEXT_FINISH = 1,
- XLR_SEC_NEXT_DO
-} XLR_SEC_NEXT_MODE;
-
-typedef enum {
- XLR_SEC_PKT_IV_OLD = 1,
- XLR_SEC_PKT_IV_NEW
-} XLR_SEC_PKT_IV_MODE;
-
-typedef enum {
- XLR_SEC_LASTWORD_128 = 1,
- XLR_SEC_LASTWORD_96MASK,
- XLR_SEC_LASTWORD_64MASK,
- XLR_SEC_LASTWORD_32MASK
-} XLR_SEC_LASTWORD_MODE;
-
-typedef enum {
- XLR_SEC_CFB_MASK_REGULAR_CTR = 0,
- XLR_SEC_CFB_MASK_CCMP,
- XLR_SEC_CFB_MASK_GCM_WITH_SCI,
- XLR_SEC_CFB_MASK_GCM_WITHOUT_SCI
-} XLR_SEC_CFB_MASK_MODE;
-
-/*
- * Public Key
- */
-typedef enum {
- RMIPK_BLKWIDTH_512 = 1,
- RMIPK_BLKWIDTH_1024
-} RMIPK_BLKWIDTH_MODE;
-
-typedef enum {
- RMIPK_LDCONST_OLD = 1,
- RMIPK_LDCONST_NEW
-} RMIPK_LDCONST_MODE;
-
-
-typedef struct xlr_sec_io_s {
- unsigned int command;
- unsigned int result_status;
- unsigned int flags;
- unsigned int session_num;
- unsigned int use_callback;
- unsigned int time_us;
- unsigned int user_context[2]; /* usable for anything by caller */
- unsigned int command_context; /* Context (ID) of this command). */
- unsigned char initial_vector[XLR_SEC_MAX_IV_LENGTH];
- unsigned char crypt_key[XLR_SEC_MAX_CRYPT_KEY_LENGTH];
- unsigned char mac_key[XLR_SEC_MAX_AUTH_KEY_LENGTH];
-
- XLR_SEC_CIPHER_OP cipher_op;
- XLR_SEC_CIPHER_MODE cipher_mode;
- XLR_SEC_CIPHER_TYPE cipher_type;
- XLR_SEC_CIPHER_INIT cipher_init;
- unsigned int cipher_offset;
-
- XLR_SEC_DIGEST_TYPE digest_type;
- XLR_SEC_DIGEST_INIT digest_init;
- XLR_SEC_DIGEST_SRC digest_src;
- unsigned int digest_offset;
-
- XLR_SEC_CKSUM_TYPE cksum_type;
- XLR_SEC_CKSUM_SRC cksum_src;
- unsigned int cksum_offset;
-
- XLR_SEC_LOADHMACKEY_MODE pkt_hmac;
- XLR_SEC_PADHASH_MODE pkt_hash;
- XLR_SEC_HASHBYTES_MODE pkt_hashbytes;
- XLR_SEC_NEXT_MODE pkt_next;
- XLR_SEC_PKT_IV_MODE pkt_iv;
- XLR_SEC_LASTWORD_MODE pkt_lastword;
-
- unsigned int nonce;
- unsigned int cfb_mask;
-
- unsigned int iv_offset;
- unsigned short pad_type;
- unsigned short rc4_key_len;
-
- unsigned int num_packets;
- unsigned int num_fragments;
-
- uint64_t source_buf;
- unsigned int source_buf_size;
- uint64_t dest_buf;
- unsigned int dest_buf_size;
-
- uint64_t auth_dest;
- uint64_t cksum_dest;
-
- unsigned short rc4_loadstate;
- unsigned short rc4_savestate;
- uint64_t rc4_state;
-
-} xlr_sec_io_t, *xlr_sec_io_pt;
-
-
-#define XLR_SEC_SESSION(sid) ((sid) & 0x000007ff)
-#define XLR_SEC_SID(crd,ses) (((crd) << 28) | ((ses) & 0x7ff))
-
-/*
- * Length values for cryptography
- */
-/*
-#define XLR_SEC_DES_KEY_LENGTH 8
-#define XLR_SEC_3DES_KEY_LENGTH 24
-#define XLR_SEC_MAX_CRYPT_KEY_LENGTH XLR_SEC_3DES_KEY_LENGTH
-#define XLR_SEC_IV_LENGTH 8
-#define XLR_SEC_AES_IV_LENGTH 16
-#define XLR_SEC_MAX_IV_LENGTH XLR_SEC_AES_IV_LENGTH
-*/
-
-#define SEC_MAX_FRAG_LEN 16000
-
-struct xlr_sec_command {
- uint16_t session_num;
- struct cryptop *crp;
- struct cryptodesc *enccrd, *maccrd;
-
- xlr_sec_io_t op;
-};
-struct xlr_sec_session {
- uint32_t sessionid;
- int hs_used;
- int hs_mlen;
- struct xlr_sec_command cmd;
- void *desc_ptr;
- uint8_t multi_frag_flag;
-};
-
-/*
- * Holds data specific to rmi security accelerators
- */
-struct xlr_sec_softc {
- device_t sc_dev; /* device backpointer */
- struct mtx sc_mtx; /* per-instance lock */
-
- int32_t sc_cid;
- struct xlr_sec_session *sc_sessions;
- int sc_nsessions;
- xlr_reg_t *mmio;
-};
-
-
-/*
-
-union xlr_sec_operand_t {
- struct mbuf *m;
- struct uio *io;
- void *buf;
-}xlr_sec_operand;
-*/
-
-
-
-
-
-/* this is passed to packet setup to optimize */
-#define XLR_SEC_SETUP_OP_CIPHER 0x00000001
-#define XLR_SEC_SETUP_OP_HMAC 0x00000002
-#define XLR_SEC_SETUP_OP_CIPHER_HMAC (XLR_SEC_SETUP_OP_CIPHER | XLR_SEC_SETUP_OP_HMAC)
-/* this is passed to control_setup to update w/preserving existing keys */
-#define XLR_SEC_SETUP_OP_PRESERVE_HMAC_KEY 0x80000000
-#define XLR_SEC_SETUP_OP_PRESERVE_CIPHER_KEY 0x40000000
-#define XLR_SEC_SETUP_OP_UPDATE_KEYS 0x00000010
-#define XLR_SEC_SETUP_OP_FLIP_3DES_KEY 0x00000020
-
-
-
-
-
-/*
- * Message Ring Specifics
- */
-
-#define SEC_MSGRING_WORDSIZE 2
-
-
-/*
- *
- *
- * rwR 31 30 29 27 26 24 23 21 20 18
- * | NA | RSA0Out | Rsa0In | Pipe3Out | Pipe3In | ...
- *
- * 17 15 14 12 11 9 8 6 5 3 2 0
- * | Pipe2Out | Pipe2In | Pipe1In | Pipe1In | Pipe0Out | Pipe0In |
- *
- * DMA CREDIT REG -
- * NUMBER OF CREDITS PER PIPE
- */
-
-#define SEC_DMA_CREDIT_RSA0_OUT_FOUR 0x20000000
-#define SEC_DMA_CREDIT_RSA0_OUT_TWO 0x10000000
-#define SEC_DMA_CREDIT_RSA0_OUT_ONE 0x08000000
-
-#define SEC_DMA_CREDIT_RSA0_IN_FOUR 0x04000000
-#define SEC_DMA_CREDIT_RSA0_IN_TWO 0x02000000
-#define SEC_DMA_CREDIT_RSA0_IN_ONE 0x01000000
-
-#define SEC_DMA_CREDIT_PIPE3_OUT_FOUR 0x00800000
-#define SEC_DMA_CREDIT_PIPE3_OUT_TWO 0x00400000
-#define SEC_DMA_CREDIT_PIPE3_OUT_ONE 0x00200000
-
-#define SEC_DMA_CREDIT_PIPE3_IN_FOUR 0x00100000
-#define SEC_DMA_CREDIT_PIPE3_IN_TWO 0x00080000
-#define SEC_DMA_CREDIT_PIPE3_IN_ONE 0x00040000
-
-#define SEC_DMA_CREDIT_PIPE2_OUT_FOUR 0x00020000
-#define SEC_DMA_CREDIT_PIPE2_OUT_TWO 0x00010000
-#define SEC_DMA_CREDIT_PIPE2_OUT_ONE 0x00008000
-
-#define SEC_DMA_CREDIT_PIPE2_IN_FOUR 0x00004000
-#define SEC_DMA_CREDIT_PIPE2_IN_TWO 0x00002000
-#define SEC_DMA_CREDIT_PIPE2_IN_ONE 0x00001000
-
-#define SEC_DMA_CREDIT_PIPE1_OUT_FOUR 0x00000800
-#define SEC_DMA_CREDIT_PIPE1_OUT_TWO 0x00000400
-#define SEC_DMA_CREDIT_PIPE1_OUT_ONE 0x00000200
-
-#define SEC_DMA_CREDIT_PIPE1_IN_FOUR 0x00000100
-#define SEC_DMA_CREDIT_PIPE1_IN_TWO 0x00000080
-#define SEC_DMA_CREDIT_PIPE1_IN_ONE 0x00000040
-
-#define SEC_DMA_CREDIT_PIPE0_OUT_FOUR 0x00000020
-#define SEC_DMA_CREDIT_PIPE0_OUT_TWO 0x00000010
-#define SEC_DMA_CREDIT_PIPE0_OUT_ONE 0x00000008
-
-#define SEC_DMA_CREDIT_PIPE0_IN_FOUR 0x00000004
-#define SEC_DMA_CREDIT_PIPE0_IN_TWO 0x00000002
-#define SEC_DMA_CREDIT_PIPE0_IN_ONE 0x00000001
-
-
-/*
- * Currently, FOUR credits per PIPE
- * 0x24924924
- */
-#define SEC_DMA_CREDIT_CONFIG SEC_DMA_CREDIT_RSA0_OUT_FOUR | \
- SEC_DMA_CREDIT_RSA0_IN_FOUR | \
- SEC_DMA_CREDIT_PIPE3_OUT_FOUR | \
- SEC_DMA_CREDIT_PIPE3_IN_FOUR | \
- SEC_DMA_CREDIT_PIPE2_OUT_FOUR | \
- SEC_DMA_CREDIT_PIPE2_IN_FOUR | \
- SEC_DMA_CREDIT_PIPE1_OUT_FOUR | \
- SEC_DMA_CREDIT_PIPE1_IN_FOUR | \
- SEC_DMA_CREDIT_PIPE0_OUT_FOUR | \
- SEC_DMA_CREDIT_PIPE0_IN_FOUR
-
-
-
-
-/*
- * CONFIG2
- * 31 5 4 3
- * | NA | PIPE3_DEF_DBL_ISS | PIPE2_DEF_DBL_ISS | ...
- *
- * 2 1 0
- * ... | PIPE1_DEF_DBL_ISS | PIPE0_DEF_DBL_ISS | ROUND_ROBIN_MODE |
- *
- * DBL_ISS - mode for SECENG and DMA controller which slows down transfers
- * (to be conservativei; 0=Disable,1=Enable).
- * ROUND_ROBIN - mode where SECENG dispatches operations to PIPE0-PIPE3
- * and all messages are sent to PIPE0.
- *
- */
-
-#define SEC_CFG2_PIPE3_DBL_ISS_ON 0x00000010
-#define SEC_CFG2_PIPE3_DBL_ISS_OFF 0x00000000
-#define SEC_CFG2_PIPE2_DBL_ISS_ON 0x00000008
-#define SEC_CFG2_PIPE2_DBL_ISS_OFF 0x00000000
-#define SEC_CFG2_PIPE1_DBL_ISS_ON 0x00000004
-#define SEC_CFG2_PIPE1_DBL_ISS_OFF 0x00000000
-#define SEC_CFG2_PIPE0_DBL_ISS_ON 0x00000002
-#define SEC_CFG2_PIPE0_DBL_ISS_OFF 0x00000000
-#define SEC_CFG2_ROUND_ROBIN_ON 0x00000001
-#define SEC_CFG2_ROUND_ROBIN_OFF 0x00000000
-
-
-enum sec_pipe_config {
-
- SEC_PIPE_CIPHER_KEY0_L0 = 0x00,
- SEC_PIPE_CIPHER_KEY0_HI,
- SEC_PIPE_CIPHER_KEY1_LO,
- SEC_PIPE_CIPHER_KEY1_HI,
- SEC_PIPE_CIPHER_KEY2_LO,
- SEC_PIPE_CIPHER_KEY2_HI,
- SEC_PIPE_CIPHER_KEY3_LO,
- SEC_PIPE_CIPHER_KEY3_HI,
- SEC_PIPE_HMAC_KEY0_LO,
- SEC_PIPE_HMAC_KEY0_HI,
- SEC_PIPE_HMAC_KEY1_LO,
- SEC_PIPE_HMAC_KEY1_HI,
- SEC_PIPE_HMAC_KEY2_LO,
- SEC_PIPE_HMAC_KEY2_HI,
- SEC_PIPE_HMAC_KEY3_LO,
- SEC_PIPE_HMAC_KEY3_HI,
- SEC_PIPE_HMAC_KEY4_LO,
- SEC_PIPE_HMAC_KEY4_HI,
- SEC_PIPE_HMAC_KEY5_LO,
- SEC_PIPE_HMAC_KEY5_HI,
- SEC_PIPE_HMAC_KEY6_LO,
- SEC_PIPE_HMAC_KEY6_HI,
- SEC_PIPE_HMAC_KEY7_LO,
- SEC_PIPE_HMAC_KEY7_HI,
- SEC_PIPE_NCFBM_LO,
- SEC_PIPE_NCFBM_HI,
- SEC_PIPE_INSTR_LO,
- SEC_PIPE_INSTR_HI,
- SEC_PIPE_RSVD0,
- SEC_PIPE_RSVD1,
- SEC_PIPE_RSVD2,
- SEC_PIPE_RSVD3,
-
- SEC_PIPE_DF_PTRS0,
- SEC_PIPE_DF_PTRS1,
- SEC_PIPE_DF_PTRS2,
- SEC_PIPE_DF_PTRS3,
- SEC_PIPE_DF_PTRS4,
- SEC_PIPE_DF_PTRS5,
- SEC_PIPE_DF_PTRS6,
- SEC_PIPE_DF_PTRS7,
-
- SEC_PIPE_DU_DATA_IN_LO,
- SEC_PIPE_DU_DATA_IN_HI,
- SEC_PIPE_DU_DATA_IN_CTRL,
- SEC_PIPE_DU_DATA_OUT_LO,
- SEC_PIPE_DU_DATA_OUT_HI,
- SEC_PIPE_DU_DATA_OUT_CTRL,
-
- SEC_PIPE_STATE0,
- SEC_PIPE_STATE1,
- SEC_PIPE_STATE2,
- SEC_PIPE_STATE3,
- SEC_PIPE_STATE4,
- SEC_PIPE_INCLUDE_MASK0,
- SEC_PIPE_INCLUDE_MASK1,
- SEC_PIPE_INCLUDE_MASK2,
- SEC_PIPE_INCLUDE_MASK3,
- SEC_PIPE_INCLUDE_MASK4,
- SEC_PIPE_EXCLUDE_MASK0,
- SEC_PIPE_EXCLUDE_MASK1,
- SEC_PIPE_EXCLUDE_MASK2,
- SEC_PIPE_EXCLUDE_MASK3,
- SEC_PIPE_EXCLUDE_MASK4,
-};
-
-
-enum sec_pipe_base_config {
-
- SEC_PIPE0_BASE = 0x00,
- SEC_PIPE1_BASE = 0x40,
- SEC_PIPE2_BASE = 0x80,
- SEC_PIPE3_BASE = 0xc0
-
-};
-
-enum sec_rsa_config {
-
- SEC_RSA_PIPE0_DU_DATA_IN_LO = 0x100,
- SEC_RSA_PIPE0_DU_DATA_IN_HI,
- SEC_RSA_PIPE0_DU_DATA_IN_CTRL,
- SEC_RSA_PIPE0_DU_DATA_OUT_LO,
- SEC_RSA_PIPE0_DU_DATA_OUT_HI,
- SEC_RSA_PIPE0_DU_DATA_OUT_CTRL,
- SEC_RSA_RSVD0,
- SEC_RSA_RSVD1,
-
- SEC_RSA_PIPE0_STATE0,
- SEC_RSA_PIPE0_STATE1,
- SEC_RSA_PIPE0_STATE2,
- SEC_RSA_PIPE0_INCLUDE_MASK0,
- SEC_RSA_PIPE0_INCLUDE_MASK1,
- SEC_RSA_PIPE0_INCLUDE_MASK2,
- SEC_RSA_PIPE0_EXCLUDE_MASK0,
- SEC_RSA_PIPE0_EXCLUDE_MASK1,
- SEC_RSA_PIPE0_EXCLUDE_MASK2,
- SEC_RSA_PIPE0_EVENT_CTR
-
-};
-
-
-
-
-enum sec_config {
-
- SEC_DMA_CREDIT = 0x140,
- SEC_CONFIG1,
- SEC_CONFIG2,
- SEC_CONFIG3,
-
-};
-
-
-
-enum sec_debug_config {
-
- SEC_DW0_DESCRIPTOR0_LO = 0x180,
- SEC_DW0_DESCRIPTOR0_HI,
- SEC_DW0_DESCRIPTOR1_LO,
- SEC_DW0_DESCRIPTOR1_HI,
- SEC_DW1_DESCRIPTOR0_LO,
- SEC_DW1_DESCRIPTOR0_HI,
- SEC_DW1_DESCRIPTOR1_LO,
- SEC_DW1_DESCRIPTOR1_HI,
- SEC_DW2_DESCRIPTOR0_LO,
- SEC_DW2_DESCRIPTOR0_HI,
- SEC_DW2_DESCRIPTOR1_LO,
- SEC_DW2_DESCRIPTOR1_HI,
- SEC_DW3_DESCRIPTOR0_LO,
- SEC_DW3_DESCRIPTOR0_HI,
- SEC_DW3_DESCRIPTOR1_LO,
- SEC_DW3_DESCRIPTOR1_HI,
-
- SEC_STATE0,
- SEC_STATE1,
- SEC_STATE2,
- SEC_INCLUDE_MASK0,
- SEC_INCLUDE_MASK1,
- SEC_INCLUDE_MASK2,
- SEC_EXCLUDE_MASK0,
- SEC_EXCLUDE_MASK1,
- SEC_EXCLUDE_MASK2,
- SEC_EVENT_CTR
-
-};
-
-
-enum sec_msgring_bucket_config {
-
- SEC_BIU_CREDITS = 0x308,
-
- SEC_MSG_BUCKET0_SIZE = 0x320,
- SEC_MSG_BUCKET1_SIZE,
- SEC_MSG_BUCKET2_SIZE,
- SEC_MSG_BUCKET3_SIZE,
- SEC_MSG_BUCKET4_SIZE,
- SEC_MSG_BUCKET5_SIZE,
- SEC_MSG_BUCKET6_SIZE,
- SEC_MSG_BUCKET7_SIZE,
-};
-
-enum sec_msgring_credit_config {
-
- SEC_CC_CPU0_0 = 0x380,
- SEC_CC_CPU1_0 = 0x388,
- SEC_CC_CPU2_0 = 0x390,
- SEC_CC_CPU3_0 = 0x398,
- SEC_CC_CPU4_0 = 0x3a0,
- SEC_CC_CPU5_0 = 0x3a8,
- SEC_CC_CPU6_0 = 0x3b0,
- SEC_CC_CPU7_0 = 0x3b8
-
-};
-
-enum sec_engine_id {
- SEC_PIPE0,
- SEC_PIPE1,
- SEC_PIPE2,
- SEC_PIPE3,
- SEC_RSA
-};
-
-enum sec_cipher {
- SEC_AES256_MODE_HMAC,
- SEC_AES256_MODE,
- SEC_AES256_HMAC,
- SEC_AES256,
- SEC_AES192_MODE_HMAC,
- SEC_AES192_MODE,
- SEC_AES192_HMAC,
- SEC_AES192,
- SEC_AES128_MODE_HMAC,
- SEC_AES128_MODE,
- SEC_AES128_HMAC,
- SEC_AES128,
- SEC_DES_HMAC,
- SEC_DES,
- SEC_3DES,
- SEC_3DES_HMAC,
- SEC_HMAC
-};
-
-enum sec_msgrng_msg_ctrl_config {
- SEC_EOP = 5,
- SEC_SOP = 6,
-};
-
-
-
-void
-xlr_sec_init(struct xlr_sec_softc *sc);
-
-int
-xlr_sec_setup(struct xlr_sec_session *ses,
- struct xlr_sec_command *cmd, symkey_desc_pt desc);
-
-symkey_desc_pt xlr_sec_allocate_desc(void *);
-
-#endif
diff --git a/sys/dev/rmi/sec/rmisec.c b/sys/dev/rmi/sec/rmisec.c
deleted file mode 100644
index ad20e09..0000000
--- a/sys/dev/rmi/sec/rmisec.c
+++ /dev/null
@@ -1,603 +0,0 @@
-/*-
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD */
-
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/proc.h>
-#include <sys/errno.h>
-#include <sys/malloc.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/mbuf.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/sysctl.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-
-#include <machine/bus.h>
-#include <machine/resource.h>
-#include <sys/bus.h>
-#include <sys/rman.h>
-
-#include <opencrypto/cryptodev.h>
-#include <sys/random.h>
-
-#include <dev/rmi/sec/rmilib.h>
-
-/*#define RMI_SEC_DEBUG */
-
-
-void xlr_sec_print_data(struct cryptop *crp);
-
-static int xlr_sec_newsession(void *arg, uint32_t * sidp, struct cryptoini *cri);
-static int xlr_sec_freesession(void *arg, uint64_t tid);
-static int xlr_sec_process(void *arg, struct cryptop *crp, int hint);
-
-
-static int xlr_sec_probe(device_t);
-static int xlr_sec_attach(device_t);
-static int xlr_sec_detach(device_t);
-
-
-static device_method_t xlr_sec_methods[] = {
- /* device interface */
- DEVMETHOD(device_probe, xlr_sec_probe),
- DEVMETHOD(device_attach, xlr_sec_attach),
- DEVMETHOD(device_detach, xlr_sec_detach),
-
- /* bus interface */
- DEVMETHOD(bus_print_child, bus_generic_print_child),
- DEVMETHOD(bus_driver_added, bus_generic_driver_added),
-
- {0, 0}
-};
-
-static driver_t xlr_sec_driver = {
- "rmisec",
- xlr_sec_methods,
- sizeof(struct xlr_sec_softc)
-};
-static devclass_t xlr_sec_devclass;
-
-DRIVER_MODULE(rmisec, iodi, xlr_sec_driver, xlr_sec_devclass, 0, 0);
-MODULE_DEPEND(rmisec, crypto, 1, 1, 1);
-
-
-
-static int
-xlr_sec_probe(device_t dev)
-{
- return (BUS_PROBE_DEFAULT);
-
-}
-
-
-/*
- * Attach an interface that successfully probed.
- */
-static int
-xlr_sec_attach(device_t dev)
-{
-
- struct xlr_sec_softc *sc = device_get_softc(dev);
-
- bzero(sc, sizeof(*sc));
- sc->sc_dev = dev;
-
-
- mtx_init(&sc->sc_mtx, device_get_nameunit(dev), "rmi crypto driver", MTX_DEF);
-
- sc->sc_cid = crypto_get_driverid(0);
- if (sc->sc_cid < 0) {
- printf("xlr_sec - error : could not get the driver id\n");
- goto error_exit;
- }
- if (crypto_register(sc->sc_cid, CRYPTO_DES_CBC, 0, 0,
- xlr_sec_newsession, xlr_sec_freesession, xlr_sec_process, sc) != 0)
- printf("register failed for CRYPTO_DES_CBC\n");
-
- if (crypto_register(sc->sc_cid, CRYPTO_3DES_CBC, 0, 0,
- xlr_sec_newsession, xlr_sec_freesession, xlr_sec_process, sc) != 0)
- printf("register failed for CRYPTO_3DES_CBC\n");
-
- if (crypto_register(sc->sc_cid, CRYPTO_AES_CBC, 0, 0,
- xlr_sec_newsession, xlr_sec_freesession,
- xlr_sec_process, sc) != 0)
- printf("register failed for CRYPTO_AES_CBC\n");
-
- if (crypto_register(sc->sc_cid, CRYPTO_ARC4, 0, 0,
- xlr_sec_newsession, xlr_sec_freesession, xlr_sec_process, sc) != 0)
- printf("register failed for CRYPTO_ARC4\n");
-
-
- if (crypto_register(sc->sc_cid, CRYPTO_MD5, 0, 0,
- xlr_sec_newsession, xlr_sec_freesession, xlr_sec_process, sc) != 0)
- printf("register failed for CRYPTO_MD5\n");
-
- if (crypto_register(sc->sc_cid, CRYPTO_SHA1, 0, 0,
- xlr_sec_newsession, xlr_sec_freesession, xlr_sec_process, sc) != 0)
- printf("register failed for CRYPTO_SHA1\n");
-
- if (crypto_register(sc->sc_cid, CRYPTO_MD5_HMAC, 0, 0,
- xlr_sec_newsession, xlr_sec_freesession, xlr_sec_process, sc) != 0)
- printf("register failed for CRYPTO_MD5_HMAC\n");
-
- if (crypto_register(sc->sc_cid, CRYPTO_SHA1_HMAC, 0, 0,
- xlr_sec_newsession, xlr_sec_freesession, xlr_sec_process, sc) != 0)
- printf("register failed for CRYPTO_SHA1_HMAC\n");
-
-
- xlr_sec_init(sc);
- return (0);
-
-
-error_exit:
- return (ENXIO);
-
-}
-
-
-/*
- * Detach an interface that successfully probed.
- */
-static int
-xlr_sec_detach(device_t dev)
-{
- int sesn;
- struct xlr_sec_softc *sc = device_get_softc(dev);
- struct xlr_sec_session *ses = NULL;
- symkey_desc_pt desc;
-
- for (sesn = 0; sesn < sc->sc_nsessions; sesn++) {
- ses = &sc->sc_sessions[sesn];
- desc = (symkey_desc_pt) ses->desc_ptr;
- free(desc->user.kern_src, M_DEVBUF);
- free(desc->user.kern_dest, M_DEVBUF);
- free(desc->next_src_buf, M_DEVBUF);
- free(desc->next_dest_buf, M_DEVBUF);
- free(ses->desc_ptr, M_DEVBUF);
- }
-
- return (0);
-}
-
-
-
-
-/*
- * Allocate a new 'session' and return an encoded session id. 'sidp'
- * contains our registration id, and should contain an encoded session
- * id on successful allocation.
- */
-static int
-xlr_sec_newsession(void *arg, u_int32_t * sidp, struct cryptoini *cri)
-{
- struct cryptoini *c;
- struct xlr_sec_softc *sc = arg;
- int mac = 0, cry = 0, sesn;
- struct xlr_sec_session *ses = NULL;
-
-
- if (sidp == NULL || cri == NULL || sc == NULL)
- return (EINVAL);
-
-
- if (sc->sc_sessions == NULL) {
- ses = sc->sc_sessions = (struct xlr_sec_session *)malloc(
- sizeof(struct xlr_sec_session), M_DEVBUF, M_NOWAIT);
- if (ses == NULL)
- return (ENOMEM);
-
- ses->desc_ptr = (void *)xlr_sec_allocate_desc((void *)ses);
- if (ses->desc_ptr == NULL)
- return (ENOMEM);
-
- sesn = 0;
- ses->sessionid = sesn;
- sc->sc_nsessions = 1;
- } else {
- for (sesn = 0; sesn < sc->sc_nsessions; sesn++) {
- if (!sc->sc_sessions[sesn].hs_used) {
- ses = &sc->sc_sessions[sesn];
- break;
- }
- }
-
- if (ses == NULL) {
- sesn = sc->sc_nsessions;
- ses = (struct xlr_sec_session *)malloc((sesn + 1) *
- sizeof(struct xlr_sec_session), M_DEVBUF, M_NOWAIT);
- if (ses == NULL)
- return (ENOMEM);
- bcopy(sc->sc_sessions, ses, sesn * sizeof(struct xlr_sec_session));
- bzero(sc->sc_sessions, sesn * sizeof(struct xlr_sec_session));
- free(sc->sc_sessions, M_DEVBUF);
- sc->sc_sessions = ses;
- ses = &sc->sc_sessions[sesn];
- ses->sessionid = sesn;
- ses->desc_ptr = (void *)xlr_sec_allocate_desc((void *)ses);
- if (ses->desc_ptr == NULL)
- return (ENOMEM);
- sc->sc_nsessions++;
- }
- }
- ses->hs_used = 1;
-
-
- for (c = cri; c != NULL; c = c->cri_next) {
-
- switch (c->cri_alg) {
- case CRYPTO_MD5:
- case CRYPTO_SHA1:
- case CRYPTO_MD5_HMAC:
- case CRYPTO_SHA1_HMAC:
- if (mac)
- return (EINVAL);
- mac = 1;
- ses->hs_mlen = c->cri_mlen;
- if (ses->hs_mlen == 0) {
- switch (c->cri_alg) {
- case CRYPTO_MD5:
- case CRYPTO_MD5_HMAC:
- ses->hs_mlen = 16;
- break;
- case CRYPTO_SHA1:
- case CRYPTO_SHA1_HMAC:
- ses->hs_mlen = 20;
- break;
- }
- }
- break;
- case CRYPTO_DES_CBC:
- case CRYPTO_3DES_CBC:
- case CRYPTO_AES_CBC:
- /* XXX this may read fewer, does it matter? */
- /*
- * read_random(ses->hs_iv, c->cri_alg ==
- * CRYPTO_AES_CBC ? XLR_SEC_AES_IV_LENGTH :
- * XLR_SEC_IV_LENGTH);
- */
- /* FALLTHROUGH */
- case CRYPTO_ARC4:
- if (cry)
- return (EINVAL);
- cry = 1;
- break;
- default:
- return (EINVAL);
- }
- }
- if (mac == 0 && cry == 0)
- return (EINVAL);
-
- *sidp = XLR_SEC_SID(device_get_unit(sc->sc_dev), sesn);
- return (0);
-}
-
-/*
- * Deallocate a session.
- * XXX this routine should run a zero'd mac/encrypt key into context ram.
- * XXX to blow away any keys already stored there.
- */
-static int
-xlr_sec_freesession(void *arg, u_int64_t tid)
-{
- struct xlr_sec_softc *sc = arg;
- int session;
- u_int32_t sid = CRYPTO_SESID2LID(tid);
-
- if (sc == NULL)
- return (EINVAL);
-
- session = XLR_SEC_SESSION(sid);
- if (session >= sc->sc_nsessions)
- return (EINVAL);
-
- sc->sc_sessions[session].hs_used = 0;
-
- return (0);
-}
-
-#ifdef RMI_SEC_DEBUG
-
-void
-xlr_sec_print_data(struct cryptop *crp)
-{
- int i, key_len;
- struct cryptodesc *crp_desc;
-
- printf("session id = 0x%llx, crp_ilen = %d, crp_olen=%d \n",
- crp->crp_sid, crp->crp_ilen, crp->crp_olen);
-
- printf("crp_flags = 0x%x\n", crp->crp_flags);
-
-
- printf("crp buf:\n");
- for (i = 0; i < crp->crp_ilen; i++) {
- printf("%c ", crp->crp_buf[i]);
- if (i % 10 == 0)
- printf("\n");
- }
-
- printf("\n");
- printf("****************** desc ****************\n");
- crp_desc = crp->crp_desc;
- printf("crd_skip=%d, crd_len=%d, crd_flags=0x%x, crd_alg=%d\n",
- crp_desc->crd_skip, crp_desc->crd_len, crp_desc->crd_flags, crp_desc->crd_alg);
-
- key_len = crp_desc->crd_klen / 8;
- printf("key(%d) :\n", key_len);
- for (i = 0; i < key_len; i++)
- printf("%d", crp_desc->crd_key[i]);
- printf("\n");
-
- printf(" IV : \n");
- for (i = 0; i < EALG_MAX_BLOCK_LEN; i++)
- printf("%d", crp_desc->crd_iv[i]);
- printf("\n");
-
- printf("crd_next=%p\n", crp_desc->crd_next);
- return;
-}
-
-#endif
-
-
-static int
-xlr_sec_process(void *arg, struct cryptop *crp, int hint)
-{
- struct xlr_sec_softc *sc = arg;
- struct xlr_sec_command *cmd = NULL;
- int session, err;
- struct cryptodesc *crd1, *crd2, *maccrd, *enccrd;
- struct xlr_sec_session *ses;
-
- if (crp == NULL || crp->crp_callback == NULL) {
- return (EINVAL);
- }
- session = XLR_SEC_SESSION(crp->crp_sid);
- if (sc == NULL || session >= sc->sc_nsessions) {
- err = EINVAL;
- goto errout;
- }
- ses = &sc->sc_sessions[session];
-
- cmd = &ses->cmd;
- if (cmd == NULL) {
- err = ENOMEM;
- goto errout;
- }
- crd1 = crp->crp_desc;
- if (crd1 == NULL) {
- err = EINVAL;
- goto errout;
- }
- crd2 = crd1->crd_next;
-
- if (crd2 == NULL) {
- if (crd1->crd_alg == CRYPTO_MD5_HMAC ||
- crd1->crd_alg == CRYPTO_SHA1_HMAC ||
- crd1->crd_alg == CRYPTO_SHA1 ||
- crd1->crd_alg == CRYPTO_MD5) {
- maccrd = crd1;
- enccrd = NULL;
- } else if (crd1->crd_alg == CRYPTO_DES_CBC ||
- crd1->crd_alg == CRYPTO_3DES_CBC ||
- crd1->crd_alg == CRYPTO_AES_CBC ||
- crd1->crd_alg == CRYPTO_ARC4) {
- maccrd = NULL;
- enccrd = crd1;
- } else {
- err = EINVAL;
- goto errout;
- }
- } else {
- if ((crd1->crd_alg == CRYPTO_MD5_HMAC ||
- crd1->crd_alg == CRYPTO_SHA1_HMAC ||
- crd1->crd_alg == CRYPTO_MD5 ||
- crd1->crd_alg == CRYPTO_SHA1) &&
- (crd2->crd_alg == CRYPTO_DES_CBC ||
- crd2->crd_alg == CRYPTO_3DES_CBC ||
- crd2->crd_alg == CRYPTO_AES_CBC ||
- crd2->crd_alg == CRYPTO_ARC4)) {
- maccrd = crd1;
- enccrd = crd2;
- } else if ((crd1->crd_alg == CRYPTO_DES_CBC ||
- crd1->crd_alg == CRYPTO_ARC4 ||
- crd1->crd_alg == CRYPTO_3DES_CBC ||
- crd1->crd_alg == CRYPTO_AES_CBC) &&
- (crd2->crd_alg == CRYPTO_MD5_HMAC ||
- crd2->crd_alg == CRYPTO_SHA1_HMAC ||
- crd2->crd_alg == CRYPTO_MD5 ||
- crd2->crd_alg == CRYPTO_SHA1) &&
- (crd1->crd_flags & CRD_F_ENCRYPT)) {
- enccrd = crd1;
- maccrd = crd2;
- } else {
- err = EINVAL;
- goto errout;
- }
- }
-
- bzero(&cmd->op, sizeof(xlr_sec_io_t));
-
- cmd->op.source_buf = (uint64_t) (unsigned long)crp->crp_buf;
- cmd->op.source_buf_size = crp->crp_ilen;
- if (crp->crp_flags & CRYPTO_F_REL) {
- cmd->op.dest_buf = (uint64_t) (unsigned long)crp->crp_buf;
- cmd->op.dest_buf_size = crp->crp_ilen;
- } else {
- cmd->op.dest_buf = (uint64_t) (unsigned long)crp->crp_buf;
- cmd->op.dest_buf_size = crp->crp_ilen;
- }
- cmd->op.num_packets = 1;
- cmd->op.num_fragments = 1;
-
-
- if (cmd->op.source_buf_size > SEC_MAX_FRAG_LEN) {
- ses->multi_frag_flag = 1;
- } else {
- ses->multi_frag_flag = 0;
- }
-
- if (maccrd) {
- cmd->maccrd = maccrd;
- cmd->op.cipher_op = XLR_SEC_CIPHER_MODE_PASS;
- cmd->op.cipher_mode = XLR_SEC_CIPHER_MODE_NONE;
- cmd->op.cipher_type = XLR_SEC_CIPHER_TYPE_NONE;
- cmd->op.cipher_init = 0;
- cmd->op.cipher_offset = 0;
-
- switch (maccrd->crd_alg) {
- case CRYPTO_MD5:
- cmd->op.digest_type = XLR_SEC_DIGEST_TYPE_MD5;
- cmd->op.digest_init = XLR_SEC_DIGEST_INIT_NEWKEY;
- cmd->op.digest_src = XLR_SEC_DIGEST_SRC_DMA;
- cmd->op.digest_offset = 0;
-
- cmd->op.cksum_type = XLR_SEC_CKSUM_TYPE_NOP;
- cmd->op.cksum_src = XLR_SEC_CKSUM_SRC_CIPHER;
- cmd->op.cksum_offset = 0;
-
- cmd->op.pkt_hmac = XLR_SEC_LOADHMACKEY_MODE_OLD;
- cmd->op.pkt_hash = XLR_SEC_PADHASH_PAD;
- cmd->op.pkt_hashbytes = XLR_SEC_HASHBYTES_ALL8;
- cmd->op.pkt_next = XLR_SEC_NEXT_FINISH;
- cmd->op.pkt_iv = XLR_SEC_PKT_IV_OLD;
- cmd->op.pkt_lastword = XLR_SEC_LASTWORD_128;
-
-
- default:
- printf("currently not handled\n");
- }
- }
- if (enccrd) {
- cmd->enccrd = enccrd;
-
-#ifdef RMI_SEC_DEBUG
- xlr_sec_print_data(crp);
-#endif
-
- if (enccrd->crd_flags & CRD_F_ENCRYPT) {
- cmd->op.cipher_op = XLR_SEC_CIPHER_OP_ENCRYPT;
- } else
- cmd->op.cipher_op = XLR_SEC_CIPHER_OP_DECRYPT;
-
- switch (enccrd->crd_alg) {
- case CRYPTO_DES_CBC:
- case CRYPTO_3DES_CBC:
- if (enccrd->crd_alg == CRYPTO_DES_CBC) {
- cmd->op.cipher_type = XLR_SEC_CIPHER_TYPE_DES;
- memcpy(&cmd->op.crypt_key[0], enccrd->crd_key, XLR_SEC_DES_KEY_LENGTH);
- } else {
- cmd->op.cipher_type = XLR_SEC_CIPHER_TYPE_3DES;
- //if (enccrd->crd_flags & CRD_F_KEY_EXPLICIT) {
- memcpy(&cmd->op.crypt_key[0], enccrd->crd_key, XLR_SEC_3DES_KEY_LENGTH);
- }
- }
-
- cmd->op.cipher_mode = XLR_SEC_CIPHER_MODE_CBC;
- cmd->op.cipher_init = XLR_SEC_CIPHER_INIT_NK;
- cmd->op.cipher_offset = XLR_SEC_DES_IV_LENGTH;
-
- cmd->op.digest_type = XLR_SEC_DIGEST_TYPE_NONE;
- cmd->op.digest_init = XLR_SEC_DIGEST_INIT_OLDKEY;
- cmd->op.digest_src = XLR_SEC_DIGEST_SRC_DMA;
- cmd->op.digest_offset = 0;
-
- cmd->op.cksum_type = XLR_SEC_CKSUM_TYPE_NOP;
- cmd->op.cksum_src = XLR_SEC_CKSUM_SRC_CIPHER;
- cmd->op.cksum_offset = 0;
-
- cmd->op.pkt_hmac = XLR_SEC_LOADHMACKEY_MODE_OLD;
- cmd->op.pkt_hash = XLR_SEC_PADHASH_PAD;
- cmd->op.pkt_hashbytes = XLR_SEC_HASHBYTES_ALL8;
- cmd->op.pkt_next = XLR_SEC_NEXT_FINISH;
- cmd->op.pkt_iv = XLR_SEC_PKT_IV_NEW;
- cmd->op.pkt_lastword = XLR_SEC_LASTWORD_128;
-
- //if ((!(enccrd->crd_flags & CRD_F_IV_PRESENT)) &&
- if ((enccrd->crd_flags & CRD_F_IV_EXPLICIT)) {
- memcpy(&cmd->op.initial_vector[0], enccrd->crd_iv, XLR_SEC_DES_IV_LENGTH);
- }
- break;
-
- case CRYPTO_AES_CBC:
- if (enccrd->crd_alg == CRYPTO_AES_CBC) {
- cmd->op.cipher_type = XLR_SEC_CIPHER_TYPE_AES128;
- //if (enccrd->crd_flags & CRD_F_KEY_EXPLICIT) {
- memcpy(&cmd->op.crypt_key[0], enccrd->crd_key, XLR_SEC_AES128_KEY_LENGTH);
- }
- }
- cmd->op.cipher_mode = XLR_SEC_CIPHER_MODE_CBC;
- cmd->op.cipher_init = XLR_SEC_CIPHER_INIT_NK;
- cmd->op.cipher_offset = XLR_SEC_AES_BLOCK_SIZE;
-
- cmd->op.digest_type = XLR_SEC_DIGEST_TYPE_NONE;
- cmd->op.digest_init = XLR_SEC_DIGEST_INIT_OLDKEY;
- cmd->op.digest_src = XLR_SEC_DIGEST_SRC_DMA;
- cmd->op.digest_offset = 0;
-
- cmd->op.cksum_type = XLR_SEC_CKSUM_TYPE_NOP;
- cmd->op.cksum_src = XLR_SEC_CKSUM_SRC_CIPHER;
- cmd->op.cksum_offset = 0;
-
- cmd->op.pkt_hmac = XLR_SEC_LOADHMACKEY_MODE_OLD;
- cmd->op.pkt_hash = XLR_SEC_PADHASH_PAD;
- cmd->op.pkt_hashbytes = XLR_SEC_HASHBYTES_ALL8;
- cmd->op.pkt_next = XLR_SEC_NEXT_FINISH;
- cmd->op.pkt_iv = XLR_SEC_PKT_IV_NEW;
- cmd->op.pkt_lastword = XLR_SEC_LASTWORD_128;
-
- //if (!(enccrd->crd_flags & CRD_F_IV_PRESENT)) {
- if ((enccrd->crd_flags & CRD_F_IV_EXPLICIT)) {
- memcpy(&cmd->op.initial_vector[0], enccrd->crd_iv, XLR_SEC_AES_BLOCK_SIZE);
- }
- //
- }
- break;
- }
- }
- cmd->crp = crp;
- cmd->session_num = session;
- xlr_sec_setup(ses, cmd, (symkey_desc_pt) ses->desc_ptr);
-
- return (0);
-
-errout:
- if (cmd != NULL)
- free(cmd, M_DEVBUF);
- crp->crp_etype = err;
- crypto_done(crp);
- return (err);
-}
diff --git a/sys/dev/rmi/sec/stats.h b/sys/dev/rmi/sec/stats.h
deleted file mode 100644
index 276f7e9..0000000
--- a/sys/dev/rmi/sec/stats.h
+++ /dev/null
@@ -1,469 +0,0 @@
-/*-
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD */
-
-#ifndef _STATS_H_
-#define _STATS_H_
-
-typedef struct hmac_stats
-{
- unsigned long md5_count;
- unsigned long long md5_bytes;
- unsigned long sha1_count;
- unsigned long long sha1_bytes;
- unsigned long sha256_count;
- unsigned long long sha256_bytes;
- unsigned long sha384_count;
- unsigned long long sha384_bytes;
- unsigned long sha512_count;
- unsigned long long sha512_bytes;
- unsigned long gcm_count;
- unsigned long long gcm_bytes;
- unsigned long kasumi_f9_count;
- unsigned long long kasumi_f9_bytes;
- unsigned long reverts;
- unsigned long long reverts_bytes;
-} hmac_stats_t, *hmac_stats_pt;
-
-typedef struct cipher_stats
-{
- unsigned long des_encrypts;
- unsigned long long des_encrypt_bytes;
- unsigned long des_decrypts;
- unsigned long long des_decrypt_bytes;
- unsigned long des3_encrypts;
- unsigned long long des3_encrypt_bytes;
- unsigned long des3_decrypts;
- unsigned long long des3_decrypt_bytes;
- unsigned long aes_encrypts;
- unsigned long long aes_encrypt_bytes;
- unsigned long aes_decrypts;
- unsigned long long aes_decrypt_bytes;
- unsigned long arc4_encrypts;
- unsigned long long arc4_encrypt_bytes;
- unsigned long arc4_decrypts;
- unsigned long long arc4_decrypt_bytes;
- unsigned long kasumi_f8_encrypts;
- unsigned long long kasumi_f8_encrypt_bytes;
- unsigned long kasumi_f8_decrypts;
- unsigned long long kasumi_f8_decrypt_bytes;
- unsigned long reverts;
- unsigned long long reverts_bytes;
-} cipher_stats_t, *cipher_stats_pt;
-
-
-typedef struct modexp_stats
-{
- unsigned long modexp_512s;
- unsigned long modexp_1024s;
-} modexp_stats_t, *modexp_stats_pt;
-
-typedef struct ecc_stats
-{
- unsigned long ecc_mul;
- unsigned long ecc_add;
- unsigned long ecc_dbl;
- unsigned long ecc_vfy;
- unsigned long ecc_bin_mul;
- unsigned long ecc_field_bin_inv;
- unsigned long ecc_field_bin_mul;
- unsigned long ecc_field_bin_add;
- unsigned long ecc_field_add;
- unsigned long ecc_field_sub;
- unsigned long ecc_field_mul;
- unsigned long ecc_field_inv;
- unsigned long ecc_field_div;
- unsigned long ecc_field_red;
-} ecc_stats_t, *ecc_stats_pt;
-
-
-typedef struct opt_stats
-{
- unsigned long combined;
- unsigned long unaligned_auth_dest;
- unsigned long sym_failed;
- unsigned long modexp_failed;
- unsigned long ecc_failed;
-} opt_stats_t, *opt_stats_pt;
-
-typedef struct rmisec_stats
-{
- uint32_t sent;
- uint32_t received;
- uint32_t stats_mask;
- uint32_t control_mask;
- rwlock_t rmisec_control_lock;
- rwlock_t rmisec_stats_lock;
- char clear_start[0];
- uint64_t wait_time;
- uint32_t max_wait_time;
- uint32_t maxsnd_wait_time;
- uint32_t wait_count;
- hmac_stats_t hmac;
- cipher_stats_t cipher;
- modexp_stats_t modexp;
- ecc_stats_t ecc;
- opt_stats_t opt;
-} rmisec_stats_t, *rmisec_stats_pt;
-
-
-/* stats routines */
-
-static void inline phxdrv_record_sent(rmisec_stats_pt stats)
-{
- write_lock(&stats->rmisec_stats_lock);
- stats->sent++;
- write_unlock(&stats->rmisec_stats_lock);
-}
-
-static void inline phxdrv_record_received(rmisec_stats_pt stats)
-{
- write_lock(&stats->rmisec_stats_lock);
- stats->received++;
- write_unlock(&stats->rmisec_stats_lock);
-}
-
-
-static void inline phxdrv_record_des(rmisec_stats_pt stats, int enc,
- int nbytes)
-{
- if (stats->stats_mask & PHXDRV_PROFILE_DES) {
- write_lock(&stats->rmisec_stats_lock);
- if (enc) {
- stats->cipher.des_encrypts++;
- stats->cipher.des_encrypt_bytes += nbytes;
- }
- else {
- stats->cipher.des_decrypts++;
- stats->cipher.des_decrypt_bytes += nbytes;
- }
- write_unlock(&stats->rmisec_stats_lock);
- }
-}
-
-
-static void inline phxdrv_record_3des(rmisec_stats_pt stats, int enc,
- int nbytes)
-{
- if (stats->stats_mask & PHXDRV_PROFILE_3DES) {
- write_lock(&stats->rmisec_stats_lock);
- if (enc) {
- stats->cipher.des3_encrypts++;
- stats->cipher.des3_encrypt_bytes += nbytes;
- }
- else {
- stats->cipher.des3_decrypts++;
- stats->cipher.des3_decrypt_bytes += nbytes;
- }
- write_unlock(&stats->rmisec_stats_lock);
- }
-}
-
-
-static void inline phxdrv_record_aes(rmisec_stats_pt stats, int enc,
- int nbytes)
-{
- if (stats->stats_mask & PHXDRV_PROFILE_AES) {
- write_lock(&stats->rmisec_stats_lock);
- if (enc) {
- stats->cipher.aes_encrypts++;
- stats->cipher.aes_encrypt_bytes += nbytes;
- }
- else {
- stats->cipher.aes_decrypts++;
- stats->cipher.aes_decrypt_bytes += nbytes;
- }
- write_unlock(&stats->rmisec_stats_lock);
- }
-}
-
-
-static void inline phxdrv_record_arc4(rmisec_stats_pt stats, int enc,
- int nbytes)
-{
- if (stats->stats_mask & PHXDRV_PROFILE_ARC4) {
- write_lock(&stats->rmisec_stats_lock);
- if (enc) {
- stats->cipher.arc4_encrypts++;
- stats->cipher.arc4_encrypt_bytes += nbytes;
- }
- else {
- stats->cipher.arc4_decrypts++;
- stats->cipher.arc4_decrypt_bytes += nbytes;
- }
- write_unlock(&stats->rmisec_stats_lock);
- }
-}
-
-static void inline phxdrv_record_kasumi_f8(rmisec_stats_pt stats, int enc,
- int nbytes)
-{
- if (stats->stats_mask & PHXDRV_PROFILE_KASUMI_F8) {
- write_lock(&stats->rmisec_stats_lock);
- if (enc) {
- stats->cipher.kasumi_f8_encrypts++;
- stats->cipher.kasumi_f8_encrypt_bytes += nbytes;
- }
- else {
- stats->cipher.kasumi_f8_decrypts++;
- stats->cipher.kasumi_f8_decrypt_bytes += nbytes;
- }
- write_unlock(&stats->rmisec_stats_lock);
- }
-}
-
-
-static void inline phxdrv_record_modexp(rmisec_stats_pt stats,
- int blksize)
-{
- if (stats->stats_mask & PHXDRV_PROFILE_MODEXP) {
- write_lock(&stats->rmisec_stats_lock);
- if (blksize == 512) {
- stats->modexp.modexp_512s++;
- }
- if (blksize == 1024) {
- stats->modexp.modexp_1024s++;
- }
- write_unlock(&stats->rmisec_stats_lock);
- }
-}
-
-
-static void inline phxdrv_record_ecc(rmisec_stats_pt stats, PHX_ECC_OP op)
-{
- if (stats->stats_mask & PHXDRV_PROFILE_ECC) {
- write_lock(&stats->rmisec_stats_lock);
- switch (op) {
- case PHX_ECC_NOP:
- break;
- case PHX_ECC_MUL:
- stats->ecc.ecc_mul++;
- break;
- case PHX_ECC_BIN_MUL:
- stats->ecc.ecc_bin_mul++;
- break;
- case PHX_ECC_ADD:
- stats->ecc.ecc_add++;
- break;
- case PHX_ECC_DBL:
- stats->ecc.ecc_dbl++;
- break;
- case PHX_ECC_VFY:
- stats->ecc.ecc_vfy++;
- break;
- case PHX_ECC_FIELD_BIN_INV:
- stats->ecc.ecc_field_bin_inv++;
- break;
- case PHX_ECC_FIELD_BIN_MUL:
- stats->ecc.ecc_field_bin_mul++;
- break;
- case PHX_ECC_FIELD_BIN_ADD:
- stats->ecc.ecc_field_bin_add++;
- break;
- case PHX_ECC_FIELD_ADD:
- stats->ecc.ecc_field_add++;
- break;
- case PHX_ECC_FIELD_SUB:
- stats->ecc.ecc_field_sub++;
- break;
- case PHX_ECC_FIELD_MUL:
- stats->ecc.ecc_field_mul++;
- break;
- case PHX_ECC_FIELD_INV:
- stats->ecc.ecc_field_inv++;
- break;
- case PHX_ECC_FIELD_DIV:
- stats->ecc.ecc_field_div++;
- break;
- case PHX_ECC_FIELD_RED:
- stats->ecc.ecc_field_red++;
- break;
- case PHX_ECC_FIELD:
- case PHX_ECC_BIN:
- break;
- }
- write_unlock(&stats->rmisec_stats_lock);
- }
-}
-
-static void inline phxdrv_record_cipher_revert(rmisec_stats_pt stats,
- int nbytes)
-{
- if (stats->stats_mask & PHXDRV_PROFILE_CPHR_REVERTS) {
- write_lock(&stats->rmisec_stats_lock);
- stats->cipher.reverts++;
- stats->cipher.reverts_bytes += nbytes;
- write_unlock(&stats->rmisec_stats_lock);
- }
-}
-
-static void inline phxdrv_record_hmac_revert(rmisec_stats_pt stats,
- int nbytes)
-{
- if (stats->stats_mask & PHXDRV_PROFILE_HMAC_REVERTS) {
- write_lock(&stats->rmisec_stats_lock);
- stats->hmac.reverts++;
- stats->hmac.reverts_bytes += nbytes;
- write_unlock(&stats->rmisec_stats_lock);
- }
-}
-
-
-static void inline phxdrv_record_md5(rmisec_stats_pt stats,
- int nbytes)
-{
- if (stats->stats_mask & PHXDRV_PROFILE_MD5) {
- write_lock(&stats->rmisec_stats_lock);
- stats->hmac.md5_count++;
- stats->hmac.md5_bytes += nbytes;
- write_unlock(&stats->rmisec_stats_lock);
- }
-}
-
-static void inline phxdrv_record_sha1(rmisec_stats_pt stats,
- int nbytes)
-{
- if (stats->stats_mask & PHXDRV_PROFILE_SHA1) {
- write_lock(&stats->rmisec_stats_lock);
- stats->hmac.sha1_count++;
- stats->hmac.sha1_bytes += nbytes;
- write_unlock(&stats->rmisec_stats_lock);
- }
-}
-
-
-static void inline phxdrv_record_sha256(rmisec_stats_pt stats,
- int nbytes)
-{
- if (stats->stats_mask & PHXDRV_PROFILE_SHA256) {
- write_lock(&stats->rmisec_stats_lock);
- stats->hmac.sha256_count++;
- stats->hmac.sha256_bytes += nbytes;
- write_unlock(&stats->rmisec_stats_lock);
- }
-}
-
-static void inline phxdrv_record_sha384(rmisec_stats_pt stats,
- int nbytes)
-{
- if (stats->stats_mask & PHXDRV_PROFILE_SHA384) {
- write_lock(&stats->rmisec_stats_lock);
- stats->hmac.sha384_count++;
- stats->hmac.sha384_bytes += nbytes;
- write_unlock(&stats->rmisec_stats_lock);
- }
-}
-
-
-static void inline phxdrv_record_sha512(rmisec_stats_pt stats,
- int nbytes)
-{
- if (stats->stats_mask & PHXDRV_PROFILE_SHA512) {
- write_lock(&stats->rmisec_stats_lock);
- stats->hmac.sha512_count++;
- stats->hmac.sha512_bytes += nbytes;
- write_unlock(&stats->rmisec_stats_lock);
- }
-}
-
-static void inline phxdrv_record_gcm(rmisec_stats_pt stats,
- int nbytes)
-{
- if (stats->stats_mask & PHXDRV_PROFILE_GCM) {
- write_lock(&stats->rmisec_stats_lock);
- stats->hmac.gcm_count++;
- stats->hmac.gcm_bytes += nbytes;
- write_unlock(&stats->rmisec_stats_lock);
- }
-}
-
-
-static void inline phxdrv_record_kasumi_f9(rmisec_stats_pt stats,
- int nbytes)
-{
- if (stats->stats_mask & PHXDRV_PROFILE_KASUMI_F9) {
- write_lock(&stats->rmisec_stats_lock);
- stats->hmac.kasumi_f9_count++;
- stats->hmac.kasumi_f9_bytes += nbytes;
- write_unlock(&stats->rmisec_stats_lock);
- }
-}
-
-static void inline phxdrv_record_unaligned_auth_dest(rmisec_stats_pt stats,
- int nbytes)
-{
- if (stats->stats_mask & PHXDRV_PROFILE_UNALIGNED_AUTH_DEST) {
- write_lock(&stats->rmisec_stats_lock);
- stats->opt.unaligned_auth_dest++;
- write_unlock(&stats->rmisec_stats_lock);
- }
-}
-
-
-static void inline phxdrv_record_combined(rmisec_stats_pt stats,
- int nbytes)
-{
- if (stats->stats_mask & PHXDRV_PROFILE_COMBINED) {
- write_lock(&stats->rmisec_stats_lock);
- stats->opt.combined++;
- write_unlock(&stats->rmisec_stats_lock);
- }
-}
-
-static void inline phxdrv_record_sym_failed(rmisec_stats_pt stats,
- int nbytes)
-{
- if (stats->stats_mask & PHXDRV_PROFILE_COMBINED) {
- write_lock(&stats->rmisec_stats_lock);
- stats->opt.sym_failed++;
- write_unlock(&stats->rmisec_stats_lock);
- }
-}
-
-static void inline phxdrv_record_modexp_failed(rmisec_stats_pt stats,
- int nbytes)
-{
- if (stats->stats_mask & PHXDRV_PROFILE_COMBINED) {
- write_lock(&stats->rmisec_stats_lock);
- stats->opt.modexp_failed++;
- write_unlock(&stats->rmisec_stats_lock);
- }
-}
-
-static void inline phxdrv_record_ecc_failed(rmisec_stats_pt stats,
- int nbytes)
-{
- if (stats->stats_mask & PHXDRV_PROFILE_COMBINED) {
- write_lock(&stats->rmisec_stats_lock);
- stats->opt.ecc_failed++;
- write_unlock(&stats->rmisec_stats_lock);
- }
-}
-
-#endif
diff --git a/sys/dev/rmi/xlr/atx_cpld.h b/sys/dev/rmi/xlr/atx_cpld.h
deleted file mode 100644
index 157e43e..0000000
--- a/sys/dev/rmi/xlr/atx_cpld.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*-
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD */
-#ifndef _RMI_ATX_CPLD_H_
-#define _RMI_ATX_CPLD_H_
-
-/*
- * bit_0 : xgs0 phy reset, bit_1 : xgs1 phy reset, bit_2 : HT reset, bit_3 :
- * RTC reset, bit_4 : gmac phy soft reset, bit_5 : gmac phy hard reset, bit_6
- * : board reset, bit_7 : reserved
- */
-#define ATX_CPLD_RESET_1 2
-
-/*
- * bit_0_2 : reserved, bit_3 : turn off xpak_0 tx, bit_4 : turn off xpak_1
- * tx, bit_5 : HT stop (active low), bit_6 : flash program enable, bit_7 :
- * compact flash io mode
- */
-#define ATX_CPLD_MISC_CTRL 8
-
-/*
- * bit_0 : reset tcam, bit_1 : reset xpak_0 module, bit_2 : reset xpak_1
- * module, bit_3_7 : reserved
- */
-#define ATX_CPLD_RESET_2 9
-
-#endif /* _RMI_ATX_CPLD_H_ */
diff --git a/sys/dev/rmi/xlr/rge.c b/sys/dev/rmi/xlr/rge.c
deleted file mode 100644
index e0fa8c1..0000000
--- a/sys/dev/rmi/xlr/rge.c
+++ /dev/null
@@ -1,2748 +0,0 @@
-/*-
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD */
-
-#ifdef HAVE_KERNEL_OPTION_HEADERS
-#include "opt_device_polling.h"
-#endif
-
-#include <sys/types.h>
-#include <sys/endian.h>
-#include <sys/systm.h>
-#include <sys/sockio.h>
-#include <sys/param.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/proc.h>
-#include <sys/limits.h>
-#include <sys/bus.h>
-#include <sys/mbuf.h>
-#include <sys/malloc.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/socket.h>
-#define __RMAN_RESOURCE_VISIBLE
-#include <sys/rman.h>
-#include <sys/taskqueue.h>
-
-#include <net/if.h>
-#include <net/if_arp.h>
-#include <net/ethernet.h>
-#include <net/if_dl.h>
-#include <net/if_media.h>
-
-#include <net/bpf.h>
-
-#include <net/if_types.h>
-#include <net/if_vlan_var.h>
-
-#include <netinet/in_systm.h>
-#include <netinet/in.h>
-#include <netinet/ip.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-
-#include <machine/reg.h>
-#include <machine/cpu.h>
-#include <machine/mips_opcode.h>
-#include <machine/asm.h>
-#include <mips/rmi/rmi_mips_exts.h>
-#include <machine/cpuregs.h>
-
-#include <machine/param.h>
-#include <machine/intr_machdep.h>
-#include <machine/clock.h> /* for DELAY */
-#include <machine/bus.h> /* */
-#include <machine/resource.h>
-#include <mips/rmi/interrupt.h>
-#include <mips/rmi/msgring.h>
-#include <mips/rmi/iomap.h>
-#include <mips/rmi/debug.h>
-#include <mips/rmi/pic.h>
-#include <mips/rmi/xlrconfig.h>
-#include <mips/rmi/shared_structs.h>
-#include <mips/rmi/board.h>
-
-#include <dev/rmi/xlr/atx_cpld.h>
-#include <dev/rmi/xlr/xgmac_mdio.h>
-
-
-
-#include <dev/mii/mii.h>
-#include <dev/mii/miivar.h>
-#include <dev/mii/brgphyreg.h>
-
-#include <sys/sysctl.h>
-#include <dev/rmi/xlr/rge.h>
-
-/* #include "opt_rge.h" */
-
-#include "miibus_if.h"
-
-MODULE_DEPEND(rge, ether, 1, 1, 1);
-MODULE_DEPEND(rge, miibus, 1, 1, 1);
-
-/* #define DEBUG */
-/*#define RX_COPY */
-
-#define RGE_TX_THRESHOLD 1024
-#define RGE_TX_Q_SIZE 1024
-
-#ifdef DEBUG
-#undef dbg_msg
-int mac_debug = 1;
-
-#define dbg_msg(fmt, args...) \
- do {\
- if (mac_debug) {\
- printf("[%s@%d|%s]: cpu_%d: " fmt, \
- __FILE__, __LINE__, __FUNCTION__, PCPU_GET(cpuid), ##args);\
- }\
- } while(0);
-
-#define DUMP_PACKETS
-#else
-#undef dbg_msg
-#define dbg_msg(fmt, args...)
-int mac_debug = 0;
-
-#endif
-
-#define MAC_B2B_IPG 88
-
-/* frame sizes need to be cacheline aligned */
-#define MAX_FRAME_SIZE 1536
-#define MAX_FRAME_SIZE_JUMBO 9216
-
-#define MAC_SKB_BACK_PTR_SIZE SMP_CACHE_BYTES
-#define MAC_PREPAD 0
-#define BYTE_OFFSET 2
-#define XLR_RX_BUF_SIZE (MAX_FRAME_SIZE+BYTE_OFFSET+MAC_PREPAD+MAC_SKB_BACK_PTR_SIZE+SMP_CACHE_BYTES)
-#define MAC_CRC_LEN 4
-#define MAX_NUM_MSGRNG_STN_CC 128
-
-#define MAX_NUM_DESC 1024
-#define MAX_SPILL_SIZE (MAX_NUM_DESC + 128)
-
-#define MAC_FRIN_TO_BE_SENT_THRESHOLD 16
-
-#define MAX_FRIN_SPILL (MAX_SPILL_SIZE << 2)
-#define MAX_FROUT_SPILL (MAX_SPILL_SIZE << 2)
-#define MAX_CLASS_0_SPILL (MAX_SPILL_SIZE << 2)
-#define MAX_CLASS_1_SPILL (MAX_SPILL_SIZE << 2)
-#define MAX_CLASS_2_SPILL (MAX_SPILL_SIZE << 2)
-#define MAX_CLASS_3_SPILL (MAX_SPILL_SIZE << 2)
-
-/*****************************************************************
- * Phoenix Generic Mac driver
- *****************************************************************/
-
-extern uint32_t cpu_ltop_map[32];
-
-#ifdef ENABLED_DEBUG
-static int port_counters[4][8] __aligned(XLR_CACHELINE_SIZE);
-
-#define port_inc_counter(port, counter) atomic_add_int(&port_counters[port][(counter)], 1)
-#define port_set_counter(port, counter, value) atomic_set_int(&port_counters[port][(counter)], (value))
-#else
-#define port_inc_counter(port, counter) /* Nothing */
-#define port_set_counter(port, counter, value) /* Nothing */
-#endif
-
-int xlr_rge_tx_prepend[MAXCPU];
-int xlr_rge_tx_done[MAXCPU];
-int xlr_rge_get_p2d_failed[MAXCPU];
-int xlr_rge_msg_snd_failed[MAXCPU];
-int xlr_rge_tx_ok_done[MAXCPU];
-int xlr_rge_rx_done[MAXCPU];
-int xlr_rge_repl_done[MAXCPU];
-
-static __inline__ unsigned int
-ldadd_wu(unsigned int value, unsigned long *addr)
-{
- __asm__ __volatile__(".set push\n"
- ".set noreorder\n"
- "move $8, %2\n"
- "move $9, %3\n"
- /* "ldaddwu $8, $9\n" */
- ".word 0x71280011\n"
- "move %0, $8\n"
- ".set pop\n"
- : "=&r"(value), "+m"(*addr)
- : "0"(value), "r"((unsigned long)addr)
- : "$8", "$9");
-
- return value;
-}
-
-/* #define mac_stats_add(x, val) ({(x) += (val);}) */
-#define mac_stats_add(x, val) ldadd_wu(val, &x)
-
-
-#define XLR_MAX_CORE 8
-#define RGE_LOCK_INIT(_sc, _name) \
- mtx_init(&(_sc)->rge_mtx, _name, MTX_NETWORK_LOCK, MTX_DEF)
-#define RGE_LOCK(_sc) mtx_lock(&(_sc)->rge_mtx)
-#define RGE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->rge_mtx, MA_OWNED)
-#define RGE_UNLOCK(_sc) mtx_unlock(&(_sc)->rge_mtx)
-#define RGE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->rge_mtx)
-
-#define XLR_MAX_MACS 8
-#define XLR_MAX_TX_FRAGS 14
-#define MAX_P2D_DESC_PER_PORT 512
-struct p2d_tx_desc {
- uint64_t frag[XLR_MAX_TX_FRAGS + 2];
-};
-
-#define MAX_TX_RING_SIZE (XLR_MAX_MACS * MAX_P2D_DESC_PER_PORT * sizeof(struct p2d_tx_desc))
-
-struct rge_softc *dev_mac[XLR_MAX_MACS];
-static int dev_mac_xgs0;
-static int dev_mac_gmac0;
-
-static int gmac_common_init_done;
-
-
-static int rge_probe(device_t);
-static int rge_attach(device_t);
-static int rge_detach(device_t);
-static int rge_suspend(device_t);
-static int rge_resume(device_t);
-static void rge_release_resources(struct rge_softc *);
-static void rge_rx(struct rge_softc *, vm_paddr_t paddr, int);
-static void rge_intr(void *);
-static void rge_start_locked(struct ifnet *, int);
-static void rge_start(struct ifnet *);
-static int rge_ioctl(struct ifnet *, u_long, caddr_t);
-static void rge_init(void *);
-static void rge_stop(struct rge_softc *);
-static void rge_watchdog(struct ifnet *);
-static int rge_shutdown(device_t);
-static void rge_reset(struct rge_softc *);
-
-static struct mbuf *get_mbuf(void);
-static void free_buf(vm_paddr_t paddr);
-static void *get_buf(void);
-
-static void xlr_mac_get_hwaddr(struct rge_softc *);
-static void xlr_mac_setup_hwaddr(struct driver_data *);
-static void rmi_xlr_mac_set_enable(struct driver_data *priv, int flag);
-static void rmi_xlr_xgmac_init(struct driver_data *priv);
-static void rmi_xlr_gmac_init(struct driver_data *priv);
-static void mac_common_init(void);
-static int rge_mii_write(device_t, int, int, int);
-static int rge_mii_read(device_t, int, int);
-static void rmi_xlr_mac_mii_statchg(device_t);
-static int rmi_xlr_mac_mediachange(struct ifnet *);
-static void rmi_xlr_mac_mediastatus(struct ifnet *, struct ifmediareq *);
-static void xlr_mac_set_rx_mode(struct rge_softc *sc);
-void
-rmi_xlr_mac_msgring_handler(int bucket, int size, int code,
- int stid, struct msgrng_msg *msg,
- void *data);
-static void mac_frin_replenish(void *);
-static int rmi_xlr_mac_open(struct rge_softc *);
-static int rmi_xlr_mac_close(struct rge_softc *);
-static int
-mac_xmit(struct mbuf *, struct rge_softc *,
- struct driver_data *, int, struct p2d_tx_desc *);
-static int rmi_xlr_mac_xmit(struct mbuf *, struct rge_softc *, int, struct p2d_tx_desc *);
-static struct rge_softc_stats *rmi_xlr_mac_get_stats(struct rge_softc *sc);
-static void rmi_xlr_mac_set_multicast_list(struct rge_softc *sc);
-static int rmi_xlr_mac_change_mtu(struct rge_softc *sc, int new_mtu);
-static int rmi_xlr_mac_fill_rxfr(struct rge_softc *sc);
-static void rmi_xlr_config_spill_area(struct driver_data *priv);
-static int rmi_xlr_mac_set_speed(struct driver_data *s, xlr_mac_speed_t speed);
-static int
-rmi_xlr_mac_set_duplex(struct driver_data *s,
- xlr_mac_duplex_t duplex, xlr_mac_fc_t fc);
-static void serdes_regs_init(struct driver_data *priv);
-static int rmi_xlr_gmac_reset(struct driver_data *priv);
-
-/*Statistics...*/
-static int get_p2d_desc_failed = 0;
-static int msg_snd_failed = 0;
-
-SYSCTL_INT(_hw, OID_AUTO, get_p2d_failed, CTLFLAG_RW,
- &get_p2d_desc_failed, 0, "p2d desc failed");
-SYSCTL_INT(_hw, OID_AUTO, msg_snd_failed, CTLFLAG_RW,
- &msg_snd_failed, 0, "msg snd failed");
-
-struct callout xlr_tx_stop_bkp;
-
-static device_method_t rge_methods[] = {
- /* Device interface */
- DEVMETHOD(device_probe, rge_probe),
- DEVMETHOD(device_attach, rge_attach),
- DEVMETHOD(device_detach, rge_detach),
- DEVMETHOD(device_shutdown, rge_shutdown),
- DEVMETHOD(device_suspend, rge_suspend),
- DEVMETHOD(device_resume, rge_resume),
-
- /* MII interface */
- DEVMETHOD(miibus_readreg, rge_mii_read),
- DEVMETHOD(miibus_statchg, rmi_xlr_mac_mii_statchg),
- DEVMETHOD(miibus_writereg, rge_mii_write),
- {0, 0}
-};
-
-static driver_t rge_driver = {
- "rge",
- rge_methods,
- sizeof(struct rge_softc)
-};
-
-static devclass_t rge_devclass;
-
-DRIVER_MODULE(rge, iodi, rge_driver, rge_devclass, 0, 0);
-DRIVER_MODULE(miibus, rge, miibus_driver, miibus_devclass, 0, 0);
-
-#ifndef __STR
-#define __STR(x) #x
-#endif
-#ifndef STR
-#define STR(x) __STR(x)
-#endif
-
-#define XKPHYS 0x8000000000000000
-/* -- No longer needed RRS
-static __inline__ uint32_t
-lw_40bit_phys(uint64_t phys, int cca)
-{
- uint64_t addr;
- uint32_t value = 0;
- unsigned long flags;
-
- addr = XKPHYS | ((uint64_t) cca << 59) | (phys & 0xfffffffffcULL);
-
- enable_KX(flags);
- __asm__ __volatile__(
- ".set push\n"
- ".set noreorder\n"
- ".set mips64\n"
- "lw %0, 0(%1) \n"
- ".set pop\n"
- : "=r"(value)
- : "r"(addr));
-
- disable_KX(flags);
- return value;
-}
-*/
-/* -- No longer used RRS
-static __inline__ uint64_t
-ld_40bit_phys(uint64_t phys, int cca)
-{
- uint64_t addr;
- uint64_t value = 0;
- unsigned long flags;
-
-
- addr = XKPHYS | ((uint64_t) cca << 59) | (phys & 0xfffffffffcULL);
- enable_KX(flags);
- __asm__ __volatile__(
- ".set push\n"
- ".set noreorder\n"
- ".set mips64\n"
- "ld %0, 0(%1) \n"
- ".set pop\n"
- : "=r"(value)
- : "r"(addr));
-
- disable_KX(flags);
- return value;
-}
-*/
-
-void *xlr_tx_ring_mem;
-
-struct tx_desc_node {
- struct p2d_tx_desc *ptr;
- TAILQ_ENTRY(tx_desc_node) list;
-};
-
-#define XLR_MAX_TX_DESC_NODES (XLR_MAX_MACS * MAX_P2D_DESC_PER_PORT)
-struct tx_desc_node tx_desc_nodes[XLR_MAX_TX_DESC_NODES];
-static volatile int xlr_tot_avail_p2d[XLR_MAX_CORE];
-static int xlr_total_active_core = 0;
-
-/*
- * This should contain the list of all free tx frag desc nodes pointing to tx
- * p2d arrays
- */
-static
-TAILQ_HEAD(, tx_desc_node) tx_frag_desc[XLR_MAX_CORE] =
-{
- TAILQ_HEAD_INITIALIZER(tx_frag_desc[0]),
- TAILQ_HEAD_INITIALIZER(tx_frag_desc[1]),
- TAILQ_HEAD_INITIALIZER(tx_frag_desc[2]),
- TAILQ_HEAD_INITIALIZER(tx_frag_desc[3]),
- TAILQ_HEAD_INITIALIZER(tx_frag_desc[4]),
- TAILQ_HEAD_INITIALIZER(tx_frag_desc[5]),
- TAILQ_HEAD_INITIALIZER(tx_frag_desc[6]),
- TAILQ_HEAD_INITIALIZER(tx_frag_desc[7]),
-};
-
-/* This contains a list of free tx frag node descriptors */
-static
-TAILQ_HEAD(, tx_desc_node) free_tx_frag_desc[XLR_MAX_CORE] =
-{
- TAILQ_HEAD_INITIALIZER(free_tx_frag_desc[0]),
- TAILQ_HEAD_INITIALIZER(free_tx_frag_desc[1]),
- TAILQ_HEAD_INITIALIZER(free_tx_frag_desc[2]),
- TAILQ_HEAD_INITIALIZER(free_tx_frag_desc[3]),
- TAILQ_HEAD_INITIALIZER(free_tx_frag_desc[4]),
- TAILQ_HEAD_INITIALIZER(free_tx_frag_desc[5]),
- TAILQ_HEAD_INITIALIZER(free_tx_frag_desc[6]),
- TAILQ_HEAD_INITIALIZER(free_tx_frag_desc[7]),
-};
-
-static struct mtx tx_desc_lock[XLR_MAX_CORE];
-
-static inline void
-mac_make_desc_rfr(struct msgrng_msg *msg,
- vm_paddr_t addr)
-{
- msg->msg0 = (uint64_t) addr & 0xffffffffe0ULL;
- msg->msg1 = msg->msg2 = msg->msg3 = 0;
-}
-
-#define MAC_TX_DESC_ALIGNMENT (XLR_CACHELINE_SIZE - 1)
-
-static void
-init_p2d_allocation(void)
-{
- int active_core[8] = {0};
- int i = 0;
- uint32_t cpumask;
- int cpu;
-
- cpumask = PCPU_GET(cpumask) | PCPU_GET(other_cpus);
-
- for (i = 0; i < 32; i++) {
- if (cpumask & (1 << i)) {
- cpu = cpu_ltop_map[i];
- if (!active_core[cpu / 4]) {
- active_core[cpu / 4] = 1;
- xlr_total_active_core++;
- }
- }
- }
- for (i = 0; i < XLR_MAX_CORE; i++) {
- if (active_core[i])
- xlr_tot_avail_p2d[i] = XLR_MAX_TX_DESC_NODES / xlr_total_active_core;
- }
- printf("Total Active Core %d\n", xlr_total_active_core);
-}
-
-
-static void
-init_tx_ring(void)
-{
- int i;
- int j = 0;
- struct tx_desc_node *start, *node;
- struct p2d_tx_desc *tx_desc;
- vm_paddr_t paddr;
- vm_offset_t unmapped_addr;
-
- for (i = 0; i < XLR_MAX_CORE; i++)
- mtx_init(&tx_desc_lock[i], "xlr tx_desc", NULL, MTX_SPIN);
-
- start = &tx_desc_nodes[0];
- /* TODO: try to get this from KSEG0 */
- xlr_tx_ring_mem = contigmalloc((MAX_TX_RING_SIZE + XLR_CACHELINE_SIZE),
- M_DEVBUF, M_NOWAIT | M_ZERO, 0,
- 0x10000000, XLR_CACHELINE_SIZE, 0);
-
- if (xlr_tx_ring_mem == NULL) {
- panic("TX ring memory allocation failed");
- }
- paddr = vtophys((vm_offset_t)xlr_tx_ring_mem);
-
- unmapped_addr = MIPS_PHYS_TO_KSEG0(paddr);
-
-
- tx_desc = (struct p2d_tx_desc *)unmapped_addr;
-
- for (i = 0; i < XLR_MAX_TX_DESC_NODES; i++) {
- node = start + i;
- node->ptr = tx_desc;
- tx_desc++;
- TAILQ_INSERT_HEAD(&tx_frag_desc[j], node, list);
- j = (i / (XLR_MAX_TX_DESC_NODES / xlr_total_active_core));
- }
-}
-
-static inline struct p2d_tx_desc *
-get_p2d_desc(void)
-{
- struct tx_desc_node *node;
- struct p2d_tx_desc *tx_desc = NULL;
- int cpu = xlr_cpu_id();
-
- mtx_lock_spin(&tx_desc_lock[cpu]);
- node = TAILQ_FIRST(&tx_frag_desc[cpu]);
- if (node) {
- xlr_tot_avail_p2d[cpu]--;
- TAILQ_REMOVE(&tx_frag_desc[cpu], node, list);
- tx_desc = node->ptr;
- TAILQ_INSERT_HEAD(&free_tx_frag_desc[cpu], node, list);
- } else {
- /* Increment p2d desc fail count */
- get_p2d_desc_failed++;
- }
- mtx_unlock_spin(&tx_desc_lock[cpu]);
- return tx_desc;
-}
-static void
-free_p2d_desc(struct p2d_tx_desc *tx_desc)
-{
- struct tx_desc_node *node;
- int cpu = xlr_cpu_id();
-
- mtx_lock_spin(&tx_desc_lock[cpu]);
- node = TAILQ_FIRST(&free_tx_frag_desc[cpu]);
- KASSERT((node != NULL), ("Free TX frag node list is empty\n"));
-
- TAILQ_REMOVE(&free_tx_frag_desc[cpu], node, list);
- node->ptr = tx_desc;
- TAILQ_INSERT_HEAD(&tx_frag_desc[cpu], node, list);
- xlr_tot_avail_p2d[cpu]++;
- mtx_unlock_spin(&tx_desc_lock[cpu]);
-
-}
-
-static int
-build_frag_list(struct mbuf *m_head, struct msgrng_msg *p2p_msg, struct p2d_tx_desc *tx_desc)
-{
- struct mbuf *m;
- vm_paddr_t paddr;
- uint64_t p2d_len;
- int nfrag;
- vm_paddr_t p1, p2;
- uint32_t len1, len2;
- vm_offset_t taddr;
- uint64_t fr_stid;
-
- fr_stid = (xlr_cpu_id() << 3) + xlr_thr_id() + 4;
-
- if (tx_desc == NULL)
- return 1;
-
- nfrag = 0;
- for (m = m_head; m != NULL; m = m->m_next) {
- if ((nfrag + 1) >= XLR_MAX_TX_FRAGS) {
- free_p2d_desc(tx_desc);
- return 1;
- }
- if (m->m_len != 0) {
- paddr = vtophys(mtod(m, vm_offset_t));
- p1 = paddr + m->m_len;
- p2 = vtophys(((vm_offset_t)m->m_data + m->m_len));
- if (p1 != p2) {
- len1 = (uint32_t)
- (PAGE_SIZE - (paddr & PAGE_MASK));
- tx_desc->frag[nfrag] = (127ULL << 54) |
- ((uint64_t) len1 << 40) | paddr;
- nfrag++;
- taddr = (vm_offset_t)m->m_data + len1;
- p2 = vtophys(taddr);
- len2 = m->m_len - len1;
- if (nfrag >= XLR_MAX_TX_FRAGS)
- panic("TX frags exceeded");
-
- tx_desc->frag[nfrag] = (127ULL << 54) |
- ((uint64_t) len2 << 40) | p2;
-
- taddr += len2;
- p1 = vtophys(taddr);
-
- if ((p2 + len2) != p1) {
- printf("p1 = %p p2 = %p\n", (void *)p1, (void *)p2);
- printf("len1 = %x len2 = %x\n", len1,
- len2);
- printf("m_data %p\n", m->m_data);
- DELAY(1000000);
- panic("Multiple Mbuf segment discontiguous\n");
- }
- } else {
- tx_desc->frag[nfrag] = (127ULL << 54) |
- ((uint64_t) m->m_len << 40) | paddr;
- }
- nfrag++;
- }
- }
- /* set eop in the last tx p2d desc */
- tx_desc->frag[nfrag - 1] |= (1ULL << 63);
- paddr = vtophys((vm_offset_t)tx_desc);
- tx_desc->frag[nfrag] = (1ULL << 63) | (fr_stid << 54) | paddr;
- nfrag++;
- tx_desc->frag[XLR_MAX_TX_FRAGS] = (uint64_t) (vm_offset_t)tx_desc;
- tx_desc->frag[XLR_MAX_TX_FRAGS + 1] = (uint64_t) (vm_offset_t)m_head;
-
- p2d_len = (nfrag * 8);
- p2p_msg->msg0 = (1ULL << 63) | (1ULL << 62) | (127ULL << 54) |
- (p2d_len << 40) | paddr;
-
- return 0;
-}
-static void
-release_tx_desc(struct msgrng_msg *msg, int rel_buf)
-{
- /*
- * OLD code: vm_paddr_t paddr = msg->msg0 & 0xffffffffffULL;
- * uint64_t temp; struct p2d_tx_desc *tx_desc; struct mbuf *m;
- *
- * paddr += (XLR_MAX_TX_FRAGS * sizeof(uint64_t)); *** In o32 we will
- * crash here ****** temp = ld_40bit_phys(paddr, 3); tx_desc =
- * (struct p2d_tx_desc *)((vm_offset_t)temp);
- *
- * if (rel_buf) { paddr += sizeof(uint64_t);
- *
- * temp = ld_40bit_phys(paddr, 3);
- *
- * m = (struct mbuf *)((vm_offset_t)temp); m_freem(m); } printf("Call
- * fre_p2d_desc\n"); free_p2d_desc(tx_desc);
- */
- struct p2d_tx_desc *tx_desc, *chk_addr;
- struct mbuf *m;
-
- tx_desc = (struct p2d_tx_desc *)MIPS_PHYS_TO_KSEG0(msg->msg0);
- chk_addr = (struct p2d_tx_desc *)(uint32_t) (tx_desc->frag[XLR_MAX_TX_FRAGS] & 0x00000000ffffffff);
- if (tx_desc != chk_addr) {
- printf("Address %p does not match with stored addr %p - we leaked a descriptor\n",
- tx_desc, chk_addr);
- return;
- }
- if (rel_buf) {
- m = (struct mbuf *)(uint32_t) (tx_desc->frag[XLR_MAX_TX_FRAGS + 1] & 0x00000000ffffffff);
- m_freem(m);
- }
- free_p2d_desc(tx_desc);
-}
-
-#ifdef RX_COPY
-#define RGE_MAX_NUM_DESC (6 * MAX_NUM_DESC)
-uint8_t *rge_rx_buffers[RGE_MAX_NUM_DESC];
-static struct mtx rge_rx_mtx;
-int g_rx_buf_head;
-
-static void
-init_rx_buf(void)
-{
- int i;
- uint8_t *buf, *start;
- uint32_t size, *ptr;
-
- mtx_init(&rge_rx_mtx, "xlr rx_desc", NULL, MTX_SPIN);
-
- size = (RGE_MAX_NUM_DESC * (MAX_FRAME_SIZE + XLR_CACHELINE_SIZE));
-
- start = (uint8_t *) contigmalloc(size, M_DEVBUF, M_NOWAIT | M_ZERO,
- 0, 0xffffffff, XLR_CACHELINE_SIZE, 0);
- if (start == NULL)
- panic("NO RX BUFFERS");
- buf = start;
- size = (MAX_FRAME_SIZE + XLR_CACHELINE_SIZE);
- for (i = 0; i < RGE_MAX_NUM_DESC; i++) {
- buf = start + (i * size);
- ptr = (uint32_t *) buf;
- *ptr = (uint32_t) buf;
- rge_rx_buffers[i] = buf + XLR_CACHELINE_SIZE;
- }
-}
-
-static void *
-get_rx_buf(void)
-{
- void *ptr = NULL;
-
- mtx_lock_spin(&rge_rx_mtx);
- if (g_rx_buf_head < RGE_MAX_NUM_DESC) {
- ptr = (void *)rge_rx_buffers[g_rx_buf_head];
- g_rx_buf_head++;
- }
- mtx_unlock_spin(&rge_rx_mtx);
- return ptr;
-}
-
-#endif
-
-static struct mbuf *
-get_mbuf(void)
-{
- struct mbuf *m_new = NULL;
-
- if ((m_new = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR)) == NULL)
- return NULL;
-
- m_new->m_len = MCLBYTES;
- m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
- return m_new;
-}
-
-static void
-free_buf(vm_paddr_t paddr)
-{
- struct mbuf *m;
- uint32_t *temp;
- uint32_t mag, um;
-
- /*
- * This will crash I think. RRS temp = lw_40bit_phys((paddr -
- * XLR_CACHELINE_SIZE), 3); m = (struct mbuf *)temp;
- */
- /*
- * This gets us a kseg0 address for the mbuf/magic on the ring but
- * we need to get the va to free the mbuf. This is stored at *temp;
- */
- temp = (uint32_t *) MIPS_PHYS_TO_KSEG0(paddr - XLR_CACHELINE_SIZE);
- um = temp[0];
- mag = temp[1];
- if (mag != 0xf00bad) {
- printf("Something is wrong kseg:%p found mag:%x not 0xf00bad\n",
- temp, mag);
- return;
- }
- m = (struct mbuf *)um;
- if (m != NULL)
- m_freem(m);
-}
-
-static void *
-get_buf(void)
-{
-#ifdef RX_COPY
- return get_rx_buf();
-#else
- struct mbuf *m_new = NULL;
-
-#ifdef INVARIANTS
- vm_paddr_t temp1, temp2;
-
-#endif
- unsigned int *md;
-
- m_new = get_mbuf();
-
- if (m_new == NULL)
- return NULL;
-
- m_adj(m_new, XLR_CACHELINE_SIZE - ((unsigned int)m_new->m_data & 0x1f));
- md = (unsigned int *)m_new->m_data;
- md[0] = (unsigned int)m_new; /* Back Ptr */
- md[1] = 0xf00bad;
- m_adj(m_new, XLR_CACHELINE_SIZE);
-
-
- /* return (void *)m_new; */
-#ifdef INVARIANTS
- temp1 = vtophys((vm_offset_t)m_new->m_data);
- temp2 = vtophys((vm_offset_t)m_new->m_data + 1536);
- if ((temp1 + 1536) != temp2)
- panic("ALLOCED BUFFER IS NOT CONTIGUOUS\n");
-#endif
- return (void *)m_new->m_data;
-#endif
-}
-
-/**********************************************************************
- **********************************************************************/
-static void
-rmi_xlr_mac_set_enable(struct driver_data *priv, int flag)
-{
- uint32_t regval;
- int tx_threshold = 1518;
-
- if (flag) {
- regval = xlr_read_reg(priv->mmio, R_TX_CONTROL);
- regval |= (1 << O_TX_CONTROL__TxEnable) |
- (tx_threshold << O_TX_CONTROL__TxThreshold);
-
- xlr_write_reg(priv->mmio, R_TX_CONTROL, regval);
-
- regval = xlr_read_reg(priv->mmio, R_RX_CONTROL);
- regval |= 1 << O_RX_CONTROL__RxEnable;
- if (priv->mode == XLR_PORT0_RGMII)
- regval |= 1 << O_RX_CONTROL__RGMII;
- xlr_write_reg(priv->mmio, R_RX_CONTROL, regval);
-
- regval = xlr_read_reg(priv->mmio, R_MAC_CONFIG_1);
- regval |= (O_MAC_CONFIG_1__txen | O_MAC_CONFIG_1__rxen);
- xlr_write_reg(priv->mmio, R_MAC_CONFIG_1, regval);
- } else {
- regval = xlr_read_reg(priv->mmio, R_TX_CONTROL);
- regval &= ~((1 << O_TX_CONTROL__TxEnable) |
- (tx_threshold << O_TX_CONTROL__TxThreshold));
-
- xlr_write_reg(priv->mmio, R_TX_CONTROL, regval);
-
- regval = xlr_read_reg(priv->mmio, R_RX_CONTROL);
- regval &= ~(1 << O_RX_CONTROL__RxEnable);
- xlr_write_reg(priv->mmio, R_RX_CONTROL, regval);
-
- regval = xlr_read_reg(priv->mmio, R_MAC_CONFIG_1);
- regval &= ~(O_MAC_CONFIG_1__txen | O_MAC_CONFIG_1__rxen);
- xlr_write_reg(priv->mmio, R_MAC_CONFIG_1, regval);
- }
-}
-
-/**********************************************************************
- **********************************************************************/
-static __inline__ int
-xlr_mac_send_fr(struct driver_data *priv,
- vm_paddr_t addr, int len)
-{
- int stid = priv->rfrbucket;
- struct msgrng_msg msg;
- int vcpu = (xlr_cpu_id() << 2) + xlr_thr_id();
-
- mac_make_desc_rfr(&msg, addr);
-
- /* Send the packet to MAC */
- dbg_msg("mac_%d: Sending free packet %llx to stid %d\n",
- priv->instance, addr, stid);
- if (priv->type == XLR_XGMAC) {
- while (message_send(1, MSGRNG_CODE_XGMAC, stid, &msg));
- } else {
- while (message_send(1, MSGRNG_CODE_MAC, stid, &msg));
- xlr_rge_repl_done[vcpu]++;
- }
-
- return 0;
-}
-
-/**************************************************************/
-
-static void
-xgmac_mdio_setup(volatile unsigned int *_mmio)
-{
- int i;
- uint32_t rd_data;
-
- for (i = 0; i < 4; i++) {
- rd_data = xmdio_read(_mmio, 1, 0x8000 + i);
- rd_data = rd_data & 0xffffdfff; /* clear isolate bit */
- xmdio_write(_mmio, 1, 0x8000 + i, rd_data);
- }
-}
-
-/**********************************************************************
- * Init MII interface
- *
- * Input parameters:
- * s - priv structure
- ********************************************************************* */
-#define PHY_STATUS_RETRIES 25000
-
-static void
-rmi_xlr_mac_mii_init(struct driver_data *priv)
-{
- xlr_reg_t *mii_mmio = priv->mii_mmio;
-
- /* use the lowest clock divisor - divisor 28 */
- xlr_write_reg(mii_mmio, R_MII_MGMT_CONFIG, 0x07);
-}
-
-/**********************************************************************
- * Read a PHY register.
- *
- * Input parameters:
- * s - priv structure
- * phyaddr - PHY's address
- * regidx = index of register to read
- *
- * Return value:
- * value read, or 0 if an error occurred.
- ********************************************************************* */
-
-static int
-rge_mii_read_internal(xlr_reg_t * mii_mmio, int phyaddr, int regidx)
-{
- int i = 0;
-
- /* setup the phy reg to be used */
- xlr_write_reg(mii_mmio, R_MII_MGMT_ADDRESS,
- (phyaddr << 8) | (regidx << 0));
- /* Issue the read command */
- xlr_write_reg(mii_mmio, R_MII_MGMT_COMMAND,
- (1 << O_MII_MGMT_COMMAND__rstat));
-
- /* poll for the read cycle to complete */
- for (i = 0; i < PHY_STATUS_RETRIES; i++) {
- if (xlr_read_reg(mii_mmio, R_MII_MGMT_INDICATORS) == 0)
- break;
- }
-
- /* clear the read cycle */
- xlr_write_reg(mii_mmio, R_MII_MGMT_COMMAND, 0);
-
- if (i == PHY_STATUS_RETRIES) {
- return 0xffffffff;
- }
- /* Read the data back */
- return xlr_read_reg(mii_mmio, R_MII_MGMT_STATUS);
-}
-
-static int
-rge_mii_read(device_t dev, int phyaddr, int regidx)
-{
- struct rge_softc *sc = device_get_softc(dev);
-
- return rge_mii_read_internal(sc->priv.mii_mmio, phyaddr, regidx);
-}
-
-/**********************************************************************
- * Set MII hooks to newly selected media
- *
- * Input parameters:
- * ifp - Interface Pointer
- *
- * Return value:
- * nothing
- ********************************************************************* */
-static int
-rmi_xlr_mac_mediachange(struct ifnet *ifp)
-{
- struct rge_softc *sc = ifp->if_softc;
-
- if (ifp->if_flags & IFF_UP)
- mii_mediachg(&sc->rge_mii);
-
- return 0;
-}
-
-/**********************************************************************
- * Get the current interface media status
- *
- * Input parameters:
- * ifp - Interface Pointer
- * ifmr - Interface media request ptr
- *
- * Return value:
- * nothing
- ********************************************************************* */
-static void
-rmi_xlr_mac_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr)
-{
- struct rge_softc *sc = ifp->if_softc;
-
- /* Check whether this is interface is active or not. */
- ifmr->ifm_status = IFM_AVALID;
- if (sc->link_up) {
- ifmr->ifm_status |= IFM_ACTIVE;
- } else {
- ifmr->ifm_active = IFM_ETHER;
- }
-}
-
-/**********************************************************************
- * Write a value to a PHY register.
- *
- * Input parameters:
- * s - priv structure
- * phyaddr - PHY to use
- * regidx - register within the PHY
- * regval - data to write to register
- *
- * Return value:
- * nothing
- ********************************************************************* */
-static void
-rge_mii_write_internal(xlr_reg_t * mii_mmio, int phyaddr, int regidx, int regval)
-{
- int i = 0;
-
- xlr_write_reg(mii_mmio, R_MII_MGMT_ADDRESS,
- (phyaddr << 8) | (regidx << 0));
-
- /* Write the data which starts the write cycle */
- xlr_write_reg(mii_mmio, R_MII_MGMT_WRITE_DATA, regval);
-
- /* poll for the write cycle to complete */
- for (i = 0; i < PHY_STATUS_RETRIES; i++) {
- if (xlr_read_reg(mii_mmio, R_MII_MGMT_INDICATORS) == 0)
- break;
- }
-
- return;
-}
-
-static int
-rge_mii_write(device_t dev, int phyaddr, int regidx, int regval)
-{
- struct rge_softc *sc = device_get_softc(dev);
-
- rge_mii_write_internal(sc->priv.mii_mmio, phyaddr, regidx, regval);
- return (0);
-}
-
-static void
-rmi_xlr_mac_mii_statchg(struct device *dev)
-{
-}
-
-static void
-serdes_regs_init(struct driver_data *priv)
-{
- xlr_reg_t *mmio_gpio = (xlr_reg_t *) (xlr_io_base + XLR_IO_GPIO_OFFSET);
- int i;
-
- /* Initialize SERDES CONTROL Registers */
- rge_mii_write_internal(priv->serdes_mmio, 26, 0, 0x6DB0);
- rge_mii_write_internal(priv->serdes_mmio, 26, 1, 0xFFFF);
- rge_mii_write_internal(priv->serdes_mmio, 26, 2, 0xB6D0);
- rge_mii_write_internal(priv->serdes_mmio, 26, 3, 0x00FF);
- rge_mii_write_internal(priv->serdes_mmio, 26, 4, 0x0000);
- rge_mii_write_internal(priv->serdes_mmio, 26, 5, 0x0000);
- rge_mii_write_internal(priv->serdes_mmio, 26, 6, 0x0005);
- rge_mii_write_internal(priv->serdes_mmio, 26, 7, 0x0001);
- rge_mii_write_internal(priv->serdes_mmio, 26, 8, 0x0000);
- rge_mii_write_internal(priv->serdes_mmio, 26, 9, 0x0000);
- rge_mii_write_internal(priv->serdes_mmio, 26, 10, 0x0000);
-
- /*
- * For loop delay and GPIO programming crud from Linux driver,
- */
- for (i = 0; i < 10000000; i++) {
- }
- mmio_gpio[0x20] = 0x7e6802;
- mmio_gpio[0x10] = 0x7104;
- for (i = 0; i < 100000000; i++) {
- }
- return;
-}
-
-static void
-serdes_autoconfig(struct driver_data *priv)
-{
- int delay = 100000;
-
- /* Enable Auto negotiation in the PCS Layer */
- rge_mii_write_internal(priv->pcs_mmio, 27, 0, 0x1000);
- DELAY(delay);
- rge_mii_write_internal(priv->pcs_mmio, 27, 0, 0x0200);
- DELAY(delay);
-
- rge_mii_write_internal(priv->pcs_mmio, 28, 0, 0x1000);
- DELAY(delay);
- rge_mii_write_internal(priv->pcs_mmio, 28, 0, 0x0200);
- DELAY(delay);
-
- rge_mii_write_internal(priv->pcs_mmio, 29, 0, 0x1000);
- DELAY(delay);
- rge_mii_write_internal(priv->pcs_mmio, 29, 0, 0x0200);
- DELAY(delay);
-
- rge_mii_write_internal(priv->pcs_mmio, 30, 0, 0x1000);
- DELAY(delay);
- rge_mii_write_internal(priv->pcs_mmio, 30, 0, 0x0200);
- DELAY(delay);
-
-}
-
-/*****************************************************************
- * Initialize GMAC
- *****************************************************************/
-static void
-rmi_xlr_config_pde(struct driver_data *priv)
-{
- int i = 0, cpu = 0, bucket = 0;
- uint64_t bucket_map = 0;
-
- /* uint32_t desc_pack_ctrl = 0; */
- uint32_t cpumask;
-
- cpumask = PCPU_GET(cpumask) | PCPU_GET(other_cpus);
-
- for (i = 0; i < 32; i++) {
- if (cpumask & (1 << i)) {
- cpu = cpu_ltop_map[i];
- bucket = ((cpu >> 2) << 3);
- //|(cpu & 0x03);
- bucket_map |= (1ULL << bucket);
- dbg_msg("i=%d, cpu=%d, bucket = %d, bucket_map=%llx\n",
- i, cpu, bucket, bucket_map);
- }
- }
-
- /* bucket_map = 0x1; */
- xlr_write_reg(priv->mmio, R_PDE_CLASS_0, (bucket_map & 0xffffffff));
- xlr_write_reg(priv->mmio, R_PDE_CLASS_0 + 1,
- ((bucket_map >> 32) & 0xffffffff));
-
- xlr_write_reg(priv->mmio, R_PDE_CLASS_1, (bucket_map & 0xffffffff));
- xlr_write_reg(priv->mmio, R_PDE_CLASS_1 + 1,
- ((bucket_map >> 32) & 0xffffffff));
-
- xlr_write_reg(priv->mmio, R_PDE_CLASS_2, (bucket_map & 0xffffffff));
- xlr_write_reg(priv->mmio, R_PDE_CLASS_2 + 1,
- ((bucket_map >> 32) & 0xffffffff));
-
- xlr_write_reg(priv->mmio, R_PDE_CLASS_3, (bucket_map & 0xffffffff));
- xlr_write_reg(priv->mmio, R_PDE_CLASS_3 + 1,
- ((bucket_map >> 32) & 0xffffffff));
-}
-
-static void
-rmi_xlr_config_parser(struct driver_data *priv)
-{
- /*
- * Mark it as no classification The parser extract is gauranteed to
- * be zero with no classfication
- */
- xlr_write_reg(priv->mmio, R_L2TYPE_0, 0x00);
-
- xlr_write_reg(priv->mmio, R_L2TYPE_0, 0x01);
-
- /* configure the parser : L2 Type is configured in the bootloader */
- /* extract IP: src, dest protocol */
- xlr_write_reg(priv->mmio, R_L3CTABLE,
- (9 << 20) | (1 << 19) | (1 << 18) | (0x01 << 16) |
- (0x0800 << 0));
- xlr_write_reg(priv->mmio, R_L3CTABLE + 1,
- (12 << 25) | (4 << 21) | (16 << 14) | (4 << 10));
-
-}
-
-static void
-rmi_xlr_config_classifier(struct driver_data *priv)
-{
- int i = 0;
-
- if (priv->type == XLR_XGMAC) {
- /* xgmac translation table doesn't have sane values on reset */
- for (i = 0; i < 64; i++)
- xlr_write_reg(priv->mmio, R_TRANSLATETABLE + i, 0x0);
-
- /*
- * use upper 7 bits of the parser extract to index the
- * translate table
- */
- xlr_write_reg(priv->mmio, R_PARSERCONFIGREG, 0x0);
- }
-}
-
-enum {
- SGMII_SPEED_10 = 0x00000000,
- SGMII_SPEED_100 = 0x02000000,
- SGMII_SPEED_1000 = 0x04000000,
-};
-
-static void
-rmi_xlr_gmac_config_speed(struct driver_data *priv)
-{
- int phy_addr = priv->phy_addr;
- xlr_reg_t *mmio = priv->mmio;
- struct rge_softc *sc = priv->sc;
-
- priv->speed = rge_mii_read_internal(priv->mii_mmio, phy_addr, 28);
- priv->link = rge_mii_read_internal(priv->mii_mmio, phy_addr, 1) & 0x4;
- priv->speed = (priv->speed >> 3) & 0x03;
-
- if (priv->speed == xlr_mac_speed_10) {
- if (priv->mode != XLR_RGMII)
- xlr_write_reg(mmio, R_INTERFACE_CONTROL, SGMII_SPEED_10);
- xlr_write_reg(mmio, R_MAC_CONFIG_2, 0x7137);
- xlr_write_reg(mmio, R_CORECONTROL, 0x02);
- printf("%s: [10Mbps]\n", device_get_nameunit(sc->rge_dev));
- sc->rge_mii.mii_media.ifm_media = IFM_ETHER | IFM_AUTO | IFM_10_T | IFM_FDX;
- sc->rge_mii.mii_media.ifm_cur->ifm_media = IFM_ETHER | IFM_AUTO | IFM_10_T | IFM_FDX;
- sc->rge_mii.mii_media_active = IFM_ETHER | IFM_AUTO | IFM_10_T | IFM_FDX;
- } else if (priv->speed == xlr_mac_speed_100) {
- if (priv->mode != XLR_RGMII)
- xlr_write_reg(mmio, R_INTERFACE_CONTROL, SGMII_SPEED_100);
- xlr_write_reg(mmio, R_MAC_CONFIG_2, 0x7137);
- xlr_write_reg(mmio, R_CORECONTROL, 0x01);
- printf("%s: [100Mbps]\n", device_get_nameunit(sc->rge_dev));
- sc->rge_mii.mii_media.ifm_media = IFM_ETHER | IFM_AUTO | IFM_100_TX | IFM_FDX;
- sc->rge_mii.mii_media.ifm_cur->ifm_media = IFM_ETHER | IFM_AUTO | IFM_100_TX | IFM_FDX;
- sc->rge_mii.mii_media_active = IFM_ETHER | IFM_AUTO | IFM_100_TX | IFM_FDX;
- } else {
- if (priv->speed != xlr_mac_speed_1000) {
- if (priv->mode != XLR_RGMII)
- xlr_write_reg(mmio, R_INTERFACE_CONTROL, SGMII_SPEED_100);
- printf("PHY reported unknown MAC speed, defaulting to 100Mbps\n");
- xlr_write_reg(mmio, R_MAC_CONFIG_2, 0x7137);
- xlr_write_reg(mmio, R_CORECONTROL, 0x01);
- sc->rge_mii.mii_media.ifm_media = IFM_ETHER | IFM_AUTO | IFM_100_TX | IFM_FDX;
- sc->rge_mii.mii_media.ifm_cur->ifm_media = IFM_ETHER | IFM_AUTO | IFM_100_TX | IFM_FDX;
- sc->rge_mii.mii_media_active = IFM_ETHER | IFM_AUTO | IFM_100_TX | IFM_FDX;
- } else {
- if (priv->mode != XLR_RGMII)
- xlr_write_reg(mmio, R_INTERFACE_CONTROL, SGMII_SPEED_1000);
- xlr_write_reg(mmio, R_MAC_CONFIG_2, 0x7237);
- xlr_write_reg(mmio, R_CORECONTROL, 0x00);
- printf("%s: [1000Mbps]\n", device_get_nameunit(sc->rge_dev));
- sc->rge_mii.mii_media.ifm_media = IFM_ETHER | IFM_AUTO | IFM_1000_T | IFM_FDX;
- sc->rge_mii.mii_media.ifm_cur->ifm_media = IFM_ETHER | IFM_AUTO | IFM_1000_T | IFM_FDX;
- sc->rge_mii.mii_media_active = IFM_ETHER | IFM_AUTO | IFM_1000_T | IFM_FDX;
- }
- }
-
- if (!priv->link) {
- sc->rge_mii.mii_media.ifm_cur->ifm_media = IFM_ETHER;
- sc->link_up = 0;
- } else {
- sc->link_up = 1;
- }
-}
-
-/*****************************************************************
- * Initialize XGMAC
- *****************************************************************/
-static void
-rmi_xlr_xgmac_init(struct driver_data *priv)
-{
- int i = 0;
- xlr_reg_t *mmio = priv->mmio;
- int id = priv->instance;
- struct rge_softc *sc = priv->sc;
- volatile unsigned short *cpld;
-
- cpld = (volatile unsigned short *)0xBD840000;
-
- xlr_write_reg(priv->mmio, R_DESC_PACK_CTRL,
- (MAX_FRAME_SIZE << O_DESC_PACK_CTRL__RegularSize) | (4 << 20));
- xlr_write_reg(priv->mmio, R_BYTEOFFSET0, BYTE_OFFSET);
- rmi_xlr_config_pde(priv);
- rmi_xlr_config_parser(priv);
- rmi_xlr_config_classifier(priv);
-
- xlr_write_reg(priv->mmio, R_MSG_TX_THRESHOLD, 1);
-
- /* configure the XGMAC Registers */
- xlr_write_reg(mmio, R_XGMAC_CONFIG_1, 0x50000026);
-
- /* configure the XGMAC_GLUE Registers */
- xlr_write_reg(mmio, R_DMACR0, 0xffffffff);
- xlr_write_reg(mmio, R_DMACR1, 0xffffffff);
- xlr_write_reg(mmio, R_DMACR2, 0xffffffff);
- xlr_write_reg(mmio, R_DMACR3, 0xffffffff);
- xlr_write_reg(mmio, R_STATCTRL, 0x04);
- xlr_write_reg(mmio, R_L2ALLOCCTRL, 0xffffffff);
-
- xlr_write_reg(mmio, R_XGMACPADCALIBRATION, 0x030);
- xlr_write_reg(mmio, R_EGRESSFIFOCARVINGSLOTS, 0x0f);
- xlr_write_reg(mmio, R_L2ALLOCCTRL, 0xffffffff);
- xlr_write_reg(mmio, R_XGMAC_MIIM_CONFIG, 0x3e);
-
- /*
- * take XGMII phy out of reset
- */
- /*
- * we are pulling everything out of reset because writing a 0 would
- * reset other devices on the chip
- */
- cpld[ATX_CPLD_RESET_1] = 0xffff;
- cpld[ATX_CPLD_MISC_CTRL] = 0xffff;
- cpld[ATX_CPLD_RESET_2] = 0xffff;
-
- xgmac_mdio_setup(mmio);
-
- rmi_xlr_config_spill_area(priv);
-
- if (id == 0) {
- for (i = 0; i < 16; i++) {
- xlr_write_reg(mmio, R_XGS_TX0_BUCKET_SIZE + i,
- bucket_sizes.
- bucket[MSGRNG_STNID_XGS0_TX + i]);
- }
-
- xlr_write_reg(mmio, R_XGS_JFR_BUCKET_SIZE,
- bucket_sizes.bucket[MSGRNG_STNID_XMAC0JFR]);
- xlr_write_reg(mmio, R_XGS_RFR_BUCKET_SIZE,
- bucket_sizes.bucket[MSGRNG_STNID_XMAC0RFR]);
-
- for (i = 0; i < MAX_NUM_MSGRNG_STN_CC; i++) {
- xlr_write_reg(mmio, R_CC_CPU0_0 + i,
- cc_table_xgs_0.
- counters[i >> 3][i & 0x07]);
- }
- } else if (id == 1) {
- for (i = 0; i < 16; i++) {
- xlr_write_reg(mmio, R_XGS_TX0_BUCKET_SIZE + i,
- bucket_sizes.
- bucket[MSGRNG_STNID_XGS1_TX + i]);
- }
-
- xlr_write_reg(mmio, R_XGS_JFR_BUCKET_SIZE,
- bucket_sizes.bucket[MSGRNG_STNID_XMAC1JFR]);
- xlr_write_reg(mmio, R_XGS_RFR_BUCKET_SIZE,
- bucket_sizes.bucket[MSGRNG_STNID_XMAC1RFR]);
-
- for (i = 0; i < MAX_NUM_MSGRNG_STN_CC; i++) {
- xlr_write_reg(mmio, R_CC_CPU0_0 + i,
- cc_table_xgs_1.
- counters[i >> 3][i & 0x07]);
- }
- }
- sc->rge_mii.mii_media.ifm_media = IFM_ETHER | IFM_AUTO | IFM_10G_SR | IFM_FDX;
- sc->rge_mii.mii_media.ifm_media |= (IFM_AVALID | IFM_ACTIVE);
- sc->rge_mii.mii_media.ifm_cur->ifm_media = IFM_ETHER | IFM_AUTO | IFM_10G_SR | IFM_FDX;
- sc->rge_mii.mii_media_active = IFM_ETHER | IFM_AUTO | IFM_10G_SR | IFM_FDX;
- sc->rge_mii.mii_media.ifm_cur->ifm_media |= (IFM_AVALID | IFM_ACTIVE);
-
- priv->init_frin_desc = 1;
-}
-
-/*******************************************************
- * Initialization gmac
- *******************************************************/
-static int
-rmi_xlr_gmac_reset(struct driver_data *priv)
-{
- volatile uint32_t val;
- xlr_reg_t *mmio = priv->mmio;
- int i, maxloops = 100;
-
- /* Disable MAC RX */
- val = xlr_read_reg(mmio, R_MAC_CONFIG_1);
- val &= ~0x4;
- xlr_write_reg(mmio, R_MAC_CONFIG_1, val);
-
- /* Disable Core RX */
- val = xlr_read_reg(mmio, R_RX_CONTROL);
- val &= ~0x1;
- xlr_write_reg(mmio, R_RX_CONTROL, val);
-
- /* wait for rx to halt */
- for (i = 0; i < maxloops; i++) {
- val = xlr_read_reg(mmio, R_RX_CONTROL);
- if (val & 0x2)
- break;
- DELAY(1000);
- }
- if (i == maxloops)
- return -1;
-
- /* Issue a soft reset */
- val = xlr_read_reg(mmio, R_RX_CONTROL);
- val |= 0x4;
- xlr_write_reg(mmio, R_RX_CONTROL, val);
-
- /* wait for reset to complete */
- for (i = 0; i < maxloops; i++) {
- val = xlr_read_reg(mmio, R_RX_CONTROL);
- if (val & 0x8)
- break;
- DELAY(1000);
- }
- if (i == maxloops)
- return -1;
-
- /* Clear the soft reset bit */
- val = xlr_read_reg(mmio, R_RX_CONTROL);
- val &= ~0x4;
- xlr_write_reg(mmio, R_RX_CONTROL, val);
- return 0;
-}
-
-static void
-rmi_xlr_gmac_init(struct driver_data *priv)
-{
- int i = 0;
- xlr_reg_t *mmio = priv->mmio;
- int id = priv->instance;
- struct stn_cc *gmac_cc_config;
- uint32_t value = 0;
- int blk = id / 4, port = id % 4;
-
- rmi_xlr_mac_set_enable(priv, 0);
-
- rmi_xlr_config_spill_area(priv);
-
- xlr_write_reg(mmio, R_DESC_PACK_CTRL,
- (BYTE_OFFSET << O_DESC_PACK_CTRL__ByteOffset) |
- (1 << O_DESC_PACK_CTRL__MaxEntry) |
- (MAX_FRAME_SIZE << O_DESC_PACK_CTRL__RegularSize));
-
- rmi_xlr_config_pde(priv);
- rmi_xlr_config_parser(priv);
- rmi_xlr_config_classifier(priv);
-
- xlr_write_reg(mmio, R_MSG_TX_THRESHOLD, 3);
- xlr_write_reg(mmio, R_MAC_CONFIG_1, 0x35);
- xlr_write_reg(mmio, R_RX_CONTROL, (0x7 << 6));
-
- if (priv->mode == XLR_PORT0_RGMII) {
- printf("Port 0 set in RGMII mode\n");
- value = xlr_read_reg(mmio, R_RX_CONTROL);
- value |= 1 << O_RX_CONTROL__RGMII;
- xlr_write_reg(mmio, R_RX_CONTROL, value);
- }
- rmi_xlr_mac_mii_init(priv);
-
-
-#if 0
- priv->advertising = ADVERTISED_10baseT_Full | ADVERTISED_10baseT_Half |
- ADVERTISED_100baseT_Full | ADVERTISED_100baseT_Half |
- ADVERTISED_1000baseT_Full | ADVERTISED_Autoneg |
- ADVERTISED_MII;
-#endif
-
- /*
- * Enable all MDIO interrupts in the phy RX_ER bit seems to be get
- * set about every 1 sec in GigE mode, ignore it for now...
- */
- rge_mii_write_internal(priv->mii_mmio, priv->phy_addr, 25, 0xfffffffe);
-
- if (priv->mode != XLR_RGMII) {
- serdes_regs_init(priv);
- serdes_autoconfig(priv);
- }
- rmi_xlr_gmac_config_speed(priv);
-
- value = xlr_read_reg(mmio, R_IPG_IFG);
- xlr_write_reg(mmio, R_IPG_IFG, ((value & ~0x7f) | MAC_B2B_IPG));
- xlr_write_reg(mmio, R_DMACR0, 0xffffffff);
- xlr_write_reg(mmio, R_DMACR1, 0xffffffff);
- xlr_write_reg(mmio, R_DMACR2, 0xffffffff);
- xlr_write_reg(mmio, R_DMACR3, 0xffffffff);
- xlr_write_reg(mmio, R_STATCTRL, 0x04);
- xlr_write_reg(mmio, R_L2ALLOCCTRL, 0xffffffff);
- xlr_write_reg(mmio, R_INTMASK, 0);
- xlr_write_reg(mmio, R_FREEQCARVE, 0);
-
- xlr_write_reg(mmio, R_GMAC_TX0_BUCKET_SIZE + port,
- xlr_board_info.bucket_sizes->bucket[priv->txbucket]);
- xlr_write_reg(mmio, R_GMAC_JFR0_BUCKET_SIZE,
- xlr_board_info.bucket_sizes->bucket[MSGRNG_STNID_GMACJFR_0]);
- xlr_write_reg(mmio, R_GMAC_RFR0_BUCKET_SIZE,
- xlr_board_info.bucket_sizes->bucket[MSGRNG_STNID_GMACRFR_0]);
- xlr_write_reg(mmio, R_GMAC_JFR1_BUCKET_SIZE,
- xlr_board_info.bucket_sizes->bucket[MSGRNG_STNID_GMACJFR_1]);
- xlr_write_reg(mmio, R_GMAC_RFR1_BUCKET_SIZE,
- xlr_board_info.bucket_sizes->bucket[MSGRNG_STNID_GMACRFR_1]);
-
- dbg_msg("Programming credit counter %d : %d -> %d\n", blk, R_GMAC_TX0_BUCKET_SIZE + port,
- xlr_board_info.bucket_sizes->bucket[priv->txbucket]);
-
- gmac_cc_config = xlr_board_info.gmac_block[blk].credit_config;
- for (i = 0; i < MAX_NUM_MSGRNG_STN_CC; i++) {
- xlr_write_reg(mmio, R_CC_CPU0_0 + i,
- gmac_cc_config->counters[i >> 3][i & 0x07]);
- dbg_msg("%d: %d -> %d\n", priv->instance,
- R_CC_CPU0_0 + i, gmac_cc_config->counters[i >> 3][i & 0x07]);
- }
- priv->init_frin_desc = 1;
-}
-
-/**********************************************************************
- * Set promiscuous mode
- **********************************************************************/
-static void
-xlr_mac_set_rx_mode(struct rge_softc *sc)
-{
- struct driver_data *priv = &(sc->priv);
- uint32_t regval;
-
- regval = xlr_read_reg(priv->mmio, R_MAC_FILTER_CONFIG);
-
- if (sc->flags & IFF_PROMISC) {
- regval |= (1 << O_MAC_FILTER_CONFIG__BROADCAST_EN) |
- (1 << O_MAC_FILTER_CONFIG__PAUSE_FRAME_EN) |
- (1 << O_MAC_FILTER_CONFIG__ALL_MCAST_EN) |
- (1 << O_MAC_FILTER_CONFIG__ALL_UCAST_EN);
- } else {
- regval &= ~((1 << O_MAC_FILTER_CONFIG__PAUSE_FRAME_EN) |
- (1 << O_MAC_FILTER_CONFIG__ALL_UCAST_EN));
- }
-
- xlr_write_reg(priv->mmio, R_MAC_FILTER_CONFIG, regval);
-}
-
-/**********************************************************************
- * Configure LAN speed for the specified MAC.
- ********************************************************************* */
-static int
-rmi_xlr_mac_set_speed(struct driver_data *s, xlr_mac_speed_t speed)
-{
- return 0;
-}
-
-/**********************************************************************
- * Set Ethernet duplex and flow control options for this MAC
- ********************************************************************* */
-static int
-rmi_xlr_mac_set_duplex(struct driver_data *s,
- xlr_mac_duplex_t duplex, xlr_mac_fc_t fc)
-{
- return 0;
-}
-
-/*****************************************************************
- * Kernel Net Stack <-> MAC Driver Interface
- *****************************************************************/
-/**********************************************************************
- **********************************************************************/
-#define MAC_TX_FAIL 2
-#define MAC_TX_PASS 0
-#define MAC_TX_RETRY 1
-
-static __inline__ void
-message_send_block(unsigned int size, unsigned int code,
- unsigned int stid, struct msgrng_msg *msg)
-{
- unsigned int dest = 0;
- unsigned long long status = 0;
-
- msgrng_load_tx_msg0(msg->msg0);
- msgrng_load_tx_msg1(msg->msg1);
- msgrng_load_tx_msg2(msg->msg2);
- msgrng_load_tx_msg3(msg->msg3);
-
- dest = ((size - 1) << 16) | (code << 8) | (stid);
-
- do {
- msgrng_send(dest);
- status = msgrng_read_status();
- } while (status & 0x6);
-
-}
-
-int xlr_dev_queue_xmit_hack = 0;
-
-static int
-mac_xmit(struct mbuf *m, struct rge_softc *sc,
- struct driver_data *priv, int len, struct p2d_tx_desc *tx_desc)
-{
- struct msgrng_msg msg;
- int stid = priv->txbucket;
- uint32_t tx_cycles = 0;
- unsigned long mflags = 0;
- int vcpu = PCPU_GET(cpuid);
- int rv;
-
- tx_cycles = mips_rd_count();
-
- if (build_frag_list(m, &msg, tx_desc) != 0)
- return MAC_TX_FAIL;
-
- else {
- msgrng_access_enable(mflags);
- if ((rv = message_send_retry(1, MSGRNG_CODE_MAC, stid, &msg)) != 0) {
- msg_snd_failed++;
- msgrng_access_disable(mflags);
- release_tx_desc(&msg, 0);
- xlr_rge_msg_snd_failed[vcpu]++;
- dbg_msg("Failed packet to cpu %d, rv = %d, stid %d, msg0=%llx\n",
- vcpu, rv, stid, msg.msg0);
- return MAC_TX_FAIL;
- }
- msgrng_access_disable(mflags);
- port_inc_counter(priv->instance, PORT_TX);
- }
-
- /* Send the packet to MAC */
- dbg_msg("Sent tx packet to stid %d, msg0=%llx, msg1=%llx \n", stid, msg.msg0, msg.msg1);
-#ifdef DUMP_PACKETS
- {
- int i = 0;
- unsigned char *buf = (char *)m->m_data;
-
- printf("Tx Packet: length=%d\n", len);
- for (i = 0; i < 64; i++) {
- if (i && (i % 16) == 0)
- printf("\n");
- printf("%02x ", buf[i]);
- }
- printf("\n");
- }
-#endif
- xlr_inc_counter(NETIF_TX);
- return MAC_TX_PASS;
-}
-
-static int
-rmi_xlr_mac_xmit(struct mbuf *m, struct rge_softc *sc, int len, struct p2d_tx_desc *tx_desc)
-{
- struct driver_data *priv = &(sc->priv);
- int ret = -ENOSPC;
-
- dbg_msg("IN\n");
-
- xlr_inc_counter(NETIF_STACK_TX);
-
-retry:
- ret = mac_xmit(m, sc, priv, len, tx_desc);
-
- if (ret == MAC_TX_RETRY)
- goto retry;
-
- dbg_msg("OUT, ret = %d\n", ret);
- if (ret == MAC_TX_FAIL) {
- /* FULL */
- dbg_msg("Msg Ring Full. Stopping upper layer Q\n");
- port_inc_counter(priv->instance, PORT_STOPQ);
- }
- return ret;
-}
-
-static void
-mac_frin_replenish(void *args /* ignored */ )
-{
-#ifdef RX_COPY
- return;
-#else
- int cpu = xlr_cpu_id();
- int done = 0;
- int i = 0;
-
- xlr_inc_counter(REPLENISH_ENTER);
- /*
- * xlr_set_counter(REPLENISH_ENTER_COUNT,
- * atomic_read(frin_to_be_sent));
- */
- xlr_set_counter(REPLENISH_CPU, PCPU_GET(cpuid));
-
- for (;;) {
-
- done = 0;
-
- for (i = 0; i < XLR_MAX_MACS; i++) {
- /* int offset = 0; */
- unsigned long msgrng_flags;
- void *m;
- uint32_t cycles;
- struct rge_softc *sc;
- struct driver_data *priv;
- int frin_to_be_sent;
-
- sc = dev_mac[i];
- if (!sc)
- goto skip;
-
- priv = &(sc->priv);
- frin_to_be_sent = priv->frin_to_be_sent[cpu];
-
- /* if (atomic_read(frin_to_be_sent) < 0) */
- if (frin_to_be_sent < 0) {
- panic("BUG?: [%s]: gmac_%d illegal value for frin_to_be_sent=%d\n",
- __FUNCTION__, i,
- frin_to_be_sent);
- }
- /* if (!atomic_read(frin_to_be_sent)) */
- if (!frin_to_be_sent)
- goto skip;
-
- cycles = mips_rd_count();
- {
- m = get_buf();
- if (!m) {
- device_printf(sc->rge_dev, "No buffer\n");
- goto skip;
- }
- }
- xlr_inc_counter(REPLENISH_FRIN);
- msgrng_access_enable(msgrng_flags);
- if (xlr_mac_send_fr(priv, vtophys(m), MAX_FRAME_SIZE)) {
- free_buf(vtophys(m));
- printf("[%s]: rx free message_send failed!\n", __FUNCTION__);
- msgrng_access_disable(msgrng_flags);
- break;
- }
- msgrng_access_disable(msgrng_flags);
- xlr_set_counter(REPLENISH_CYCLES,
- (read_c0_count() - cycles));
- atomic_subtract_int((&priv->frin_to_be_sent[cpu]), 1);
-
- continue;
- skip:
- done++;
- }
- if (done == XLR_MAX_MACS)
- break;
- }
-#endif
-}
-
-static volatile uint32_t g_tx_frm_tx_ok;
-
-static void
-rge_tx_bkp_func(void *arg, int npending)
-{
- int i = 0;
-
- for (i = 0; i < xlr_board_info.gmacports; i++) {
- if (!dev_mac[i] || !dev_mac[i]->active)
- continue;
- rge_start_locked(dev_mac[i]->rge_ifp, RGE_TX_THRESHOLD);
- }
- atomic_subtract_int(&g_tx_frm_tx_ok, 1);
-}
-
-/* This function is called from an interrupt handler */
-void
-rmi_xlr_mac_msgring_handler(int bucket, int size, int code,
- int stid, struct msgrng_msg *msg,
- void *data /* ignored */ )
-{
- uint64_t phys_addr = 0;
- unsigned long addr = 0;
- uint32_t length = 0;
- int ctrl = 0, port = 0;
- struct rge_softc *sc = NULL;
- struct driver_data *priv = 0;
- struct ifnet *ifp;
- int cpu = xlr_cpu_id();
- int vcpu = (cpu << 2) + xlr_thr_id();
-
- dbg_msg("mac: bucket=%d, size=%d, code=%d, stid=%d, msg0=%llx msg1=%llx\n",
- bucket, size, code, stid, msg->msg0, msg->msg1);
-
- phys_addr = (uint64_t) (msg->msg0 & 0xffffffffe0ULL);
- length = (msg->msg0 >> 40) & 0x3fff;
- if (length == 0) {
- ctrl = CTRL_REG_FREE;
- port = (msg->msg0 >> 54) & 0x0f;
- addr = 0;
- } else {
- ctrl = CTRL_SNGL;
- length = length - BYTE_OFFSET - MAC_CRC_LEN;
- port = msg->msg0 & 0x0f;
- addr = 0;
- }
-
- if (xlr_board_info.is_xls) {
- if (stid == MSGRNG_STNID_GMAC1)
- port += 4;
- sc = dev_mac[dev_mac_gmac0 + port];
- } else {
- if (stid == MSGRNG_STNID_XGS0FR)
- sc = dev_mac[dev_mac_xgs0];
- else if (stid == MSGRNG_STNID_XGS1FR)
- sc = dev_mac[dev_mac_xgs0 + 1];
- else
- sc = dev_mac[dev_mac_gmac0 + port];
- }
- if (sc == NULL)
- return;
- priv = &(sc->priv);
-
- dbg_msg("msg0 = %llx, stid = %d, port = %d, addr=%lx, length=%d, ctrl=%d\n",
- msg->msg0, stid, port, addr, length, ctrl);
-
- if (ctrl == CTRL_REG_FREE || ctrl == CTRL_JUMBO_FREE) {
- xlr_rge_tx_ok_done[vcpu]++;
- release_tx_desc(msg, 1);
- ifp = sc->rge_ifp;
- if (ifp->if_drv_flags & IFF_DRV_OACTIVE) {
- ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
- }
- if (atomic_cmpset_int(&g_tx_frm_tx_ok, 0, 1))
- rge_tx_bkp_func(NULL, 0);
- xlr_set_counter(NETIF_TX_COMPLETE_CYCLES,
- (read_c0_count() - msgrng_msg_cycles));
- } else if (ctrl == CTRL_SNGL || ctrl == CTRL_START) {
- /* Rx Packet */
- /* struct mbuf *m = 0; */
- /* int logical_cpu = 0; */
-
- dbg_msg("Received packet, port = %d\n", port);
- /*
- * if num frins to be sent exceeds threshold, wake up the
- * helper thread
- */
- atomic_add_int(&(priv->frin_to_be_sent[cpu]), 1);
- if ((priv->frin_to_be_sent[cpu]) > MAC_FRIN_TO_BE_SENT_THRESHOLD) {
- mac_frin_replenish(NULL);
- }
- dbg_msg("gmac_%d: rx packet: phys_addr = %llx, length = %x\n",
- priv->instance, phys_addr, length);
- mac_stats_add(priv->stats.rx_packets, 1);
- mac_stats_add(priv->stats.rx_bytes, length);
- xlr_inc_counter(NETIF_RX);
- xlr_set_counter(NETIF_RX_CYCLES,
- (read_c0_count() - msgrng_msg_cycles));
- rge_rx(sc, phys_addr, length);
- xlr_rge_rx_done[vcpu]++;
- } else {
- printf("[%s]: unrecognized ctrl=%d!\n", __FUNCTION__, ctrl);
- }
-
-}
-
-/**********************************************************************
- **********************************************************************/
-static int
-rge_probe(dev)
- device_t dev;
-{
- /* Always return 0 */
- return 0;
-}
-
-volatile unsigned long xlr_debug_enabled;
-struct callout rge_dbg_count;
-static void
-xlr_debug_count(void *addr)
-{
- struct driver_data *priv = &dev_mac[0]->priv;
-
- /* uint32_t crdt; */
- if (xlr_debug_enabled) {
- printf("\nAvailRxIn %#x\n", xlr_read_reg(priv->mmio, 0x23e));
- }
- callout_reset(&rge_dbg_count, hz, xlr_debug_count, NULL);
-}
-
-
-static void
-xlr_tx_q_wakeup(void *addr)
-{
- int i = 0;
- int j = 0;
-
- for (i = 0; i < xlr_board_info.gmacports; i++) {
- if (!dev_mac[i] || !dev_mac[i]->active)
- continue;
- if ((dev_mac[i]->rge_ifp->if_drv_flags) & IFF_DRV_OACTIVE) {
- for (j = 0; j < XLR_MAX_CORE; j++) {
- if (xlr_tot_avail_p2d[j]) {
- dev_mac[i]->rge_ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
- break;
- }
- }
- }
- }
- callout_reset(&xlr_tx_stop_bkp, 5 * hz, xlr_tx_q_wakeup, NULL);
-}
-
-static int
-rge_attach(device_t dev)
-{
- struct ifnet *ifp;
- struct rge_softc *sc;
- struct driver_data *priv = 0;
- int ret = 0;
- struct xlr_gmac_block_t *gmac_conf = device_get_ivars(dev);
-
- sc = device_get_softc(dev);
- sc->rge_dev = dev;
-
- /* Initialize mac's */
- sc->unit = device_get_unit(dev);
-
- if (sc->unit > XLR_MAX_MACS) {
- ret = ENXIO;
- goto out;
- }
- RGE_LOCK_INIT(sc, device_get_nameunit(dev));
-
- priv = &(sc->priv);
- priv->sc = sc;
-
- sc->flags = 0; /* TODO : fix me up later */
-
- priv->id = sc->unit;
- if (gmac_conf->type == XLR_GMAC) {
- priv->instance = priv->id;
- priv->mmio = (xlr_reg_t *) (xlr_io_base + gmac_conf->baseaddr +
- 0x1000 * (sc->unit % 4));
- if ((ret = rmi_xlr_gmac_reset(priv)) == -1)
- goto out;
- } else if (gmac_conf->type == XLR_XGMAC) {
- priv->instance = priv->id - xlr_board_info.gmacports;
- priv->mmio = (xlr_reg_t *) (xlr_io_base + gmac_conf->baseaddr);
- }
- if (xlr_boot1_info.board_major_version == RMI_XLR_BOARD_ARIZONA_VI) {
- dbg_msg("Arizona board - offset 4 \n");
- priv->mii_mmio = (xlr_reg_t *) (xlr_io_base + XLR_IO_GMAC_4_OFFSET);
- } else
- priv->mii_mmio = (xlr_reg_t *) (xlr_io_base + XLR_IO_GMAC_0_OFFSET);
-
- priv->pcs_mmio = (xlr_reg_t *) (xlr_io_base + gmac_conf->baseaddr);
- priv->serdes_mmio = (xlr_reg_t *) (xlr_io_base + XLR_IO_GMAC_0_OFFSET);
-
- sc->base_addr = (unsigned long)priv->mmio;
- sc->mem_end = (unsigned long)priv->mmio + XLR_IO_SIZE - 1;
-
- sc->xmit = rge_start;
- sc->stop = rge_stop;
- sc->get_stats = rmi_xlr_mac_get_stats;
- sc->ioctl = rge_ioctl;
-
- /* Initialize the device specific driver data */
- mtx_init(&priv->lock, "rge", NULL, MTX_SPIN);
-
- priv->type = gmac_conf->type;
-
- priv->mode = gmac_conf->mode;
- if (xlr_board_info.is_xls == 0) {
- if (xlr_board_atx_ii() && !xlr_board_atx_ii_b())
- priv->phy_addr = priv->instance - 2;
- else
- priv->phy_addr = priv->instance;
- priv->mode = XLR_RGMII;
- } else {
- if (gmac_conf->mode == XLR_PORT0_RGMII &&
- priv->instance == 0) {
- priv->mode = XLR_PORT0_RGMII;
- priv->phy_addr = 0;
- } else {
- priv->mode = XLR_SGMII;
- priv->phy_addr = priv->instance + 16;
- }
- }
-
- priv->txbucket = gmac_conf->station_txbase + priv->instance % 4;
- priv->rfrbucket = gmac_conf->station_rfr;
- priv->spill_configured = 0;
-
- dbg_msg("priv->mmio=%p\n", priv->mmio);
-
- /* Set up ifnet structure */
- ifp = sc->rge_ifp = if_alloc(IFT_ETHER);
- if (ifp == NULL) {
- device_printf(sc->rge_dev, "failed to if_alloc()\n");
- rge_release_resources(sc);
- ret = ENXIO;
- RGE_LOCK_DESTROY(sc);
- goto out;
- }
- ifp->if_softc = sc;
- if_initname(ifp, device_get_name(dev), device_get_unit(dev));
- ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
- ifp->if_ioctl = rge_ioctl;
- ifp->if_start = rge_start;
- ifp->if_watchdog = rge_watchdog;
- ifp->if_init = rge_init;
- ifp->if_mtu = ETHERMTU;
- ifp->if_snd.ifq_drv_maxlen = RGE_TX_Q_SIZE;
- IFQ_SET_MAXLEN(&ifp->if_snd, ifp->if_snd.ifq_drv_maxlen);
- IFQ_SET_READY(&ifp->if_snd);
- sc->active = 1;
- ifp->if_hwassist = 0;
- ifp->if_capabilities = IFCAP_TXCSUM | IFCAP_VLAN_HWTAGGING;
- ifp->if_capenable = ifp->if_capabilities;
-
- /* Initialize the rge_softc */
- sc->irq = gmac_conf->baseirq + priv->instance % 4;
-
- /* Set the IRQ into the rid field */
- /*
- * note this is a hack to pass the irq to the iodi interrupt setup
- * routines
- */
- sc->rge_irq.__r_i = (struct resource_i *)sc->irq;
-
- ret = bus_setup_intr(dev, &sc->rge_irq, INTR_FAST | INTR_TYPE_NET | INTR_MPSAFE,
- NULL, rge_intr, sc, &sc->rge_intrhand);
-
- if (ret) {
- rge_detach(dev);
- device_printf(sc->rge_dev, "couldn't set up irq\n");
- RGE_LOCK_DESTROY(sc);
- goto out;
- }
- xlr_mac_get_hwaddr(sc);
- xlr_mac_setup_hwaddr(priv);
-
- dbg_msg("MMIO %08lx, MII %08lx, PCS %08lx, base %08lx PHY %d IRQ %d\n",
- (u_long)priv->mmio, (u_long)priv->mii_mmio, (u_long)priv->pcs_mmio,
- (u_long)sc->base_addr, priv->phy_addr, sc->irq);
- dbg_msg("HWADDR %02x:%02x tx %d rfr %d\n", (u_int)sc->dev_addr[4],
- (u_int)sc->dev_addr[5], priv->txbucket, priv->rfrbucket);
-
- /*
- * Set up ifmedia support.
- */
- /*
- * Initialize MII/media info.
- */
- sc->rge_mii.mii_ifp = ifp;
- sc->rge_mii.mii_readreg = rge_mii_read;
- sc->rge_mii.mii_writereg = (mii_writereg_t) rge_mii_write;
- sc->rge_mii.mii_statchg = rmi_xlr_mac_mii_statchg;
- ifmedia_init(&sc->rge_mii.mii_media, 0, rmi_xlr_mac_mediachange,
- rmi_xlr_mac_mediastatus);
- ifmedia_add(&sc->rge_mii.mii_media, IFM_ETHER | IFM_AUTO, 0, NULL);
- ifmedia_set(&sc->rge_mii.mii_media, IFM_ETHER | IFM_AUTO);
- sc->rge_mii.mii_media.ifm_media = sc->rge_mii.mii_media.ifm_cur->ifm_media;
-
- /*
- * Call MI attach routine.
- */
- ether_ifattach(ifp, sc->dev_addr);
-
- if (priv->type == XLR_GMAC) {
- rmi_xlr_gmac_init(priv);
- } else if (priv->type == XLR_XGMAC) {
- rmi_xlr_xgmac_init(priv);
- }
- dbg_msg("rge_%d: Phoenix Mac at 0x%p (mtu=%d)\n",
- sc->unit, priv->mmio, sc->mtu);
- dev_mac[sc->unit] = sc;
- if (priv->type == XLR_XGMAC && priv->instance == 0)
- dev_mac_xgs0 = sc->unit;
- if (priv->type == XLR_GMAC && priv->instance == 0)
- dev_mac_gmac0 = sc->unit;
-
- if (!gmac_common_init_done) {
- mac_common_init();
- gmac_common_init_done = 1;
- callout_init(&xlr_tx_stop_bkp, CALLOUT_MPSAFE);
- callout_reset(&xlr_tx_stop_bkp, hz, xlr_tx_q_wakeup, NULL);
- callout_init(&rge_dbg_count, CALLOUT_MPSAFE);
- //callout_reset(&rge_dbg_count, hz, xlr_debug_count, NULL);
- }
- if ((ret = rmi_xlr_mac_open(sc)) == -1) {
- RGE_LOCK_DESTROY(sc);
- goto out;
- }
-out:
- if (ret < 0) {
- device_printf(dev, "error - skipping\n");
- }
- return ret;
-}
-
-static void
-rge_reset(struct rge_softc *sc)
-{
-}
-
-static int
-rge_detach(dev)
- device_t dev;
-{
-#ifdef FREEBSD_MAC_NOT_YET
- struct rge_softc *sc;
- struct ifnet *ifp;
-
- sc = device_get_softc(dev);
- ifp = sc->rge_ifp;
-
- RGE_LOCK(sc);
- rge_stop(sc);
- rge_reset(sc);
- RGE_UNLOCK(sc);
-
- ether_ifdetach(ifp);
-
- if (sc->rge_tbi) {
- ifmedia_removeall(&sc->rge_ifmedia);
- } else {
- bus_generic_detach(dev);
- device_delete_child(dev, sc->rge_miibus);
- }
-
- rge_release_resources(sc);
-
-#endif /* FREEBSD_MAC_NOT_YET */
- return (0);
-}
-static int
-rge_suspend(device_t dev)
-{
- struct rge_softc *sc;
-
- sc = device_get_softc(dev);
- RGE_LOCK(sc);
- rge_stop(sc);
- RGE_UNLOCK(sc);
-
- return 0;
-}
-
-static int
-rge_resume(device_t dev)
-{
- panic("rge_resume(): unimplemented\n");
- return 0;
-}
-
-static void
-rge_release_resources(struct rge_softc *sc)
-{
-
- if (sc->rge_ifp != NULL)
- if_free(sc->rge_ifp);
-
- if (mtx_initialized(&sc->rge_mtx)) /* XXX */
- RGE_LOCK_DESTROY(sc);
-}
-uint32_t gmac_rx_fail[32];
-uint32_t gmac_rx_pass[32];
-
-#ifdef RX_COPY
-static void
-rge_rx(struct rge_softc *sc, vm_paddr_t paddr, int len)
-{
- /*
- * struct mbuf *m = (struct mbuf *)*(unsigned int *)((char *)addr -
- * XLR_CACHELINE_SIZE);
- */
- struct mbuf *m;
- void *ptr;
- uint32_t *temp;
- struct ifnet *ifp = sc->rge_ifp;
- unsigned long msgrng_flags;
- int cpu = PCPU_GET(cpuid);
-
-
- temp = (uint32_t *) MIPS_PHYS_TO_KSEG0(paddr - XLR_CACHELINE_SIZE);
-
- ptr = (void *)(temp + XLR_CACHELINE_SIZE);
- m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
- if (m != NULL) {
- m->m_len = m->m_pkthdr.len = MCLBYTES;
- m_copyback(m, 0, len + BYTE_OFFSET, ptr);
- /* align the data */
- m->m_data += BYTE_OFFSET;
- m->m_pkthdr.len = m->m_len = len;
- m->m_pkthdr.rcvif = ifp;
- gmac_rx_pass[cpu]++;
- } else {
- gmac_rx_fail[cpu]++;
- }
- msgrng_access_enable(msgrng_flags);
- xlr_mac_send_fr(&sc->priv, paddr, MAX_FRAME_SIZE);
- msgrng_access_disable(msgrng_flags);
-
-#ifdef DUMP_PACKETS
- {
- int i = 0;
- unsigned char *buf = (char *)m->m_data;
-
- printf("Rx Packet: length=%d\n", len);
- for (i = 0; i < 64; i++) {
- if (i && (i % 16) == 0)
- printf("\n");
- printf("%02x ", buf[i]);
- }
- printf("\n");
- }
-#endif
-
-
- if (m) {
- ifp->if_ipackets++;
- (*ifp->if_input) (ifp, m);
- }
-}
-
-#else
-static void
-rge_rx(struct rge_softc *sc, vm_paddr_t paddr, int len)
-{
- /*
- * struct mbuf *m = (struct mbuf *)*(unsigned int *)((char *)addr -
- * XLR_CACHELINE_SIZE);
- */
- struct mbuf *m;
- uint32_t *temp, tm, mag;
-
- struct ifnet *ifp = sc->rge_ifp;
-
-
- temp = (uint32_t *) MIPS_PHYS_TO_KSEG0(paddr - XLR_CACHELINE_SIZE);
- tm = temp[0];
- mag = temp[1];
- m = (struct mbuf *)tm;
- if (mag != 0xf00bad) {
- /* somebody else packet Error - FIXME in intialization */
- printf("cpu %d: *ERROR* Not my packet paddr %p\n", xlr_cpu_id(), (void *)paddr);
- return;
- }
- /* align the data */
- m->m_data += BYTE_OFFSET;
- m->m_pkthdr.len = m->m_len = len;
- m->m_pkthdr.rcvif = ifp;
-
-#ifdef DUMP_PACKETS
- {
- int i = 0;
- unsigned char *buf = (char *)m->m_data;
-
- printf("Rx Packet: length=%d\n", len);
- for (i = 0; i < 64; i++) {
- if (i && (i % 16) == 0)
- printf("\n");
- printf("%02x ", buf[i]);
- }
- printf("\n");
- }
-#endif
- ifp->if_ipackets++;
- (*ifp->if_input) (ifp, m);
-}
-
-#endif
-
-static void
-rge_intr(void *arg)
-{
- struct rge_softc *sc = (struct rge_softc *)arg;
- struct driver_data *priv = &(sc->priv);
- xlr_reg_t *mmio = priv->mmio;
- uint32_t intreg = xlr_read_reg(mmio, R_INTREG);
-
- if (intreg & (1 << O_INTREG__MDInt)) {
- uint32_t phy_int_status = 0;
- int i = 0;
-
- for (i = 0; i < XLR_MAX_MACS; i++) {
- struct rge_softc *phy_dev = 0;
- struct driver_data *phy_priv = 0;
-
- phy_dev = dev_mac[i];
- if (phy_dev == NULL)
- continue;
-
- phy_priv = &phy_dev->priv;
-
- if (phy_priv->type == XLR_XGMAC)
- continue;
-
- phy_int_status = rge_mii_read_internal(phy_priv->mii_mmio,
- phy_priv->phy_addr, 26);
- printf("rge%d: Phy addr %d, MII MMIO %lx status %x\n", phy_priv->instance,
- (int)phy_priv->phy_addr, (u_long)phy_priv->mii_mmio, phy_int_status);
- rmi_xlr_gmac_config_speed(phy_priv);
- }
- } else {
- printf("[%s]: mac type = %d, instance %d error "
- "interrupt: INTREG = 0x%08x\n",
- __FUNCTION__, priv->type, priv->instance, intreg);
- }
-
- /* clear all interrupts and hope to make progress */
- xlr_write_reg(mmio, R_INTREG, 0xffffffff);
-
- /* on A0 and B0, xgmac interrupts are routed only to xgs_1 irq */
- if ((xlr_revision_b0()) && (priv->type == XLR_XGMAC)) {
- struct rge_softc *xgs0_dev = dev_mac[dev_mac_xgs0];
- struct driver_data *xgs0_priv = &xgs0_dev->priv;
- xlr_reg_t *xgs0_mmio = xgs0_priv->mmio;
- uint32_t xgs0_intreg = xlr_read_reg(xgs0_mmio, R_INTREG);
-
- if (xgs0_intreg) {
- printf("[%s]: mac type = %d, instance %d error "
- "interrupt: INTREG = 0x%08x\n",
- __FUNCTION__, xgs0_priv->type, xgs0_priv->instance, xgs0_intreg);
-
- xlr_write_reg(xgs0_mmio, R_INTREG, 0xffffffff);
- }
- }
-}
-
-static void
-rge_start_locked(struct ifnet *ifp, int threshold)
-{
- struct rge_softc *sc = ifp->if_softc;
- struct mbuf *m = NULL;
- int prepend_pkt = 0;
- int i = 0;
- struct p2d_tx_desc *tx_desc = NULL;
- int cpu = xlr_cpu_id();
- uint32_t vcpu = (cpu << 2) + xlr_thr_id();
-
- if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
- return;
-
- for (i = 0; i < xlr_tot_avail_p2d[cpu]; i++) {
- if (IFQ_DRV_IS_EMPTY(&ifp->if_snd))
- return;
- tx_desc = get_p2d_desc();
- if (!tx_desc) {
- xlr_rge_get_p2d_failed[vcpu]++;
- return;
- }
- /* Grab a packet off the queue. */
- IFQ_DEQUEUE(&ifp->if_snd, m);
- if (m == NULL) {
- free_p2d_desc(tx_desc);
- return;
- }
- prepend_pkt = rmi_xlr_mac_xmit(m, sc, 0, tx_desc);
-
- if (prepend_pkt) {
- xlr_rge_tx_prepend[vcpu]++;
- IF_PREPEND(&ifp->if_snd, m);
- ifp->if_drv_flags |= IFF_DRV_OACTIVE;
- return;
- } else {
- ifp->if_opackets++;
- xlr_rge_tx_done[vcpu]++;
- }
- }
-}
-
-static void
-rge_start(struct ifnet *ifp)
-{
- rge_start_locked(ifp, RGE_TX_Q_SIZE);
-}
-
-static int
-rge_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
-{
- struct rge_softc *sc = ifp->if_softc;
- struct ifreq *ifr = (struct ifreq *)data;
- int mask, error = 0;
-
- /* struct mii_data *mii; */
- switch (command) {
- case SIOCSIFMTU:
- ifp->if_mtu = ifr->ifr_mtu;
- error = rmi_xlr_mac_change_mtu(sc, ifr->ifr_mtu);
- break;
- case SIOCSIFFLAGS:
-
- RGE_LOCK(sc);
- if (ifp->if_flags & IFF_UP) {
- /*
- * If only the state of the PROMISC flag changed,
- * then just use the 'set promisc mode' command
- * instead of reinitializing the entire NIC. Doing a
- * full re-init means reloading the firmware and
- * waiting for it to start up, which may take a
- * second or two. Similarly for ALLMULTI.
- */
- if (ifp->if_drv_flags & IFF_DRV_RUNNING &&
- ifp->if_flags & IFF_PROMISC &&
- !(sc->flags & IFF_PROMISC)) {
- sc->flags |= IFF_PROMISC;
- xlr_mac_set_rx_mode(sc);
- } else if (ifp->if_drv_flags & IFF_DRV_RUNNING &&
- !(ifp->if_flags & IFF_PROMISC) &&
- sc->flags & IFF_PROMISC) {
- sc->flags &= IFF_PROMISC;
- xlr_mac_set_rx_mode(sc);
- } else if (ifp->if_drv_flags & IFF_DRV_RUNNING &&
- (ifp->if_flags ^ sc->flags) & IFF_ALLMULTI) {
- rmi_xlr_mac_set_multicast_list(sc);
- } else
- xlr_mac_set_rx_mode(sc);
- } else {
- if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
- xlr_mac_set_rx_mode(sc);
- }
- }
- sc->flags = ifp->if_flags;
- RGE_UNLOCK(sc);
- error = 0;
- break;
- case SIOCADDMULTI:
- case SIOCDELMULTI:
- if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
- RGE_LOCK(sc);
- rmi_xlr_mac_set_multicast_list(sc);
- RGE_UNLOCK(sc);
- error = 0;
- }
- break;
- case SIOCSIFMEDIA:
- case SIOCGIFMEDIA:
- error = ifmedia_ioctl(ifp, ifr,
- &sc->rge_mii.mii_media, command);
- break;
- case SIOCSIFCAP:
- mask = ifr->ifr_reqcap ^ ifp->if_capenable;
- ifp->if_hwassist = 0;
- break;
- default:
- error = ether_ioctl(ifp, command, data);
- break;
- }
-
- return (error);
-}
-
-static void
-rge_init(void *addr)
-{
- struct rge_softc *sc = (struct rge_softc *)addr;
- struct ifnet *ifp;
- struct driver_data *priv = &(sc->priv);
-
- ifp = sc->rge_ifp;
-
- if (ifp->if_drv_flags & IFF_DRV_RUNNING)
- return;
- ifp->if_drv_flags |= IFF_DRV_RUNNING;
- ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
-
- rmi_xlr_mac_set_enable(priv, 1);
-}
-
-static void
-rge_stop(struct rge_softc *sc)
-{
- rmi_xlr_mac_close(sc);
-}
-
-static void
-rge_watchdog(struct ifnet *sc)
-{
-}
-
-static int
-rge_shutdown(device_t dev)
-{
- struct rge_softc *sc;
-
- sc = device_get_softc(dev);
-
- RGE_LOCK(sc);
- rge_stop(sc);
- rge_reset(sc);
- RGE_UNLOCK(sc);
-
- return (0);
-}
-
-static int
-rmi_xlr_mac_open(struct rge_softc *sc)
-{
- struct driver_data *priv = &(sc->priv);
- int i;
-
- dbg_msg("IN\n");
-
- if (rmi_xlr_mac_fill_rxfr(sc)) {
- return -1;
- }
- mtx_lock_spin(&priv->lock);
-
- xlr_mac_set_rx_mode(sc);
-
- if (sc->unit == xlr_board_info.gmacports - 1) {
- printf("Enabling MDIO interrupts\n");
- struct rge_softc *tmp = NULL;
-
- for (i = 0; i < xlr_board_info.gmacports; i++) {
- tmp = dev_mac[i];
- if (tmp)
- xlr_write_reg(tmp->priv.mmio, R_INTMASK,
- ((tmp->priv.instance == 0) << O_INTMASK__MDInt));
- }
- }
- /*
- * Configure the speed, duplex, and flow control
- */
- rmi_xlr_mac_set_speed(priv, priv->speed);
- rmi_xlr_mac_set_duplex(priv, priv->duplex, priv->flow_ctrl);
- rmi_xlr_mac_set_enable(priv, 0);
-
- mtx_unlock_spin(&priv->lock);
-
- for (i = 0; i < 8; i++) {
- atomic_set_int(&(priv->frin_to_be_sent[i]), 0);
- }
-
- return 0;
-}
-
-/**********************************************************************
- **********************************************************************/
-static int
-rmi_xlr_mac_close(struct rge_softc *sc)
-{
- struct driver_data *priv = &(sc->priv);
-
- mtx_lock_spin(&priv->lock);
-
- /*
- * There may have left over mbufs in the ring as well as in free in
- * they will be reused next time open is called
- */
-
- rmi_xlr_mac_set_enable(priv, 0);
-
- xlr_inc_counter(NETIF_STOP_Q);
- port_inc_counter(priv->instance, PORT_STOPQ);
-
- mtx_unlock_spin(&priv->lock);
-
- return 0;
-}
-
-/**********************************************************************
- **********************************************************************/
-static struct rge_softc_stats *
-rmi_xlr_mac_get_stats(struct rge_softc *sc)
-{
- struct driver_data *priv = &(sc->priv);
-
- /* unsigned long flags; */
-
- mtx_lock_spin(&priv->lock);
-
- /* XXX update other stats here */
-
- mtx_unlock_spin(&priv->lock);
-
- return &priv->stats;
-}
-
-/**********************************************************************
- **********************************************************************/
-static void
-rmi_xlr_mac_set_multicast_list(struct rge_softc *sc)
-{
-}
-
-/**********************************************************************
- **********************************************************************/
-static int
-rmi_xlr_mac_change_mtu(struct rge_softc *sc, int new_mtu)
-{
- struct driver_data *priv = &(sc->priv);
-
- if ((new_mtu > 9500) || (new_mtu < 64)) {
- return -EINVAL;
- }
- mtx_lock_spin(&priv->lock);
-
- sc->mtu = new_mtu;
-
- /* Disable MAC TX/RX */
- rmi_xlr_mac_set_enable(priv, 0);
-
- /* Flush RX FR IN */
- /* Flush TX IN */
- rmi_xlr_mac_set_enable(priv, 1);
-
- mtx_unlock_spin(&priv->lock);
- return 0;
-}
-
-/**********************************************************************
- **********************************************************************/
-static int
-rmi_xlr_mac_fill_rxfr(struct rge_softc *sc)
-{
- struct driver_data *priv = &(sc->priv);
- unsigned long msgrng_flags;
- int i;
- int ret = 0;
- void *ptr;
-
- dbg_msg("\n");
- if (!priv->init_frin_desc)
- return ret;
- priv->init_frin_desc = 0;
-
- dbg_msg("\n");
- for (i = 0; i < MAX_NUM_DESC; i++) {
- ptr = get_buf();
- if (!ptr) {
- ret = -ENOMEM;
- break;
- }
- /* Send the free Rx desc to the MAC */
- msgrng_access_enable(msgrng_flags);
- xlr_mac_send_fr(priv, vtophys(ptr), MAX_FRAME_SIZE);
- msgrng_access_disable(msgrng_flags);
- }
-
- return ret;
-}
-
-/**********************************************************************
- **********************************************************************/
-static __inline__ void *
-rmi_xlr_config_spill(xlr_reg_t * mmio,
- int reg_start_0, int reg_start_1,
- int reg_size, int size)
-{
- uint32_t spill_size = size;
- void *spill = NULL;
- uint64_t phys_addr = 0;
-
-
- spill = contigmalloc((spill_size + XLR_CACHELINE_SIZE), M_DEVBUF,
- M_NOWAIT | M_ZERO, 0, 0xffffffff, XLR_CACHELINE_SIZE, 0);
- if (!spill || ((vm_offset_t)spill & (XLR_CACHELINE_SIZE - 1))) {
- panic("Unable to allocate memory for spill area!\n");
- }
- phys_addr = vtophys(spill);
- dbg_msg("Allocate spill %d bytes at %llx\n", size, phys_addr);
- xlr_write_reg(mmio, reg_start_0, (phys_addr >> 5) & 0xffffffff);
- xlr_write_reg(mmio, reg_start_1, (phys_addr >> 37) & 0x07);
- xlr_write_reg(mmio, reg_size, spill_size);
-
- return spill;
-}
-
-static void
-rmi_xlr_config_spill_area(struct driver_data *priv)
-{
- /*
- * if driver initialization is done parallely on multiple cpus
- * spill_configured needs synchronization
- */
- if (priv->spill_configured)
- return;
-
- if (priv->type == XLR_GMAC && priv->instance % 4 != 0) {
- priv->spill_configured = 1;
- return;
- }
- priv->spill_configured = 1;
-
- priv->frin_spill =
- rmi_xlr_config_spill(priv->mmio,
- R_REG_FRIN_SPILL_MEM_START_0,
- R_REG_FRIN_SPILL_MEM_START_1,
- R_REG_FRIN_SPILL_MEM_SIZE,
- MAX_FRIN_SPILL *
- sizeof(struct fr_desc));
-
- priv->class_0_spill =
- rmi_xlr_config_spill(priv->mmio,
- R_CLASS0_SPILL_MEM_START_0,
- R_CLASS0_SPILL_MEM_START_1,
- R_CLASS0_SPILL_MEM_SIZE,
- MAX_CLASS_0_SPILL *
- sizeof(union rx_tx_desc));
- priv->class_1_spill =
- rmi_xlr_config_spill(priv->mmio,
- R_CLASS1_SPILL_MEM_START_0,
- R_CLASS1_SPILL_MEM_START_1,
- R_CLASS1_SPILL_MEM_SIZE,
- MAX_CLASS_1_SPILL *
- sizeof(union rx_tx_desc));
-
- priv->frout_spill =
- rmi_xlr_config_spill(priv->mmio, R_FROUT_SPILL_MEM_START_0,
- R_FROUT_SPILL_MEM_START_1,
- R_FROUT_SPILL_MEM_SIZE,
- MAX_FROUT_SPILL *
- sizeof(struct fr_desc));
-
- priv->class_2_spill =
- rmi_xlr_config_spill(priv->mmio,
- R_CLASS2_SPILL_MEM_START_0,
- R_CLASS2_SPILL_MEM_START_1,
- R_CLASS2_SPILL_MEM_SIZE,
- MAX_CLASS_2_SPILL *
- sizeof(union rx_tx_desc));
- priv->class_3_spill =
- rmi_xlr_config_spill(priv->mmio,
- R_CLASS3_SPILL_MEM_START_0,
- R_CLASS3_SPILL_MEM_START_1,
- R_CLASS3_SPILL_MEM_SIZE,
- MAX_CLASS_3_SPILL *
- sizeof(union rx_tx_desc));
- priv->spill_configured = 1;
-}
-
-/*****************************************************************
- * Write the MAC address to the XLR registers
- * All 4 addresses are the same for now
- *****************************************************************/
-static void
-xlr_mac_setup_hwaddr(struct driver_data *priv)
-{
- struct rge_softc *sc = priv->sc;
-
- xlr_write_reg(priv->mmio, R_MAC_ADDR0,
- ((sc->dev_addr[5] << 24) | (sc->dev_addr[4] << 16)
- | (sc->dev_addr[3] << 8) | (sc->dev_addr[2]))
- );
-
- xlr_write_reg(priv->mmio, R_MAC_ADDR0 + 1,
- ((sc->dev_addr[1] << 24) | (sc->
- dev_addr[0] << 16)));
-
- xlr_write_reg(priv->mmio, R_MAC_ADDR_MASK2, 0xffffffff);
-
- xlr_write_reg(priv->mmio, R_MAC_ADDR_MASK2 + 1, 0xffffffff);
-
- xlr_write_reg(priv->mmio, R_MAC_ADDR_MASK3, 0xffffffff);
-
- xlr_write_reg(priv->mmio, R_MAC_ADDR_MASK3 + 1, 0xffffffff);
-
- xlr_write_reg(priv->mmio, R_MAC_FILTER_CONFIG,
- (1 << O_MAC_FILTER_CONFIG__BROADCAST_EN) |
- (1 << O_MAC_FILTER_CONFIG__ALL_MCAST_EN) |
- (1 << O_MAC_FILTER_CONFIG__MAC_ADDR0_VALID)
- );
-}
-
-/*****************************************************************
- * Read the MAC address from the XLR registers
- * All 4 addresses are the same for now
- *****************************************************************/
-static void
-xlr_mac_get_hwaddr(struct rge_softc *sc)
-{
- struct driver_data *priv = &(sc->priv);
-
- sc->dev_addr[0] = (xlr_boot1_info.mac_addr >> 40) & 0xff;
- sc->dev_addr[1] = (xlr_boot1_info.mac_addr >> 32) & 0xff;
- sc->dev_addr[2] = (xlr_boot1_info.mac_addr >> 24) & 0xff;
- sc->dev_addr[3] = (xlr_boot1_info.mac_addr >> 16) & 0xff;
- sc->dev_addr[4] = (xlr_boot1_info.mac_addr >> 8) & 0xff;
- sc->dev_addr[5] = ((xlr_boot1_info.mac_addr >> 0) & 0xff) + priv->instance;
-}
-
-/*****************************************************************
- * Mac Module Initialization
- *****************************************************************/
-static void
-mac_common_init(void)
-{
- init_p2d_allocation();
- init_tx_ring();
-#ifdef RX_COPY
- init_rx_buf();
-#endif
-
- if (xlr_board_info.is_xls) {
- if (register_msgring_handler(TX_STN_GMAC0,
- rmi_xlr_mac_msgring_handler, NULL)) {
- panic("Couldn't register msgring handler\n");
- }
- if (register_msgring_handler(TX_STN_GMAC1,
- rmi_xlr_mac_msgring_handler, NULL)) {
- panic("Couldn't register msgring handler\n");
- }
- } else {
- if (register_msgring_handler(TX_STN_GMAC,
- rmi_xlr_mac_msgring_handler, NULL)) {
- panic("Couldn't register msgring handler\n");
- }
- }
-
- /*
- * Not yet if (xlr_board_atx_ii()) { if (register_msgring_handler
- * (TX_STN_XGS_0, rmi_xlr_mac_msgring_handler, NULL)) {
- * panic("Couldn't register msgring handler for TX_STN_XGS_0\n"); }
- * if (register_msgring_handler (TX_STN_XGS_1,
- * rmi_xlr_mac_msgring_handler, NULL)) { panic("Couldn't register
- * msgring handler for TX_STN_XGS_1\n"); } }
- */
-}
diff --git a/sys/dev/rmi/xlr/rge.h b/sys/dev/rmi/xlr/rge.h
deleted file mode 100644
index 98b5847..0000000
--- a/sys/dev/rmi/xlr/rge.h
+++ /dev/null
@@ -1,1097 +0,0 @@
-/*-
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD */
-#ifndef _RMI_RGE_H_
-#define _RMI_RGE_H_
-
-/* #define MAC_SPLIT_MODE */
-
-#define MAC_SPACING 0x400
-#define XGMAC_SPACING 0x400
-
-/* PE-MCXMAC register and bit field definitions */
-#define R_MAC_CONFIG_1 0x00
-#define O_MAC_CONFIG_1__srst 31
-#define O_MAC_CONFIG_1__simr 30
-#define O_MAC_CONFIG_1__hrrmc 18
-#define W_MAC_CONFIG_1__hrtmc 2
-#define O_MAC_CONFIG_1__hrrfn 16
-#define W_MAC_CONFIG_1__hrtfn 2
-#define O_MAC_CONFIG_1__intlb 8
-#define O_MAC_CONFIG_1__rxfc 5
-#define O_MAC_CONFIG_1__txfc 4
-#define O_MAC_CONFIG_1__srxen 3
-#define O_MAC_CONFIG_1__rxen 2
-#define O_MAC_CONFIG_1__stxen 1
-#define O_MAC_CONFIG_1__txen 0
-#define R_MAC_CONFIG_2 0x01
-#define O_MAC_CONFIG_2__prlen 12
-#define W_MAC_CONFIG_2__prlen 4
-#define O_MAC_CONFIG_2__speed 8
-#define W_MAC_CONFIG_2__speed 2
-#define O_MAC_CONFIG_2__hugen 5
-#define O_MAC_CONFIG_2__flchk 4
-#define O_MAC_CONFIG_2__crce 1
-#define O_MAC_CONFIG_2__fulld 0
-#define R_IPG_IFG 0x02
-#define O_IPG_IFG__ipgr1 24
-#define W_IPG_IFG__ipgr1 7
-#define O_IPG_IFG__ipgr2 16
-#define W_IPG_IFG__ipgr2 7
-#define O_IPG_IFG__mifg 8
-#define W_IPG_IFG__mifg 8
-#define O_IPG_IFG__ipgt 0
-#define W_IPG_IFG__ipgt 7
-#define R_HALF_DUPLEX 0x03
-#define O_HALF_DUPLEX__abebt 24
-#define W_HALF_DUPLEX__abebt 4
-#define O_HALF_DUPLEX__abebe 19
-#define O_HALF_DUPLEX__bpnb 18
-#define O_HALF_DUPLEX__nobo 17
-#define O_HALF_DUPLEX__edxsdfr 16
-#define O_HALF_DUPLEX__retry 12
-#define W_HALF_DUPLEX__retry 4
-#define O_HALF_DUPLEX__lcol 0
-#define W_HALF_DUPLEX__lcol 10
-#define R_MAXIMUM_FRAME_LENGTH 0x04
-#define O_MAXIMUM_FRAME_LENGTH__maxf 0
-#define W_MAXIMUM_FRAME_LENGTH__maxf 16
-#define R_TEST 0x07
-#define O_TEST__mbof 3
-#define O_TEST__rthdf 2
-#define O_TEST__tpause 1
-#define O_TEST__sstct 0
-#define R_MII_MGMT_CONFIG 0x08
-#define O_MII_MGMT_CONFIG__scinc 5
-#define O_MII_MGMT_CONFIG__spre 4
-#define O_MII_MGMT_CONFIG__clks 3
-#define W_MII_MGMT_CONFIG__clks 3
-#define R_MII_MGMT_COMMAND 0x09
-#define O_MII_MGMT_COMMAND__scan 1
-#define O_MII_MGMT_COMMAND__rstat 0
-#define R_MII_MGMT_ADDRESS 0x0A
-#define O_MII_MGMT_ADDRESS__fiad 8
-#define W_MII_MGMT_ADDRESS__fiad 5
-#define O_MII_MGMT_ADDRESS__fgad 5
-#define W_MII_MGMT_ADDRESS__fgad 0
-#define R_MII_MGMT_WRITE_DATA 0x0B
-#define O_MII_MGMT_WRITE_DATA__ctld 0
-#define W_MII_MGMT_WRITE_DATA__ctld 16
-#define R_MII_MGMT_STATUS 0x0C
-#define R_MII_MGMT_INDICATORS 0x0D
-#define O_MII_MGMT_INDICATORS__nvalid 2
-#define O_MII_MGMT_INDICATORS__scan 1
-#define O_MII_MGMT_INDICATORS__busy 0
-#define R_INTERFACE_CONTROL 0x0E
-#define O_INTERFACE_CONTROL__hrstint 31
-#define O_INTERFACE_CONTROL__tbimode 27
-#define O_INTERFACE_CONTROL__ghdmode 26
-#define O_INTERFACE_CONTROL__lhdmode 25
-#define O_INTERFACE_CONTROL__phymod 24
-#define O_INTERFACE_CONTROL__hrrmi 23
-#define O_INTERFACE_CONTROL__rspd 16
-#define O_INTERFACE_CONTROL__hr100 15
-#define O_INTERFACE_CONTROL__frcq 10
-#define O_INTERFACE_CONTROL__nocfr 9
-#define O_INTERFACE_CONTROL__dlfct 8
-#define O_INTERFACE_CONTROL__enjab 0
-#define R_INTERFACE_STATUS 0x0F
-#define O_INTERFACE_STATUS__xsdfr 9
-#define O_INTERFACE_STATUS__ssrr 8
-#define W_INTERFACE_STATUS__ssrr 5
-#define O_INTERFACE_STATUS__miilf 3
-#define O_INTERFACE_STATUS__locar 2
-#define O_INTERFACE_STATUS__sqerr 1
-#define O_INTERFACE_STATUS__jabber 0
-#define R_STATION_ADDRESS_LS 0x10
-#define R_STATION_ADDRESS_MS 0x11
-
-/* A-XGMAC register and bit field definitions */
-#define R_XGMAC_CONFIG_0 0x00
-#define O_XGMAC_CONFIG_0__hstmacrst 31
-#define O_XGMAC_CONFIG_0__hstrstrctl 23
-#define O_XGMAC_CONFIG_0__hstrstrfn 22
-#define O_XGMAC_CONFIG_0__hstrsttctl 18
-#define O_XGMAC_CONFIG_0__hstrsttfn 17
-#define O_XGMAC_CONFIG_0__hstrstmiim 16
-#define O_XGMAC_CONFIG_0__hstloopback 8
-#define R_XGMAC_CONFIG_1 0x01
-#define O_XGMAC_CONFIG_1__hsttctlen 31
-#define O_XGMAC_CONFIG_1__hsttfen 30
-#define O_XGMAC_CONFIG_1__hstrctlen 29
-#define O_XGMAC_CONFIG_1__hstrfen 28
-#define O_XGMAC_CONFIG_1__tfen 26
-#define O_XGMAC_CONFIG_1__rfen 24
-#define O_XGMAC_CONFIG_1__hstrctlshrtp 12
-#define O_XGMAC_CONFIG_1__hstdlyfcstx 10
-#define W_XGMAC_CONFIG_1__hstdlyfcstx 2
-#define O_XGMAC_CONFIG_1__hstdlyfcsrx 8
-#define W_XGMAC_CONFIG_1__hstdlyfcsrx 2
-#define O_XGMAC_CONFIG_1__hstppen 7
-#define O_XGMAC_CONFIG_1__hstbytswp 6
-#define O_XGMAC_CONFIG_1__hstdrplt64 5
-#define O_XGMAC_CONFIG_1__hstprmscrx 4
-#define O_XGMAC_CONFIG_1__hstlenchk 3
-#define O_XGMAC_CONFIG_1__hstgenfcs 2
-#define O_XGMAC_CONFIG_1__hstpadmode 0
-#define W_XGMAC_CONFIG_1__hstpadmode 2
-#define R_XGMAC_CONFIG_2 0x02
-#define O_XGMAC_CONFIG_2__hsttctlfrcp 31
-#define O_XGMAC_CONFIG_2__hstmlnkflth 27
-#define O_XGMAC_CONFIG_2__hstalnkflth 26
-#define O_XGMAC_CONFIG_2__rflnkflt 24
-#define W_XGMAC_CONFIG_2__rflnkflt 2
-#define O_XGMAC_CONFIG_2__hstipgextmod 16
-#define W_XGMAC_CONFIG_2__hstipgextmod 5
-#define O_XGMAC_CONFIG_2__hstrctlfrcp 15
-#define O_XGMAC_CONFIG_2__hstipgexten 5
-#define O_XGMAC_CONFIG_2__hstmipgext 0
-#define W_XGMAC_CONFIG_2__hstmipgext 5
-#define R_XGMAC_CONFIG_3 0x03
-#define O_XGMAC_CONFIG_3__hstfltrfrm 31
-#define W_XGMAC_CONFIG_3__hstfltrfrm 16
-#define O_XGMAC_CONFIG_3__hstfltrfrmdc 15
-#define W_XGMAC_CONFIG_3__hstfltrfrmdc 16
-#define R_XGMAC_STATION_ADDRESS_LS 0x04
-#define O_XGMAC_STATION_ADDRESS_LS__hstmacadr0 0
-#define W_XGMAC_STATION_ADDRESS_LS__hstmacadr0 32
-#define R_XGMAC_STATION_ADDRESS_MS 0x05
-#define R_XGMAC_MAX_FRAME_LEN 0x08
-#define O_XGMAC_MAX_FRAME_LEN__hstmxfrmwctx 16
-#define W_XGMAC_MAX_FRAME_LEN__hstmxfrmwctx 14
-#define O_XGMAC_MAX_FRAME_LEN__hstmxfrmbcrx 0
-#define W_XGMAC_MAX_FRAME_LEN__hstmxfrmbcrx 16
-#define R_XGMAC_REV_LEVEL 0x0B
-#define O_XGMAC_REV_LEVEL__revlvl 0
-#define W_XGMAC_REV_LEVEL__revlvl 15
-#define R_XGMAC_MIIM_COMMAND 0x10
-#define O_XGMAC_MIIM_COMMAND__hstldcmd 3
-#define O_XGMAC_MIIM_COMMAND__hstmiimcmd 0
-#define W_XGMAC_MIIM_COMMAND__hstmiimcmd 3
-#define R_XGMAC_MIIM_FILED 0x11
-#define O_XGMAC_MIIM_FILED__hststfield 30
-#define W_XGMAC_MIIM_FILED__hststfield 2
-#define O_XGMAC_MIIM_FILED__hstopfield 28
-#define W_XGMAC_MIIM_FILED__hstopfield 2
-#define O_XGMAC_MIIM_FILED__hstphyadx 23
-#define W_XGMAC_MIIM_FILED__hstphyadx 5
-#define O_XGMAC_MIIM_FILED__hstregadx 18
-#define W_XGMAC_MIIM_FILED__hstregadx 5
-#define O_XGMAC_MIIM_FILED__hsttafield 16
-#define W_XGMAC_MIIM_FILED__hsttafield 2
-#define O_XGMAC_MIIM_FILED__miimrddat 0
-#define W_XGMAC_MIIM_FILED__miimrddat 16
-#define R_XGMAC_MIIM_CONFIG 0x12
-#define O_XGMAC_MIIM_CONFIG__hstnopram 7
-#define O_XGMAC_MIIM_CONFIG__hstclkdiv 0
-#define W_XGMAC_MIIM_CONFIG__hstclkdiv 7
-#define R_XGMAC_MIIM_LINK_FAIL_VECTOR 0x13
-#define O_XGMAC_MIIM_LINK_FAIL_VECTOR__miimlfvec 0
-#define W_XGMAC_MIIM_LINK_FAIL_VECTOR__miimlfvec 32
-#define R_XGMAC_MIIM_INDICATOR 0x14
-#define O_XGMAC_MIIM_INDICATOR__miimphylf 4
-#define O_XGMAC_MIIM_INDICATOR__miimmoncplt 3
-#define O_XGMAC_MIIM_INDICATOR__miimmonvld 2
-#define O_XGMAC_MIIM_INDICATOR__miimmon 1
-#define O_XGMAC_MIIM_INDICATOR__miimbusy 0
-
-/* Glue logic register and bit field definitions */
-#define R_MAC_ADDR0 0x50
-#define R_MAC_ADDR1 0x52
-#define R_MAC_ADDR2 0x54
-#define R_MAC_ADDR3 0x56
-#define R_MAC_ADDR_MASK2 0x58
-#define R_MAC_ADDR_MASK3 0x5A
-#define R_MAC_FILTER_CONFIG 0x5C
-#define O_MAC_FILTER_CONFIG__BROADCAST_EN 10
-#define O_MAC_FILTER_CONFIG__PAUSE_FRAME_EN 9
-#define O_MAC_FILTER_CONFIG__ALL_MCAST_EN 8
-#define O_MAC_FILTER_CONFIG__ALL_UCAST_EN 7
-#define O_MAC_FILTER_CONFIG__HASH_MCAST_EN 6
-#define O_MAC_FILTER_CONFIG__HASH_UCAST_EN 5
-#define O_MAC_FILTER_CONFIG__ADDR_MATCH_DISC 4
-#define O_MAC_FILTER_CONFIG__MAC_ADDR3_VALID 3
-#define O_MAC_FILTER_CONFIG__MAC_ADDR2_VALID 2
-#define O_MAC_FILTER_CONFIG__MAC_ADDR1_VALID 1
-#define O_MAC_FILTER_CONFIG__MAC_ADDR0_VALID 0
-#define R_HASH_TABLE_VECTOR 0x30
-#define R_TX_CONTROL 0x0A0
-#define O_TX_CONTROL__Tx15Halt 31
-#define O_TX_CONTROL__Tx14Halt 30
-#define O_TX_CONTROL__Tx13Halt 29
-#define O_TX_CONTROL__Tx12Halt 28
-#define O_TX_CONTROL__Tx11Halt 27
-#define O_TX_CONTROL__Tx10Halt 26
-#define O_TX_CONTROL__Tx9Halt 25
-#define O_TX_CONTROL__Tx8Halt 24
-#define O_TX_CONTROL__Tx7Halt 23
-#define O_TX_CONTROL__Tx6Halt 22
-#define O_TX_CONTROL__Tx5Halt 21
-#define O_TX_CONTROL__Tx4Halt 20
-#define O_TX_CONTROL__Tx3Halt 19
-#define O_TX_CONTROL__Tx2Halt 18
-#define O_TX_CONTROL__Tx1Halt 17
-#define O_TX_CONTROL__Tx0Halt 16
-#define O_TX_CONTROL__TxIdle 15
-#define O_TX_CONTROL__TxEnable 14
-#define O_TX_CONTROL__TxThreshold 0
-#define W_TX_CONTROL__TxThreshold 14
-#define R_RX_CONTROL 0x0A1
-#define O_RX_CONTROL__RGMII 10
-#define O_RX_CONTROL__RxHalt 1
-#define O_RX_CONTROL__RxEnable 0
-#define R_DESC_PACK_CTRL 0x0A2
-#define O_DESC_PACK_CTRL__ByteOffset 17
-#define W_DESC_PACK_CTRL__ByteOffset 3
-#define O_DESC_PACK_CTRL__PrePadEnable 16
-#define O_DESC_PACK_CTRL__MaxEntry 14
-#define W_DESC_PACK_CTRL__MaxEntry 2
-#define O_DESC_PACK_CTRL__RegularSize 0
-#define W_DESC_PACK_CTRL__RegularSize 14
-#define R_STATCTRL 0x0A3
-#define O_STATCTRL__OverFlowEn 4
-#define O_STATCTRL__GIG 3
-#define O_STATCTRL__Sten 2
-#define O_STATCTRL__ClrCnt 1
-#define O_STATCTRL__AutoZ 0
-#define R_L2ALLOCCTRL 0x0A4
-#define O_L2ALLOCCTRL__TxL2Allocate 9
-#define W_L2ALLOCCTRL__TxL2Allocate 9
-#define O_L2ALLOCCTRL__RxL2Allocate 0
-#define W_L2ALLOCCTRL__RxL2Allocate 9
-#define R_INTMASK 0x0A5
-#define O_INTMASK__Spi4TxError 28
-#define O_INTMASK__Spi4RxError 27
-#define O_INTMASK__RGMIIHalfDupCollision 27
-#define O_INTMASK__Abort 26
-#define O_INTMASK__Underrun 25
-#define O_INTMASK__DiscardPacket 24
-#define O_INTMASK__AsyncFifoFull 23
-#define O_INTMASK__TagFull 22
-#define O_INTMASK__Class3Full 21
-#define O_INTMASK__C3EarlyFull 20
-#define O_INTMASK__Class2Full 19
-#define O_INTMASK__C2EarlyFull 18
-#define O_INTMASK__Class1Full 17
-#define O_INTMASK__C1EarlyFull 16
-#define O_INTMASK__Class0Full 15
-#define O_INTMASK__C0EarlyFull 14
-#define O_INTMASK__RxDataFull 13
-#define O_INTMASK__RxEarlyFull 12
-#define O_INTMASK__RFreeEmpty 9
-#define O_INTMASK__RFEarlyEmpty 8
-#define O_INTMASK__P2PSpillEcc 7
-#define O_INTMASK__FreeDescFull 5
-#define O_INTMASK__FreeEarlyFull 4
-#define O_INTMASK__TxFetchError 3
-#define O_INTMASK__StatCarry 2
-#define O_INTMASK__MDInt 1
-#define O_INTMASK__TxIllegal 0
-#define R_INTREG 0x0A6
-#define O_INTREG__Spi4TxError 28
-#define O_INTREG__Spi4RxError 27
-#define O_INTREG__RGMIIHalfDupCollision 27
-#define O_INTREG__Abort 26
-#define O_INTREG__Underrun 25
-#define O_INTREG__DiscardPacket 24
-#define O_INTREG__AsyncFifoFull 23
-#define O_INTREG__TagFull 22
-#define O_INTREG__Class3Full 21
-#define O_INTREG__C3EarlyFull 20
-#define O_INTREG__Class2Full 19
-#define O_INTREG__C2EarlyFull 18
-#define O_INTREG__Class1Full 17
-#define O_INTREG__C1EarlyFull 16
-#define O_INTREG__Class0Full 15
-#define O_INTREG__C0EarlyFull 14
-#define O_INTREG__RxDataFull 13
-#define O_INTREG__RxEarlyFull 12
-#define O_INTREG__RFreeEmpty 9
-#define O_INTREG__RFEarlyEmpty 8
-#define O_INTREG__P2PSpillEcc 7
-#define O_INTREG__FreeDescFull 5
-#define O_INTREG__FreeEarlyFull 4
-#define O_INTREG__TxFetchError 3
-#define O_INTREG__StatCarry 2
-#define O_INTREG__MDInt 1
-#define O_INTREG__TxIllegal 0
-#define R_TXRETRY 0x0A7
-#define O_TXRETRY__CollisionRetry 6
-#define O_TXRETRY__BusErrorRetry 5
-#define O_TXRETRY__UnderRunRetry 4
-#define O_TXRETRY__Retries 0
-#define W_TXRETRY__Retries 4
-#define R_CORECONTROL 0x0A8
-#define O_CORECONTROL__ErrorThread 4
-#define W_CORECONTROL__ErrorThread 7
-#define O_CORECONTROL__Shutdown 2
-#define O_CORECONTROL__Speed 0
-#define W_CORECONTROL__Speed 2
-#define R_BYTEOFFSET0 0x0A9
-#define R_BYTEOFFSET1 0x0AA
-#define R_L2TYPE_0 0x0F0
-#define O_L2TYPE__ExtraHdrProtoSize 26
-#define W_L2TYPE__ExtraHdrProtoSize 5
-#define O_L2TYPE__ExtraHdrProtoOffset 20
-#define W_L2TYPE__ExtraHdrProtoOffset 6
-#define O_L2TYPE__ExtraHeaderSize 14
-#define W_L2TYPE__ExtraHeaderSize 6
-#define O_L2TYPE__ProtoOffset 8
-#define W_L2TYPE__ProtoOffset 6
-#define O_L2TYPE__L2HdrOffset 2
-#define W_L2TYPE__L2HdrOffset 6
-#define O_L2TYPE__L2Proto 0
-#define W_L2TYPE__L2Proto 2
-#define R_L2TYPE_1 0xF0
-#define R_L2TYPE_2 0xF0
-#define R_L2TYPE_3 0xF0
-#define R_PARSERCONFIGREG 0x100
-#define O_PARSERCONFIGREG__CRCHashPoly 8
-#define W_PARSERCONFIGREG__CRCHashPoly 7
-#define O_PARSERCONFIGREG__PrePadOffset 4
-#define W_PARSERCONFIGREG__PrePadOffset 4
-#define O_PARSERCONFIGREG__UseCAM 2
-#define O_PARSERCONFIGREG__UseHASH 1
-#define O_PARSERCONFIGREG__UseProto 0
-#define R_L3CTABLE 0x140
-#define O_L3CTABLE__Offset0 25
-#define W_L3CTABLE__Offset0 7
-#define O_L3CTABLE__Len0 21
-#define W_L3CTABLE__Len0 4
-#define O_L3CTABLE__Offset1 14
-#define W_L3CTABLE__Offset1 7
-#define O_L3CTABLE__Len1 10
-#define W_L3CTABLE__Len1 4
-#define O_L3CTABLE__Offset2 4
-#define W_L3CTABLE__Offset2 6
-#define O_L3CTABLE__Len2 0
-#define W_L3CTABLE__Len2 4
-#define O_L3CTABLE__L3HdrOffset 26
-#define W_L3CTABLE__L3HdrOffset 6
-#define O_L3CTABLE__L4ProtoOffset 20
-#define W_L3CTABLE__L4ProtoOffset 6
-#define O_L3CTABLE__IPChksumCompute 19
-#define O_L3CTABLE__L4Classify 18
-#define O_L3CTABLE__L2Proto 16
-#define W_L3CTABLE__L2Proto 2
-#define O_L3CTABLE__L3ProtoKey 0
-#define W_L3CTABLE__L3ProtoKey 16
-#define R_L4CTABLE 0x160
-#define O_L4CTABLE__Offset0 21
-#define W_L4CTABLE__Offset0 6
-#define O_L4CTABLE__Len0 17
-#define W_L4CTABLE__Len0 4
-#define O_L4CTABLE__Offset1 11
-#define W_L4CTABLE__Offset1 6
-#define O_L4CTABLE__Len1 7
-#define W_L4CTABLE__Len1 4
-#define O_L4CTABLE__TCPChksumEnable 0
-#define R_CAM4X128TABLE 0x172
-#define O_CAM4X128TABLE__ClassId 7
-#define W_CAM4X128TABLE__ClassId 2
-#define O_CAM4X128TABLE__BucketId 1
-#define W_CAM4X128TABLE__BucketId 6
-#define O_CAM4X128TABLE__UseBucket 0
-#define R_CAM4X128KEY 0x180
-#define R_TRANSLATETABLE 0x1A0
-#define R_DMACR0 0x200
-#define O_DMACR0__Data0WrMaxCr 27
-#define W_DMACR0__Data0WrMaxCr 3
-#define O_DMACR0__Data0RdMaxCr 24
-#define W_DMACR0__Data0RdMaxCr 3
-#define O_DMACR0__Data1WrMaxCr 21
-#define W_DMACR0__Data1WrMaxCr 3
-#define O_DMACR0__Data1RdMaxCr 18
-#define W_DMACR0__Data1RdMaxCr 3
-#define O_DMACR0__Data2WrMaxCr 15
-#define W_DMACR0__Data2WrMaxCr 3
-#define O_DMACR0__Data2RdMaxCr 12
-#define W_DMACR0__Data2RdMaxCr 3
-#define O_DMACR0__Data3WrMaxCr 9
-#define W_DMACR0__Data3WrMaxCr 3
-#define O_DMACR0__Data3RdMaxCr 6
-#define W_DMACR0__Data3RdMaxCr 3
-#define O_DMACR0__Data4WrMaxCr 3
-#define W_DMACR0__Data4WrMaxCr 3
-#define O_DMACR0__Data4RdMaxCr 0
-#define W_DMACR0__Data4RdMaxCr 3
-#define R_DMACR1 0x201
-#define O_DMACR1__Data5WrMaxCr 27
-#define W_DMACR1__Data5WrMaxCr 3
-#define O_DMACR1__Data5RdMaxCr 24
-#define W_DMACR1__Data5RdMaxCr 3
-#define O_DMACR1__Data6WrMaxCr 21
-#define W_DMACR1__Data6WrMaxCr 3
-#define O_DMACR1__Data6RdMaxCr 18
-#define W_DMACR1__Data6RdMaxCr 3
-#define O_DMACR1__Data7WrMaxCr 15
-#define W_DMACR1__Data7WrMaxCr 3
-#define O_DMACR1__Data7RdMaxCr 12
-#define W_DMACR1__Data7RdMaxCr 3
-#define O_DMACR1__Data8WrMaxCr 9
-#define W_DMACR1__Data8WrMaxCr 3
-#define O_DMACR1__Data8RdMaxCr 6
-#define W_DMACR1__Data8RdMaxCr 3
-#define O_DMACR1__Data9WrMaxCr 3
-#define W_DMACR1__Data9WrMaxCr 3
-#define O_DMACR1__Data9RdMaxCr 0
-#define W_DMACR1__Data9RdMaxCr 3
-#define R_DMACR2 0x202
-#define O_DMACR2__Data10WrMaxCr 27
-#define W_DMACR2__Data10WrMaxCr 3
-#define O_DMACR2__Data10RdMaxCr 24
-#define W_DMACR2__Data10RdMaxCr 3
-#define O_DMACR2__Data11WrMaxCr 21
-#define W_DMACR2__Data11WrMaxCr 3
-#define O_DMACR2__Data11RdMaxCr 18
-#define W_DMACR2__Data11RdMaxCr 3
-#define O_DMACR2__Data12WrMaxCr 15
-#define W_DMACR2__Data12WrMaxCr 3
-#define O_DMACR2__Data12RdMaxCr 12
-#define W_DMACR2__Data12RdMaxCr 3
-#define O_DMACR2__Data13WrMaxCr 9
-#define W_DMACR2__Data13WrMaxCr 3
-#define O_DMACR2__Data13RdMaxCr 6
-#define W_DMACR2__Data13RdMaxCr 3
-#define O_DMACR2__Data14WrMaxCr 3
-#define W_DMACR2__Data14WrMaxCr 3
-#define O_DMACR2__Data14RdMaxCr 0
-#define W_DMACR2__Data14RdMaxCr 3
-#define R_DMACR3 0x203
-#define O_DMACR3__Data15WrMaxCr 27
-#define W_DMACR3__Data15WrMaxCr 3
-#define O_DMACR3__Data15RdMaxCr 24
-#define W_DMACR3__Data15RdMaxCr 3
-#define O_DMACR3__SpClassWrMaxCr 21
-#define W_DMACR3__SpClassWrMaxCr 3
-#define O_DMACR3__SpClassRdMaxCr 18
-#define W_DMACR3__SpClassRdMaxCr 3
-#define O_DMACR3__JumFrInWrMaxCr 15
-#define W_DMACR3__JumFrInWrMaxCr 3
-#define O_DMACR3__JumFrInRdMaxCr 12
-#define W_DMACR3__JumFrInRdMaxCr 3
-#define O_DMACR3__RegFrInWrMaxCr 9
-#define W_DMACR3__RegFrInWrMaxCr 3
-#define O_DMACR3__RegFrInRdMaxCr 6
-#define W_DMACR3__RegFrInRdMaxCr 3
-#define O_DMACR3__FrOutWrMaxCr 3
-#define W_DMACR3__FrOutWrMaxCr 3
-#define O_DMACR3__FrOutRdMaxCr 0
-#define W_DMACR3__FrOutRdMaxCr 3
-#define R_REG_FRIN_SPILL_MEM_START_0 0x204
-#define O_REG_FRIN_SPILL_MEM_START_0__RegFrInSpillMemStart0 0
-#define W_REG_FRIN_SPILL_MEM_START_0__RegFrInSpillMemStart0 32
-#define R_REG_FRIN_SPILL_MEM_START_1 0x205
-#define O_REG_FRIN_SPILL_MEM_START_1__RegFrInSpillMemStart1 0
-#define W_REG_FRIN_SPILL_MEM_START_1__RegFrInSpillMemStart1 3
-#define R_REG_FRIN_SPILL_MEM_SIZE 0x206
-#define O_REG_FRIN_SPILL_MEM_SIZE__RegFrInSpillMemSize 0
-#define W_REG_FRIN_SPILL_MEM_SIZE__RegFrInSpillMemSize 32
-#define R_FROUT_SPILL_MEM_START_0 0x207
-#define O_FROUT_SPILL_MEM_START_0__FrOutSpillMemStart0 0
-#define W_FROUT_SPILL_MEM_START_0__FrOutSpillMemStart0 32
-#define R_FROUT_SPILL_MEM_START_1 0x208
-#define O_FROUT_SPILL_MEM_START_1__FrOutSpillMemStart1 0
-#define W_FROUT_SPILL_MEM_START_1__FrOutSpillMemStart1 3
-#define R_FROUT_SPILL_MEM_SIZE 0x209
-#define O_FROUT_SPILL_MEM_SIZE__FrOutSpillMemSize 0
-#define W_FROUT_SPILL_MEM_SIZE__FrOutSpillMemSize 32
-#define R_CLASS0_SPILL_MEM_START_0 0x20A
-#define O_CLASS0_SPILL_MEM_START_0__Class0SpillMemStart0 0
-#define W_CLASS0_SPILL_MEM_START_0__Class0SpillMemStart0 32
-#define R_CLASS0_SPILL_MEM_START_1 0x20B
-#define O_CLASS0_SPILL_MEM_START_1__Class0SpillMemStart1 0
-#define W_CLASS0_SPILL_MEM_START_1__Class0SpillMemStart1 3
-#define R_CLASS0_SPILL_MEM_SIZE 0x20C
-#define O_CLASS0_SPILL_MEM_SIZE__Class0SpillMemSize 0
-#define W_CLASS0_SPILL_MEM_SIZE__Class0SpillMemSize 32
-#define R_JUMFRIN_SPILL_MEM_START_0 0x20D
-#define O_JUMFRIN_SPILL_MEM_START_0__JumFrInSpillMemStar0 0
-#define W_JUMFRIN_SPILL_MEM_START_0__JumFrInSpillMemStar0 32
-#define R_JUMFRIN_SPILL_MEM_START_1 0x20E
-#define O_JUMFRIN_SPILL_MEM_START_1__JumFrInSpillMemStart1 0
-#define W_JUMFRIN_SPILL_MEM_START_1__JumFrInSpillMemStart1 3
-#define R_JUMFRIN_SPILL_MEM_SIZE 0x20F
-#define O_JUMFRIN_SPILL_MEM_SIZE__JumFrInSpillMemSize 0
-#define W_JUMFRIN_SPILL_MEM_SIZE__JumFrInSpillMemSize 32
-#define R_CLASS1_SPILL_MEM_START_0 0x210
-#define O_CLASS1_SPILL_MEM_START_0__Class1SpillMemStart0 0
-#define W_CLASS1_SPILL_MEM_START_0__Class1SpillMemStart0 32
-#define R_CLASS1_SPILL_MEM_START_1 0x211
-#define O_CLASS1_SPILL_MEM_START_1__Class1SpillMemStart1 0
-#define W_CLASS1_SPILL_MEM_START_1__Class1SpillMemStart1 3
-#define R_CLASS1_SPILL_MEM_SIZE 0x212
-#define O_CLASS1_SPILL_MEM_SIZE__Class1SpillMemSize 0
-#define W_CLASS1_SPILL_MEM_SIZE__Class1SpillMemSize 32
-#define R_CLASS2_SPILL_MEM_START_0 0x213
-#define O_CLASS2_SPILL_MEM_START_0__Class2SpillMemStart0 0
-#define W_CLASS2_SPILL_MEM_START_0__Class2SpillMemStart0 32
-#define R_CLASS2_SPILL_MEM_START_1 0x214
-#define O_CLASS2_SPILL_MEM_START_1__Class2SpillMemStart1 0
-#define W_CLASS2_SPILL_MEM_START_1__Class2SpillMemStart1 3
-#define R_CLASS2_SPILL_MEM_SIZE 0x215
-#define O_CLASS2_SPILL_MEM_SIZE__Class2SpillMemSize 0
-#define W_CLASS2_SPILL_MEM_SIZE__Class2SpillMemSize 32
-#define R_CLASS3_SPILL_MEM_START_0 0x216
-#define O_CLASS3_SPILL_MEM_START_0__Class3SpillMemStart0 0
-#define W_CLASS3_SPILL_MEM_START_0__Class3SpillMemStart0 32
-#define R_CLASS3_SPILL_MEM_START_1 0x217
-#define O_CLASS3_SPILL_MEM_START_1__Class3SpillMemStart1 0
-#define W_CLASS3_SPILL_MEM_START_1__Class3SpillMemStart1 3
-#define R_CLASS3_SPILL_MEM_SIZE 0x218
-#define O_CLASS3_SPILL_MEM_SIZE__Class3SpillMemSize 0
-#define W_CLASS3_SPILL_MEM_SIZE__Class3SpillMemSize 32
-#define R_REG_FRIN1_SPILL_MEM_START_0 0x219
-#define R_REG_FRIN1_SPILL_MEM_START_1 0x21a
-#define R_REG_FRIN1_SPILL_MEM_SIZE 0x21b
-#define R_SPIHNGY0 0x219
-#define O_SPIHNGY0__EG_HNGY_THRESH_0 24
-#define W_SPIHNGY0__EG_HNGY_THRESH_0 7
-#define O_SPIHNGY0__EG_HNGY_THRESH_1 16
-#define W_SPIHNGY0__EG_HNGY_THRESH_1 7
-#define O_SPIHNGY0__EG_HNGY_THRESH_2 8
-#define W_SPIHNGY0__EG_HNGY_THRESH_2 7
-#define O_SPIHNGY0__EG_HNGY_THRESH_3 0
-#define W_SPIHNGY0__EG_HNGY_THRESH_3 7
-#define R_SPIHNGY1 0x21A
-#define O_SPIHNGY1__EG_HNGY_THRESH_4 24
-#define W_SPIHNGY1__EG_HNGY_THRESH_4 7
-#define O_SPIHNGY1__EG_HNGY_THRESH_5 16
-#define W_SPIHNGY1__EG_HNGY_THRESH_5 7
-#define O_SPIHNGY1__EG_HNGY_THRESH_6 8
-#define W_SPIHNGY1__EG_HNGY_THRESH_6 7
-#define O_SPIHNGY1__EG_HNGY_THRESH_7 0
-#define W_SPIHNGY1__EG_HNGY_THRESH_7 7
-#define R_SPIHNGY2 0x21B
-#define O_SPIHNGY2__EG_HNGY_THRESH_8 24
-#define W_SPIHNGY2__EG_HNGY_THRESH_8 7
-#define O_SPIHNGY2__EG_HNGY_THRESH_9 16
-#define W_SPIHNGY2__EG_HNGY_THRESH_9 7
-#define O_SPIHNGY2__EG_HNGY_THRESH_10 8
-#define W_SPIHNGY2__EG_HNGY_THRESH_10 7
-#define O_SPIHNGY2__EG_HNGY_THRESH_11 0
-#define W_SPIHNGY2__EG_HNGY_THRESH_11 7
-#define R_SPIHNGY3 0x21C
-#define O_SPIHNGY3__EG_HNGY_THRESH_12 24
-#define W_SPIHNGY3__EG_HNGY_THRESH_12 7
-#define O_SPIHNGY3__EG_HNGY_THRESH_13 16
-#define W_SPIHNGY3__EG_HNGY_THRESH_13 7
-#define O_SPIHNGY3__EG_HNGY_THRESH_14 8
-#define W_SPIHNGY3__EG_HNGY_THRESH_14 7
-#define O_SPIHNGY3__EG_HNGY_THRESH_15 0
-#define W_SPIHNGY3__EG_HNGY_THRESH_15 7
-#define R_SPISTRV0 0x21D
-#define O_SPISTRV0__EG_STRV_THRESH_0 24
-#define W_SPISTRV0__EG_STRV_THRESH_0 7
-#define O_SPISTRV0__EG_STRV_THRESH_1 16
-#define W_SPISTRV0__EG_STRV_THRESH_1 7
-#define O_SPISTRV0__EG_STRV_THRESH_2 8
-#define W_SPISTRV0__EG_STRV_THRESH_2 7
-#define O_SPISTRV0__EG_STRV_THRESH_3 0
-#define W_SPISTRV0__EG_STRV_THRESH_3 7
-#define R_SPISTRV1 0x21E
-#define O_SPISTRV1__EG_STRV_THRESH_4 24
-#define W_SPISTRV1__EG_STRV_THRESH_4 7
-#define O_SPISTRV1__EG_STRV_THRESH_5 16
-#define W_SPISTRV1__EG_STRV_THRESH_5 7
-#define O_SPISTRV1__EG_STRV_THRESH_6 8
-#define W_SPISTRV1__EG_STRV_THRESH_6 7
-#define O_SPISTRV1__EG_STRV_THRESH_7 0
-#define W_SPISTRV1__EG_STRV_THRESH_7 7
-#define R_SPISTRV2 0x21F
-#define O_SPISTRV2__EG_STRV_THRESH_8 24
-#define W_SPISTRV2__EG_STRV_THRESH_8 7
-#define O_SPISTRV2__EG_STRV_THRESH_9 16
-#define W_SPISTRV2__EG_STRV_THRESH_9 7
-#define O_SPISTRV2__EG_STRV_THRESH_10 8
-#define W_SPISTRV2__EG_STRV_THRESH_10 7
-#define O_SPISTRV2__EG_STRV_THRESH_11 0
-#define W_SPISTRV2__EG_STRV_THRESH_11 7
-#define R_SPISTRV3 0x220
-#define O_SPISTRV3__EG_STRV_THRESH_12 24
-#define W_SPISTRV3__EG_STRV_THRESH_12 7
-#define O_SPISTRV3__EG_STRV_THRESH_13 16
-#define W_SPISTRV3__EG_STRV_THRESH_13 7
-#define O_SPISTRV3__EG_STRV_THRESH_14 8
-#define W_SPISTRV3__EG_STRV_THRESH_14 7
-#define O_SPISTRV3__EG_STRV_THRESH_15 0
-#define W_SPISTRV3__EG_STRV_THRESH_15 7
-#define R_TXDATAFIFO0 0x221
-#define O_TXDATAFIFO0__Tx0DataFifoStart 24
-#define W_TXDATAFIFO0__Tx0DataFifoStart 7
-#define O_TXDATAFIFO0__Tx0DataFifoSize 16
-#define W_TXDATAFIFO0__Tx0DataFifoSize 7
-#define O_TXDATAFIFO0__Tx1DataFifoStart 8
-#define W_TXDATAFIFO0__Tx1DataFifoStart 7
-#define O_TXDATAFIFO0__Tx1DataFifoSize 0
-#define W_TXDATAFIFO0__Tx1DataFifoSize 7
-#define R_TXDATAFIFO1 0x222
-#define O_TXDATAFIFO1__Tx2DataFifoStart 24
-#define W_TXDATAFIFO1__Tx2DataFifoStart 7
-#define O_TXDATAFIFO1__Tx2DataFifoSize 16
-#define W_TXDATAFIFO1__Tx2DataFifoSize 7
-#define O_TXDATAFIFO1__Tx3DataFifoStart 8
-#define W_TXDATAFIFO1__Tx3DataFifoStart 7
-#define O_TXDATAFIFO1__Tx3DataFifoSize 0
-#define W_TXDATAFIFO1__Tx3DataFifoSize 7
-#define R_TXDATAFIFO2 0x223
-#define O_TXDATAFIFO2__Tx4DataFifoStart 24
-#define W_TXDATAFIFO2__Tx4DataFifoStart 7
-#define O_TXDATAFIFO2__Tx4DataFifoSize 16
-#define W_TXDATAFIFO2__Tx4DataFifoSize 7
-#define O_TXDATAFIFO2__Tx5DataFifoStart 8
-#define W_TXDATAFIFO2__Tx5DataFifoStart 7
-#define O_TXDATAFIFO2__Tx5DataFifoSize 0
-#define W_TXDATAFIFO2__Tx5DataFifoSize 7
-#define R_TXDATAFIFO3 0x224
-#define O_TXDATAFIFO3__Tx6DataFifoStart 24
-#define W_TXDATAFIFO3__Tx6DataFifoStart 7
-#define O_TXDATAFIFO3__Tx6DataFifoSize 16
-#define W_TXDATAFIFO3__Tx6DataFifoSize 7
-#define O_TXDATAFIFO3__Tx7DataFifoStart 8
-#define W_TXDATAFIFO3__Tx7DataFifoStart 7
-#define O_TXDATAFIFO3__Tx7DataFifoSize 0
-#define W_TXDATAFIFO3__Tx7DataFifoSize 7
-#define R_TXDATAFIFO4 0x225
-#define O_TXDATAFIFO4__Tx8DataFifoStart 24
-#define W_TXDATAFIFO4__Tx8DataFifoStart 7
-#define O_TXDATAFIFO4__Tx8DataFifoSize 16
-#define W_TXDATAFIFO4__Tx8DataFifoSize 7
-#define O_TXDATAFIFO4__Tx9DataFifoStart 8
-#define W_TXDATAFIFO4__Tx9DataFifoStart 7
-#define O_TXDATAFIFO4__Tx9DataFifoSize 0
-#define W_TXDATAFIFO4__Tx9DataFifoSize 7
-#define R_TXDATAFIFO5 0x226
-#define O_TXDATAFIFO5__Tx10DataFifoStart 24
-#define W_TXDATAFIFO5__Tx10DataFifoStart 7
-#define O_TXDATAFIFO5__Tx10DataFifoSize 16
-#define W_TXDATAFIFO5__Tx10DataFifoSize 7
-#define O_TXDATAFIFO5__Tx11DataFifoStart 8
-#define W_TXDATAFIFO5__Tx11DataFifoStart 7
-#define O_TXDATAFIFO5__Tx11DataFifoSize 0
-#define W_TXDATAFIFO5__Tx11DataFifoSize 7
-#define R_TXDATAFIFO6 0x227
-#define O_TXDATAFIFO6__Tx12DataFifoStart 24
-#define W_TXDATAFIFO6__Tx12DataFifoStart 7
-#define O_TXDATAFIFO6__Tx12DataFifoSize 16
-#define W_TXDATAFIFO6__Tx12DataFifoSize 7
-#define O_TXDATAFIFO6__Tx13DataFifoStart 8
-#define W_TXDATAFIFO6__Tx13DataFifoStart 7
-#define O_TXDATAFIFO6__Tx13DataFifoSize 0
-#define W_TXDATAFIFO6__Tx13DataFifoSize 7
-#define R_TXDATAFIFO7 0x228
-#define O_TXDATAFIFO7__Tx14DataFifoStart 24
-#define W_TXDATAFIFO7__Tx14DataFifoStart 7
-#define O_TXDATAFIFO7__Tx14DataFifoSize 16
-#define W_TXDATAFIFO7__Tx14DataFifoSize 7
-#define O_TXDATAFIFO7__Tx15DataFifoStart 8
-#define W_TXDATAFIFO7__Tx15DataFifoStart 7
-#define O_TXDATAFIFO7__Tx15DataFifoSize 0
-#define W_TXDATAFIFO7__Tx15DataFifoSize 7
-#define R_RXDATAFIFO0 0x229
-#define O_RXDATAFIFO0__Rx0DataFifoStart 24
-#define W_RXDATAFIFO0__Rx0DataFifoStart 7
-#define O_RXDATAFIFO0__Rx0DataFifoSize 16
-#define W_RXDATAFIFO0__Rx0DataFifoSize 7
-#define O_RXDATAFIFO0__Rx1DataFifoStart 8
-#define W_RXDATAFIFO0__Rx1DataFifoStart 7
-#define O_RXDATAFIFO0__Rx1DataFifoSize 0
-#define W_RXDATAFIFO0__Rx1DataFifoSize 7
-#define R_RXDATAFIFO1 0x22A
-#define O_RXDATAFIFO1__Rx2DataFifoStart 24
-#define W_RXDATAFIFO1__Rx2DataFifoStart 7
-#define O_RXDATAFIFO1__Rx2DataFifoSize 16
-#define W_RXDATAFIFO1__Rx2DataFifoSize 7
-#define O_RXDATAFIFO1__Rx3DataFifoStart 8
-#define W_RXDATAFIFO1__Rx3DataFifoStart 7
-#define O_RXDATAFIFO1__Rx3DataFifoSize 0
-#define W_RXDATAFIFO1__Rx3DataFifoSize 7
-#define R_RXDATAFIFO2 0x22B
-#define O_RXDATAFIFO2__Rx4DataFifoStart 24
-#define W_RXDATAFIFO2__Rx4DataFifoStart 7
-#define O_RXDATAFIFO2__Rx4DataFifoSize 16
-#define W_RXDATAFIFO2__Rx4DataFifoSize 7
-#define O_RXDATAFIFO2__Rx5DataFifoStart 8
-#define W_RXDATAFIFO2__Rx5DataFifoStart 7
-#define O_RXDATAFIFO2__Rx5DataFifoSize 0
-#define W_RXDATAFIFO2__Rx5DataFifoSize 7
-#define R_RXDATAFIFO3 0x22C
-#define O_RXDATAFIFO3__Rx6DataFifoStart 24
-#define W_RXDATAFIFO3__Rx6DataFifoStart 7
-#define O_RXDATAFIFO3__Rx6DataFifoSize 16
-#define W_RXDATAFIFO3__Rx6DataFifoSize 7
-#define O_RXDATAFIFO3__Rx7DataFifoStart 8
-#define W_RXDATAFIFO3__Rx7DataFifoStart 7
-#define O_RXDATAFIFO3__Rx7DataFifoSize 0
-#define W_RXDATAFIFO3__Rx7DataFifoSize 7
-#define R_RXDATAFIFO4 0x22D
-#define O_RXDATAFIFO4__Rx8DataFifoStart 24
-#define W_RXDATAFIFO4__Rx8DataFifoStart 7
-#define O_RXDATAFIFO4__Rx8DataFifoSize 16
-#define W_RXDATAFIFO4__Rx8DataFifoSize 7
-#define O_RXDATAFIFO4__Rx9DataFifoStart 8
-#define W_RXDATAFIFO4__Rx9DataFifoStart 7
-#define O_RXDATAFIFO4__Rx9DataFifoSize 0
-#define W_RXDATAFIFO4__Rx9DataFifoSize 7
-#define R_RXDATAFIFO5 0x22E
-#define O_RXDATAFIFO5__Rx10DataFifoStart 24
-#define W_RXDATAFIFO5__Rx10DataFifoStart 7
-#define O_RXDATAFIFO5__Rx10DataFifoSize 16
-#define W_RXDATAFIFO5__Rx10DataFifoSize 7
-#define O_RXDATAFIFO5__Rx11DataFifoStart 8
-#define W_RXDATAFIFO5__Rx11DataFifoStart 7
-#define O_RXDATAFIFO5__Rx11DataFifoSize 0
-#define W_RXDATAFIFO5__Rx11DataFifoSize 7
-#define R_RXDATAFIFO6 0x22F
-#define O_RXDATAFIFO6__Rx12DataFifoStart 24
-#define W_RXDATAFIFO6__Rx12DataFifoStart 7
-#define O_RXDATAFIFO6__Rx12DataFifoSize 16
-#define W_RXDATAFIFO6__Rx12DataFifoSize 7
-#define O_RXDATAFIFO6__Rx13DataFifoStart 8
-#define W_RXDATAFIFO6__Rx13DataFifoStart 7
-#define O_RXDATAFIFO6__Rx13DataFifoSize 0
-#define W_RXDATAFIFO6__Rx13DataFifoSize 7
-#define R_RXDATAFIFO7 0x230
-#define O_RXDATAFIFO7__Rx14DataFifoStart 24
-#define W_RXDATAFIFO7__Rx14DataFifoStart 7
-#define O_RXDATAFIFO7__Rx14DataFifoSize 16
-#define W_RXDATAFIFO7__Rx14DataFifoSize 7
-#define O_RXDATAFIFO7__Rx15DataFifoStart 8
-#define W_RXDATAFIFO7__Rx15DataFifoStart 7
-#define O_RXDATAFIFO7__Rx15DataFifoSize 0
-#define W_RXDATAFIFO7__Rx15DataFifoSize 7
-#define R_XGMACPADCALIBRATION 0x231
-#define R_FREEQCARVE 0x233
-#define R_SPI4STATICDELAY0 0x240
-#define O_SPI4STATICDELAY0__DataLine7 28
-#define W_SPI4STATICDELAY0__DataLine7 4
-#define O_SPI4STATICDELAY0__DataLine6 24
-#define W_SPI4STATICDELAY0__DataLine6 4
-#define O_SPI4STATICDELAY0__DataLine5 20
-#define W_SPI4STATICDELAY0__DataLine5 4
-#define O_SPI4STATICDELAY0__DataLine4 16
-#define W_SPI4STATICDELAY0__DataLine4 4
-#define O_SPI4STATICDELAY0__DataLine3 12
-#define W_SPI4STATICDELAY0__DataLine3 4
-#define O_SPI4STATICDELAY0__DataLine2 8
-#define W_SPI4STATICDELAY0__DataLine2 4
-#define O_SPI4STATICDELAY0__DataLine1 4
-#define W_SPI4STATICDELAY0__DataLine1 4
-#define O_SPI4STATICDELAY0__DataLine0 0
-#define W_SPI4STATICDELAY0__DataLine0 4
-#define R_SPI4STATICDELAY1 0x241
-#define O_SPI4STATICDELAY1__DataLine15 28
-#define W_SPI4STATICDELAY1__DataLine15 4
-#define O_SPI4STATICDELAY1__DataLine14 24
-#define W_SPI4STATICDELAY1__DataLine14 4
-#define O_SPI4STATICDELAY1__DataLine13 20
-#define W_SPI4STATICDELAY1__DataLine13 4
-#define O_SPI4STATICDELAY1__DataLine12 16
-#define W_SPI4STATICDELAY1__DataLine12 4
-#define O_SPI4STATICDELAY1__DataLine11 12
-#define W_SPI4STATICDELAY1__DataLine11 4
-#define O_SPI4STATICDELAY1__DataLine10 8
-#define W_SPI4STATICDELAY1__DataLine10 4
-#define O_SPI4STATICDELAY1__DataLine9 4
-#define W_SPI4STATICDELAY1__DataLine9 4
-#define O_SPI4STATICDELAY1__DataLine8 0
-#define W_SPI4STATICDELAY1__DataLine8 4
-#define R_SPI4STATICDELAY2 0x242
-#define O_SPI4STATICDELAY0__TxStat1 8
-#define W_SPI4STATICDELAY0__TxStat1 4
-#define O_SPI4STATICDELAY0__TxStat0 4
-#define W_SPI4STATICDELAY0__TxStat0 4
-#define O_SPI4STATICDELAY0__RxControl 0
-#define W_SPI4STATICDELAY0__RxControl 4
-#define R_SPI4CONTROL 0x243
-#define O_SPI4CONTROL__StaticDelay 2
-#define O_SPI4CONTROL__LVDS_LVTTL 1
-#define O_SPI4CONTROL__SPI4Enable 0
-#define R_CLASSWATERMARKS 0x244
-#define O_CLASSWATERMARKS__Class0Watermark 24
-#define W_CLASSWATERMARKS__Class0Watermark 5
-#define O_CLASSWATERMARKS__Class1Watermark 16
-#define W_CLASSWATERMARKS__Class1Watermark 5
-#define O_CLASSWATERMARKS__Class3Watermark 0
-#define W_CLASSWATERMARKS__Class3Watermark 5
-#define R_RXWATERMARKS1 0x245
-#define O_RXWATERMARKS__Rx0DataWatermark 24
-#define W_RXWATERMARKS__Rx0DataWatermark 7
-#define O_RXWATERMARKS__Rx1DataWatermark 16
-#define W_RXWATERMARKS__Rx1DataWatermark 7
-#define O_RXWATERMARKS__Rx3DataWatermark 0
-#define W_RXWATERMARKS__Rx3DataWatermark 7
-#define R_RXWATERMARKS2 0x246
-#define O_RXWATERMARKS__Rx4DataWatermark 24
-#define W_RXWATERMARKS__Rx4DataWatermark 7
-#define O_RXWATERMARKS__Rx5DataWatermark 16
-#define W_RXWATERMARKS__Rx5DataWatermark 7
-#define O_RXWATERMARKS__Rx6DataWatermark 8
-#define W_RXWATERMARKS__Rx6DataWatermark 7
-#define O_RXWATERMARKS__Rx7DataWatermark 0
-#define W_RXWATERMARKS__Rx7DataWatermark 7
-#define R_RXWATERMARKS3 0x247
-#define O_RXWATERMARKS__Rx8DataWatermark 24
-#define W_RXWATERMARKS__Rx8DataWatermark 7
-#define O_RXWATERMARKS__Rx9DataWatermark 16
-#define W_RXWATERMARKS__Rx9DataWatermark 7
-#define O_RXWATERMARKS__Rx10DataWatermark 8
-#define W_RXWATERMARKS__Rx10DataWatermark 7
-#define O_RXWATERMARKS__Rx11DataWatermark 0
-#define W_RXWATERMARKS__Rx11DataWatermark 7
-#define R_RXWATERMARKS4 0x248
-#define O_RXWATERMARKS__Rx12DataWatermark 24
-#define W_RXWATERMARKS__Rx12DataWatermark 7
-#define O_RXWATERMARKS__Rx13DataWatermark 16
-#define W_RXWATERMARKS__Rx13DataWatermark 7
-#define O_RXWATERMARKS__Rx14DataWatermark 8
-#define W_RXWATERMARKS__Rx14DataWatermark 7
-#define O_RXWATERMARKS__Rx15DataWatermark 0
-#define W_RXWATERMARKS__Rx15DataWatermark 7
-#define R_FREEWATERMARKS 0x249
-#define O_FREEWATERMARKS__FreeOutWatermark 16
-#define W_FREEWATERMARKS__FreeOutWatermark 16
-#define O_FREEWATERMARKS__JumFrWatermark 8
-#define W_FREEWATERMARKS__JumFrWatermark 7
-#define O_FREEWATERMARKS__RegFrWatermark 0
-#define W_FREEWATERMARKS__RegFrWatermark 7
-#define R_EGRESSFIFOCARVINGSLOTS 0x24a
-
-#define CTRL_RES0 0
-#define CTRL_RES1 1
-#define CTRL_REG_FREE 2
-#define CTRL_JUMBO_FREE 3
-#define CTRL_CONT 4
-#define CTRL_EOP 5
-#define CTRL_START 6
-#define CTRL_SNGL 7
-
-#define CTRL_B0_NOT_EOP 0
-#define CTRL_B0_EOP 1
-
-#define R_ROUND_ROBIN_TABLE 0
-#define R_PDE_CLASS_0 0x300
-#define R_PDE_CLASS_1 0x302
-#define R_PDE_CLASS_2 0x304
-#define R_PDE_CLASS_3 0x306
-
-#define R_MSG_TX_THRESHOLD 0x308
-
-#define R_GMAC_JFR0_BUCKET_SIZE 0x320
-#define R_GMAC_RFR0_BUCKET_SIZE 0x321
-#define R_GMAC_TX0_BUCKET_SIZE 0x322
-#define R_GMAC_TX1_BUCKET_SIZE 0x323
-#define R_GMAC_TX2_BUCKET_SIZE 0x324
-#define R_GMAC_TX3_BUCKET_SIZE 0x325
-#define R_GMAC_JFR1_BUCKET_SIZE 0x326
-#define R_GMAC_RFR1_BUCKET_SIZE 0x327
-
-#define R_XGS_TX0_BUCKET_SIZE 0x320
-#define R_XGS_TX1_BUCKET_SIZE 0x321
-#define R_XGS_TX2_BUCKET_SIZE 0x322
-#define R_XGS_TX3_BUCKET_SIZE 0x323
-#define R_XGS_TX4_BUCKET_SIZE 0x324
-#define R_XGS_TX5_BUCKET_SIZE 0x325
-#define R_XGS_TX6_BUCKET_SIZE 0x326
-#define R_XGS_TX7_BUCKET_SIZE 0x327
-#define R_XGS_TX8_BUCKET_SIZE 0x328
-#define R_XGS_TX9_BUCKET_SIZE 0x329
-#define R_XGS_TX10_BUCKET_SIZE 0x32A
-#define R_XGS_TX11_BUCKET_SIZE 0x32B
-#define R_XGS_TX12_BUCKET_SIZE 0x32C
-#define R_XGS_TX13_BUCKET_SIZE 0x32D
-#define R_XGS_TX14_BUCKET_SIZE 0x32E
-#define R_XGS_TX15_BUCKET_SIZE 0x32F
-#define R_XGS_JFR_BUCKET_SIZE 0x330
-#define R_XGS_RFR_BUCKET_SIZE 0x331
-
-#define R_CC_CPU0_0 0x380
-#define R_CC_CPU1_0 0x388
-#define R_CC_CPU2_0 0x390
-#define R_CC_CPU3_0 0x398
-#define R_CC_CPU4_0 0x3a0
-#define R_CC_CPU5_0 0x3a8
-#define R_CC_CPU6_0 0x3b0
-#define R_CC_CPU7_0 0x3b8
-
-typedef enum {
- xlr_mac_speed_10, xlr_mac_speed_100,
- xlr_mac_speed_1000, xlr_mac_speed_rsvd
-} xlr_mac_speed_t;
-
-typedef enum {
- xlr_mac_duplex_auto, xlr_mac_duplex_half,
- xlr_mac_duplex_full
-} xlr_mac_duplex_t;
-
-typedef enum {
- xlr_mac_link_down,
- xlr_mac_link_up,
-} xlr_mac_link_t;
-
-typedef enum {
- xlr_mac_fc_auto, xlr_mac_fc_disabled, xlr_mac_fc_frame,
- xlr_mac_fc_collision, xlr_mac_fc_carrier
-} xlr_mac_fc_t;
-
-/* static int mac_frin_to_be_sent_thr[8]; */
-
-enum {
- PORT_TX,
- PORT_TX_COMPLETE,
- PORT_STARTQ,
- PORT_STOPQ,
- PORT_START_DEV_STATE,
- PORT_STOP_DEV_STATE,
-};
-
-struct rge_softc_stats {
- unsigned long rx_frames;
- unsigned long tx_frames;
- unsigned long rx_packets;
- unsigned long rx_bytes;
- unsigned long tx_packets;
- unsigned long tx_bytes;
-};
-
-struct driver_data {
-
- /*
- * Let these be the first fields in this structure the structure is
- * cacheline aligned when allocated in init_etherdev
- */
- struct fr_desc *frin_spill;
- struct fr_desc *frout_spill;
- union rx_tx_desc *class_0_spill;
- union rx_tx_desc *class_1_spill;
- union rx_tx_desc *class_2_spill;
- union rx_tx_desc *class_3_spill;
- int spill_configured;
-
- struct rge_softc *sc; /* pointer to freebsd device soft-pointer */
- struct rge_softc_stats stats;
- struct mtx lock;
-
- xlr_reg_t *mmio;
- xlr_reg_t *mii_mmio;
- xlr_reg_t *pcs_mmio;
- xlr_reg_t *serdes_mmio;
-
- int txbucket;
- int rfrbucket;
-
- int phy_oldbmsr;
- int phy_oldanlpar;
- int phy_oldk1stsr;
- int phy_oldlinkstat;
- unsigned char phys_addr[2];
-
- xlr_mac_speed_t speed; /* current speed */
- xlr_mac_duplex_t duplex;/* current duplex */
- xlr_mac_link_t link; /* current link */
- xlr_mac_fc_t flow_ctrl; /* current flow control setting */
- int advertising;
-
- int id;
- int type;
- int mode;
- int instance;
- int phy_addr;
- int frin_to_be_sent[8];
- int init_frin_desc;
-};
-
-struct rge_softc {
- int unit;
- int irq;
- unsigned char dev_addr[6];
- unsigned long base_addr;
- unsigned long mem_end;
- struct ifnet *rge_ifp; /* interface info */
- device_t rge_dev;
- int mtu;
- int flags;
- struct driver_data priv;
- struct mtx rge_mtx;
- device_t rge_miibus;
- struct mii_data rge_mii;/* MII/media information */
- bus_space_handle_t rge_bhandle;
- bus_space_tag_t rge_btag;
- void *rge_intrhand;
- struct resource rge_irq;
- struct resource *rge_res;
- struct ifmedia rge_ifmedia; /* TBI media info */
- int rge_if_flags;
- int rge_link; /* link state */
- int rge_link_evt; /* pending link event */
- struct callout rge_stat_ch;
- void (*xmit) (struct ifnet *);
- void (*stop) (struct rge_softc *);
- int (*ioctl) (struct ifnet *, u_long, caddr_t);
- struct rge_softc_stats *(*get_stats) (struct rge_softc *);
- int active;
- int link_up;
-};
-
-struct size_1_desc {
- uint64_t entry0;
-};
-
-struct size_2_desc {
- uint64_t entry0;
- uint64_t entry1;
-};
-
-struct size_3_desc {
- uint64_t entry0;
- uint64_t entry1;
- uint64_t entry2;
-};
-
-struct size_4_desc {
- uint64_t entry0;
- uint64_t entry1;
- uint64_t entry2;
- uint64_t entry3;
-};
-
-struct fr_desc {
- struct size_1_desc d1;
-};
-
-union rx_tx_desc {
- struct size_2_desc d2;
- /* struct size_3_desc d3; */
- /* struct size_4_desc d4; */
-};
-
-
-extern unsigned char xlr_base_mac_addr[];
-
-#endif
diff --git a/sys/dev/rmi/xlr/xgmac_mdio.h b/sys/dev/rmi/xlr/xgmac_mdio.h
deleted file mode 100644
index 5d0a3d0..0000000
--- a/sys/dev/rmi/xlr/xgmac_mdio.h
+++ /dev/null
@@ -1,127 +0,0 @@
-/*-
- * Copyright (c) 2003-2009 RMI Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of RMI Corporation, nor the names of its contributors,
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RMI_BSD */
-/* MDIO Low level Access routines */
-/* All Phy's accessed from GMAC0 base */
-
-#ifndef _XGMAC_MDIO_H_
-#define _XGMAC_MDIO_H_
-
-static inline int
-xmdio_read(volatile unsigned int *_mmio,
- uint32_t phy_addr, uint32_t address);
-static inline void
-xmdio_write(volatile unsigned int *_mmio,
- uint32_t phy_addr, uint32_t address, uint32_t data);
-static inline void
-xmdio_address(volatile unsigned int *_mmio,
- uint32_t phy_addr, uint32_t dev_ad, uint32_t address);
-
-static inline void
-xmdio_address(volatile unsigned int *_mmio,
- uint32_t phy_addr, uint32_t dev_ad, uint32_t address)
-{
- uint32_t st_field = 0x0;
- uint32_t op_type = 0x0; /* address operation */
- uint32_t ta_field = 0x2;/* ta field */
-
- _mmio[0x11] = ((st_field & 0x3) << 30) |
- ((op_type & 0x3) << 28) |
- ((phy_addr & 0x1F) << 23) |
- ((dev_ad & 0x1F) << 18) |
- ((ta_field & 0x3) << 16) |
- ((address & 0xffff) << 0);
-
- _mmio[0x10] = (0x0 << 3) | 0x5;
- _mmio[0x10] = (0x1 << 3) | 0x5;
- _mmio[0x10] = (0x0 << 3) | 0x5;
-
- /* wait for dev_ad cycle to complete */
- while (_mmio[0x14] & 0x1) {
- };
-
-}
-
-/* function prototypes */
-static inline int
-xmdio_read(volatile unsigned int *_mmio,
- uint32_t phy_addr, uint32_t address)
-{
- uint32_t st_field = 0x0;
- uint32_t op_type = 0x3; /* read operation */
- uint32_t ta_field = 0x2;/* ta field */
- uint32_t data = 0;
-
- xmdio_address(_mmio, phy_addr, 5, address);
- _mmio[0x11] = ((st_field & 0x3) << 30) |
- ((op_type & 0x3) << 28) |
- ((phy_addr & 0x1F) << 23) |
- ((5 & 0x1F) << 18) |
- ((ta_field & 0x3) << 16) |
- ((data & 0xffff) << 0);
-
- _mmio[0x10] = (0x0 << 3) | 0x5;
- _mmio[0x10] = (0x1 << 3) | 0x5;
- _mmio[0x10] = (0x0 << 3) | 0x5;
-
- /* wait for write cycle to complete */
- while (_mmio[0x14] & 0x1) {
- };
-
- data = _mmio[0x11] & 0xffff;
- return (data);
-}
-
-static inline void
-xmdio_write(volatile unsigned int *_mmio,
- uint32_t phy_addr, uint32_t address, uint32_t data)
-{
- uint32_t st_field = 0x0;
- uint32_t op_type = 0x1; /* write operation */
- uint32_t ta_field = 0x2;/* ta field */
-
- xmdio_address(_mmio, phy_addr, 5, address);
- _mmio[0x11] = ((st_field & 0x3) << 30) |
- ((op_type & 0x3) << 28) |
- ((phy_addr & 0x1F) << 23) |
- ((5 & 0x1F) << 18) |
- ((ta_field & 0x3) << 16) |
- ((data & 0xffff) << 0);
-
- _mmio[0x10] = (0x0 << 3) | 0x5;
- _mmio[0x10] = (0x1 << 3) | 0x5;
- _mmio[0x10] = (0x0 << 3) | 0x5;
-
- /* wait for write cycle to complete */
- while (_mmio[0x14] & 0x1) {
- };
-
-}
-
-#endif
diff --git a/sys/dev/safe/safe.c b/sys/dev/safe/safe.c
index 736b329..ac97098 100644
--- a/sys/dev/safe/safe.c
+++ b/sys/dev/safe/safe.c
@@ -1902,7 +1902,7 @@ safe_init_board(struct safe_softc *sc)
{
u_int32_t v, dwords;
- v = READ_REG(sc, SAFE_PE_DMACFG);;
+ v = READ_REG(sc, SAFE_PE_DMACFG);
v &=~ SAFE_PE_DMACFG_PEMODE;
v |= SAFE_PE_DMACFG_FSENA /* failsafe enable */
| SAFE_PE_DMACFG_GPRPCI /* gather ring on PCI */
diff --git a/sys/dev/siba/siba_mips.c b/sys/dev/siba/siba_mips.c
deleted file mode 100644
index 676da83..0000000
--- a/sys/dev/siba/siba_mips.c
+++ /dev/null
@@ -1,113 +0,0 @@
-/*-
- * Copyright (c) 2007 Bruce M. Simpson.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/*
- * Child driver for MIPS 3302 core.
- * Interrupt controller registers live here. Interrupts may not be routed
- * to the MIPS core if they are masked out.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/malloc.h>
-
-#include <machine/bus.h>
-
-#include <dev/siba/sibavar.h>
-#include <dev/siba/sibareg.h>
-#include <dev/siba/siba_ids.h>
-
-static int siba_mips_attach(device_t);
-static int siba_mips_probe(device_t);
-
-static int
-siba_mips_probe(device_t dev)
-{
-
- if (siba_get_vendor(dev) == SIBA_VID_BROADCOM &&
- siba_get_device(dev) == SIBA_DEVID_MIPS_3302) {
- device_set_desc(dev, "MIPS 3302 processor");
- return (BUS_PROBE_DEFAULT);
- }
-
- return (ENXIO);
-}
-
-struct siba_mips_softc {
- void *notused;
-};
-
-static int
-siba_mips_attach(device_t dev)
-{
- //struct siba_mips_softc *sc = device_get_softc(dev);
- struct resource *mem;
- int rid;
-
- /*
- * Allocate the resources which the parent bus has already
- * determined for us.
- * TODO: interrupt routing
- */
-#define MIPS_MEM_RID 0x20
- rid = MIPS_MEM_RID;
- mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
- RF_ACTIVE);
- if (mem == NULL) {
- device_printf(dev, "unable to allocate memory\n");
- return (ENXIO);
- }
-#if 0
- device_printf(dev, "start %08lx size %04lx\n",
- rman_get_start(mem), rman_get_size(mem));
-#endif
-
- return (0);
-}
-
-static device_method_t siba_mips_methods[] = {
- /* Device interface */
- DEVMETHOD(device_attach, siba_mips_attach),
- DEVMETHOD(device_probe, siba_mips_probe),
-
- {0, 0},
-};
-
-static driver_t siba_mips_driver = {
- "siba_mips",
- siba_mips_methods,
- sizeof(struct siba_softc),
-};
-static devclass_t siba_mips_devclass;
-
-DRIVER_MODULE(siba_mips, siba, siba_mips_driver, siba_mips_devclass, 0, 0);
diff --git a/sys/dev/siba/siba_sdram.c b/sys/dev/siba/siba_sdram.c
deleted file mode 100644
index 8e74e53..0000000
--- a/sys/dev/siba/siba_sdram.c
+++ /dev/null
@@ -1,114 +0,0 @@
-/*-
- * Copyright (c) 2007 Bruce M. Simpson.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/*
- * Child driver for SDRAM/DDR controller core.
- * Generally the OS should not need to access this device unless the
- * firmware has not configured the SDRAM controller.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/rman.h>
-#include <sys/malloc.h>
-
-#include <machine/bus.h>
-
-#include <dev/siba/sibavar.h>
-#include <dev/siba/sibareg.h>
-#include <dev/siba/siba_ids.h>
-
-static int siba_sdram_attach(device_t);
-static int siba_sdram_probe(device_t);
-
-static int
-siba_sdram_probe(device_t dev)
-{
-
- if (siba_get_vendor(dev) == SIBA_VID_BROADCOM &&
- siba_get_device(dev) == SIBA_DEVID_SDRAMDDR) {
- device_set_desc(dev, "SDRAM/DDR core");
- return (BUS_PROBE_DEFAULT);
- }
-
- return (ENXIO);
-}
-
-struct siba_sdram_softc {
- void *notused;
-};
-
-static int
-siba_sdram_attach(device_t dev)
-{
- //struct siba_sdram_softc *sc = device_get_softc(dev);
- struct resource *mem;
- int rid;
-
- /*
- * Allocate the resources which the parent bus has already
- * determined for us.
- * TODO: interrupt routing
- */
-#define MIPS_MEM_RID 0x20
- rid = MIPS_MEM_RID;
- mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
- RF_ACTIVE);
- if (mem == NULL) {
- device_printf(dev, "unable to allocate memory\n");
- return (ENXIO);
- }
-
-#if 0
- device_printf(dev, "start %08lx size %04lx\n",
- rman_get_start(mem), rman_get_size(mem));
-#endif
-
- return (0);
-}
-
-static device_method_t siba_sdram_methods[] = {
- /* Device interface */
- DEVMETHOD(device_attach, siba_sdram_attach),
- DEVMETHOD(device_probe, siba_sdram_probe),
-
- {0, 0},
-};
-
-static driver_t siba_sdram_driver = {
- "siba_sdram",
- siba_sdram_methods,
- sizeof(struct siba_softc),
-};
-static devclass_t siba_sdram_devclass;
-
-DRIVER_MODULE(siba_sdram, siba, siba_sdram_driver, siba_sdram_devclass, 0, 0);
diff --git a/sys/dev/sound/pci/maestro3.c b/sys/dev/sound/pci/maestro3.c
index 8a57c8c..51f9ee0 100644
--- a/sys/dev/sound/pci/maestro3.c
+++ b/sys/dev/sound/pci/maestro3.c
@@ -353,7 +353,7 @@ m3_wrcd(kobj_t kobj, void *devinfo, int regno, u_int32_t data)
struct sc_info *sc = (struct sc_info *)devinfo;
if (m3_wait(sc)) {
device_printf(sc->dev, "m3_wrcd timed out.\n");
- return -1;;
+ return -1;
}
m3_wr_2(sc, CODEC_DATA, data);
m3_wr_1(sc, CODEC_COMMAND, regno & 0x7f);
diff --git a/sys/dev/ste/if_ste.c b/sys/dev/ste/if_ste.c
index 07412a5..78c0290 100644
--- a/sys/dev/ste/if_ste.c
+++ b/sys/dev/ste/if_ste.c
@@ -120,7 +120,7 @@ static int ste_miibus_readreg(device_t, int, int);
static void ste_miibus_statchg(device_t);
static int ste_miibus_writereg(device_t, int, int, int);
static int ste_newbuf(struct ste_softc *, struct ste_chain_onefrag *);
-static int ste_read_eeprom(struct ste_softc *, caddr_t, int, int, int);
+static int ste_read_eeprom(struct ste_softc *, uint16_t *, int, int);
static void ste_reset(struct ste_softc *);
static void ste_restart_tx(struct ste_softc *);
static int ste_rxeof(struct ste_softc *, int);
@@ -538,9 +538,8 @@ ste_eeprom_wait(struct ste_softc *sc)
* data is stored in the EEPROM in network byte order.
*/
static int
-ste_read_eeprom(struct ste_softc *sc, caddr_t dest, int off, int cnt, int swap)
+ste_read_eeprom(struct ste_softc *sc, uint16_t *dest, int off, int cnt)
{
- uint16_t word, *ptr;
int err = 0, i;
if (ste_eeprom_wait(sc))
@@ -551,12 +550,8 @@ ste_read_eeprom(struct ste_softc *sc, caddr_t dest, int off, int cnt, int swap)
err = ste_eeprom_wait(sc);
if (err)
break;
- word = CSR_READ_2(sc, STE_EEPROM_DATA);
- ptr = (uint16_t *)(dest + (i * 2));
- if (swap)
- *ptr = ntohs(word);
- else
- *ptr = word;
+ *dest = le16toh(CSR_READ_2(sc, STE_EEPROM_DATA));
+ dest++;
}
return (err ? 1 : 0);
@@ -1063,7 +1058,7 @@ ste_attach(device_t dev)
{
struct ste_softc *sc;
struct ifnet *ifp;
- u_char eaddr[6];
+ uint16_t eaddr[ETHER_ADDR_LEN / 2];
int error = 0, pmc, rid;
sc = device_get_softc(dev);
@@ -1122,10 +1117,9 @@ ste_attach(device_t dev)
/*
* Get station address from the EEPROM.
*/
- if (ste_read_eeprom(sc, eaddr,
- STE_EEADDR_NODE0, 3, 0)) {
+ if (ste_read_eeprom(sc, eaddr, STE_EEADDR_NODE0, ETHER_ADDR_LEN / 2)) {
device_printf(dev, "failed to read station address\n");
- error = ENXIO;;
+ error = ENXIO;
goto fail;
}
ste_sysctl_node(sc);
@@ -1163,7 +1157,7 @@ ste_attach(device_t dev)
/*
* Call MI attach routine.
*/
- ether_ifattach(ifp, eaddr);
+ ether_ifattach(ifp, (uint8_t *)eaddr);
/*
* Tell the upper layer(s) we support long frames.
@@ -1579,12 +1573,14 @@ ste_init_rx_list(struct ste_softc *sc)
return (error);
if (i == (STE_RX_LIST_CNT - 1)) {
cd->ste_rx_chain[i].ste_next = &cd->ste_rx_chain[0];
- ld->ste_rx_list[i].ste_next = ld->ste_rx_list_paddr +
- (sizeof(struct ste_desc_onefrag) * 0);
+ ld->ste_rx_list[i].ste_next =
+ htole32(ld->ste_rx_list_paddr +
+ (sizeof(struct ste_desc_onefrag) * 0));
} else {
cd->ste_rx_chain[i].ste_next = &cd->ste_rx_chain[i + 1];
- ld->ste_rx_list[i].ste_next = ld->ste_rx_list_paddr +
- (sizeof(struct ste_desc_onefrag) * (i + 1));
+ ld->ste_rx_list[i].ste_next =
+ htole32(ld->ste_rx_list_paddr +
+ (sizeof(struct ste_desc_onefrag) * (i + 1)));
}
}
diff --git a/sys/dev/trm/trm.c b/sys/dev/trm/trm.c
index 222857f..26ab352 100644
--- a/sys/dev/trm/trm.c
+++ b/sys/dev/trm/trm.c
@@ -2770,7 +2770,7 @@ trm_DoingSRB_Done(PACB pACB)
xpt_done(pccb);
psrb = psrb2;
}
- pdcb->GoingSRBCnt = 0;;
+ pdcb->GoingSRBCnt = 0;
pdcb->pGoingSRB = NULL;
pdcb = pdcb->pNextDCB;
}
diff --git a/sys/dev/uart/uart_dev_ns8250.c b/sys/dev/uart/uart_dev_ns8250.c
index 4b9ec6a..c01fd61 100644
--- a/sys/dev/uart/uart_dev_ns8250.c
+++ b/sys/dev/uart/uart_dev_ns8250.c
@@ -224,7 +224,7 @@ static void ns8250_putc(struct uart_bas *bas, int);
static int ns8250_rxready(struct uart_bas *bas);
static int ns8250_getc(struct uart_bas *bas, struct mtx *);
-struct uart_ops uart_ns8250_ops = {
+static struct uart_ops uart_ns8250_ops = {
.probe = ns8250_probe,
.init = ns8250_init,
.term = ns8250_term,
diff --git a/sys/dev/usb/controller/musb_otg.c b/sys/dev/usb/controller/musb_otg.c
index 987d3f6..e4db7bf 100644
--- a/sys/dev/usb/controller/musb_otg.c
+++ b/sys/dev/usb/controller/musb_otg.c
@@ -1799,7 +1799,7 @@ musbotg_init(struct musbotg_softc *sc)
MUSB2_WRITE_1(sc, MUSB2_REG_EPINDEX, temp);
fsize = MUSB2_READ_1(sc, MUSB2_REG_FSIZE);
- frx = (fsize & MUSB2_MASK_RX_FSIZE) / 16;;
+ frx = (fsize & MUSB2_MASK_RX_FSIZE) / 16;
ftx = (fsize & MUSB2_MASK_TX_FSIZE);
DPRINTF("Endpoint %u FIFO size: IN=%u, OUT=%u, DYN=%d\n",
diff --git a/sys/dev/usb/controller/uhci.c b/sys/dev/usb/controller/uhci.c
index 918855b..837a26f 100644
--- a/sys/dev/usb/controller/uhci.c
+++ b/sys/dev/usb/controller/uhci.c
@@ -830,33 +830,6 @@ uhci_dump_all(uhci_softc_t *sc)
}
static void
-uhci_dump_qhs(uhci_qh_t *sqh)
-{
- uint8_t temp;
-
- temp = uhci_dump_qh(sqh);
-
- /*
- * uhci_dump_qhs displays all the QHs and TDs from the given QH
- * onwards Traverses sideways first, then down.
- *
- * QH1 QH2 No QH TD2.1 TD2.2 TD1.1 etc.
- *
- * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
- */
-
- if (temp & 1)
- uhci_dump_qhs(sqh->h_next);
- else
- DPRINTF("No QH\n");
-
- if (temp & 2)
- uhci_dump_tds(sqh->e_next);
- else
- DPRINTF("No TD\n");
-}
-
-static void
uhci_dump_tds(uhci_td_t *td)
{
for (;
diff --git a/sys/dev/usb/quirk/usb_quirk.c b/sys/dev/usb/quirk/usb_quirk.c
index 9a18dee..63ad120 100644
--- a/sys/dev/usb/quirk/usb_quirk.c
+++ b/sys/dev/usb/quirk/usb_quirk.c
@@ -225,6 +225,9 @@ static struct usb_quirk_entry usb_quirks[USB_DEV_QUIRKS_MAX] = {
USB_QUIRK(IOMEGA, ZIP100, 0x0000, 0xffff, UQ_MSC_FORCE_WIRE_BBB,
UQ_MSC_FORCE_PROTO_SCSI,
UQ_MSC_NO_TEST_UNIT_READY), /* XXX ZIP drives can also use ATAPI */
+ USB_QUIRK(JMICRON, JM20337, 0x0000, 0xffff, UQ_MSC_FORCE_WIRE_BBB,
+ UQ_MSC_FORCE_PROTO_SCSI,
+ UQ_MSC_NO_SYNC_CACHE),
USB_QUIRK(KYOCERA, FINECAM_L3, 0x0000, 0xffff, UQ_MSC_FORCE_WIRE_BBB,
UQ_MSC_FORCE_PROTO_SCSI, UQ_MSC_NO_INQUIRY),
USB_QUIRK(KYOCERA, FINECAM_S3X, 0x0000, 0xffff, UQ_MSC_FORCE_WIRE_CBI,
@@ -413,7 +416,8 @@ static struct usb_quirk_entry usb_quirks[USB_DEV_QUIRKS_MAX] = {
UQ_MSC_FORCE_PROTO_SCSI, UQ_MSC_FORCE_SHORT_INQ,
UQ_MSC_NO_START_STOP, UQ_MSC_IGNORE_RESIDUE),
USB_QUIRK(WESTERN, MYBOOK, 0x0000, 0xffff, UQ_MSC_FORCE_WIRE_BBB,
- UQ_MSC_FORCE_PROTO_SCSI, UQ_MSC_NO_INQUIRY_EVPD),
+ UQ_MSC_FORCE_PROTO_SCSI, UQ_MSC_NO_INQUIRY_EVPD,
+ UQ_MSC_NO_SYNC_CACHE),
USB_QUIRK(WESTERN, MYPASSWORD, 0x0000, 0xffff, UQ_MSC_FORCE_SHORT_INQ),
USB_QUIRK(WINMAXGROUP, FLASH64MC, 0x0000, 0xffff, UQ_MSC_FORCE_WIRE_BBB,
UQ_MSC_FORCE_PROTO_SCSI, UQ_MSC_NO_INQUIRY),
diff --git a/sys/dev/usb/serial/u3g.c b/sys/dev/usb/serial/u3g.c
index 5b61948..6fc3651 100644
--- a/sys/dev/usb/serial/u3g.c
+++ b/sys/dev/usb/serial/u3g.c
@@ -59,9 +59,7 @@
#define USB_DEBUG_VAR u3g_debug
#include <dev/usb/usb_debug.h>
#include <dev/usb/usb_process.h>
-#include <dev/usb/usb_dynamic.h>
#include <dev/usb/usb_msctest.h>
-#include <dev/usb/usb_device.h>
#include <dev/usb/serial/usb_serial.h>
@@ -86,10 +84,14 @@ SYSCTL_INT(_hw_usb_u3g, OID_AUTO, debug, CTLFLAG_RW,
#define U3GSP_HSPA 6
#define U3GSP_MAX 7
-#define U3GFL_HUAWEI_INIT 0x0001 /* Init command required */
-#define U3GFL_SCSI_EJECT 0x0002 /* SCSI eject command required */
-#define U3GFL_SIERRA_INIT 0x0004 /* Init command required */
-#define U3GFL_SAEL_M460_INIT 0x0008 /* Init device */
+#define U3GINIT_HUAWEI 1 /* Requires Huawei init command */
+#define U3GINIT_SIERRA 2 /* Requires Sierra init command */
+#define U3GINIT_SCSIEJECT 3 /* Requires SCSI eject command */
+#define U3GINIT_REZERO 4 /* Requires SCSI rezero command */
+#define U3GINIT_ZTESTOR 5 /* Requires ZTE SCSI command */
+#define U3GINIT_CMOTECH 6 /* Requires CMOTECH SCSI command */
+#define U3GINIT_WAIT 7 /* Device reappears after a delay */
+#define U3GINIT_SAEL_M460 8 /* Requires vendor init */
enum {
U3G_BULK_WR,
@@ -192,6 +194,7 @@ static const struct usb_device_id u3g_devs[] = {
U3G_DEV(ANYDATA, ADU_E100X, 0),
U3G_DEV(AXESSTEL, DATAMODEM, 0),
U3G_DEV(CMOTECH, CDMA_MODEM1, 0),
+ U3G_DEV(CMOTECH, CGU628, U3GINIT_CMOTECH),
U3G_DEV(DELL, U5500, 0),
U3G_DEV(DELL, U5505, 0),
U3G_DEV(DELL, U5510, 0),
@@ -211,73 +214,73 @@ static const struct usb_device_id u3g_devs[] = {
U3G_DEV(DLINK3, DWM652, 0),
U3G_DEV(HP, EV2200, 0),
U3G_DEV(HP, HS2300, 0),
- U3G_DEV(HUAWEI, E1401, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1402, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1403, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1404, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1405, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1406, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1407, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1408, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1409, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E140A, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E140B, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E140D, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E140E, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E140F, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1410, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1411, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1412, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1413, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1414, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1415, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1416, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1417, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1418, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1419, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E141A, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E141B, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E141C, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E141D, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E141E, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E141F, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1420, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1421, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1422, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1423, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1424, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1425, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1426, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1427, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1428, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1429, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E142A, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E142B, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E142C, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E142D, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E142E, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E142F, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1430, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1431, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1432, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1433, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1434, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1435, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1436, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1437, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1438, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E1439, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E143A, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E143B, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E143C, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E143D, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E143E, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E143F, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E14AC, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E180V, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E220, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, E220BIS, U3GFL_HUAWEI_INIT),
- U3G_DEV(HUAWEI, MOBILE, U3GFL_HUAWEI_INIT),
+ U3G_DEV(HUAWEI, E1401, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1402, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1403, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1404, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1405, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1406, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1407, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1408, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1409, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E140A, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E140B, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E140D, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E140E, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E140F, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1410, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1411, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1412, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1413, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1414, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1415, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1416, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1417, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1418, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1419, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E141A, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E141B, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E141C, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E141D, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E141E, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E141F, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1420, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1421, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1422, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1423, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1424, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1425, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1426, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1427, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1428, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1429, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E142A, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E142B, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E142C, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E142D, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E142E, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E142F, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1430, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1431, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1432, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1433, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1434, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1435, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1436, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1437, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1438, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E1439, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E143A, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E143B, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E143C, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E143D, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E143E, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E143F, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E14AC, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E180V, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E220, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, E220BIS, U3GINIT_HUAWEI),
+ U3G_DEV(HUAWEI, MOBILE, U3GINIT_HUAWEI),
U3G_DEV(KYOCERA2, CDMA_MSM_K, 0),
U3G_DEV(KYOCERA2, KPC680, 0),
U3G_DEV(MERLIN, V620, 0),
@@ -294,7 +297,7 @@ static const struct usb_device_id u3g_devs[] = {
U3G_DEV(NOVATEL, U727_2, 0),
U3G_DEV(NOVATEL, U740, 0),
U3G_DEV(NOVATEL, U740_2, 0),
- U3G_DEV(NOVATEL, U760, U3GFL_SCSI_EJECT),
+ U3G_DEV(NOVATEL, U760, U3GINIT_SCSIEJECT),
U3G_DEV(NOVATEL, U870, 0),
U3G_DEV(NOVATEL, V620, 0),
U3G_DEV(NOVATEL, V640, 0),
@@ -313,6 +316,7 @@ static const struct usb_device_id u3g_devs[] = {
U3G_DEV(OPTION, E7041, 0),
U3G_DEV(OPTION, E7061, 0),
U3G_DEV(OPTION, E7100, 0),
+ U3G_DEV(OPTION, GE40X, 0),
U3G_DEV(OPTION, GT3G, 0),
U3G_DEV(OPTION, GT3GPLUS, 0),
U3G_DEV(OPTION, GT3GQUAD, 0),
@@ -338,7 +342,7 @@ static const struct usb_device_id u3g_devs[] = {
U3G_DEV(QUALCOMMINC, AC2726, 0),
U3G_DEV(QUALCOMMINC, AC8700, 0),
U3G_DEV(QUALCOMMINC, AC8710, 0),
- U3G_DEV(QUALCOMMINC, CDMA_MSM, U3GFL_SCSI_EJECT),
+ U3G_DEV(QUALCOMMINC, CDMA_MSM, U3GINIT_SCSIEJECT),
U3G_DEV(QUALCOMMINC, E0002, 0),
U3G_DEV(QUALCOMMINC, E0003, 0),
U3G_DEV(QUALCOMMINC, E0004, 0),
@@ -405,7 +409,6 @@ static const struct usb_device_id u3g_devs[] = {
U3G_DEV(QUALCOMMINC, E2003, 0),
U3G_DEV(QUALCOMMINC, MF626, 0),
U3G_DEV(QUALCOMMINC, MF628, 0),
- U3G_DEV(QUALCOMMINC, ZTE_STOR, U3GFL_SCSI_EJECT),
U3G_DEV(QUANTA, GKE, 0),
U3G_DEV(QUANTA, GLE, 0),
U3G_DEV(QUANTA, GLX, 0),
@@ -466,7 +469,7 @@ static const struct usb_device_id u3g_devs[] = {
U3G_DEV(SIERRA, MINI5725, 0),
U3G_DEV(SIERRA, T11, 0),
U3G_DEV(SIERRA, T598, 0),
- U3G_DEV(SILABS, SAEL, U3GFL_SAEL_M460_INIT),
+ U3G_DEV(SILABS, SAEL, U3GINIT_SAEL_M460),
U3G_DEV(STELERA, C105, 0),
U3G_DEV(STELERA, E1003, 0),
U3G_DEV(STELERA, E1004, 0),
@@ -492,12 +495,14 @@ static const struct usb_device_id u3g_devs[] = {
U3G_DEV(TOSHIBA, HSDPA, 0),
U3G_DEV(YISO, C893, 0),
/* Autoinstallers */
- U3G_DEV(NOVATEL, ZEROCD, U3GFL_SCSI_EJECT),
- U3G_DEV(SIERRA, TRUINSTALL, U3GFL_SIERRA_INIT),
+ U3G_DEV(NOVATEL, ZEROCD, U3GINIT_SCSIEJECT),
+ U3G_DEV(OPTION, GTICON322, U3GINIT_REZERO),
+ U3G_DEV(QUALCOMMINC, ZTE_STOR, U3GINIT_ZTESTOR),
+ U3G_DEV(SIERRA, TRUINSTALL, U3GINIT_SIERRA),
#undef U3G_DEV
};
-static void
+static int
u3g_sierra_init(struct usb_device *udev)
{
struct usb_device_request req;
@@ -512,10 +517,10 @@ u3g_sierra_init(struct usb_device *udev)
NULL, 0, NULL, USB_MS_HZ)) {
/* ignore any errors */
}
- return;
+ return (0);
}
-static void
+static int
u3g_huawei_init(struct usb_device *udev)
{
struct usb_device_request req;
@@ -530,7 +535,7 @@ u3g_huawei_init(struct usb_device *udev)
NULL, 0, NULL, USB_MS_HZ)) {
/* ignore any errors */
}
- return;
+ return (0);
}
static void
@@ -625,7 +630,7 @@ u3g_test_autoinst(void *arg, struct usb_device *udev,
{
struct usb_interface *iface;
struct usb_interface_descriptor *id;
- uint32_t flags;
+ int error;
if (uaa->dev_state != UAA_DEV_READY)
return;
@@ -636,25 +641,41 @@ u3g_test_autoinst(void *arg, struct usb_device *udev,
id = iface->idesc;
if (id == NULL || id->bInterfaceClass != UICLASS_MASS)
return;
- if (usbd_lookup_id_by_uaa(u3g_devs, sizeof(u3g_devs), uaa)) {
- /* no device match */
- return;
+ if (usbd_lookup_id_by_uaa(u3g_devs, sizeof(u3g_devs), uaa))
+ return; /* no device match */
+
+ switch (USB_GET_DRIVER_INFO(uaa)) {
+ case U3GINIT_HUAWEI:
+ error = u3g_huawei_init(udev);
+ break;
+ case U3GINIT_SCSIEJECT:
+ error = usb_msc_eject(udev, 0, MSC_EJECT_STOPUNIT);
+ break;
+ case U3GINIT_REZERO:
+ error = usb_msc_eject(udev, 0, MSC_EJECT_REZERO);
+ break;
+ case U3GINIT_ZTESTOR:
+ error = usb_msc_eject(udev, 0, MSC_EJECT_ZTESTOR);
+ break;
+ case U3GINIT_CMOTECH:
+ error = usb_msc_eject(udev, 0, MSC_EJECT_CMOTECH);
+ break;
+ case U3GINIT_SIERRA:
+ error = u3g_sierra_init(udev);
+ break;
+ case U3GINIT_WAIT:
+ /* Just pretend we ejected, the card will timeout */
+ error = 0;
+ break;
+ default:
+ /* no 3G eject quirks */
+ error = EOPNOTSUPP;
+ break;
}
- flags = USB_GET_DRIVER_INFO(uaa);
-
- if (flags & U3GFL_HUAWEI_INIT) {
- u3g_huawei_init(udev);
- } else if (flags & U3GFL_SCSI_EJECT) {
- if (usb_test_autoinstall(udev, 0, 1) != 0)
- return;
- } else if (flags & U3GFL_SIERRA_INIT) {
- u3g_sierra_init(udev);
- } else {
- /* no quirks */
- return;
+ if (error == 0) {
+ /* success, mark the udev as disappearing */
+ uaa->dev_state = UAA_DEV_EJECTING;
}
- uaa->dev_state = UAA_DEV_EJECTING;
- return; /* success */
}
static int
@@ -701,15 +722,14 @@ u3g_attach(device_t dev)
struct usb_interface *iface;
struct usb_interface_descriptor *id;
uint32_t iface_valid;
- int error, flags, nports;
+ int error, type, nports;
int ep, n;
uint8_t i;
DPRINTF("sc=%p\n", sc);
- flags = USB_GET_DRIVER_INFO(uaa);
-
- if (flags & U3GFL_SAEL_M460_INIT)
+ type = USB_GET_DRIVER_INFO(uaa);
+ if (type == U3GINIT_SAEL_M460)
u3g_sael_m460_init(uaa->device);
/* copy in USB config */
@@ -781,8 +801,8 @@ u3g_attach(device_t dev)
DPRINTF("ucom_attach failed\n");
goto detach;
}
- if (sc->sc_numports > 1)
- device_printf(dev, "Found %u ports.\n", sc->sc_numports);
+ device_printf(dev, "Found %u port%s.\n", sc->sc_numports,
+ sc->sc_numports > 1 ? "s":"");
return (0);
detach:
diff --git a/sys/dev/usb/serial/uch341.c b/sys/dev/usb/serial/uch341.c
deleted file mode 100644
index 8f77ce2..0000000
--- a/sys/dev/usb/serial/uch341.c
+++ /dev/null
@@ -1,530 +0,0 @@
-/* $FreeBSD$ */
-/*-
- * Copyright (c) 2007 Frank A Kingswood. All rights reserved.
- * Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/*
- * The ChipHead 341 programming details were taken from the ch341.c
- * driver written by Frank A Kingswood.
- */
-
-#include <sys/stdint.h>
-#include <sys/stddef.h>
-#include <sys/param.h>
-#include <sys/queue.h>
-#include <sys/types.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/linker_set.h>
-#include <sys/module.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/condvar.h>
-#include <sys/sysctl.h>
-#include <sys/sx.h>
-#include <sys/unistd.h>
-#include <sys/callout.h>
-#include <sys/malloc.h>
-#include <sys/priv.h>
-
-#include <dev/usb/usb.h>
-#include <dev/usb/usbdi.h>
-#include <dev/usb/usbdi_util.h>
-
-#define USB_DEBUG_VAR uch341_debug
-#include <dev/usb/usb_debug.h>
-#include <dev/usb/usb_process.h>
-
-#include <dev/usb/serial/usb_serial.h>
-
-#if USB_DEBUG
-static int uch341_debug = 0;
-
-SYSCTL_NODE(_hw_usb, OID_AUTO, uch341, CTLFLAG_RW, 0, "USB CH341");
-SYSCTL_INT(_hw_usb_uch341, OID_AUTO, debug, CTLFLAG_RW,
- &uch341_debug, 0, "Debug level");
-#endif
-
-#define UCH341_CONFIG_INDEX 0
-#define UCH341_IFACE_INDEX 0
-#define UCH341_BUFSIZE 1024
-
-enum {
- UCH341_BULK_DT_WR,
- UCH341_BULK_DT_RD,
- UCH341_N_TRANSFER,
-};
-
-struct uch341_softc {
- struct ucom_super_softc sc_super_ucom;
- struct ucom_softc sc_ucom;
-
- struct usb_device *sc_udev;
- struct usb_xfer *sc_xfer[UCH341_N_TRANSFER];
- device_t sc_dev;
- struct mtx sc_mtx;
-
- uint8_t sc_dtr;
- uint8_t sc_rts;
- uint8_t sc_iface_index;
- uint8_t sc_hdrlen;
- uint8_t sc_msr;
- uint8_t sc_lsr;
-
- uint8_t sc_name[16];
-};
-
-/* prototypes */
-
-static device_probe_t uch341_probe;
-static device_attach_t uch341_attach;
-static device_detach_t uch341_detach;
-
-static usb_callback_t uch341_write_callback;
-static usb_callback_t uch341_read_callback;
-
-static void uch341_cfg_open(struct ucom_softc *);
-static void uch341_cfg_set_dtr(struct ucom_softc *, uint8_t);
-static void uch341_cfg_set_rts(struct ucom_softc *, uint8_t);
-static void uch341_cfg_set_break(struct ucom_softc *, uint8_t);
-static int uch341_pre_param(struct ucom_softc *, struct termios *);
-static void uch341_cfg_param(struct ucom_softc *, struct termios *);
-static void uch341_cfg_get_status(struct ucom_softc *, uint8_t *,
- uint8_t *);
-static void uch341_start_read(struct ucom_softc *);
-static void uch341_stop_read(struct ucom_softc *);
-static void uch341_start_write(struct ucom_softc *);
-static void uch341_stop_write(struct ucom_softc *);
-static void uch341_poll(struct ucom_softc *ucom);
-
-static const struct usb_config uch341_config[UCH341_N_TRANSFER] = {
-
- [UCH341_BULK_DT_WR] = {
- .type = UE_BULK,
- .endpoint = UE_ADDR_ANY,
- .direction = UE_DIR_OUT,
- .bufsize = UCH341_BUFSIZE,
- .flags = {.pipe_bof = 1,.force_short_xfer = 1,},
- .callback = &uch341_write_callback,
- },
-
- [UCH341_BULK_DT_RD] = {
- .type = UE_BULK,
- .endpoint = UE_ADDR_ANY,
- .direction = UE_DIR_IN,
- .bufsize = UCH341_BUFSIZE,
- .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
- .callback = &uch341_read_callback,
- },
-};
-
-static const struct ucom_callback uch341_callback = {
- .ucom_cfg_get_status = &uch341_cfg_get_status,
- .ucom_cfg_set_dtr = &uch341_cfg_set_dtr,
- .ucom_cfg_set_rts = &uch341_cfg_set_rts,
- .ucom_cfg_set_break = &uch341_cfg_set_break,
- .ucom_cfg_param = &uch341_cfg_param,
- .ucom_cfg_open = &uch341_cfg_open,
- .ucom_pre_param = &uch341_pre_param,
- .ucom_start_read = &uch341_start_read,
- .ucom_stop_read = &uch341_stop_read,
- .ucom_start_write = &uch341_start_write,
- .ucom_stop_write = &uch341_stop_write,
- .ucom_poll = &uch341_poll,
-};
-
-static device_method_t uch341_methods[] = {
- /* Device interface */
- DEVMETHOD(device_probe, uch341_probe),
- DEVMETHOD(device_attach, uch341_attach),
- DEVMETHOD(device_detach, uch341_detach),
-
- {0, 0}
-};
-
-static devclass_t uch341_devclass;
-
-static driver_t uch341_driver = {
- .name = "uch341",
- .methods = uch341_methods,
- .size = sizeof(struct uch341_softc),
-};
-
-DRIVER_MODULE(uch341, uhub, uch341_driver, uch341_devclass, NULL, 0);
-MODULE_DEPEND(uch341, ucom, 1, 1, 1);
-MODULE_DEPEND(uch341, usb, 1, 1, 1);
-
-static struct usb_device_id uch341_devs[] = {
- {USB_VPI(0x4348, 0x5523, 0)},
- {USB_VPI(0x1a86, 0x7523, 0)},
-};
-
-static int
-uch341_probe(device_t dev)
-{
- struct usb_attach_arg *uaa = device_get_ivars(dev);
-
- if (uaa->usb_mode != USB_MODE_HOST) {
- return (ENXIO);
- }
- if (uaa->info.bConfigIndex != UCH341_CONFIG_INDEX) {
- return (ENXIO);
- }
- /* attach to all present interfaces */
-
- return (usbd_lookup_id_by_uaa(uch341_devs, sizeof(uch341_devs), uaa));
-}
-
-static int
-uch341_attach(device_t dev)
-{
- struct usb_attach_arg *uaa = device_get_ivars(dev);
- struct uch341_softc *sc = device_get_softc(dev);
- int error;
-
- sc->sc_udev = uaa->device;
- sc->sc_dev = dev;
-
- device_set_usb_desc(dev);
- mtx_init(&sc->sc_mtx, "uch341", NULL, MTX_DEF);
-
- snprintf(sc->sc_name, sizeof(sc->sc_name),
- "%s", device_get_nameunit(dev));
-
- DPRINTF("\n");
-
- sc->sc_iface_index = uaa->info.bIfaceIndex;
-
- error = usbd_transfer_setup(uaa->device,
- &sc->sc_iface_index, sc->sc_xfer, uch341_config,
- UCH341_N_TRANSFER, sc, &sc->sc_mtx);
-
- if (error) {
- device_printf(dev, "allocating USB "
- "transfers failed!\n");
- goto detach;
- }
-
- /* clear stall at first run */
- mtx_lock(&sc->sc_mtx);
- usbd_xfer_set_stall(sc->sc_xfer[UCH341_BULK_DT_WR]);
- usbd_xfer_set_stall(sc->sc_xfer[UCH341_BULK_DT_RD]);
- mtx_unlock(&sc->sc_mtx);
-
- error = ucom_attach(&sc->sc_super_ucom, &sc->sc_ucom, 1, sc,
- &uch341_callback, &sc->sc_mtx);
- if (error) {
- goto detach;
- }
- return (0); /* success */
-
-detach:
- uch341_detach(dev);
- return (ENXIO);
-}
-
-static int
-uch341_detach(device_t dev)
-{
- struct uch341_softc *sc = device_get_softc(dev);
-
- ucom_detach(&sc->sc_super_ucom, &sc->sc_ucom, 1);
- usbd_transfer_unsetup(sc->sc_xfer, UCH341_N_TRANSFER);
- mtx_destroy(&sc->sc_mtx);
-
- return (0);
-}
-
-static void
-uch341_cfg_open(struct ucom_softc *ucom)
-{
-}
-
-static void
-uch341_write_callback(struct usb_xfer *xfer, usb_error_t error)
-{
- struct uch341_softc *sc = usbd_xfer_softc(xfer);
- struct usb_page_cache *pc;
- uint32_t actlen;
-
- switch (USB_GET_STATE(xfer)) {
- case USB_ST_SETUP:
- case USB_ST_TRANSFERRED:
-tr_setup:
- pc = usbd_xfer_get_frame(xfer, 0);
- if (ucom_get_data(&sc->sc_ucom, pc,
- 0, usbd_xfer_max_len(xfer), &actlen)) {
-
- usbd_xfer_set_frame_len(xfer, 0, actlen);
- usbd_transfer_submit(xfer);
- }
- return;
-
- default: /* Error */
- if (error != USB_ERR_CANCELLED) {
- /* try to clear stall first */
- usbd_xfer_set_stall(xfer);
- goto tr_setup;
- }
- return;
- }
-}
-
-static void
-uch341_read_callback(struct usb_xfer *xfer, usb_error_t error)
-{
- struct uch341_softc *sc = usbd_xfer_softc(xfer);
- struct usb_page_cache *pc;
- int actlen;
-
- usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
-
- switch (USB_GET_STATE(xfer)) {
- case USB_ST_TRANSFERRED:
-
- if (actlen > 0) {
- pc = usbd_xfer_get_frame(xfer, 0);
- ucom_put_data(&sc->sc_ucom, pc, 0, actlen);
- }
- case USB_ST_SETUP:
-tr_setup:
- usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
- usbd_transfer_submit(xfer);
- return;
-
- default: /* Error */
- if (error != USB_ERR_CANCELLED) {
- /* try to clear stall first */
- usbd_xfer_set_stall(xfer);
- goto tr_setup;
- }
- return;
- }
-}
-
-static void
-uch341_control_out(struct uch341_softc *sc, uint8_t bRequest,
- uint16_t wValue, uint16_t wIndex)
-{
- struct usb_device_request req;
-
- req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
- req.bRequest = bRequest;
- USETW(req.wValue, wValue);
- USETW(req.wIndex, wIndex);
- USETW(req.wLength, 0);
- ucom_cfg_do_request(sc->sc_udev, &sc->sc_ucom,
- &req, NULL, 0, 1000);
-}
-
-static void
-uch341_control_in(struct uch341_softc *sc, uint8_t bRequest,
- uint16_t wValue, uint16_t wIndex, void *buf, uint16_t wLength)
-{
- struct usb_device_request req;
-
- req.bmRequestType = UT_READ_VENDOR_DEVICE;
- req.bRequest = bRequest;
- USETW(req.wValue, wValue);
- USETW(req.wIndex, wIndex);
- USETW(req.wLength, wLength);
- ucom_cfg_do_request(sc->sc_udev, &sc->sc_ucom,
- &req, buf, USB_SHORT_XFER_OK, 1000);
-}
-
-static void
-uch341_cfg_set_rts_dtr(struct uch341_softc *sc)
-{
- uch341_control_out(sc, 0xa4, ~((sc->sc_dtr ? (1<<5) : 0) |
- (sc->sc_rts? (1<<6) : 0)), 0);
-}
-
-static void
-uch341_cfg_set_dtr(struct ucom_softc *ucom, uint8_t onoff)
-{
- struct uch341_softc *sc = ucom->sc_parent;
-
- sc->sc_dtr = onoff;
-
- uch341_cfg_set_rts_dtr(sc);
-}
-
-static void
-uch341_cfg_set_rts(struct ucom_softc *ucom, uint8_t onoff)
-{
- struct uch341_softc *sc = ucom->sc_parent;
-
- sc->sc_rts = onoff;
-
- uch341_cfg_set_rts_dtr(sc);
-}
-
-static void
-uch341_cfg_set_break(struct ucom_softc *ucom, uint8_t onoff)
-{
- /* TODO */
-}
-
-static int
-uch341_pre_param(struct ucom_softc *ucom, struct termios *t)
-{
- DPRINTF("\n");
-
- switch (t->c_ospeed) {
- case 2400:
- case 4800:
- case 9600:
- case 19200:
- case 38400:
- case 115200:
- return (0);
- default:
- return (EINVAL);
- }
-}
-
-static void
-uch341_set_baudrate(struct uch341_softc *sc, uint32_t rate)
-{
- uint16_t a;
- uint16_t b;
-
- DPRINTF("Baud = %d\n", rate);
-
- switch (rate) {
- case 2400:
- a = 0xd901;
- b = 0x0038;
- break;
- case 4800:
- a = 0x6402;
- b = 0x001f;
- break;
- case 9600:
- a = 0xb202;
- b = 0x0013;
- break;
- case 19200:
- a = 0xd902;
- b = 0x000d;
- break;
- case 38400:
- a = 0x6403;
- b = 0x000a;
- break;
- case 115200:
- a = 0xcc03;
- b = 0x0008;
- break;
- default:
- /* should not happen */
- a = 0;
- b = 0;
- break;
- }
-
- uch341_control_out(sc, 0x9a, 0x1312, a);
- uch341_control_out(sc, 0x9a, 0x0f2c, b);
-}
-
-static void
-uch341_get_status(struct uch341_softc *sc)
-{
- uint8_t buf[8];
- uch341_control_in(sc, 0x95, 0x0706, 0, buf, sizeof(buf));
-}
-
-static void
-uch341_cfg_param(struct ucom_softc *ucom, struct termios *t)
-{
- struct uch341_softc *sc = ucom->sc_parent;
-
- uint8_t buf[8];
-
- DPRINTF("\n");
-
- uch341_control_in(sc, 0x5f, 0, 0, buf, sizeof(buf));
- uch341_control_out(sc, 0xa1, 0, 0);
- uch341_set_baudrate(sc, t->c_ospeed);
- uch341_control_in(sc, 0x95, 0x2518, 0, buf, sizeof(buf));
- uch341_control_out(sc, 0x9a, 0x2518, 0x0050);
- uch341_get_status(sc);
- uch341_control_out(sc, 0xa1, 0x501f, 0xd90a);
- uch341_set_baudrate(sc, t->c_ospeed);
- uch341_cfg_set_rts_dtr(sc);
- uch341_get_status(sc);
-}
-
-static void
-uch341_cfg_get_status(struct ucom_softc *ucom, uint8_t *lsr, uint8_t *msr)
-{
- struct uch341_softc *sc = ucom->sc_parent;
-
- DPRINTF("msr=0x%02x lsr=0x%02x\n",
- sc->sc_msr, sc->sc_lsr);
-
- *msr = sc->sc_msr;
- *lsr = sc->sc_lsr;
-}
-
-static void
-uch341_start_read(struct ucom_softc *ucom)
-{
- struct uch341_softc *sc = ucom->sc_parent;
-
- usbd_transfer_start(sc->sc_xfer[UCH341_BULK_DT_RD]);
-}
-
-static void
-uch341_stop_read(struct ucom_softc *ucom)
-{
- struct uch341_softc *sc = ucom->sc_parent;
-
- usbd_transfer_stop(sc->sc_xfer[UCH341_BULK_DT_RD]);
-}
-
-static void
-uch341_start_write(struct ucom_softc *ucom)
-{
- struct uch341_softc *sc = ucom->sc_parent;
-
- usbd_transfer_start(sc->sc_xfer[UCH341_BULK_DT_WR]);
-}
-
-static void
-uch341_stop_write(struct ucom_softc *ucom)
-{
- struct uch341_softc *sc = ucom->sc_parent;
-
- usbd_transfer_stop(sc->sc_xfer[UCH341_BULK_DT_WR]);
-}
-
-static void
-uch341_poll(struct ucom_softc *ucom)
-{
- struct uch341_softc *sc = ucom->sc_parent;
- usbd_transfer_poll(sc->sc_xfer, UCH341_N_TRANSFER);
-}
diff --git a/sys/dev/usb/storage/umass.c b/sys/dev/usb/storage/umass.c
index 0b6ceff..4e57d82 100644
--- a/sys/dev/usb/storage/umass.c
+++ b/sys/dev/usb/storage/umass.c
@@ -3036,7 +3036,7 @@ umass_atapi_transform(struct umass_softc *sc, uint8_t *cmd_ptr,
case 0xad: /* READ_DVD_STRUCTURE */
case 0xbb: /* SET_CD_SPEED */
case 0xe5: /* READ_TRACK_INFO_PHILIPS */
- break;;
+ break;
case READ_12:
case WRITE_12:
@@ -3044,7 +3044,7 @@ umass_atapi_transform(struct umass_softc *sc, uint8_t *cmd_ptr,
DPRINTF(sc, UDMASS_SCSI, "Unsupported ATAPI "
"command 0x%02x - trying anyway\n",
cmd_ptr[0]);
- break;;
+ break;
}
bcopy(cmd_ptr, sc->sc_transfer.cmd_data, cmd_len);
diff --git a/sys/dev/usb/usb_device.c b/sys/dev/usb/usb_device.c
index 7fdb7e4..5aef59d 100644
--- a/sys/dev/usb/usb_device.c
+++ b/sys/dev/usb/usb_device.c
@@ -1691,8 +1691,7 @@ usb_alloc_device(device_t parent_dev, struct usb_bus *bus,
udev->ddesc.iSerialNumber) {
/* read out the language ID string */
err = usbd_req_get_string_desc(udev, NULL,
- (char *)scratch_ptr, 4, scratch_size,
- USB_LANGUAGE_TABLE);
+ (char *)scratch_ptr, 4, 0, USB_LANGUAGE_TABLE);
} else {
err = USB_ERR_INVAL;
}
@@ -1806,7 +1805,7 @@ repeat_set_config:
* Try to figure out if we have an
* auto-install disk there:
*/
- if (usb_test_autoinstall(udev, 0, 0) == 0) {
+ if (usb_iface_is_cdrom(udev, 0)) {
DPRINTFN(0, "Found possible auto-install "
"disk (trying next config)\n");
config_index++;
diff --git a/sys/dev/usb/usb_msctest.c b/sys/dev/usb/usb_msctest.c
index 61df5f1..4325d79 100644
--- a/sys/dev/usb/usb_msctest.c
+++ b/sys/dev/usb/usb_msctest.c
@@ -67,8 +67,7 @@
#include <dev/usb/usb_device.h>
#include <dev/usb/usb_request.h>
#include <dev/usb/usb_util.h>
-
-#include <dev/usb/usb.h>
+#include <dev/usb/quirk/usb_quirk.h>
enum {
ST_COMMAND,
@@ -86,7 +85,18 @@ enum {
DIR_NONE,
};
+#define SCSI_INQ_LEN 0x24
+static uint8_t scsi_test_unit_ready[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
+static uint8_t scsi_inquiry[] = { 0x12, 0x00, 0x00, 0x00, SCSI_INQ_LEN, 0x00 };
+static uint8_t scsi_rezero_init[] = { 0x01, 0x00, 0x00, 0x00, 0x00, 0x00 };
+static uint8_t scsi_start_stop_unit[] = { 0x1b, 0x00, 0x00, 0x00, 0x02, 0x00 };
+static uint8_t scsi_ztestor_eject[] = { 0x85, 0x01, 0x01, 0x01, 0x18, 0x01,
+ 0x01, 0x01, 0x01, 0x01, 0x00, 0x00 };
+static uint8_t scsi_cmotech_eject[] = { 0xff, 0x52, 0x44, 0x45, 0x56, 0x43,
+ 0x48, 0x47 };
+
#define BULK_SIZE 64 /* dummy */
+#define ERR_CSW_FAILED -1
/* Command Block Wrapper */
struct bbb_cbw {
@@ -134,8 +144,8 @@ struct bbb_transfer {
uint8_t dir;
uint8_t lun;
uint8_t state;
- uint8_t error;
uint8_t status_try;
+ int error;
uint8_t buffer[256];
};
@@ -147,6 +157,15 @@ static usb_callback_t bbb_data_write_callback;
static usb_callback_t bbb_data_wr_cs_callback;
static usb_callback_t bbb_status_callback;
+static void bbb_done(struct bbb_transfer *, int);
+static void bbb_transfer_start(struct bbb_transfer *, uint8_t);
+static void bbb_data_clear_stall_callback(struct usb_xfer *, uint8_t,
+ uint8_t);
+static uint8_t bbb_command_start(struct bbb_transfer *, uint8_t, uint8_t,
+ void *, size_t, void *, size_t, usb_timeout_t);
+static struct bbb_transfer *bbb_attach(struct usb_device *, uint8_t);
+static void bbb_detach(struct bbb_transfer *);
+
static const struct usb_config bbb_config[ST_MAX] = {
[ST_COMMAND] = {
@@ -208,25 +227,9 @@ static const struct usb_config bbb_config[ST_MAX] = {
};
static void
-bbb_done(struct bbb_transfer *sc, uint8_t error)
+bbb_done(struct bbb_transfer *sc, int error)
{
- struct usb_xfer *xfer;
-
- xfer = sc->xfer[sc->state];
- /* verify the error code */
-
- if (error) {
- switch (USB_GET_STATE(xfer)) {
- case USB_ST_SETUP:
- case USB_ST_TRANSFERRED:
- error = 1;
- break;
- default:
- error = 2;
- break;
- }
- }
sc->error = error;
sc->state = ST_COMMAND;
sc->status_try = 1;
@@ -253,7 +256,7 @@ bbb_data_clear_stall_callback(struct usb_xfer *xfer,
bbb_transfer_start(sc, next_xfer);
break;
default:
- bbb_done(sc, 1);
+ bbb_done(sc, USB_ERR_STALLED);
break;
}
}
@@ -291,7 +294,7 @@ bbb_command_callback(struct usb_xfer *xfer, usb_error_t error)
break;
default: /* Error */
- bbb_done(sc, 1);
+ bbb_done(sc, error);
break;
}
}
@@ -333,7 +336,7 @@ bbb_data_read_callback(struct usb_xfer *xfer, usb_error_t error)
default: /* Error */
if (error == USB_ERR_CANCELLED) {
- bbb_done(sc, 1);
+ bbb_done(sc, error);
} else {
bbb_transfer_start(sc, ST_DATA_RD_CS);
}
@@ -385,7 +388,7 @@ bbb_data_write_callback(struct usb_xfer *xfer, usb_error_t error)
default: /* Error */
if (error == USB_ERR_CANCELLED) {
- bbb_done(sc, 1);
+ bbb_done(sc, error);
} else {
bbb_transfer_start(sc, ST_DATA_WR_CS);
}
@@ -415,11 +418,11 @@ bbb_status_callback(struct usb_xfer *xfer, usb_error_t error)
/* very simple status check */
if (actlen < sizeof(sc->csw)) {
- bbb_done(sc, 1);/* error */
+ bbb_done(sc, USB_ERR_SHORT_XFER);
} else if (sc->csw.bCSWStatus == CSWSTATUS_GOOD) {
- bbb_done(sc, 0);/* success */
+ bbb_done(sc, 0); /* success */
} else {
- bbb_done(sc, 1);/* error */
+ bbb_done(sc, ERR_CSW_FAILED); /* error */
}
break;
@@ -429,11 +432,11 @@ bbb_status_callback(struct usb_xfer *xfer, usb_error_t error)
break;
default:
- DPRINTFN(0, "Failed to read CSW: %s, try %d\n",
+ DPRINTF("Failed to read CSW: %s, try %d\n",
usbd_errstr(error), sc->status_try);
if (error == USB_ERR_CANCELLED || sc->status_try) {
- bbb_done(sc, 1);
+ bbb_done(sc, error);
} else {
sc->status_try = 1;
bbb_transfer_start(sc, ST_DATA_RD_CS);
@@ -451,7 +454,7 @@ bbb_status_callback(struct usb_xfer *xfer, usb_error_t error)
*------------------------------------------------------------------------*/
static uint8_t
bbb_command_start(struct bbb_transfer *sc, uint8_t dir, uint8_t lun,
- void *data_ptr, usb_size_t data_len, uint8_t cmd_len,
+ void *data_ptr, size_t data_len, void *cmd_ptr, size_t cmd_len,
usb_timeout_t data_timeout)
{
sc->lun = lun;
@@ -461,54 +464,46 @@ bbb_command_start(struct bbb_transfer *sc, uint8_t dir, uint8_t lun,
sc->data_rem = data_len;
sc->data_timeout = (data_timeout + USB_MS_HZ);
sc->actlen = 0;
+ sc->data_ptr = data_ptr;
sc->cmd_len = cmd_len;
+ bzero(&sc->cbw.CBWCDB, sizeof(sc->cbw.CBWCDB));
+ bcopy(cmd_ptr, &sc->cbw.CBWCDB, cmd_len);
+ DPRINTFN(1, "SCSI cmd = %*D\n", (int)cmd_len, &sc->cbw.CBWCDB, ":");
+ mtx_lock(&sc->mtx);
usbd_transfer_start(sc->xfer[sc->state]);
while (usbd_transfer_pending(sc->xfer[sc->state])) {
cv_wait(&sc->cv, &sc->mtx);
}
+ mtx_unlock(&sc->mtx);
return (sc->error);
}
-/*------------------------------------------------------------------------*
- * usb_test_autoinstall
- *
- * Return values:
- * 0: This interface is an auto install disk (CD-ROM)
- * Else: Not an auto install disk.
- *------------------------------------------------------------------------*/
-usb_error_t
-usb_test_autoinstall(struct usb_device *udev, uint8_t iface_index,
- uint8_t do_eject)
+static struct bbb_transfer *
+bbb_attach(struct usb_device *udev, uint8_t iface_index)
{
struct usb_interface *iface;
struct usb_interface_descriptor *id;
- usb_error_t err;
- uint8_t timeout;
- uint8_t sid_type;
struct bbb_transfer *sc;
+ usb_error_t err;
- if (udev == NULL) {
- return (USB_ERR_INVAL);
- }
iface = usbd_get_iface(udev, iface_index);
- if (iface == NULL) {
- return (USB_ERR_INVAL);
- }
+ if (iface == NULL)
+ return (NULL);
+
id = iface->idesc;
- if (id == NULL) {
- return (USB_ERR_INVAL);
- }
- if (id->bInterfaceClass != UICLASS_MASS) {
- return (USB_ERR_INVAL);
- }
+ if (id == NULL || id->bInterfaceClass != UICLASS_MASS)
+ return (NULL);
+
switch (id->bInterfaceSubClass) {
case UISUBCLASS_SCSI:
case UISUBCLASS_UFI:
+ case UISUBCLASS_SFF8020I:
+ case UISUBCLASS_SFF8070I:
break;
default:
- return (USB_ERR_INVAL);
+ return (NULL);
}
switch (id->bInterfaceProtocol) {
@@ -516,75 +511,112 @@ usb_test_autoinstall(struct usb_device *udev, uint8_t iface_index,
case UIPROTO_MASS_BBB:
break;
default:
- return (USB_ERR_INVAL);
+ return (NULL);
}
sc = malloc(sizeof(*sc), M_USB, M_WAITOK | M_ZERO);
- if (sc == NULL) {
- return (USB_ERR_NOMEM);
- }
mtx_init(&sc->mtx, "USB autoinstall", NULL, MTX_DEF);
cv_init(&sc->cv, "WBBB");
- err = usbd_transfer_setup(udev,
- &iface_index, sc->xfer, bbb_config,
+ err = usbd_transfer_setup(udev, &iface_index, sc->xfer, bbb_config,
ST_MAX, sc, &sc->mtx);
-
if (err) {
- goto done;
+ bbb_detach(sc);
+ return (NULL);
}
- mtx_lock(&sc->mtx);
-
- timeout = 4; /* tries */
-
-repeat_inquiry:
-
- sc->cbw.CBWCDB[0] = 0x12; /* INQUIRY */
- sc->cbw.CBWCDB[1] = 0;
- sc->cbw.CBWCDB[2] = 0;
- sc->cbw.CBWCDB[3] = 0;
- sc->cbw.CBWCDB[4] = 0x24; /* length */
- sc->cbw.CBWCDB[5] = 0;
- err = bbb_command_start(sc, DIR_IN, 0,
- sc->buffer, 0x24, 6, USB_MS_HZ);
-
- if ((sc->actlen != 0) && (err == 0)) {
- sid_type = sc->buffer[0] & 0x1F;
- if (sid_type == 0x05) {
- /* CD-ROM */
- if (do_eject) {
- /* 0: opcode: SCSI START/STOP */
- sc->cbw.CBWCDB[0] = 0x1b;
- /* 1: byte2: Not immediate */
- sc->cbw.CBWCDB[1] = 0x00;
- /* 2..3: reserved */
- sc->cbw.CBWCDB[2] = 0x00;
- sc->cbw.CBWCDB[3] = 0x00;
- /* 4: Load/Eject command */
- sc->cbw.CBWCDB[4] = 0x02;
- /* 5: control */
- sc->cbw.CBWCDB[5] = 0x00;
- err = bbb_command_start(sc, DIR_OUT, 0,
- NULL, 0, 6, USB_MS_HZ);
-
- DPRINTFN(0, "Eject CD command "
- "status: %s\n", usbd_errstr(err));
- }
- err = 0;
- goto done;
- }
- } else if ((err != 2) && --timeout) {
- usb_pause_mtx(&sc->mtx, hz);
- goto repeat_inquiry;
- }
- err = USB_ERR_INVAL;
- goto done;
+ return (sc);
+}
-done:
- mtx_unlock(&sc->mtx);
+static void
+bbb_detach(struct bbb_transfer *sc)
+{
usbd_transfer_unsetup(sc->xfer, ST_MAX);
mtx_destroy(&sc->mtx);
cv_destroy(&sc->cv);
free(sc, M_USB);
- return (err);
+}
+
+/*------------------------------------------------------------------------*
+ * usb_iface_is_cdrom
+ *
+ * Return values:
+ * 1: This interface is an auto install disk (CD-ROM)
+ * 0: Not an auto install disk.
+ *------------------------------------------------------------------------*/
+int
+usb_iface_is_cdrom(struct usb_device *udev, uint8_t iface_index)
+{
+ struct bbb_transfer *sc;
+ usb_error_t err;
+ uint8_t timeout, is_cdrom;
+ uint8_t sid_type;
+
+ sc = bbb_attach(udev, iface_index);
+ if (sc == NULL)
+ return (0);
+
+ is_cdrom = 0;
+ timeout = 4; /* tries */
+ while (--timeout) {
+ err = bbb_command_start(sc, DIR_IN, 0, sc->buffer,
+ SCSI_INQ_LEN, &scsi_inquiry, sizeof(scsi_inquiry),
+ USB_MS_HZ);
+
+ if (err == 0 && sc->actlen > 0) {
+ sid_type = sc->buffer[0] & 0x1F;
+ if (sid_type == 0x05)
+ is_cdrom = 1;
+ break;
+ } else if (err != ERR_CSW_FAILED)
+ break; /* non retryable error */
+ usb_pause_mtx(NULL, hz);
+ }
+ bbb_detach(sc);
+ return (is_cdrom);
+}
+
+usb_error_t
+usb_msc_eject(struct usb_device *udev, uint8_t iface_index, int method)
+{
+ struct bbb_transfer *sc;
+ usb_error_t err;
+
+ sc = bbb_attach(udev, iface_index);
+ if (sc == NULL)
+ return (USB_ERR_INVAL);
+
+ err = 0;
+ switch (method) {
+ case MSC_EJECT_STOPUNIT:
+ err = bbb_command_start(sc, DIR_IN, 0, NULL, 0,
+ &scsi_test_unit_ready, sizeof(scsi_test_unit_ready),
+ USB_MS_HZ);
+ DPRINTF("Test unit ready status: %s\n", usbd_errstr(err));
+ err = bbb_command_start(sc, DIR_IN, 0, NULL, 0,
+ &scsi_start_stop_unit, sizeof(scsi_start_stop_unit),
+ USB_MS_HZ);
+ break;
+ case MSC_EJECT_REZERO:
+ err = bbb_command_start(sc, DIR_IN, 0, NULL, 0,
+ &scsi_rezero_init, sizeof(scsi_rezero_init),
+ USB_MS_HZ);
+ break;
+ case MSC_EJECT_ZTESTOR:
+ err = bbb_command_start(sc, DIR_IN, 0, NULL, 0,
+ &scsi_ztestor_eject, sizeof(scsi_ztestor_eject),
+ USB_MS_HZ);
+ break;
+ case MSC_EJECT_CMOTECH:
+ err = bbb_command_start(sc, DIR_IN, 0, NULL, 0,
+ &scsi_cmotech_eject, sizeof(scsi_cmotech_eject),
+ USB_MS_HZ);
+ break;
+ default:
+ printf("usb_msc_eject: unknown eject method (%d)\n", method);
+ break;
+ }
+ DPRINTF("Eject CD command status: %s\n", usbd_errstr(err));
+
+ bbb_detach(sc);
+ return (0);
}
diff --git a/sys/dev/usb/usb_msctest.h b/sys/dev/usb/usb_msctest.h
index 44fa20d..2310bba 100644
--- a/sys/dev/usb/usb_msctest.h
+++ b/sys/dev/usb/usb_msctest.h
@@ -27,7 +27,16 @@
#ifndef _USB_MSCTEST_H_
#define _USB_MSCTEST_H_
-usb_error_t usb_test_autoinstall(struct usb_device *udev,
- uint8_t iface_index, uint8_t do_eject);
+enum {
+ MSC_EJECT_STOPUNIT,
+ MSC_EJECT_REZERO,
+ MSC_EJECT_ZTESTOR,
+ MSC_EJECT_CMOTECH
+};
+
+int usb_iface_is_cdrom(struct usb_device *udev,
+ uint8_t iface_index);
+usb_error_t usb_msc_eject(struct usb_device *udev,
+ uint8_t iface_index, int method);
#endif /* _USB_MSCTEST_H_ */
diff --git a/sys/dev/usb/usbdevs b/sys/dev/usb/usbdevs
index b8c83f1..54a1b45 100644
--- a/sys/dev/usb/usbdevs
+++ b/sys/dev/usb/usbdevs
@@ -603,6 +603,7 @@ vendor SUPERTOP 0x14cd Super Top
vendor PLANEX3 0x14ea Planex Communications
vendor SILICONPORTALS 0x1527 Silicon Portals
vendor UBIQUAM 0x1529 UBIQUAM Co., Ltd.
+vendor JMICRON 0x152d JMicron
vendor UBLOX 0x1546 U-blox
vendor PNY 0x154b PNY
vendor OQO 0x1557 OQO
@@ -1671,6 +1672,9 @@ product JABLOTRON PC60B 0x0001 PC-60B
/* Jaton products */
product JATON EDA 0x5704 Ethernet
+/* JMicron products */
+product JMICRON JM20337 0x2338 USB to ATA/ATAPI Bridge
+
/* JVC products */
product JVC GR_DX95 0x000a GR-DX95
product JVC MP_PRX1 0x3008 MP-PRX1 Ethernet
@@ -2095,6 +2099,7 @@ product OPTION E7041 0x7041 3G modem
product OPTION E7061 0x7061 3G modem
product OPTION E7100 0x7100 3G modem
product OPTION GTM380 0x7201 3G modem
+product OPTION GE40X 0x7601 Globetrotter HSUPA
/* OQO */
product OQO WIFI01 0x0002 model 01 WiFi interface
diff --git a/sys/fs/procfs/procfs_status.c b/sys/fs/procfs/procfs_status.c
index 80d7392..7850504 100644
--- a/sys/fs/procfs/procfs_status.c
+++ b/sys/fs/procfs/procfs_status.c
@@ -82,7 +82,7 @@ procfs_doprocstatus(PFS_FILL_ARGS)
sid = sess->s_leader ? sess->s_leader->p_pid : 0;
/* comm pid ppid pgid sid tty ctty,sldr start ut st wmsg
- euid ruid rgid,egid,groups[1 .. NGROUPS]
+ euid ruid rgid,egid,groups[1 .. ngroups]
*/
pc = p->p_comm;
diff --git a/sys/fs/smbfs/smbfs_smb.c b/sys/fs/smbfs/smbfs_smb.c
index 7ee93f6..3a89a9c 100644
--- a/sys/fs/smbfs/smbfs_smb.c
+++ b/sys/fs/smbfs/smbfs_smb.c
@@ -139,116 +139,6 @@ smbfs_smb_lock(struct smbnode *np, int op, caddr_t id,
return smbfs_smb_lockandx(np, op, (uintptr_t)id, start, end, scred);
}
-static int
-smbfs_smb_qpathinfo(struct smbnode *np, struct smbfattr *fap,
- struct smb_cred *scred, short infolevel)
-{
- struct smb_share *ssp = np->n_mount->sm_share;
- struct smb_vc *vcp = SSTOVC(ssp);
- struct smb_t2rq *t2p;
- int error, svtz, timesok = 1;
- struct mbchain *mbp;
- struct mdchain *mdp;
- u_int16_t date, time, wattr;
- int64_t lint;
- u_int32_t size, dattr;
-
- error = smb_t2_alloc(SSTOCP(ssp), SMB_TRANS2_QUERY_PATH_INFORMATION,
- scred, &t2p);
- if (error)
- return error;
- mbp = &t2p->t2_tparam;
- mb_init(mbp);
- if (!infolevel) {
- if (SMB_DIALECT(vcp) < SMB_DIALECT_NTLM0_12)
- infolevel = SMB_QUERY_FILE_STANDARD;
- else
- infolevel = SMB_QUERY_FILE_BASIC_INFO;
- }
- mb_put_uint16le(mbp, infolevel);
- mb_put_uint32le(mbp, 0);
- /* mb_put_uint8(mbp, SMB_DT_ASCII); specs are wrong */
- error = smbfs_fullpath(mbp, vcp, np, NULL, 0);
- if (error) {
- smb_t2_done(t2p);
- return error;
- }
- t2p->t2_maxpcount = 2;
- t2p->t2_maxdcount = vcp->vc_txmax;
- error = smb_t2_request(t2p);
- if (error) {
- smb_t2_done(t2p);
- if (infolevel == SMB_QUERY_FILE_STANDARD || error != EINVAL)
- return error;
- return smbfs_smb_qpathinfo(np, fap, scred,
- SMB_QUERY_FILE_STANDARD);
- }
- mdp = &t2p->t2_rdata;
- svtz = vcp->vc_sopt.sv_tz;
- switch (infolevel) {
- case SMB_QUERY_FILE_STANDARD:
- timesok = 0;
- md_get_uint16le(mdp, NULL);
- md_get_uint16le(mdp, NULL); /* creation time */
- md_get_uint16le(mdp, &date);
- md_get_uint16le(mdp, &time); /* access time */
- if (date || time) {
- timesok++;
- smb_dos2unixtime(date, time, 0, svtz, &fap->fa_atime);
- }
- md_get_uint16le(mdp, &date);
- md_get_uint16le(mdp, &time); /* modify time */
- if (date || time) {
- timesok++;
- smb_dos2unixtime(date, time, 0, svtz, &fap->fa_mtime);
- }
- md_get_uint32le(mdp, &size);
- fap->fa_size = size;
- md_get_uint32(mdp, NULL); /* allocation size */
- md_get_uint16le(mdp, &wattr);
- fap->fa_attr = wattr;
- break;
- case SMB_QUERY_FILE_BASIC_INFO:
- timesok = 0;
- md_get_int64(mdp, NULL); /* creation time */
- md_get_int64le(mdp, &lint);
- if (lint) {
- timesok++;
- smb_time_NT2local(lint, svtz, &fap->fa_atime);
- }
- md_get_int64le(mdp, &lint);
- if (lint) {
- timesok++;
- smb_time_NT2local(lint, svtz, &fap->fa_mtime);
- }
- md_get_int64le(mdp, &lint);
- if (lint) {
- timesok++;
- smb_time_NT2local(lint, svtz, &fap->fa_ctime);
- }
- md_get_uint32le(mdp, &dattr);
- fap->fa_attr = dattr;
- md_get_uint32(mdp, NULL);
- /* XXX could use ALL_INFO to get size */
- break;
- default:
- SMBERROR("unexpected info level %d\n", infolevel);
- error = EINVAL;
- }
- smb_t2_done(t2p);
- /*
- * if all times are zero (observed with FAT on NT4SP6)
- * then fall back to older info level
- */
- if (!timesok) {
- if (infolevel != SMB_QUERY_FILE_STANDARD)
- return smbfs_smb_qpathinfo(np, fap, scred,
- SMB_QUERY_FILE_STANDARD);
- error = EINVAL;
- }
- return error;
-}
-
int
smbfs_smb_statfs2(struct smb_share *ssp, struct statfs *sbp,
struct smb_cred *scred)
diff --git a/sys/fs/tmpfs/tmpfs_vfsops.c b/sys/fs/tmpfs/tmpfs_vfsops.c
index f0ae6be..d18bccd 100644
--- a/sys/fs/tmpfs/tmpfs_vfsops.c
+++ b/sys/fs/tmpfs/tmpfs_vfsops.c
@@ -185,8 +185,8 @@ tmpfs_mount(struct mount *mp)
ino_t nodes;
int error;
/* Size counters. */
- ino_t nodes_max;
- size_t size_max;
+ ino_t nodes_max;
+ u_quad_t size_max;
/* Root node attributes. */
uid_t root_uid;
@@ -239,7 +239,7 @@ tmpfs_mount(struct mount *mp)
* allowed to use, based on the maximum size the user passed in
* the mount structure. A value of zero is treated as if the
* maximum available space was requested. */
- if (size_max < PAGE_SIZE || size_max >= SIZE_MAX)
+ if (size_max < PAGE_SIZE || size_max > (SIZE_MAX - PAGE_SIZE))
pages = SIZE_MAX;
else
pages = howmany(size_max, PAGE_SIZE);
diff --git a/sys/geom/geom_redboot.c b/sys/geom/geom_redboot.c
index e8f4ba8..3ece7c1 100644
--- a/sys/geom/geom_redboot.c
+++ b/sys/geom/geom_redboot.c
@@ -71,7 +71,6 @@ struct fis_image_desc {
struct g_redboot_softc {
uint32_t entry[REDBOOT_MAXSLICE];
uint32_t dsize[REDBOOT_MAXSLICE];
- uint32_t sectoff[REDBOOT_MAXSLICE];
uint8_t readonly[REDBOOT_MAXSLICE];
g_access_t *parent_access;
};
@@ -105,125 +104,29 @@ g_redboot_access(struct g_provider *pp, int dread, int dwrite, int dexcl)
return (sc->parent_access(pp, dread, dwrite, dexcl));
}
-static void
-g_redboot_done(struct bio *bp)
-{
- struct bio *bp2;
- struct g_provider *pp;
- struct g_consumer *cp;
- struct g_geom *gp;
- struct g_redboot_softc *sc;
- struct g_slicer *gsp;
- int idx;
-
- bp2 = bp->bio_parent;
- pp = bp2->bio_to;
- idx = pp->index;
- gp = pp->geom;
- gsp = gp->softc;
- sc = gsp->softc;
-
- bp2->bio_error = bp->bio_error;
- if (bp2->bio_error != 0)
- goto done;
-
- KASSERT(sc->sectoff[idx] + bp2->bio_length <= bp->bio_length,
- ("overflowed bio data"));
- if (bp2->bio_cmd == BIO_READ) {
- /* Copy out read data */
- memcpy(bp2->bio_data, bp->bio_data + sc->sectoff[idx],
- bp2->bio_length);
- bp2->bio_completed = bp2->bio_length;
- } else {
- if (bp->bio_cmd == BIO_READ) {
- /* Copy in and reissue as write */
- cp = LIST_FIRST(&gp->consumer);
- memcpy(bp->bio_data + sc->sectoff[idx], bp2->bio_data,
- bp2->bio_length);
- bp->bio_cmd = BIO_WRITE;
- g_io_request(bp, cp);
- return;
- } else {
- /* Write done */
- bp2->bio_completed = bp2->bio_length;
- }
- }
-done:
- /*
- * Finish processing the request.
- */
- free(bp->bio_data, M_GEOM);
- g_destroy_bio(bp);
- g_io_deliver(bp2, bp2->bio_error);
-}
-
static int
g_redboot_start(struct bio *bp)
{
- struct g_provider *pp, *pp2;
+ struct g_provider *pp;
struct g_geom *gp;
struct g_redboot_softc *sc;
struct g_slicer *gsp;
- struct g_slice *gsl;
- struct g_consumer *cp;
- struct bio *bp2;
- size_t bsize;
int idx;
pp = bp->bio_to;
idx = pp->index;
gp = pp->geom;
gsp = gp->softc;
- gsl = &gsp->slices[idx];
sc = gsp->softc;
- switch (bp->bio_cmd) {
- /*
- * Read/Write are handled in g_redboot_done() after reading
- * the sector
- */
- case BIO_READ:
- case BIO_WRITE:
- break;
- case BIO_GETATTR:
- if (g_handleattr_int(bp, REDBOOT_CLASS_NAME "::entry",
- sc->entry[idx]))
- return (1);
- if (g_handleattr_int(bp, REDBOOT_CLASS_NAME "::dsize",
- sc->dsize[idx]))
- return (1);
- if (g_handleattr_int(bp, REDBOOT_CLASS_NAME "::sectoff",
- sc->sectoff[idx]))
- return (1);
- return (0);
- default:
- return (EINVAL);
+ if (bp->bio_cmd == BIO_GETATTR) {
+ if (g_handleattr_int(bp, REDBOOT_CLASS_NAME "::entry",
+ sc->entry[idx]))
+ return (1);
+ if (g_handleattr_int(bp, REDBOOT_CLASS_NAME "::dsize",
+ sc->dsize[idx]))
+ return (1);
}
- cp = LIST_FIRST(&gp->consumer);
- pp2 = cp->provider;
- bsize = pp2->sectorsize;
-
- /*
- * At this point we have a request which is less than the flash sector
- * size, to do this we read the entire sector and then copy the data
- * in/out.
- */
- KASSERT(bp->bio_length < bsize, ("length greater than one sector"));
- KASSERT(bp->bio_offset == 0, ("not at start of sector"));
-
- bp2 = g_clone_bio(bp);
- if (bp2 == NULL)
- return (ENOMEM);
- bp2->bio_cmd = BIO_READ;
- bp2->bio_done = g_redboot_done;
- bp2->bio_offset = gsl->offset - sc->sectoff[idx];
- bp2->bio_length = bsize;
- bp2->bio_data = malloc(bsize, M_GEOM, M_NOWAIT);
- if (bp2->bio_data == NULL) {
- g_destroy_bio(bp2);
- return (ENOMEM);
- }
- g_io_request(bp2, cp);
return (0);
}
@@ -241,14 +144,11 @@ g_redboot_dumpconf(struct sbuf *sb, const char *indent, struct g_geom *gp,
if (indent == NULL) {
sbuf_printf(sb, " entry %d", sc->entry[pp->index]);
sbuf_printf(sb, " dsize %d", sc->dsize[pp->index]);
- sbuf_printf(sb, " sectoff %d", sc->sectoff[pp->index]);
} else {
sbuf_printf(sb, "%s<entry>%d</entry>\n", indent,
sc->entry[pp->index]);
sbuf_printf(sb, "%s<dsize>%d</dsize>\n", indent,
sc->dsize[pp->index]);
- sbuf_printf(sb, "%s<sectoff>%d</sectoff>\n", indent,
- sc->sectoff[pp->index]);
}
}
}
@@ -272,7 +172,7 @@ parse_fis_directory(u_char *buf, size_t bufsize, off_t offset, uint32_t offmask)
{
#define match(a,b) (bcmp(a, b, sizeof(b)-1) == 0)
struct fis_image_desc *fd, *efd;
- struct fis_image_desc *fisdir;
+ struct fis_image_desc *fisdir, *redbcfg;
struct fis_image_desc *head, **tail;
int i;
@@ -293,13 +193,15 @@ parse_fis_directory(u_char *buf, size_t bufsize, off_t offset, uint32_t offmask)
/*
* Scan forward collecting entries in a list.
*/
- fisdir = NULL;
+ fisdir = redbcfg = NULL;
*(tail = &head) = NULL;
for (i = 0; fd < efd; i++, fd++) {
if (fd->name[0] == 0xff)
continue;
if (match(fd->name, FISDIR_NAME))
fisdir = fd;
+ else if (match(fd->name, REDBCFG_NAME))
+ redbcfg = fd;
if (nameok(fd->name)) {
/*
* NB: flash address includes platform mapping;
@@ -318,6 +220,16 @@ parse_fis_directory(u_char *buf, size_t bufsize, off_t offset, uint32_t offmask)
(long) offset);
return (NULL);
}
+ if (redbcfg != NULL &&
+ fisdir->offset + fisdir->size == redbcfg->offset) {
+ /*
+ * Merged FIS/RedBoot config directory.
+ */
+ if (bootverbose)
+ printf("FIS/RedBoot merged at 0x%jx (not yet)\n",
+ offset + fisdir->offset);
+ /* XXX */
+ }
return head;
#undef match
}
@@ -340,8 +252,7 @@ g_redboot_taste(struct g_class *mp, struct g_provider *pp, int insist)
if (!strcmp(pp->geom->class->name, REDBOOT_CLASS_NAME))
return (NULL);
/* XXX only taste flash providers */
- if (strncmp(pp->name, "cfi", 3) &&
- strncmp(pp->name, "flash/spi", 9))
+ if (strncmp(pp->name, "cfi", 3))
return (NULL);
gp = g_slice_new(mp, REDBOOT_MAXSLICE, pp, &cp, &sc, sizeof(*sc),
g_redboot_start);
@@ -389,25 +300,8 @@ again:
for (fd = head, i = 0; fd != NULL; fd = fd->next) {
if (fd->name[0] == '\0')
continue;
- if (fd->size < sectorsize) {
- /*
- * If the FIS entry is smaller than the sector size
- * then set it as hot so g_slice calls us to fix it.
- * This will happen if Redboot is compiled with
- * CYGSEM_REDBOOT_FLASH_COMBINED_FIS_AND_CONFIG.
- */
- sc->sectoff[i] = fd->offset & (sectorsize - 1);
- error = g_slice_config(gp, i, G_SLICE_CONFIG_SET,
- fd->offset, fd->size, fd->size,
- "redboot/%s", fd->name);
- g_slice_conf_hot(gp, i, fd->offset, fd->size,
- G_SLICE_HOT_START, G_SLICE_HOT_DENY,
- G_SLICE_HOT_START);
- } else {
- error = g_slice_config(gp, i, G_SLICE_CONFIG_SET,
- fd->offset, fd->size, sectorsize, "redboot/%s",
- fd->name);
- }
+ error = g_slice_config(gp, i, G_SLICE_CONFIG_SET,
+ fd->offset, fd->size, sectorsize, "redboot/%s", fd->name);
if (error)
printf("%s: g_slice_config returns %d for \"%s\"\n",
__func__, error, fd->name);
diff --git a/sys/gnu/fs/xfs/FreeBSD/xfs_vnops.c b/sys/gnu/fs/xfs/FreeBSD/xfs_vnops.c
index 80c9518..20be557 100644
--- a/sys/gnu/fs/xfs/FreeBSD/xfs_vnops.c
+++ b/sys/gnu/fs/xfs/FreeBSD/xfs_vnops.c
@@ -1117,7 +1117,7 @@ _xfs_strategy(
} */ *ap)
{
daddr_t blkno;
- struct buf *bp;;
+ struct buf *bp;
struct bufobj *bo;
struct vnode *vp;
struct xfs_mount *xmp;
diff --git a/sys/i386/conf/GENERIC b/sys/i386/conf/GENERIC
index 6403634..51ada7f 100644
--- a/sys/i386/conf/GENERIC
+++ b/sys/i386/conf/GENERIC
@@ -75,6 +75,7 @@ options AUDIT # Security event auditing
options MAC # TrustedBSD MAC Framework
options FLOWTABLE # per-cpu routing cache
#options KDTRACE_HOOKS # Kernel DTrace hooks
+options INCLUDE_CONFIG_FILE # Include this file in kernel
# Debugging for use in -current
options KDB # Enable kernel debugger support.
diff --git a/sys/i386/conf/Makefile b/sys/i386/conf/Makefile
index 2c006e9..e04b0ab 100644
--- a/sys/i386/conf/Makefile
+++ b/sys/i386/conf/Makefile
@@ -1,3 +1,5 @@
# $FreeBSD$
+TARGET=i386
+
.include "${.CURDIR}/../../conf/makeLINT.mk"
diff --git a/sys/i386/conf/PAE b/sys/i386/conf/PAE
index 5e69a59..a8abf7a 100644
--- a/sys/i386/conf/PAE
+++ b/sys/i386/conf/PAE
@@ -10,10 +10,6 @@ ident PAE-GENERIC
# To make a PAE kernel, the next option is needed
options PAE # Physical Address Extensions Kernel
-# Compile acpi in statically since the module isn't built properly. Most
-# machines which support large amounts of memory require acpi.
-device acpi
-
# Don't build modules with this kernel config, since they are not built with
# the correct options headers.
makeoptions NO_MODULES=yes
diff --git a/sys/i386/i386/locore.s b/sys/i386/i386/locore.s
index 94ac670..eee9fdb 100644
--- a/sys/i386/i386/locore.s
+++ b/sys/i386/i386/locore.s
@@ -110,9 +110,7 @@ IdlePDPT: .long 0 /* phys addr of kernel PDPT */
KPTphys: .long 0 /* phys addr of kernel page tables */
.globl proc0kstack
-proc0uarea: .long 0 /* address of proc 0 uarea (unused)*/
proc0kstack: .long 0 /* address of proc 0 kstack space */
-p0upa: .long 0 /* phys addr of proc0 UAREA (unused) */
p0kpa: .long 0 /* phys addr of proc0's STACK */
vm86phystk: .long 0 /* PA of vm86/bios stack */
diff --git a/sys/i386/i386/pmap.c b/sys/i386/i386/pmap.c
index c32c8f5..794aa02 100644
--- a/sys/i386/i386/pmap.c
+++ b/sys/i386/i386/pmap.c
@@ -317,10 +317,10 @@ static int _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free);
static pt_entry_t *pmap_pte_quick(pmap_t pmap, vm_offset_t va);
static void pmap_pte_release(pt_entry_t *pte);
static int pmap_unuse_pt(pmap_t, vm_offset_t, vm_page_t *);
-static vm_offset_t pmap_kmem_choose(vm_offset_t addr);
#ifdef PAE
static void *pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait);
#endif
+static void pmap_set_pg(void);
CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t));
CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t));
@@ -333,24 +333,6 @@ CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t));
CTASSERT(KERNBASE % (1 << 24) == 0);
/*
- * Move the kernel virtual free pointer to the next
- * 4MB. This is used to help improve performance
- * by using a large (4MB) page for much of the kernel
- * (.text, .data, .bss)
- */
-static vm_offset_t
-pmap_kmem_choose(vm_offset_t addr)
-{
- vm_offset_t newaddr = addr;
-
-#ifndef DISABLE_PSE
- if (cpu_feature & CPUID_PSE)
- newaddr = (addr + PDRMASK) & ~PDRMASK;
-#endif
- return newaddr;
-}
-
-/*
* Bootstrap the system enough to run with virtual memory.
*
* On the i386 this is called after mapping has already been enabled
@@ -377,7 +359,6 @@ pmap_bootstrap(vm_paddr_t firstaddr)
* in this calculation.
*/
virtual_avail = (vm_offset_t) KERNBASE + firstaddr;
- virtual_avail = pmap_kmem_choose(virtual_avail);
virtual_end = VM_MAX_KERNEL_ADDRESS;
@@ -548,7 +529,7 @@ pmap_init_pat(void)
/*
* Set PG_G on kernel pages. Only the BSP calls this when SMP is turned on.
*/
-void
+static void
pmap_set_pg(void)
{
pd_entry_t pdir;
diff --git a/sys/i386/include/pmap.h b/sys/i386/include/pmap.h
index 54e8c20..c93ac34 100644
--- a/sys/i386/include/pmap.h
+++ b/sys/i386/include/pmap.h
@@ -480,7 +480,6 @@ boolean_t pmap_page_is_mapped(vm_page_t m);
void pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma);
void pmap_unmapdev(vm_offset_t, vm_size_t);
pt_entry_t *pmap_pte(pmap_t, vm_offset_t) __pure2;
-void pmap_set_pg(void);
void pmap_invalidate_page(pmap_t, vm_offset_t);
void pmap_invalidate_range(pmap_t, vm_offset_t, vm_offset_t);
void pmap_invalidate_all(pmap_t);
diff --git a/sys/i386/xen/locore.s b/sys/i386/xen/locore.s
index 95d2afa..59cdb547 100644
--- a/sys/i386/xen/locore.s
+++ b/sys/i386/xen/locore.s
@@ -152,9 +152,7 @@ KPTphys: .long 0 /* phys addr of kernel page tables */
gdtset: .long 0 /* GDT is valid */
.globl proc0kstack
-proc0uarea: .long 0 /* address of proc 0 uarea (unused)*/
proc0kstack: .long 0 /* address of proc 0 kstack space */
-p0upa: .long 0 /* phys addr of proc0 UAREA (unused) */
p0kpa: .long 0 /* phys addr of proc0's STACK */
vm86phystk: .long 0 /* PA of vm86/bios stack */
diff --git a/sys/i386/xen/pmap.c b/sys/i386/xen/pmap.c
index c5c3e66..8cd7f00 100644
--- a/sys/i386/xen/pmap.c
+++ b/sys/i386/xen/pmap.c
@@ -318,6 +318,9 @@ static __inline void pagezero(void *page);
#if defined(PAE) && !defined(XEN)
static void *pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait);
#endif
+#ifndef XEN
+static void pmap_set_pg(void);
+#endif
CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t));
CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t));
@@ -549,10 +552,11 @@ pmap_init_pat(void)
wrmsr(MSR_PAT, pat_msr);
}
+#ifndef XEN
/*
* Set PG_G on kernel pages. Only the BSP calls this when SMP is turned on.
*/
-void
+static void
pmap_set_pg(void)
{
pd_entry_t pdir;
@@ -587,6 +591,7 @@ pmap_set_pg(void)
}
}
}
+#endif
/*
* Initialize a vm_page's machine-dependent fields.
diff --git a/sys/i386/xen/xen_machdep.c b/sys/i386/xen/xen_machdep.c
index 2c5ba5b..4eccdfa 100644
--- a/sys/i386/xen/xen_machdep.c
+++ b/sys/i386/xen/xen_machdep.c
@@ -715,9 +715,6 @@ xen_destroy_contiguous_region(void *addr, int npages)
balloon_unlock(flags);
}
-extern unsigned long cpu0prvpage;
-extern unsigned long *SMPpt;
-extern struct user *proc0uarea;
extern vm_offset_t proc0kstack;
extern int vm86paddr, vm86phystk;
char *bootmem_start, *bootmem_current, *bootmem_end;
diff --git a/sys/ia64/conf/GENERIC b/sys/ia64/conf/GENERIC
index 59d1a85..d7b23a08 100644
--- a/sys/ia64/conf/GENERIC
+++ b/sys/ia64/conf/GENERIC
@@ -67,6 +67,7 @@ options WITNESS # Enable checks to detect deadlocks and cycles
options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed
options _KPOSIX_PRIORITY_SCHEDULING # Posix P1003_1B RT extensions
options HWPMC_HOOKS # Necessary kernel hooks for hwpmc(4)
+options INCLUDE_CONFIG_FILE # Include this file in kernel
# Various "busses"
device firewire # FireWire bus code
diff --git a/sys/ia64/conf/Makefile b/sys/ia64/conf/Makefile
index 2c006e9..122a7d0 100644
--- a/sys/ia64/conf/Makefile
+++ b/sys/ia64/conf/Makefile
@@ -1,3 +1,5 @@
# $FreeBSD$
+TARGET=ia64
+
.include "${.CURDIR}/../../conf/makeLINT.mk"
diff --git a/sys/isa/pnp.c b/sys/isa/pnp.c
index 6712f42..83ae10d 100644
--- a/sys/isa/pnp.c
+++ b/sys/isa/pnp.c
@@ -480,7 +480,7 @@ pnp_create_devices(device_t parent, pnp_id *p, int csn,
}
resinfo = resp;
resp += PNP_SRES_LEN(tag);
- scanning -= PNP_SRES_LEN(tag);;
+ scanning -= PNP_SRES_LEN(tag);
switch (PNP_SRES_NUM(tag)) {
case PNP_TAG_LOGICAL_DEVICE:
diff --git a/sys/kern/kern_clock.c b/sys/kern/kern_clock.c
index e95bc19..2844103 100644
--- a/sys/kern/kern_clock.c
+++ b/sys/kern/kern_clock.c
@@ -48,14 +48,16 @@ __FBSDID("$FreeBSD$");
#include <sys/callout.h>
#include <sys/kdb.h>
#include <sys/kernel.h>
-#include <sys/lock.h>
+#include <sys/kthread.h>
#include <sys/ktr.h>
+#include <sys/lock.h>
#include <sys/mutex.h>
#include <sys/proc.h>
#include <sys/resource.h>
#include <sys/resourcevar.h>
#include <sys/sched.h>
#include <sys/signalvar.h>
+#include <sys/sleepqueue.h>
#include <sys/smp.h>
#include <vm/vm.h>
#include <vm/pmap.h>
@@ -159,6 +161,124 @@ sysctl_kern_cp_times(SYSCTL_HANDLER_ARGS)
SYSCTL_PROC(_kern, OID_AUTO, cp_times, CTLTYPE_LONG|CTLFLAG_RD|CTLFLAG_MPSAFE,
0,0, sysctl_kern_cp_times, "LU", "per-CPU time statistics");
+#ifdef DEADLKRES
+static int slptime_threshold = 1800;
+static int blktime_threshold = 900;
+static int sleepfreq = 3;
+
+static void
+deadlkres(void)
+{
+ struct proc *p;
+ struct thread *td;
+ void *wchan;
+ int blkticks, slpticks, slptype, tryl, tticks;
+
+ tryl = 0;
+ for (;;) {
+ blkticks = blktime_threshold * hz;
+ slpticks = slptime_threshold * hz;
+
+ /*
+ * Avoid to sleep on the sx_lock in order to avoid a possible
+ * priority inversion problem leading to starvation.
+ * If the lock can't be held after 100 tries, panic.
+ */
+ if (!sx_try_slock(&allproc_lock)) {
+ if (tryl > 100)
+ panic("%s: possible deadlock detected on allproc_lock\n",
+ __func__);
+ tryl++;
+ pause("allproc_lock deadlkres", sleepfreq * hz);
+ continue;
+ }
+ tryl = 0;
+ FOREACH_PROC_IN_SYSTEM(p) {
+ PROC_LOCK(p);
+ FOREACH_THREAD_IN_PROC(p, td) {
+ thread_lock(td);
+ if (TD_ON_LOCK(td)) {
+
+ /*
+ * The thread should be blocked on a
+ * turnstile, simply check if the
+ * turnstile channel is in good state.
+ */
+ MPASS(td->td_blocked != NULL);
+ tticks = ticks - td->td_blktick;
+ thread_unlock(td);
+ if (tticks > blkticks) {
+
+ /*
+ * Accordingly with provided
+ * thresholds, this thread is
+ * stuck for too long on a
+ * turnstile.
+ */
+ PROC_UNLOCK(p);
+ sx_sunlock(&allproc_lock);
+ panic("%s: possible deadlock detected for %p, blocked for %d ticks\n",
+ __func__, td, tticks);
+ }
+ } else if (TD_IS_SLEEPING(td)) {
+
+ /*
+ * Check if the thread is sleeping on a
+ * lock, otherwise skip the check.
+ * Drop the thread lock in order to
+ * avoid a LOR with the sleepqueue
+ * spinlock.
+ */
+ wchan = td->td_wchan;
+ tticks = ticks - td->td_slptick;
+ thread_unlock(td);
+ slptype = sleepq_type(wchan);
+ if ((slptype == SLEEPQ_SX ||
+ slptype == SLEEPQ_LK) &&
+ tticks > slpticks) {
+
+ /*
+ * Accordingly with provided
+ * thresholds, this thread is
+ * stuck for too long on a
+ * sleepqueue.
+ */
+ PROC_UNLOCK(p);
+ sx_sunlock(&allproc_lock);
+ panic("%s: possible deadlock detected for %p, blocked for %d ticks\n",
+ __func__, td, tticks);
+ }
+ } else
+ thread_unlock(td);
+ }
+ PROC_UNLOCK(p);
+ }
+ sx_sunlock(&allproc_lock);
+
+ /* Sleep for sleepfreq seconds. */
+ pause("deadlkres", sleepfreq * hz);
+ }
+}
+
+static struct kthread_desc deadlkres_kd = {
+ "deadlkres",
+ deadlkres,
+ (struct thread **)NULL
+};
+
+SYSINIT(deadlkres, SI_SUB_CLOCKS, SI_ORDER_ANY, kthread_start, &deadlkres_kd);
+
+SYSCTL_NODE(_debug, OID_AUTO, deadlkres, CTLFLAG_RW, 0, "Deadlock resolver");
+SYSCTL_INT(_debug_deadlkres, OID_AUTO, slptime_threshold, CTLFLAG_RW,
+ &slptime_threshold, 0,
+ "Number of seconds within is valid to sleep on a sleepqueue");
+SYSCTL_INT(_debug_deadlkres, OID_AUTO, blktime_threshold, CTLFLAG_RW,
+ &blktime_threshold, 0,
+ "Number of seconds within is valid to block on a turnstile");
+SYSCTL_INT(_debug_deadlkres, OID_AUTO, sleepfreq, CTLFLAG_RW, &sleepfreq, 0,
+ "Number of seconds between any deadlock resolver thread run");
+#endif /* DEADLKRES */
+
void
read_cpu_time(long *cp_time)
{
diff --git a/sys/kern/kern_cpu.c b/sys/kern/kern_cpu.c
index 9f7f615..4c4f961 100644
--- a/sys/kern/kern_cpu.c
+++ b/sys/kern/kern_cpu.c
@@ -935,8 +935,10 @@ cpufreq_levels_sysctl(SYSCTL_HANDLER_ARGS)
/* Get settings from the device and generate the output string. */
count = CF_MAX_LEVELS;
levels = malloc(count * sizeof(*levels), M_TEMP, M_NOWAIT);
- if (levels == NULL)
+ if (levels == NULL) {
+ sbuf_delete(&sb);
return (ENOMEM);
+ }
error = CPUFREQ_LEVELS(sc->dev, levels, &count);
if (error) {
if (error == E2BIG)
@@ -974,8 +976,10 @@ cpufreq_settings_sysctl(SYSCTL_HANDLER_ARGS)
/* Get settings from the device and generate the output string. */
set_count = MAX_SETTINGS;
sets = malloc(set_count * sizeof(*sets), M_TEMP, M_NOWAIT);
- if (sets == NULL)
+ if (sets == NULL) {
+ sbuf_delete(&sb);
return (ENOMEM);
+ }
error = CPUFREQ_DRV_SETTINGS(dev, sets, &set_count);
if (error)
goto out;
diff --git a/sys/kern/kern_fail.c b/sys/kern/kern_fail.c
index 06dfc38..d7601a9 100644
--- a/sys/kern/kern_fail.c
+++ b/sys/kern/kern_fail.c
@@ -452,7 +452,7 @@ parse_term(struct fail_point_entries *ents, char *p)
} else if (*p == '*') {
if (!units || decimal)
return 0;
- ent->fe_count = units;;
+ ent->fe_count = units;
} else {
return 0;
@@ -497,7 +497,7 @@ parse_number(int *out_units, int *out_decimal, char *p)
/* whole part */
old_p = p;
- *out_units = strtol(p, &p, 10);;
+ *out_units = strtol(p, &p, 10);
if (p == old_p && *p != '.')
return 0;
diff --git a/sys/kern/kern_lock.c b/sys/kern/kern_lock.c
index 531c851..18bbf9a 100644
--- a/sys/kern/kern_lock.c
+++ b/sys/kern/kern_lock.c
@@ -277,6 +277,11 @@ wakeupshlk(struct lock *lk, const char *file, int line)
* avoid a starvation for the threads sleeping on the shared
* queue by giving them precedence and cleaning up the
* exclusive waiters bit anyway.
+ * Please note that lk_exslpfail count may be lying about
+ * the real number of waiters with the LK_SLEEPFAIL flag on
+ * because they may be used in conjuction with interruptible
+ * sleeps so lk_exslpfail might be considered an 'upper limit'
+ * bound, including the edge cases.
*/
realexslp = sleepq_sleepcnt(&lk->lock_object,
SQ_EXCLUSIVE_QUEUE);
@@ -300,7 +305,14 @@ wakeupshlk(struct lock *lk, const char *file, int line)
}
} else {
- MPASS(lk->lk_exslpfail == 0);
+
+ /*
+ * Exclusive waiters sleeping with LK_SLEEPFAIL on
+ * and using interruptible sleeps/timeout may have
+ * left spourious lk_exslpfail counts on, so clean
+ * it up anyway.
+ */
+ lk->lk_exslpfail = 0;
queue = SQ_SHARED_QUEUE;
}
@@ -936,6 +948,12 @@ __lockmgr_args(struct lock *lk, u_int flags, struct lock_object *ilk,
* empty avoid a starvation for the threads sleeping
* on the shared queue by giving them precedence
* and cleaning up the exclusive waiters bit anyway.
+ * Please note that lk_exslpfail count may be lying
+ * about the real number of waiters with the
+ * LK_SLEEPFAIL flag on because they may be used in
+ * conjuction with interruptible sleeps so
+ * lk_exslpfail might be considered an 'upper limit'
+ * bound, including the edge cases.
*/
MPASS((x & LK_EXCLUSIVE_SPINNERS) == 0);
realexslp = sleepq_sleepcnt(&lk->lock_object,
@@ -959,7 +977,14 @@ __lockmgr_args(struct lock *lk, u_int flags, struct lock_object *ilk,
queue = SQ_SHARED_QUEUE;
}
} else {
- MPASS(lk->lk_exslpfail == 0);
+
+ /*
+ * Exclusive waiters sleeping with LK_SLEEPFAIL
+ * on and using interruptible sleeps/timeout
+ * may have left spourious lk_exslpfail counts
+ * on, so clean it up anyway.
+ */
+ lk->lk_exslpfail = 0;
queue = SQ_SHARED_QUEUE;
}
@@ -1032,13 +1057,28 @@ __lockmgr_args(struct lock *lk, u_int flags, struct lock_object *ilk,
* threads sleeping on the shared queue by
* giving them precedence and cleaning up the
* exclusive waiters bit anyway.
+ * Please note that lk_exslpfail count may be
+ * lying about the real number of waiters with
+ * the LK_SLEEPFAIL flag on because they may
+ * be used in conjuction with interruptible
+ * sleeps so lk_exslpfail might be considered
+ * an 'upper limit' bound, including the edge
+ * cases.
*/
if (v & LK_EXCLUSIVE_WAITERS) {
queue = SQ_EXCLUSIVE_QUEUE;
v &= ~LK_EXCLUSIVE_WAITERS;
} else {
+
+ /*
+ * Exclusive waiters sleeping with
+ * LK_SLEEPFAIL on and using
+ * interruptible sleeps/timeout may
+ * have left spourious lk_exslpfail
+ * counts on, so clean it up anyway.
+ */
MPASS(v & LK_SHARED_WAITERS);
- MPASS(lk->lk_exslpfail == 0);
+ lk->lk_exslpfail = 0;
queue = SQ_SHARED_QUEUE;
v &= ~LK_SHARED_WAITERS;
}
diff --git a/sys/kern/kern_mib.c b/sys/kern/kern_mib.c
index 04e4dc0..78382c7 100644
--- a/sys/kern/kern_mib.c
+++ b/sys/kern/kern_mib.c
@@ -125,7 +125,8 @@ SYSCTL_INT(_kern, KERN_POSIX1, posix1version, CTLFLAG_RD,
0, _POSIX_VERSION, "Version of POSIX attempting to comply to");
SYSCTL_INT(_kern, KERN_NGROUPS, ngroups, CTLFLAG_RD,
- 0, NGROUPS_MAX, "Maximum number of groups a user can belong to");
+ 0, NGROUPS_MAX,
+ "Maximum number of supplemental groups a user can belong to");
SYSCTL_INT(_kern, KERN_JOB_CONTROL, job_control, CTLFLAG_RD,
0, 1, "Whether job control is available");
diff --git a/sys/kern/kern_umtx.c b/sys/kern/kern_umtx.c
index 2e2af2b..71287c4 100644
--- a/sys/kern/kern_umtx.c
+++ b/sys/kern/kern_umtx.c
@@ -58,13 +58,16 @@ __FBSDID("$FreeBSD$");
#include <compat/freebsd32/freebsd32_proto.h>
#endif
-#define TYPE_SIMPLE_WAIT 0
-#define TYPE_CV 1
-#define TYPE_SIMPLE_LOCK 2
-#define TYPE_NORMAL_UMUTEX 3
-#define TYPE_PI_UMUTEX 4
-#define TYPE_PP_UMUTEX 5
-#define TYPE_RWLOCK 6
+enum {
+ TYPE_SIMPLE_WAIT,
+ TYPE_CV,
+ TYPE_SEM,
+ TYPE_SIMPLE_LOCK,
+ TYPE_NORMAL_UMUTEX,
+ TYPE_PI_UMUTEX,
+ TYPE_PP_UMUTEX,
+ TYPE_RWLOCK
+};
#define _UMUTEX_TRY 1
#define _UMUTEX_WAIT 2
@@ -141,20 +144,38 @@ struct umtx_q {
/* Inherited priority from PP mutex */
u_char uq_inherited_pri;
+
+ /* Spare queue ready to be reused */
+ struct umtxq_queue *uq_spare_queue;
+
+ /* The queue we on */
+ struct umtxq_queue *uq_cur_queue;
};
TAILQ_HEAD(umtxq_head, umtx_q);
+/* Per-key wait-queue */
+struct umtxq_queue {
+ struct umtxq_head head;
+ struct umtx_key key;
+ LIST_ENTRY(umtxq_queue) link;
+ int length;
+};
+
+LIST_HEAD(umtxq_list, umtxq_queue);
+
/* Userland lock object's wait-queue chain */
struct umtxq_chain {
/* Lock for this chain. */
struct mtx uc_lock;
/* List of sleep queues. */
- struct umtxq_head uc_queue[2];
+ struct umtxq_list uc_queue[2];
#define UMTX_SHARED_QUEUE 0
#define UMTX_EXCLUSIVE_QUEUE 1
+ LIST_HEAD(, umtxq_queue) uc_spare_queue;
+
/* Busy flag */
char uc_busy;
@@ -163,6 +184,7 @@ struct umtxq_chain {
/* All PI in the list */
TAILQ_HEAD(,umtx_pi) uc_pi_list;
+
};
#define UMTXQ_LOCKED_ASSERT(uc) mtx_assert(&(uc)->uc_lock, MA_OWNED)
@@ -244,8 +266,9 @@ umtxq_sysinit(void *arg __unused)
for (j = 0; j < UMTX_CHAINS; ++j) {
mtx_init(&umtxq_chains[i][j].uc_lock, "umtxql", NULL,
MTX_DEF | MTX_DUPOK);
- TAILQ_INIT(&umtxq_chains[i][j].uc_queue[0]);
- TAILQ_INIT(&umtxq_chains[i][j].uc_queue[1]);
+ LIST_INIT(&umtxq_chains[i][j].uc_queue[0]);
+ LIST_INIT(&umtxq_chains[i][j].uc_queue[1]);
+ LIST_INIT(&umtxq_chains[i][j].uc_spare_queue);
TAILQ_INIT(&umtxq_chains[i][j].uc_pi_list);
umtxq_chains[i][j].uc_busy = 0;
umtxq_chains[i][j].uc_waiters = 0;
@@ -262,6 +285,8 @@ umtxq_alloc(void)
struct umtx_q *uq;
uq = malloc(sizeof(struct umtx_q), M_UMTX, M_WAITOK | M_ZERO);
+ uq->uq_spare_queue = malloc(sizeof(struct umtxq_queue), M_UMTX, M_WAITOK | M_ZERO);
+ TAILQ_INIT(&uq->uq_spare_queue->head);
TAILQ_INIT(&uq->uq_pi_contested);
uq->uq_inherited_pri = PRI_MAX;
return (uq);
@@ -270,6 +295,8 @@ umtxq_alloc(void)
void
umtxq_free(struct umtx_q *uq)
{
+ MPASS(uq->uq_spare_queue != NULL);
+ free(uq->uq_spare_queue, M_UMTX);
free(uq, M_UMTX);
}
@@ -291,7 +318,7 @@ umtx_key_match(const struct umtx_key *k1, const struct umtx_key *k2)
static inline struct umtxq_chain *
umtxq_getchain(struct umtx_key *key)
{
- if (key->type <= TYPE_CV)
+ if (key->type <= TYPE_SEM)
return (&umtxq_chains[1][key->hash]);
return (&umtxq_chains[0][key->hash]);
}
@@ -368,27 +395,72 @@ umtxq_unbusy(struct umtx_key *key)
wakeup_one(uc);
}
+static struct umtxq_queue *
+umtxq_queue_lookup(struct umtx_key *key, int q)
+{
+ struct umtxq_queue *uh;
+ struct umtxq_chain *uc;
+
+ uc = umtxq_getchain(key);
+ UMTXQ_LOCKED_ASSERT(uc);
+ LIST_FOREACH(uh, &uc->uc_queue[q], link) {
+ if (umtx_key_match(&uh->key, key))
+ return (uh);
+ }
+
+ return (NULL);
+}
+
static inline void
umtxq_insert_queue(struct umtx_q *uq, int q)
{
+ struct umtxq_queue *uh;
struct umtxq_chain *uc;
uc = umtxq_getchain(&uq->uq_key);
UMTXQ_LOCKED_ASSERT(uc);
- TAILQ_INSERT_TAIL(&uc->uc_queue[q], uq, uq_link);
+ KASSERT((uq->uq_flags & UQF_UMTXQ) == 0, ("umtx_q is already on queue"));
+ uh = umtxq_queue_lookup(&uq->uq_key, UMTX_SHARED_QUEUE);
+ if (uh != NULL) {
+ LIST_INSERT_HEAD(&uc->uc_spare_queue, uq->uq_spare_queue, link);
+ } else {
+ uh = uq->uq_spare_queue;
+ uh->key = uq->uq_key;
+ LIST_INSERT_HEAD(&uc->uc_queue[q], uh, link);
+ }
+ uq->uq_spare_queue = NULL;
+
+ TAILQ_INSERT_TAIL(&uh->head, uq, uq_link);
+ uh->length++;
uq->uq_flags |= UQF_UMTXQ;
+ uq->uq_cur_queue = uh;
+ return;
}
static inline void
umtxq_remove_queue(struct umtx_q *uq, int q)
{
struct umtxq_chain *uc;
+ struct umtxq_queue *uh;
uc = umtxq_getchain(&uq->uq_key);
UMTXQ_LOCKED_ASSERT(uc);
if (uq->uq_flags & UQF_UMTXQ) {
- TAILQ_REMOVE(&uc->uc_queue[q], uq, uq_link);
+ uh = uq->uq_cur_queue;
+ TAILQ_REMOVE(&uh->head, uq, uq_link);
+ uh->length--;
uq->uq_flags &= ~UQF_UMTXQ;
+ if (TAILQ_EMPTY(&uh->head)) {
+ KASSERT(uh->length == 0,
+ ("inconsistent umtxq_queue length"));
+ LIST_REMOVE(uh, link);
+ } else {
+ uh = LIST_FIRST(&uc->uc_spare_queue);
+ KASSERT(uh != NULL, ("uc_spare_queue is empty"));
+ LIST_REMOVE(uh, link);
+ }
+ uq->uq_spare_queue = uh;
+ uq->uq_cur_queue = NULL;
}
}
@@ -399,18 +471,14 @@ static int
umtxq_count(struct umtx_key *key)
{
struct umtxq_chain *uc;
- struct umtx_q *uq;
- int count = 0;
+ struct umtxq_queue *uh;
uc = umtxq_getchain(key);
UMTXQ_LOCKED_ASSERT(uc);
- TAILQ_FOREACH(uq, &uc->uc_queue[UMTX_SHARED_QUEUE], uq_link) {
- if (umtx_key_match(&uq->uq_key, key)) {
- if (++count > 1)
- break;
- }
- }
- return (count);
+ uh = umtxq_queue_lookup(key, UMTX_SHARED_QUEUE);
+ if (uh != NULL)
+ return (uh->length);
+ return (0);
}
/*
@@ -421,20 +489,17 @@ static int
umtxq_count_pi(struct umtx_key *key, struct umtx_q **first)
{
struct umtxq_chain *uc;
- struct umtx_q *uq;
- int count = 0;
+ struct umtxq_queue *uh;
*first = NULL;
uc = umtxq_getchain(key);
UMTXQ_LOCKED_ASSERT(uc);
- TAILQ_FOREACH(uq, &uc->uc_queue[UMTX_SHARED_QUEUE], uq_link) {
- if (umtx_key_match(&uq->uq_key, key)) {
- if (++count > 1)
- break;
- *first = uq;
- }
+ uh = umtxq_queue_lookup(key, UMTX_SHARED_QUEUE);
+ if (uh != NULL) {
+ *first = TAILQ_FIRST(&uh->head);
+ return (uh->length);
}
- return (count);
+ return (0);
}
/*
@@ -445,18 +510,20 @@ static int
umtxq_signal_queue(struct umtx_key *key, int n_wake, int q)
{
struct umtxq_chain *uc;
- struct umtx_q *uq, *next;
+ struct umtxq_queue *uh;
+ struct umtx_q *uq;
int ret;
ret = 0;
uc = umtxq_getchain(key);
UMTXQ_LOCKED_ASSERT(uc);
- TAILQ_FOREACH_SAFE(uq, &uc->uc_queue[q], uq_link, next) {
- if (umtx_key_match(&uq->uq_key, key)) {
+ uh = umtxq_queue_lookup(key, q);
+ if (uh != NULL) {
+ while ((uq = TAILQ_FIRST(&uh->head)) != NULL) {
umtxq_remove_queue(uq, q);
wakeup(uq);
if (++ret >= n_wake)
- break;
+ return (ret);
}
}
return (ret);
@@ -1521,12 +1588,8 @@ umtxq_sleep_pi(struct umtx_q *uq, struct umtx_pi *pi,
if (pi->pi_owner == NULL) {
/* XXX
* Current, We only support process private PI-mutex,
- * non-contended PI-mutexes are locked in userland.
- * Process shared PI-mutex should always be initialized
- * by kernel and be registered in kernel, locking should
- * always be done by kernel to avoid security problems.
- * For process private PI-mutex, we can find owner
- * thread and boost its priority safely.
+ * we need a faster way to find an owner thread for
+ * process-shared mutex (not available yet).
*/
mtx_unlock_spin(&umtx_lock);
PROC_LOCK(curproc);
@@ -2770,7 +2833,7 @@ do_sem_wait(struct thread *td, struct _usem *sem, struct timespec *timeout)
uq = td->td_umtxq;
flags = fuword32(&sem->_flags);
- error = umtx_key_get(sem, TYPE_CV, GET_SHARE(flags), &uq->uq_key);
+ error = umtx_key_get(sem, TYPE_SEM, GET_SHARE(flags), &uq->uq_key);
if (error != 0)
return (error);
umtxq_lock(&uq->uq_key);
@@ -2845,7 +2908,7 @@ do_sem_wake(struct thread *td, struct _usem *sem)
uint32_t flags;
flags = fuword32(&sem->_flags);
- if ((error = umtx_key_get(sem, TYPE_CV, GET_SHARE(flags), &key)) != 0)
+ if ((error = umtx_key_get(sem, TYPE_SEM, GET_SHARE(flags), &key)) != 0)
return (error);
umtxq_lock(&key);
umtxq_busy(&key);
diff --git a/sys/kern/sched_4bsd.c b/sys/kern/sched_4bsd.c
index c0019a9..99ea7b8 100644
--- a/sys/kern/sched_4bsd.c
+++ b/sys/kern/sched_4bsd.c
@@ -1050,7 +1050,7 @@ sched_wakeup(struct thread *td)
updatepri(td);
resetpriority(td);
}
- td->td_slptick = ticks;
+ td->td_slptick = 0;
ts->ts_slptime = 0;
sched_add(td, SRQ_BORING);
}
diff --git a/sys/kern/subr_firmware.c b/sys/kern/subr_firmware.c
index 6a36c24..3f5e52b 100644
--- a/sys/kern/subr_firmware.c
+++ b/sys/kern/subr_firmware.c
@@ -500,7 +500,7 @@ firmware_modevent(module_t mod, int type, void *unused)
mtx_lock(&firmware_mtx);
for (i = 0; i < FIRMWARE_MAX; i++) {
fp = &firmware_table[i];
- fp->flags |= FW_UNLOAD;;
+ fp->flags |= FW_UNLOAD;
}
mtx_unlock(&firmware_mtx);
taskqueue_enqueue(firmware_tq, &firmware_unload_task);
diff --git a/sys/kern/subr_sleepqueue.c b/sys/kern/subr_sleepqueue.c
index a0496bd..5df74d0 100644
--- a/sys/kern/subr_sleepqueue.c
+++ b/sys/kern/subr_sleepqueue.c
@@ -122,8 +122,8 @@ struct sleepqueue {
LIST_ENTRY(sleepqueue) sq_hash; /* (c) Chain and free list. */
LIST_HEAD(, sleepqueue) sq_free; /* (c) Free queues. */
void *sq_wchan; /* (c) Wait channel. */
-#ifdef INVARIANTS
int sq_type; /* (c) Queue type. */
+#ifdef INVARIANTS
struct lock_object *sq_lock; /* (c) Associated lock. */
#endif
};
@@ -317,7 +317,6 @@ sleepq_add(void *wchan, struct lock_object *lock, const char *wmesg, int flags,
("thread's sleep queue has a non-empty free list"));
KASSERT(sq->sq_wchan == NULL, ("stale sq_wchan pointer"));
sq->sq_lock = lock;
- sq->sq_type = flags & SLEEPQ_TYPE;
#endif
#ifdef SLEEPQUEUE_PROFILING
sc->sc_depth++;
@@ -330,6 +329,7 @@ sleepq_add(void *wchan, struct lock_object *lock, const char *wmesg, int flags,
sq = td->td_sleepqueue;
LIST_INSERT_HEAD(&sc->sc_queues, sq, sq_hash);
sq->sq_wchan = wchan;
+ sq->sq_type = flags & SLEEPQ_TYPE;
} else {
MPASS(wchan == sq->sq_wchan);
MPASS(lock == sq->sq_lock);
@@ -669,6 +669,28 @@ sleepq_timedwait_sig(void *wchan, int pri)
}
/*
+ * Returns the type of sleepqueue given a waitchannel.
+ */
+int
+sleepq_type(void *wchan)
+{
+ struct sleepqueue *sq;
+ int type;
+
+ MPASS(wchan != NULL);
+
+ sleepq_lock(wchan);
+ sq = sleepq_lookup(wchan);
+ if (sq == NULL) {
+ sleepq_release(wchan);
+ return (-1);
+ }
+ type = sq->sq_type;
+ sleepq_release(wchan);
+ return (type);
+}
+
+/*
* Removes a thread from a sleep queue and makes it
* runnable.
*/
@@ -1176,8 +1198,8 @@ DB_SHOW_COMMAND(sleepq, db_show_sleepqueue)
return;
found:
db_printf("Wait channel: %p\n", sq->sq_wchan);
-#ifdef INVARIANTS
db_printf("Queue type: %d\n", sq->sq_type);
+#ifdef INVARIANTS
if (sq->sq_lock) {
lock = sq->sq_lock;
db_printf("Associated Interlock: %p - (%s) %s\n", lock,
diff --git a/sys/kern/subr_turnstile.c b/sys/kern/subr_turnstile.c
index 2aad232..114b139 100644
--- a/sys/kern/subr_turnstile.c
+++ b/sys/kern/subr_turnstile.c
@@ -733,6 +733,7 @@ turnstile_wait(struct turnstile *ts, struct thread *owner, int queue)
td->td_tsqueue = queue;
td->td_blocked = ts;
td->td_lockname = lock->lo_name;
+ td->td_blktick = ticks;
TD_SET_LOCK(td);
mtx_unlock_spin(&tc->tc_lock);
propagate_priority(td);
@@ -925,6 +926,7 @@ turnstile_unpend(struct turnstile *ts, int owner_type)
MPASS(TD_CAN_RUN(td));
td->td_blocked = NULL;
td->td_lockname = NULL;
+ td->td_blktick = 0;
#ifdef INVARIANTS
td->td_tsqueue = 0xff;
#endif
diff --git a/sys/libkern/qdivrem.c b/sys/libkern/qdivrem.c
index 635f53c..fbfd715 100644
--- a/sys/libkern/qdivrem.c
+++ b/sys/libkern/qdivrem.c
@@ -41,7 +41,7 @@ __FBSDID("$FreeBSD$");
#include <libkern/quad.h>
-#define B (1UL << HALF_BITS) /* digit base */
+#define B (1 << HALF_BITS) /* digit base */
/* Combine two `digits' to make a single two-digit number. */
#define COMBINE(a, b) (((u_long)(a) << HALF_BITS) | (b))
diff --git a/sys/libkern/quad.h b/sys/libkern/quad.h
index 4d09afa..5d4f844 100644
--- a/sys/libkern/quad.h
+++ b/sys/libkern/quad.h
@@ -94,7 +94,7 @@ union uu {
* (sizeof(long)*CHAR_BIT/2).
*/
#define HHALF(x) ((x) >> HALF_BITS)
-#define LHALF(x) ((x) & ((1UL << HALF_BITS) - 1))
+#define LHALF(x) ((x) & ((1 << HALF_BITS) - 1))
#define LHUP(x) ((x) << HALF_BITS)
typedef unsigned int qshift_t;
diff --git a/sys/mips/mips/busdma_machdep.c b/sys/mips/mips/busdma_machdep.c
index 94238a5..5271148 100644
--- a/sys/mips/mips/busdma_machdep.c
+++ b/sys/mips/mips/busdma_machdep.c
@@ -23,7 +23,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * From i386/busdma_machdep.c,v 1.26 2002/04/19 22:58:09 alfred
+ * From i386/busdma_machdep.c,v 1.26 2002/04/19 22:58:09 alfred
*/
#include <sys/cdefs.h>
diff --git a/sys/modules/Makefile b/sys/modules/Makefile
index 1530cfd..e128bd0 100644
--- a/sys/modules/Makefile
+++ b/sys/modules/Makefile
@@ -81,6 +81,7 @@ SUBDIR= ${_3dfx} \
${_em} \
en \
${_ep} \
+ ${_epic} \
${_et} \
${_ex} \
${_exca} \
@@ -602,6 +603,7 @@ _sound= sound
.if ${MACHINE_ARCH} == "sparc64"
_auxio= auxio
_em= em
+_epic= epic
_i2c= i2c
_igb= igb
.if ${MK_CDDL} != "no" || defined(ALL_MODULES)
diff --git a/sys/modules/crypto/Makefile b/sys/modules/crypto/Makefile
index 891f7e4..be801db 100644
--- a/sys/modules/crypto/Makefile
+++ b/sys/modules/crypto/Makefile
@@ -16,6 +16,6 @@ SRCS += skipjack.c bf_enc.c bf_skey.c
SRCS += des_ecb.c des_enc.c des_setkey.c
SRCS += sha1.c sha2.c
SRCS += opt_param.h cryptodev_if.h bus_if.h device_if.h
-SRCS += opt_ddb.h
+SRCS += opt_ddb.h opt_kdtrace.h
SRCS += camellia.c camellia-api.c
.include <bsd.kmod.mk>
diff --git a/sys/modules/epic/Makefile b/sys/modules/epic/Makefile
new file mode 100644
index 0000000..8c2212b
--- /dev/null
+++ b/sys/modules/epic/Makefile
@@ -0,0 +1,8 @@
+# $FreeBSD$
+
+.PATH: ${.CURDIR}/../../sparc64/ebus
+
+KMOD= epic
+SRCS= device_if.h epic.c bus_if.h ofw_bus_if.h
+
+.include <bsd.kmod.mk>
diff --git a/sys/modules/usb/uch341/Makefile b/sys/modules/usb/uch341/Makefile
deleted file mode 100644
index 41ab36f..0000000
--- a/sys/modules/usb/uch341/Makefile
+++ /dev/null
@@ -1,36 +0,0 @@
-#
-# $FreeBSD$
-#
-# Copyright (c) 2009 Hans Petter Selasky. All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-# 1. Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution.
-#
-# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-# SUCH DAMAGE.
-#
-
-S= ${.CURDIR}/../../..
-
-.PATH: $S/dev/usb/serial
-
-KMOD= uch341
-SRCS= opt_bus.h opt_usb.h device_if.h bus_if.h usb_if.h usbdevs.h \
- uch341.c
-
-.include <bsd.kmod.mk>
diff --git a/sys/net/flowtable.c b/sys/net/flowtable.c
index 3ed0528..ab42e68 100644
--- a/sys/net/flowtable.c
+++ b/sys/net/flowtable.c
@@ -404,7 +404,7 @@ ipv4_flow_lookup_hash_internal(struct mbuf *m, struct route *ro,
if (*flags & FL_HASH_PORTS)
goto noop;
/* no port - hence not a protocol we care about */
- break;;
+ break;
}
*protop = proto;
diff --git a/sys/net/if_epair.c b/sys/net/if_epair.c
index 00f99fd..a6b7a7c 100644
--- a/sys/net/if_epair.c
+++ b/sys/net/if_epair.c
@@ -323,7 +323,7 @@ epair_add_ifp_for_draining(struct ifnet *ifp)
STAILQ_FOREACH(elm, &epair_dpcpu->epair_ifp_drain_list, ifp_next)
if (elm->ifp == ifp)
break;
- /* If the ipf is there already, return success. */
+ /* If the ifp is there already, return success. */
if (elm != NULL)
return (0);
diff --git a/sys/net/if_ethersubr.c b/sys/net/if_ethersubr.c
index 7b32e5b..ac2ab05 100644
--- a/sys/net/if_ethersubr.c
+++ b/sys/net/if_ethersubr.c
@@ -70,10 +70,10 @@
#include <netinet/in.h>
#include <netinet/in_var.h>
#include <netinet/if_ether.h>
+#include <netinet/ip_var.h>
#include <netinet/ip_fw.h>
#include <netinet/ipfw/ip_fw_private.h>
#include <netinet/ip_dummynet.h>
-#include <netinet/ip_var.h>
#endif
#ifdef INET6
#include <netinet6/nd6.h>
diff --git a/sys/net/if_lagg.c b/sys/net/if_lagg.c
index 583cc41..0682d43 100644
--- a/sys/net/if_lagg.c
+++ b/sys/net/if_lagg.c
@@ -95,7 +95,9 @@ static int lagg_port_ioctl(struct ifnet *, u_long, caddr_t);
static int lagg_port_output(struct ifnet *, struct mbuf *,
struct sockaddr *, struct route *);
static void lagg_port_ifdetach(void *arg __unused, struct ifnet *);
+#ifdef LAGG_PORT_STACKING
static int lagg_port_checkstacking(struct lagg_softc *);
+#endif
static void lagg_port2req(struct lagg_port *, struct lagg_reqport *);
static void lagg_init(void *);
static void lagg_stop(struct lagg_softc *);
@@ -456,7 +458,8 @@ lagg_port_create(struct lagg_softc *sc, struct ifnet *ifp)
mtx_unlock(&lagg_list_mtx);
free(lp, M_DEVBUF);
return (EINVAL);
- /* XXX disable stacking for the moment, its untested
+ /* XXX disable stacking for the moment, its untested */
+#ifdef LAGG_PORT_STACKING
lp->lp_flags |= LAGG_PORT_STACK;
if (lagg_port_checkstacking(sc_ptr) >=
LAGG_MAX_STACKING) {
@@ -464,7 +467,7 @@ lagg_port_create(struct lagg_softc *sc, struct ifnet *ifp)
free(lp, M_DEVBUF);
return (E2BIG);
}
- */
+#endif
}
}
mtx_unlock(&lagg_list_mtx);
@@ -515,6 +518,7 @@ lagg_port_create(struct lagg_softc *sc, struct ifnet *ifp)
return (error);
}
+#ifdef LAGG_PORT_STACKING
static int
lagg_port_checkstacking(struct lagg_softc *sc)
{
@@ -533,6 +537,7 @@ lagg_port_checkstacking(struct lagg_softc *sc)
return (m + 1);
}
+#endif
static int
lagg_port_destroy(struct lagg_port *lp, int runpd)
diff --git a/sys/net80211/ieee80211_node.c b/sys/net80211/ieee80211_node.c
index 30508d9..bccb6d5 100644
--- a/sys/net80211/ieee80211_node.c
+++ b/sys/net80211/ieee80211_node.c
@@ -1739,7 +1739,7 @@ ieee80211_node_delucastkey(struct ieee80211_node *ni)
status = ieee80211_crypto_delkey(ni->ni_vap, &ni->ni_ucastkey);
if (nt->nt_keyixmap != NULL && keyix < nt->nt_keyixmax) {
nikey = nt->nt_keyixmap[keyix];
- nt->nt_keyixmap[keyix] = NULL;;
+ nt->nt_keyixmap[keyix] = NULL;
}
}
if (!isowned)
diff --git a/sys/net80211/ieee80211_var.h b/sys/net80211/ieee80211_var.h
index 3d23f47..9fe0242 100644
--- a/sys/net80211/ieee80211_var.h
+++ b/sys/net80211/ieee80211_var.h
@@ -32,11 +32,11 @@
* Definitions for IEEE 802.11 drivers.
*/
/* NB: portability glue must go first */
-#ifdef __NetBSD__
+#if defined(__NetBSD__)
#include <net80211/ieee80211_netbsd.h>
-#elif __FreeBSD__
+#elif defined(__FreeBSD__)
#include <net80211/ieee80211_freebsd.h>
-#elif __linux__
+#elif defined(__linux__)
#include <net80211/ieee80211_linux.h>
#else
#error "No support for your operating system!"
diff --git a/sys/netgraph/ng_ether.c b/sys/netgraph/ng_ether.c
index fab0622..dc38d41 100644
--- a/sys/netgraph/ng_ether.c
+++ b/sys/netgraph/ng_ether.c
@@ -359,9 +359,6 @@ ng_ether_link_state(struct ifnet *ifp, int state)
struct ng_mesg *msg;
int cmd, dummy_error = 0;
- if (priv->lower == NULL)
- return;
-
if (state == LINK_STATE_UP)
cmd = NGM_LINK_IS_UP;
else if (state == LINK_STATE_DOWN)
@@ -369,9 +366,16 @@ ng_ether_link_state(struct ifnet *ifp, int state)
else
return;
- NG_MKMESSAGE(msg, NGM_FLOW_COOKIE, cmd, 0, M_NOWAIT);
- if (msg != NULL)
- NG_SEND_MSG_HOOK(dummy_error, node, msg, priv->lower, 0);
+ if (priv->lower != NULL) {
+ NG_MKMESSAGE(msg, NGM_FLOW_COOKIE, cmd, 0, M_NOWAIT);
+ if (msg != NULL)
+ NG_SEND_MSG_HOOK(dummy_error, node, msg, priv->lower, 0);
+ }
+ if (priv->orphan != NULL) {
+ NG_MKMESSAGE(msg, NGM_FLOW_COOKIE, cmd, 0, M_NOWAIT);
+ if (msg != NULL)
+ NG_SEND_MSG_HOOK(dummy_error, node, msg, priv->orphan, 0);
+ }
}
/******************************************************************
diff --git a/sys/netgraph/ng_ipfw.c b/sys/netgraph/ng_ipfw.c
index 0112f66..537040a 100644
--- a/sys/netgraph/ng_ipfw.c
+++ b/sys/netgraph/ng_ipfw.c
@@ -43,10 +43,10 @@
#include <netinet/in.h>
#include <netinet/in_systm.h>
#include <netinet/in_var.h>
+#include <netinet/ip_var.h>
#include <netinet/ip_fw.h>
#include <netinet/ipfw/ip_fw_private.h>
#include <netinet/ip.h>
-#include <netinet/ip_var.h>
#include <netgraph/ng_message.h>
#include <netgraph/ng_parse.h>
diff --git a/sys/netinet/in.c b/sys/netinet/in.c
index a0d6ac9..4743c01 100644
--- a/sys/netinet/in.c
+++ b/sys/netinet/in.c
@@ -562,7 +562,7 @@ in_control(struct socket *so, u_long cmd, caddr_t data, struct ifnet *ifp,
(hostIsNew || maskIsNew))
error = in_ifinit(ifp, ia, &ifra->ifra_addr, 0);
if (error != 0 && iaIsNew)
- goto out;
+ break;
if ((ifp->if_flags & IFF_BROADCAST) &&
(ifra->ifra_broadaddr.sin_family == AF_INET))
diff --git a/sys/netinet/ip_carp.c b/sys/netinet/ip_carp.c
index 55fbb02..433c0f0 100644
--- a/sys/netinet/ip_carp.c
+++ b/sys/netinet/ip_carp.c
@@ -560,7 +560,7 @@ carp_input(struct mbuf *m, int hlen)
/* verify that the IP TTL is 255. */
if (ip->ip_ttl != CARP_DFLTTL) {
CARPSTATS_INC(carps_badttl);
- CARP_LOG("carp_input: received ttl %d != 255i on %s\n",
+ CARP_DEBUG("carp_input: received ttl %d != 255 on %s\n",
ip->ip_ttl,
m->m_pkthdr.rcvif->if_xname);
m_freem(m);
@@ -739,7 +739,7 @@ carp_input_c(struct mbuf *m, struct carp_header *ch, sa_family_t af)
CARPSTATS_INC(carps_badauth);
SC2IFP(sc)->if_ierrors++;
CARP_UNLOCK(ifp->if_carp);
- CARP_LOG("%s: incorrect hash\n", SC2IFP(sc)->if_xname);
+ CARP_DEBUG("%s: incorrect hash\n", SC2IFP(sc)->if_xname);
m_freem(m);
return;
}
diff --git a/sys/netinet/ip_divert.c b/sys/netinet/ip_divert.c
index 811ca06..225dd46 100644
--- a/sys/netinet/ip_divert.c
+++ b/sys/netinet/ip_divert.c
@@ -32,14 +32,10 @@ __FBSDID("$FreeBSD$");
#if !defined(KLD_MODULE)
#include "opt_inet.h"
-#include "opt_ipfw.h"
#include "opt_sctp.h"
#ifndef INET
#error "IPDIVERT requires INET."
#endif
-#ifndef IPFIREWALL
-#error "IPDIVERT requires IPFIREWALL"
-#endif
#endif
#include <sys/param.h>
@@ -55,10 +51,10 @@ __FBSDID("$FreeBSD$");
#include <sys/socket.h>
#include <sys/socketvar.h>
#include <sys/sysctl.h>
+#include <net/vnet.h>
#include <net/if.h>
#include <net/netisr.h>
-#include <net/vnet.h>
#include <netinet/in.h>
#include <netinet/in_pcb.h>
@@ -66,8 +62,6 @@ __FBSDID("$FreeBSD$");
#include <netinet/in_var.h>
#include <netinet/ip.h>
#include <netinet/ip_var.h>
-#include <netinet/ip_fw.h>
-#include <netinet/ipfw/ip_fw_private.h>
#ifdef SCTP
#include <netinet/sctp_crc32.h>
#endif
@@ -85,27 +79,29 @@ __FBSDID("$FreeBSD$");
#define DIVRCVQ (65536 + 100)
/*
- * Divert sockets work in conjunction with ipfw, see the divert(4)
- * manpage for features.
- * Internally, packets selected by ipfw in ip_input() or ip_output(),
- * and never diverted before, are passed to the input queue of the
- * divert socket with a given 'divert_port' number (as specified in
- * the matching ipfw rule), and they are tagged with a 16 bit cookie
- * (representing the rule number of the matching ipfw rule), which
- * is passed to process reading from the socket.
+ * Divert sockets work in conjunction with ipfw or other packet filters,
+ * see the divert(4) manpage for features.
+ * Packets are selected by the packet filter and tagged with an
+ * MTAG_IPFW_RULE tag carrying the 'divert port' number (as set by
+ * the packet filter) and information on the matching filter rule for
+ * subsequent reinjection. The divert_port is used to put the packet
+ * on the corresponding divert socket, while the rule number is passed
+ * up (at least partially) as the sin_port in the struct sockaddr.
*
- * Packets written to the divert socket are again tagged with a cookie
- * (usually the same as above) and a destination address.
- * If the destination address is INADDR_ANY then the packet is
- * treated as outgoing and sent to ip_output(), otherwise it is
- * treated as incoming and sent to ip_input().
- * In both cases, the packet is tagged with the cookie.
+ * Packets written to the divert socket carry in sin_addr a
+ * destination address, and in sin_port the number of the filter rule
+ * after which to continue processing.
+ * If the destination address is INADDR_ANY, the packet is treated as
+ * as outgoing and sent to ip_output(); otherwise it is treated as
+ * incoming and sent to ip_input().
+ * Further, sin_zero carries some information on the interface,
+ * which can be used in the reinject -- see comments in the code.
*
* On reinjection, processing in ip_input() and ip_output()
* will be exactly the same as for the original packet, except that
- * ipfw processing will start at the rule number after the one
- * written in the cookie (so, tagging a packet with a cookie of 0
- * will cause it to be effectively considered as a standard packet).
+ * packet filter processing will start at the rule number after the one
+ * written in the sin_port (ipfw does not allow a rule #0, so sin_port=0
+ * will apply the entire ruleset to the packet).
*/
/* Internal variables. */
diff --git a/sys/netinet/ip_var.h b/sys/netinet/ip_var.h
index a1d2166..d041dd3 100644
--- a/sys/netinet/ip_var.h
+++ b/sys/netinet/ip_var.h
@@ -249,7 +249,43 @@ VNET_DECLARE(struct pfil_head, inet_pfil_hook); /* packet filter hooks */
void in_delayed_cksum(struct mbuf *m);
-/* ipfw and dummynet hooks. Most are declared in raw_ip.c */
+/* Hooks for ipfw, dummynet, divert etc. Most are declared in raw_ip.c */
+/*
+ * Reference to an ipfw or packet filter rule that can be carried
+ * outside critical sections.
+ * A rule is identified by rulenum:rule_id which is ordered.
+ * In version chain_id the rule can be found in slot 'slot', so
+ * we don't need a lookup if chain_id == chain->id.
+ *
+ * On exit from the firewall this structure refers to the rule after
+ * the matching one (slot points to the new rule; rulenum:rule_id-1
+ * is the matching rule), and additional info (e.g. info often contains
+ * the insn argument or tablearg in the low 16 bits, in host format).
+ * On entry, the structure is valid if slot>0, and refers to the starting
+ * rules. 'info' contains the reason for reinject, e.g. divert port,
+ * divert direction, and so on.
+ */
+struct ipfw_rule_ref {
+ uint32_t slot; /* slot for matching rule */
+ uint32_t rulenum; /* matching rule number */
+ uint32_t rule_id; /* matching rule id */
+ uint32_t chain_id; /* ruleset id */
+ uint32_t info; /* see below */
+};
+
+enum {
+ IPFW_INFO_MASK = 0x0000ffff,
+ IPFW_INFO_OUT = 0x00000000, /* outgoing, just for convenience */
+ IPFW_INFO_IN = 0x80000000, /* incoming, overloads dir */
+ IPFW_ONEPASS = 0x40000000, /* One-pass, do not reinject */
+ IPFW_IS_MASK = 0x30000000, /* which source ? */
+ IPFW_IS_DIVERT = 0x20000000,
+ IPFW_IS_DUMMYNET =0x10000000,
+ IPFW_IS_PIPE = 0x08000000, /* pip1=1, queue = 0 */
+};
+#define MTAG_IPFW 1148380143 /* IPFW-tagged cookie */
+#define MTAG_IPFW_RULE 1262273568 /* rule reference */
+
struct ip_fw_args;
typedef int (*ip_fw_chk_ptr_t)(struct ip_fw_args *args);
typedef int (*ip_fw_ctl_ptr_t)(struct sockopt *);
@@ -258,9 +294,14 @@ VNET_DECLARE(ip_fw_ctl_ptr_t, ip_fw_ctl_ptr);
#define V_ip_fw_chk_ptr VNET(ip_fw_chk_ptr)
#define V_ip_fw_ctl_ptr VNET(ip_fw_ctl_ptr)
+/* Divert hooks. */
+extern void (*ip_divert_ptr)(struct mbuf *m, int incoming);
+/* ng_ipfw hooks -- XXX make it the same as divert and dummynet */
+extern int (*ng_ipfw_input_p)(struct mbuf **, int,
+ struct ip_fw_args *, int);
+
extern int (*ip_dn_ctl_ptr)(struct sockopt *);
-extern int (*ip_dn_io_ptr)(struct mbuf **m, int dir, struct ip_fw_args *fwa);
-extern void (*ip_dn_ruledel_ptr)(void *); /* in ip_fw2.c */
+extern int (*ip_dn_io_ptr)(struct mbuf **, int, struct ip_fw_args *);
VNET_DECLARE(int, ip_do_randomid);
#define V_ip_do_randomid VNET(ip_do_randomid)
diff --git a/sys/netinet/ipfw/ip_dummynet.c b/sys/netinet/ipfw/ip_dummynet.c
index 7126ace..267776f 100644
--- a/sys/netinet/ipfw/ip_dummynet.c
+++ b/sys/netinet/ipfw/ip_dummynet.c
@@ -52,8 +52,6 @@ __FBSDID("$FreeBSD$");
* 000601: WF2Q support
* 000106: large rewrite, use heaps to handle very many pipes.
* 980513: initial release
- *
- * include files marked with XXX are probably not needed
*/
#include <sys/param.h>
@@ -75,10 +73,10 @@ __FBSDID("$FreeBSD$");
#include <net/netisr.h>
#include <netinet/in.h>
#include <netinet/ip.h> /* ip_len, ip_off */
+#include <netinet/ip_var.h> /* ip_output(), IP_FORWARDING */
#include <netinet/ip_fw.h>
#include <netinet/ipfw/ip_fw_private.h>
#include <netinet/ip_dummynet.h>
-#include <netinet/ip_var.h> /* ip_output(), IP_FORWARDING */
#include <netinet/if_ether.h> /* various ether_* routines */
@@ -105,7 +103,7 @@ static int red_lookup_depth = 256; /* RED - default lookup table depth */
static int red_avg_pkt_size = 512; /* RED - default medium packet size */
static int red_max_pkt_size = 1500; /* RED - default max packet size */
-static struct timeval prev_t, t;
+static struct timeval prev_t;
static long tick_last; /* Last tick duration (usec). */
static long tick_delta; /* Last vs standard tick diff (usec). */
static long tick_delta_sum; /* Accumulated tick difference (usec).*/
@@ -241,7 +239,6 @@ static int ip_dn_ctl(struct sockopt *sopt);
static void dummynet(void *);
static void dummynet_flush(void);
static void dummynet_send(struct mbuf *);
-void dummynet_drain(void);
static int dummynet_io(struct mbuf **, int , struct ip_fw_args *);
/*
@@ -853,7 +850,9 @@ dummynet(void * __unused unused)
}
/*
- * The main dummynet processing function.
+ * The timer handler for dummynet. Time is computed in ticks, but
+ * but the code is tolerant to the actual rate at which this is called.
+ * Once complete, the function reschedules itself for the next tick.
*/
static void
dummynet_task(void *context, int pending)
@@ -864,6 +863,7 @@ dummynet_task(void *context, int pending)
struct dn_heap *h;
void *p; /* generic parameter to handler */
int i;
+ struct timeval t;
DUMMYNET_LOCK();
@@ -1957,35 +1957,6 @@ pipe_remove_from_heap(struct dn_heap *h, struct dn_pipe *p)
}
/*
- * drain all queues. Called in case of severe mbuf shortage.
- */
-void
-dummynet_drain(void)
-{
- struct dn_flow_set *fs;
- struct dn_pipe *pipe;
- int i;
-
- DUMMYNET_LOCK_ASSERT();
-
- heap_free(&ready_heap);
- heap_free(&wfq_ready_heap);
- heap_free(&extract_heap);
- /* remove all references to this pipe from flow_sets */
- for (i = 0; i < HASHSIZE; i++)
- SLIST_FOREACH(fs, &flowsethash[i], next)
- purge_flow_set(fs, 0);
-
- for (i = 0; i < HASHSIZE; i++) {
- SLIST_FOREACH(pipe, &pipehash[i], next) {
- purge_flow_set(&(pipe->fs), 0);
- dn_free_pkts(pipe->head);
- pipe->head = pipe->tail = NULL;
- }
- }
-}
-
-/*
* Fully delete a pipe or a queue, cleaning up associated info.
*/
static int
diff --git a/sys/netinet/ipfw/ip_fw_dynamic.c b/sys/netinet/ipfw/ip_fw_dynamic.c
index 6d1ac60..ad5599a 100644
--- a/sys/netinet/ipfw/ip_fw_dynamic.c
+++ b/sys/netinet/ipfw/ip_fw_dynamic.c
@@ -1002,7 +1002,8 @@ ipfw_send_pkt(struct mbuf *replyto, struct ipfw_flow_id *id, u_int32_t seq,
h->ip_hl = sizeof(*h) >> 2;
h->ip_tos = IPTOS_LOWDELAY;
h->ip_off = 0;
- h->ip_len = htons(len);
+ /* ip_len must be in host format for ip_output */
+ h->ip_len = len;
h->ip_ttl = V_ip_defttl;
h->ip_sum = 0;
break;
diff --git a/sys/netinet/ipfw/ip_fw_log.c b/sys/netinet/ipfw/ip_fw_log.c
index e9f05e7..a5178db 100644
--- a/sys/netinet/ipfw/ip_fw_log.c
+++ b/sys/netinet/ipfw/ip_fw_log.c
@@ -58,6 +58,7 @@ __FBSDID("$FreeBSD$");
#include <netinet/in.h>
#include <netinet/ip.h>
#include <netinet/ip_icmp.h>
+#include <netinet/ip_var.h>
#include <netinet/ip_fw.h>
#include <netinet/ipfw/ip_fw_private.h>
#include <netinet/tcp_var.h>
diff --git a/sys/netinet/ipfw/ip_fw_pfil.c b/sys/netinet/ipfw/ip_fw_pfil.c
index 1132109..a7aa5aa 100644
--- a/sys/netinet/ipfw/ip_fw_pfil.c
+++ b/sys/netinet/ipfw/ip_fw_pfil.c
@@ -73,12 +73,6 @@ static VNET_DEFINE(int, fw6_enable) = 1;
int ipfw_chg_hook(SYSCTL_HANDLER_ARGS);
-/* Divert hooks. */
-void (*ip_divert_ptr)(struct mbuf *m, int incoming);
-
-/* ng_ipfw hooks. */
-ng_ipfw_input_t *ng_ipfw_input_p = NULL;
-
/* Forward declarations. */
static int ipfw_divert(struct mbuf **, int, struct ipfw_rule_ref *, int);
@@ -110,7 +104,8 @@ ipfw_check_hook(void *arg, struct mbuf **m0, struct ifnet *ifp, int dir,
int ret;
/* all the processing now uses ip_len in net format */
- SET_NET_IPLEN(mtod(*m0, struct ip *));
+ if (mtod(*m0, struct ip *)->ip_v == 4)
+ SET_NET_IPLEN(mtod(*m0, struct ip *));
/* convert dir to IPFW values */
dir = (dir == PFIL_IN) ? DIR_IN : DIR_OUT;
@@ -219,7 +214,7 @@ again:
case IP_FW_NGTEE:
case IP_FW_NETGRAPH:
- if (!NG_IPFW_LOADED) {
+ if (ng_ipfw_input_p == NULL) {
ret = EACCES;
break; /* i.e. drop */
}
@@ -242,7 +237,7 @@ again:
FREE_PKT(*m0);
*m0 = NULL;
}
- if (*m0)
+ if (*m0 && mtod(*m0, struct ip *)->ip_v == 4)
SET_HOST_IPLEN(mtod(*m0, struct ip *));
return ret;
}
diff --git a/sys/netinet/ipfw/ip_fw_private.h b/sys/netinet/ipfw/ip_fw_private.h
index cfc07aa..92508f1 100644
--- a/sys/netinet/ipfw/ip_fw_private.h
+++ b/sys/netinet/ipfw/ip_fw_private.h
@@ -35,8 +35,6 @@
#ifdef _KERNEL
-#define MTAG_IPFW 1148380143 /* IPFW-tagged cookie */
-#define MTAG_IPFW_RULE 1262273568 /* rule reference */
/* Return values from ipfw_chk() */
enum {
@@ -66,38 +64,6 @@ struct _ip6dn_args {
struct route_in6 ro_pmtu_or;
};
-/*
- * Reference to an ipfw rule that can be carried outside critical sections.
- * A rule is identified by rulenum:rule_id which is ordered.
- * In version chain_id the rule can be found in slot 'slot', so
- * we don't need a lookup if chain_id == chain->id.
- *
- * On exit from the firewall this structure refers to the rule after
- * the matching one (slot points to the new rule; rulenum:rule_id-1
- * is the matching rule), and additional info (e.g. info often contains
- * the insn argument or tablearg in the low 16 bits, in host format).
- * On entry, the structure is valid if slot>0, and refers to the starting
- * rules. 'info' contains the reason for reinject, e.g. divert port,
- * divert direction, and so on.
- */
-struct ipfw_rule_ref {
- uint32_t slot; /* slot for matching rule */
- uint32_t rulenum; /* matching rule number */
- uint32_t rule_id; /* matching rule id */
- uint32_t chain_id; /* ruleset id */
- uint32_t info; /* see below */
-};
-
-enum {
- IPFW_INFO_MASK = 0x0000ffff,
- IPFW_INFO_OUT = 0x00000000, /* outgoing, just for convenience */
- IPFW_INFO_IN = 0x80000000, /* incoming, overloads dir */
- IPFW_ONEPASS = 0x40000000, /* One-pass, do not reinject */
- IPFW_IS_MASK = 0x30000000, /* which source ? */
- IPFW_IS_DIVERT = 0x20000000,
- IPFW_IS_DUMMYNET =0x10000000,
- IPFW_IS_PIPE = 0x08000000, /* pip1=1, queue = 0 */
-};
/*
* Arguments for calling ipfw_chk() and dummynet_io(). We put them
@@ -289,10 +255,7 @@ int ipfw_del_table_entry(struct ip_fw_chain *ch, uint16_t tbl, in_addr_t addr,
int ipfw_count_table(struct ip_fw_chain *ch, uint32_t tbl, uint32_t *cnt);
int ipfw_dump_table(struct ip_fw_chain *ch, ipfw_table *tbl);
-/* hooks for divert */
-extern void (*ip_divert_ptr)(struct mbuf *m, int incoming);
-
-/* In ip_fw_nat.c */
+/* In ip_fw_nat.c -- XXX to be moved to ip_var.h */
extern struct cfg_nat *(*lookup_nat_ptr)(struct nat_list *, int);
@@ -307,14 +270,5 @@ extern ipfw_nat_cfg_t *ipfw_nat_del_ptr;
extern ipfw_nat_cfg_t *ipfw_nat_get_cfg_ptr;
extern ipfw_nat_cfg_t *ipfw_nat_get_log_ptr;
-/* netgraph prototypes */
-
-typedef int ng_ipfw_input_t(struct mbuf **, int, struct ip_fw_args *, int);
-extern ng_ipfw_input_t *ng_ipfw_input_p;
-#define NG_IPFW_LOADED (ng_ipfw_input_p != NULL)
-
-#define TAGSIZ (sizeof(struct ng_ipfw_tag) - sizeof(struct m_tag))
-
-
#endif /* _KERNEL */
#endif /* _IPFW2_PRIVATE_H */
diff --git a/sys/netinet/ipfw/ip_fw_sockopt.c b/sys/netinet/ipfw/ip_fw_sockopt.c
index 10dd861..596324d 100644
--- a/sys/netinet/ipfw/ip_fw_sockopt.c
+++ b/sys/netinet/ipfw/ip_fw_sockopt.c
@@ -63,6 +63,7 @@ __FBSDID("$FreeBSD$");
#include <net/vnet.h>
#include <netinet/in.h>
+#include <netinet/ip_var.h> /* hooks */
#include <netinet/ip_fw.h>
#include <netinet/ipfw/ip_fw_private.h>
@@ -676,7 +677,7 @@ check_ipfw_struct(struct ip_fw *rule, int size)
goto check_size;
case O_NETGRAPH:
case O_NGTEE:
- if (!NG_IPFW_LOADED)
+ if (ng_ipfw_input_p == NULL)
return EINVAL;
else
goto check_size;
diff --git a/sys/netinet/ipfw/ip_fw_table.c b/sys/netinet/ipfw/ip_fw_table.c
index c4fd31b..0d8625a 100644
--- a/sys/netinet/ipfw/ip_fw_table.c
+++ b/sys/netinet/ipfw/ip_fw_table.c
@@ -64,6 +64,7 @@ __FBSDID("$FreeBSD$");
#include <net/vnet.h>
#include <netinet/in.h>
+#include <netinet/ip_var.h> /* struct ipfw_rule_ref */
#include <netinet/ip_fw.h>
#include <netinet/ipfw/ip_fw_private.h>
diff --git a/sys/netinet/libalias/alias_db.c b/sys/netinet/libalias/alias_db.c
index 489933f..a42803e 100644
--- a/sys/netinet/libalias/alias_db.c
+++ b/sys/netinet/libalias/alias_db.c
@@ -2136,7 +2136,7 @@ void
SetProtocolFlags(struct alias_link *lnk, int pflags)
{
- lnk->pflags = pflags;;
+ lnk->pflags = pflags;
}
int
diff --git a/sys/netinet/libalias/alias_mod.c b/sys/netinet/libalias/alias_mod.c
index b2576da..b6d9030 100644
--- a/sys/netinet/libalias/alias_mod.c
+++ b/sys/netinet/libalias/alias_mod.c
@@ -158,7 +158,7 @@ _attach_handler(struct proto_handler *p)
static int
_detach_handler(struct proto_handler *p)
{
- struct proto_handler *b, *b_tmp;;
+ struct proto_handler *b, *b_tmp;
LIBALIAS_WLOCK_ASSERT();
LIST_FOREACH_SAFE(b, &handler_chain, entries, b_tmp) {
diff --git a/sys/netinet/raw_ip.c b/sys/netinet/raw_ip.c
index 3573472..9341cf2 100644
--- a/sys/netinet/raw_ip.c
+++ b/sys/netinet/raw_ip.c
@@ -80,14 +80,18 @@ VNET_DEFINE(struct inpcbinfo, ripcbinfo);
#define V_ripcbinfo VNET(ripcbinfo)
/*
- * Control and data hooks for ipfw and dummynet.
+ * Control and data hooks for ipfw, dummynet, divert and so on.
* The data hooks are not used here but it is convenient
* to keep them all in one place.
*/
VNET_DEFINE(ip_fw_chk_ptr_t, ip_fw_chk_ptr) = NULL;
VNET_DEFINE(ip_fw_ctl_ptr_t, ip_fw_ctl_ptr) = NULL;
-int (*ip_dn_ctl_ptr)(struct sockopt *) = NULL;
-int (*ip_dn_io_ptr)(struct mbuf **m, int dir, struct ip_fw_args *fwa) = NULL;
+
+int (*ip_dn_ctl_ptr)(struct sockopt *);
+int (*ip_dn_io_ptr)(struct mbuf **, int, struct ip_fw_args *);
+void (*ip_divert_ptr)(struct mbuf *, int);
+int (*ng_ipfw_input_p)(struct mbuf **, int,
+ struct ip_fw_args *, int);
/*
* Hooks for multicast routing. They all default to NULL, so leave them not
diff --git a/sys/netinet/sctp_asconf.c b/sys/netinet/sctp_asconf.c
index 9c46e79..9513ded 100644
--- a/sys/netinet/sctp_asconf.c
+++ b/sys/netinet/sctp_asconf.c
@@ -2224,7 +2224,7 @@ sctp_asconf_iterator_stcb(struct sctp_inpcb *inp, struct sctp_tcb *stcb,
}
if (stcb->asoc.ipv4_local_scope == 0 &&
IN4_ISPRIVATE_ADDRESS(&sin->sin_addr)) {
- continue;;
+ continue;
}
if ((inp->sctp_flags & SCTP_PCB_FLAGS_BOUND_V6) &&
SCTP_IPV6_V6ONLY(inp6)) {
diff --git a/sys/netinet/sctputil.c b/sys/netinet/sctputil.c
index 65de462..8681acd 100644
--- a/sys/netinet/sctputil.c
+++ b/sys/netinet/sctputil.c
@@ -4382,7 +4382,7 @@ sctp_add_to_readq(struct sctp_inpcb *inp,
m = SCTP_BUF_NEXT(prev);
}
if (m == NULL) {
- control->tail_mbuf = prev;;
+ control->tail_mbuf = prev;
}
continue;
}
diff --git a/sys/netinet6/icmp6.c b/sys/netinet6/icmp6.c
index ae52f11..57f8d32 100644
--- a/sys/netinet6/icmp6.c
+++ b/sys/netinet6/icmp6.c
@@ -296,7 +296,7 @@ icmp6_error(struct mbuf *m, int type, int code, int param)
* we should basically suppress sending an error (RFC 2463, Section
* 2.4).
* We have two exceptions (the item e.2 in that section):
- * - the Pakcet Too Big message can be sent for path MTU discovery.
+ * - the Packet Too Big message can be sent for path MTU discovery.
* - the Parameter Problem Message that can be allowed an icmp6 error
* in the option type field. This check has been done in
* ip6_unknown_opt(), so we can just check the type and code.
diff --git a/sys/netinet6/ip6_input.c b/sys/netinet6/ip6_input.c
index fc26cff..c244f37 100644
--- a/sys/netinet6/ip6_input.c
+++ b/sys/netinet6/ip6_input.c
@@ -1406,7 +1406,7 @@ ip6_savecontrol(struct inpcb *in6p, struct mbuf *m, struct mbuf **mp)
mp = &(*mp)->m_next;
break;
case IPPROTO_ROUTING:
- if (!in6p->inp_flags & IN6P_RTHDR)
+ if (!(in6p->inp_flags & IN6P_RTHDR))
break;
*mp = sbcreatecontrol((caddr_t)ip6e, elen,
diff --git a/sys/nfsclient/bootp_subr.c b/sys/nfsclient/bootp_subr.c
index 4377f74..cff72c7 100644
--- a/sys/nfsclient/bootp_subr.c
+++ b/sys/nfsclient/bootp_subr.c
@@ -1332,7 +1332,7 @@ bootpc_compose_query(struct bootpc_ifcontext *ifctx,
*vendp++ = TAG_VENDOR_INDENTIFIER;
*vendp++ = vendor_client_len;
memcpy(vendp, vendor_client, vendor_client_len);
- vendp += vendor_client_len;;
+ vendp += vendor_client_len;
ifctx->dhcpquerytype = DHCP_NOMSG;
switch (ifctx->state) {
case IF_DHCP_UNRESOLVED:
diff --git a/sys/nfsclient/nfs_vfsops.c b/sys/nfsclient/nfs_vfsops.c
index 0e10093..2346d41 100644
--- a/sys/nfsclient/nfs_vfsops.c
+++ b/sys/nfsclient/nfs_vfsops.c
@@ -423,14 +423,18 @@ nfs_mountroot(struct mount *mp)
char buf[128];
char *cp;
+ CURVNET_SET(TD_TO_VNET(td));
+
#if defined(BOOTP_NFSROOT) && defined(BOOTP)
bootpc_init(); /* use bootp to get nfs_diskless filled in */
#elif defined(NFS_ROOT)
nfs_setup_diskless();
#endif
- if (nfs_diskless_valid == 0)
+ if (nfs_diskless_valid == 0) {
+ CURVNET_RESTORE();
return (-1);
+ }
if (nfs_diskless_valid == 1)
nfs_convert_diskless();
@@ -516,6 +520,7 @@ nfs_mountroot(struct mount *mp)
nd->root_args.hostname = buf;
if ((error = nfs_mountdiskless(buf,
&nd->root_saddr, &nd->root_args, td, &vp, mp)) != 0) {
+ CURVNET_RESTORE();
return (error);
}
@@ -529,6 +534,7 @@ nfs_mountroot(struct mount *mp)
sizeof (prison0.pr_hostname));
mtx_unlock(&prison0.pr_mtx);
inittodr(ntohl(nd->root_time));
+ CURVNET_RESTORE();
return (0);
}
@@ -827,8 +833,6 @@ nfs_mount(struct mount *mp)
has_fh_opt = 0;
has_hostname_opt = 0;
- CURVNET_SET(CRED_TO_VNET(curthread->td_ucred));
-
if (vfs_filteropt(mp->mnt_optnew, nfs_opts)) {
error = EINVAL;
goto out;
@@ -1128,7 +1132,6 @@ out:
mp->mnt_kern_flag |= (MNTK_MPSAFE|MNTK_LOOKUP_SHARED);
MNT_IUNLOCK(mp);
}
- CURVNET_RESTORE();
return (error);
}
diff --git a/sys/nfsclient/nfs_vnops.c b/sys/nfsclient/nfs_vnops.c
index b3c28a3..7d6bb30 100644
--- a/sys/nfsclient/nfs_vnops.c
+++ b/sys/nfsclient/nfs_vnops.c
@@ -1555,19 +1555,15 @@ nfs_create(struct vop_create_args *ap)
struct vattr vattr;
int v3 = NFS_ISV3(dvp);
- CURVNET_SET(CRED_TO_VNET(curthread->td_ucred));
-
/*
* Oops, not for me..
*/
if (vap->va_type == VSOCK) {
error = nfs_mknodrpc(dvp, ap->a_vpp, cnp, vap);
- CURVNET_RESTORE();
return (error);
}
if ((error = VOP_GETATTR(dvp, &vattr, cnp->cn_cred)) != 0) {
- CURVNET_RESTORE();
return (error);
}
if (vap->va_vaflags & VA_EXCLUSIVE)
@@ -1665,7 +1661,6 @@ nfsmout:
KDTRACE_NFS_ATTRCACHE_FLUSH_DONE(dvp);
}
mtx_unlock(&(VTONFS(dvp))->n_mtx);
- CURVNET_RESTORE();
return (error);
}
diff --git a/sys/nfsserver/nfs.h b/sys/nfsserver/nfs.h
index b907a06..00dbe5b 100644
--- a/sys/nfsserver/nfs.h
+++ b/sys/nfsserver/nfs.h
@@ -82,14 +82,13 @@
#define IO_METASYNC 0
#endif
-
/* NFS state flags XXX -Wunused */
#define NFSRV_SNDLOCK 0x01000000 /* Send socket lock */
#define NFSRV_WANTSND 0x02000000 /* Want above */
/*
- * Structures for the nfssvc(2) syscall. Not that anyone but nfsd and mount_nfs
- * should ever try and use it.
+ * Structures for the nfssvc(2) syscall. Not that anyone but nfsd and
+ * mount_nfs should ever try and use it.
*/
/*
@@ -240,6 +239,7 @@ extern int nfs_debug;
#endif
+void nfs_realign(struct mbuf **);
struct mbuf *nfs_rephead(int, struct nfsrv_descript *, int, struct mbuf **,
caddr_t *);
void nfsm_srvfattr(struct nfsrv_descript *, struct vattr *,
diff --git a/sys/nfsserver/nfs_fha.c b/sys/nfsserver/nfs_fha.c
index 0469e4a..25e930f 100644
--- a/sys/nfsserver/nfs_fha.c
+++ b/sys/nfsserver/nfs_fha.c
@@ -71,16 +71,17 @@ static struct fha_global {
u_long hashmask;
} g_fha;
-/*
- * These are the entries in the filehandle hash. They talk about a specific
- * file, requests against which are being handled by one or more nfsds. We keep
- * a chain of nfsds against the file. We only have more than one if reads are
- * ongoing, and then only if the reads affect disparate regions of the file.
+/*
+ * These are the entries in the filehandle hash. They talk about a specific
+ * file, requests against which are being handled by one or more nfsds. We
+ * keep a chain of nfsds against the file. We only have more than one if reads
+ * are ongoing, and then only if the reads affect disparate regions of the
+ * file.
*
- * In general, we want to assign a new request to an existing nfsd if it is
- * going to contend with work happening already on that nfsd, or if the
- * operation is a read and the nfsd is already handling a proximate read. We
- * do this to avoid jumping around in the read stream unnecessarily, and to
+ * In general, we want to assign a new request to an existing nfsd if it is
+ * going to contend with work happening already on that nfsd, or if the
+ * operation is a read and the nfsd is already handling a proximate read. We
+ * do this to avoid jumping around in the read stream unnecessarily, and to
* avoid contention between threads over single files.
*/
struct fha_hash_entry {
@@ -101,7 +102,7 @@ struct fha_info {
};
static int fhe_stats_sysctl(SYSCTL_HANDLER_ARGS);
-
+
static void
nfs_fha_init(void *foo)
{
@@ -136,7 +137,7 @@ nfs_fha_init(void *foo)
&fha_ctls.max_reqs_per_nfsd, 0, "Maximum requests that "
"single nfsd thread should be working on at any time");
- SYSCTL_ADD_OID(&fha_clist, SYSCTL_STATIC_CHILDREN(_vfs_nfsrv_fha),
+ SYSCTL_ADD_OID(&fha_clist, SYSCTL_STATIC_CHILDREN(_vfs_nfsrv_fha),
OID_AUTO, "fhe_stats", CTLTYPE_STRING | CTLFLAG_RD, 0, 0,
fhe_stats_sysctl, "A", "");
}
@@ -151,34 +152,34 @@ nfs_fha_uninit(void *foo)
SYSINIT(nfs_fha, SI_SUB_ROOT_CONF, SI_ORDER_ANY, nfs_fha_init, NULL);
SYSUNINIT(nfs_fha, SI_SUB_ROOT_CONF, SI_ORDER_ANY, nfs_fha_uninit, NULL);
-/*
+/*
* This just specifies that offsets should obey affinity when within
* the same 1Mbyte (1<<20) chunk for the file (reads only for now).
*/
static void
fha_extract_info(struct svc_req *req, struct fha_info *i)
{
- struct mbuf *md = req->rq_args;
+ struct mbuf *md;
nfsfh_t fh;
- caddr_t dpos = mtod(md, caddr_t);
+ caddr_t dpos;
static u_int64_t random_fh = 0;
int error;
int v3 = (req->rq_vers == 3);
u_int32_t *tl;
rpcproc_t procnum;
- /*
- * We start off with a random fh. If we get a reasonable
- * procnum, we set the fh. If there's a concept of offset
+ /*
+ * We start off with a random fh. If we get a reasonable
+ * procnum, we set the fh. If there's a concept of offset
* that we're interested in, we set that.
*/
i->fh = ++random_fh;
i->offset = 0;
i->locktype = LK_EXCLUSIVE;
-
+
/*
* Extract the procnum and convert to v3 form if necessary,
- * taking care to deal with out-of-range procnums. Caller will
+ * taking care to deal with out-of-range procnums. Caller will
* ensure that rq_vers is either 2 or 3.
*/
procnum = req->rq_proc;
@@ -188,19 +189,23 @@ fha_extract_info(struct svc_req *req, struct fha_info *i)
procnum = nfsrv_nfsv3_procid[procnum];
}
- /*
- * We do affinity for most. However, we divide a realm of affinity
- * by file offset so as to allow for concurrent random access. We
- * only do this for reads today, but this may change when IFS supports
+ /*
+ * We do affinity for most. However, we divide a realm of affinity
+ * by file offset so as to allow for concurrent random access. We
+ * only do this for reads today, but this may change when IFS supports
* efficient concurrent writes.
*/
if (procnum == NFSPROC_FSSTAT ||
procnum == NFSPROC_FSINFO ||
procnum == NFSPROC_PATHCONF ||
- procnum == NFSPROC_NOOP ||
+ procnum == NFSPROC_NOOP ||
procnum == NFSPROC_NULL)
goto out;
-
+
+ nfs_realign(&req->rq_args);
+ md = req->rq_args;
+ dpos = mtod(md, caddr_t);
+
/* Grab the filehandle. */
error = nfsm_srvmtofh_xx(&fh.fh_generic, v3, &md, &dpos);
if (error)
@@ -266,8 +271,8 @@ fha_hash_entry_new(u_int64_t fh)
e->num_writes = 0;
e->num_threads = 0;
LIST_INIT(&e->threads);
-
- return e;
+
+ return (e);
}
static void
@@ -292,10 +297,9 @@ fha_hash_entry_lookup(SVCPOOL *pool, u_int64_t fh)
{
struct fha_hash_entry *fhe, *new_fhe;
- LIST_FOREACH(fhe, &g_fha.hashtable[fh % g_fha.hashmask], link) {
+ LIST_FOREACH(fhe, &g_fha.hashtable[fh % g_fha.hashmask], link)
if (fhe->fh == fh)
break;
- }
if (!fhe) {
/* Allocate a new entry. */
@@ -304,25 +308,24 @@ fha_hash_entry_lookup(SVCPOOL *pool, u_int64_t fh)
mtx_lock(&pool->sp_lock);
/* Double-check to make sure we still need the new entry. */
- LIST_FOREACH(fhe, &g_fha.hashtable[fh % g_fha.hashmask], link) {
+ LIST_FOREACH(fhe, &g_fha.hashtable[fh % g_fha.hashmask], link)
if (fhe->fh == fh)
break;
- }
if (!fhe) {
fhe = new_fhe;
LIST_INSERT_HEAD(&g_fha.hashtable[fh % g_fha.hashmask],
fhe, link);
- } else {
+ } else
fha_hash_entry_destroy(new_fhe);
- }
}
- return fhe;
+ return (fhe);
}
static void
fha_hash_entry_add_thread(struct fha_hash_entry *fhe, SVCTHREAD *thread)
{
+
LIST_INSERT_HEAD(&fhe->threads, thread, st_alink);
fhe->num_threads++;
}
@@ -335,7 +338,7 @@ fha_hash_entry_remove_thread(struct fha_hash_entry *fhe, SVCTHREAD *thread)
fhe->num_threads--;
}
-/*
+/*
* Account for an ongoing operation associated with this file.
*/
static void
@@ -361,7 +364,7 @@ get_idle_thread(SVCPOOL *pool)
}
-/*
+/*
* Get the service thread currently associated with the fhe that is
* appropriate to handle this operation.
*/
@@ -383,15 +386,15 @@ fha_hash_entry_choose_thread(SVCPOOL *pool, struct fha_hash_entry *fhe,
/* If there are any writes in progress, use the first thread. */
if (fhe->num_writes) {
#if 0
- ITRACE_CURPROC(ITRACE_NFS, ITRACE_INFO,
+ ITRACE_CURPROC(ITRACE_NFS, ITRACE_INFO,
"fha: %p(%d)w", thread, req_count);
#endif
return (thread);
}
- /*
- * Check for read locality, making sure that we won't
- * exceed our per-thread load limit in the process.
+ /*
+ * Check for read locality, making sure that we won't
+ * exceed our per-thread load limit in the process.
*/
offset1 = i->offset >> fha_ctls.bin_shift;
offset2 = STAILQ_FIRST(&thread->st_reqs)->rq_p3
@@ -400,21 +403,21 @@ fha_hash_entry_choose_thread(SVCPOOL *pool, struct fha_hash_entry *fhe,
if ((fha_ctls.max_reqs_per_nfsd == 0) ||
(req_count < fha_ctls.max_reqs_per_nfsd)) {
#if 0
- ITRACE_CURPROC(ITRACE_NFS, ITRACE_INFO,
+ ITRACE_CURPROC(ITRACE_NFS, ITRACE_INFO,
"fha: %p(%d)r", thread, req_count);
#endif
return (thread);
}
}
- /*
+ /*
* We don't have a locality match, so skip this thread,
- * but keep track of the most attractive thread in case
+ * but keep track of the most attractive thread in case
* we need to come back to it later.
*/
#if 0
- ITRACE_CURPROC(ITRACE_NFS, ITRACE_INFO,
- "fha: %p(%d)s off1 %llu off2 %llu", thread,
+ ITRACE_CURPROC(ITRACE_NFS, ITRACE_INFO,
+ "fha: %p(%d)s off1 %llu off2 %llu", thread,
req_count, offset1, offset2);
#endif
if ((min_thread == NULL) || (req_count < min_count)) {
@@ -423,38 +426,38 @@ fha_hash_entry_choose_thread(SVCPOOL *pool, struct fha_hash_entry *fhe,
}
}
- /*
- * We didn't find a good match yet. See if we can add
+ /*
+ * We didn't find a good match yet. See if we can add
* a new thread to this file handle entry's thread list.
*/
- if ((fha_ctls.max_nfsds_per_fh == 0) ||
+ if ((fha_ctls.max_nfsds_per_fh == 0) ||
(fhe->num_threads < fha_ctls.max_nfsds_per_fh)) {
- /*
- * We can add a new thread, so try for an idle thread
- * first, and fall back to this_thread if none are idle.
+ /*
+ * We can add a new thread, so try for an idle thread
+ * first, and fall back to this_thread if none are idle.
*/
if (STAILQ_EMPTY(&this_thread->st_reqs)) {
thread = this_thread;
#if 0
- ITRACE_CURPROC(ITRACE_NFS, ITRACE_INFO,
+ ITRACE_CURPROC(ITRACE_NFS, ITRACE_INFO,
"fha: %p(%d)t", thread, thread->st_reqcount);
#endif
} else if ((thread = get_idle_thread(pool))) {
#if 0
- ITRACE_CURPROC(ITRACE_NFS, ITRACE_INFO,
+ ITRACE_CURPROC(ITRACE_NFS, ITRACE_INFO,
"fha: %p(%d)i", thread, thread->st_reqcount);
#endif
- } else {
+ } else {
thread = this_thread;
#if 0
- ITRACE_CURPROC(ITRACE_NFS, ITRACE_INFO,
+ ITRACE_CURPROC(ITRACE_NFS, ITRACE_INFO,
"fha: %p(%d)b", thread, thread->st_reqcount);
#endif
}
fha_hash_entry_add_thread(fhe, thread);
} else {
- /*
- * We don't want to use any more threads for this file, so
+ /*
+ * We don't want to use any more threads for this file, so
* go back to the most attractive nfsd we're already using.
*/
thread = min_thread;
@@ -463,8 +466,8 @@ fha_hash_entry_choose_thread(SVCPOOL *pool, struct fha_hash_entry *fhe,
return (thread);
}
-/*
- * After getting a request, try to assign it to some thread. Usually we
+/*
+ * After getting a request, try to assign it to some thread. Usually we
* handle it ourselves.
*/
SVCTHREAD *
@@ -487,16 +490,16 @@ fha_assign(SVCTHREAD *this_thread, struct svc_req *req)
pool = req->rq_xprt->xp_pool;
fha_extract_info(req, &i);
- /*
- * We save the offset associated with this request for later
+ /*
+ * We save the offset associated with this request for later
* nfsd matching.
*/
fhe = fha_hash_entry_lookup(pool, i.fh);
req->rq_p1 = fhe;
req->rq_p2 = i.locktype;
req->rq_p3 = i.offset;
-
- /*
+
+ /*
* Choose a thread, taking into consideration locality, thread load,
* and the number of threads already working on this file.
*/
@@ -507,8 +510,8 @@ fha_assign(SVCTHREAD *this_thread, struct svc_req *req)
return (thread);
}
-/*
- * Called when we're done with an operation. The request has already
+/*
+ * Called when we're done with an operation. The request has already
* been de-queued.
*/
void
diff --git a/sys/nfsserver/nfs_srvkrpc.c b/sys/nfsserver/nfs_srvkrpc.c
index 54b1c4a..bdfe424 100644
--- a/sys/nfsserver/nfs_srvkrpc.c
+++ b/sys/nfsserver/nfs_srvkrpc.c
@@ -187,19 +187,18 @@ nfssvc_nfsserver(struct thread *td, struct nfssvc_args *uap)
}
error = nfssvc_addsock(fp, td);
fdrop(fp, td);
- } else if (uap->flag & NFSSVC_OLDNFSD) {
+ } else if (uap->flag & NFSSVC_OLDNFSD)
error = nfssvc_nfsd(td, NULL);
- } else if (uap->flag & NFSSVC_NFSD) {
- if (!uap->argp)
+ else if (uap->flag & NFSSVC_NFSD) {
+ if (!uap->argp)
return (EINVAL);
error = copyin(uap->argp, (caddr_t)&nfsdarg,
sizeof(nfsdarg));
if (error)
return (error);
error = nfssvc_nfsd(td, &nfsdarg);
- } else {
+ } else
error = ENXIO;
- }
return (error);
}
@@ -266,7 +265,7 @@ nfs_rephead(int siz, struct nfsrv_descript *nd, int err,
* not occur with NFS/UDP and is supposed to only occassionally occur
* with TCP. Use vfs.nfs.realign_count and realign_test to check this.
*/
-static void
+void
nfs_realign(struct mbuf **pm) /* XXX COMMON */
{
struct mbuf *m;
@@ -447,9 +446,8 @@ nfssvc_addsock(struct file *fp, struct thread *td)
siz = sb_max_adj;
error = soreserve(so, siz, siz);
- if (error) {
+ if (error)
return (error);
- }
/*
* Steal the socket from userland so that it doesn't close
@@ -471,7 +469,7 @@ nfssvc_addsock(struct file *fp, struct thread *td)
}
/*
- * Called by nfssvc() for nfsds. Just loops around servicing rpc requests
+ * Called by nfssvc() for nfsds. Just loops around servicing rpc requests
* until it is killed by a signal.
*/
static int
@@ -496,9 +494,9 @@ nfssvc_nfsd(struct thread *td, struct nfsd_nfsd_args *args)
#endif
/*
- * Only the first nfsd actually does any work. The RPC code
- * adds threads to it as needed. Any extra processes offered
- * by nfsd just exit. If nfsd is new enough, it will call us
+ * Only the first nfsd actually does any work. The RPC code
+ * adds threads to it as needed. Any extra processes offered
+ * by nfsd just exit. If nfsd is new enough, it will call us
* once with a structure that specifies how many threads to
* use.
*/
@@ -522,7 +520,7 @@ nfssvc_nfsd(struct thread *td, struct nfsd_nfsd_args *args)
nfsrv_pool->sp_minthreads = 4;
nfsrv_pool->sp_maxthreads = 4;
}
-
+
svc_run(nfsrv_pool);
#ifdef KGSSAPI
@@ -541,7 +539,7 @@ nfssvc_nfsd(struct thread *td, struct nfsd_nfsd_args *args)
/*
* Size the NFS server's duplicate request cache at 1/2 the
- * nmbclusters, floating within a (64, 2048) range. This is to
+ * nmbclusters, floating within a (64, 2048) range. This is to
* prevent all mbuf clusters being tied up in the NFS dupreq
* cache for small values of nmbclusters.
*/
diff --git a/sys/opencrypto/cryptosoft.c b/sys/opencrypto/cryptosoft.c
index 97b73a2..a404cbc 100644
--- a/sys/opencrypto/cryptosoft.c
+++ b/sys/opencrypto/cryptosoft.c
@@ -434,7 +434,16 @@ swcr_authprepare(struct auth_hash *axf, struct swcr_data *sw, u_char *key,
case CRYPTO_MD5_KPDK:
case CRYPTO_SHA1_KPDK:
{
- /* We need a buffer that can hold an md5 and a sha1 result. */
+ /*
+ * We need a buffer that can hold an md5 and a sha1 result
+ * just to throw it away.
+ * What we do here is the initial part of:
+ * ALGO( key, keyfill, .. )
+ * adding the key to sw_ictx and abusing Final() to get the
+ * "keyfill" padding.
+ * In addition we abuse the sw_octx to save the key to have
+ * it to be able to append it at the end in swcr_authcompute().
+ */
u_char buf[SHA1_RESULTLEN];
sw->sw_klen = klen;
@@ -495,9 +504,17 @@ swcr_authcompute(struct cryptodesc *crd, struct swcr_data *sw, caddr_t buf,
case CRYPTO_MD5_KPDK:
case CRYPTO_SHA1_KPDK:
+ /* If we have no key saved, return error. */
if (sw->sw_octx == NULL)
return EINVAL;
+ /*
+ * Add the trailing copy of the key (see comment in
+ * swcr_authprepare()) after the data:
+ * ALGO( .., key, algofill )
+ * and let Final() do the proper, natural "algofill"
+ * padding.
+ */
axf->Update(&ctx, sw->sw_octx, sw->sw_klen);
axf->Final(aalg, &ctx);
break;
diff --git a/sys/pc98/conf/GENERIC b/sys/pc98/conf/GENERIC
index 858a43cb..569a111 100644
--- a/sys/pc98/conf/GENERIC
+++ b/sys/pc98/conf/GENERIC
@@ -75,6 +75,7 @@ options KBD_INSTALL_CDEV # install a CDEV entry in /dev
options HWPMC_HOOKS # Necessary kernel hooks for hwpmc(4)
options AUDIT # Security event auditing
options MAC # TrustedBSD MAC Framework
+options INCLUDE_CONFIG_FILE # Include this file in kernel
# Debugging for use in -current
options KDB # Enable kernel debugger support.
diff --git a/sys/pc98/conf/Makefile b/sys/pc98/conf/Makefile
index 2c006e9..dabcd9a 100644
--- a/sys/pc98/conf/Makefile
+++ b/sys/pc98/conf/Makefile
@@ -1,3 +1,5 @@
# $FreeBSD$
+TARGET=pc98
+
.include "${.CURDIR}/../../conf/makeLINT.mk"
diff --git a/sys/pci/ncr.c b/sys/pci/ncr.c
index c344a1e..793ae80 100644
--- a/sys/pci/ncr.c
+++ b/sys/pci/ncr.c
@@ -3992,7 +3992,7 @@ ncr_action (struct cam_sim *sim, union ccb *ccb)
msgptr[msglen++] = MSG_EXT_SDTR_LEN;
msgptr[msglen++] = MSG_EXT_SDTR;
msgptr[msglen++] = tp->tinfo.goal.period;
- msgptr[msglen++] = tp->tinfo.goal.offset;;
+ msgptr[msglen++] = tp->tinfo.goal.offset;
if (DEBUG_FLAGS & DEBUG_NEGO) {
PRINT_ADDR(ccb);
printf ("sync msgout: ");
diff --git a/sys/powerpc/aim/mmu_oea.c b/sys/powerpc/aim/mmu_oea.c
index 1ca230c..3880f51 100644
--- a/sys/powerpc/aim/mmu_oea.c
+++ b/sys/powerpc/aim/mmu_oea.c
@@ -922,7 +922,7 @@ moea_bootstrap(mmu_t mmup, vm_offset_t kernelstart, vm_offset_t kernelend)
thread0.td_kstack = va;
thread0.td_kstack_pages = KSTACK_PAGES;
for (i = 0; i < KSTACK_PAGES; i++) {
- moea_kenter(mmup, va, pa);;
+ moea_kenter(mmup, va, pa);
pa += PAGE_SIZE;
va += PAGE_SIZE;
}
@@ -935,7 +935,7 @@ moea_bootstrap(mmu_t mmup, vm_offset_t kernelstart, vm_offset_t kernelend)
va = virtual_avail;
virtual_avail += round_page(MSGBUF_SIZE);
while (va < virtual_avail) {
- moea_kenter(mmup, va, pa);;
+ moea_kenter(mmup, va, pa);
pa += PAGE_SIZE;
va += PAGE_SIZE;
}
@@ -948,7 +948,7 @@ moea_bootstrap(mmu_t mmup, vm_offset_t kernelstart, vm_offset_t kernelend)
va = virtual_avail;
virtual_avail += DPCPU_SIZE;
while (va < virtual_avail) {
- moea_kenter(mmup, va, pa);;
+ moea_kenter(mmup, va, pa);
pa += PAGE_SIZE;
va += PAGE_SIZE;
}
diff --git a/sys/powerpc/aim/mmu_oea64.c b/sys/powerpc/aim/mmu_oea64.c
index 7fb9a79..834ba3b 100644
--- a/sys/powerpc/aim/mmu_oea64.c
+++ b/sys/powerpc/aim/mmu_oea64.c
@@ -1019,7 +1019,7 @@ moea64_bridge_bootstrap(mmu_t mmup, vm_offset_t kernelstart, vm_offset_t kernele
thread0.td_kstack = va;
thread0.td_kstack_pages = KSTACK_PAGES;
for (i = 0; i < KSTACK_PAGES; i++) {
- moea64_kenter(mmup, va, pa);;
+ moea64_kenter(mmup, va, pa);
pa += PAGE_SIZE;
va += PAGE_SIZE;
}
@@ -1032,7 +1032,7 @@ moea64_bridge_bootstrap(mmu_t mmup, vm_offset_t kernelstart, vm_offset_t kernele
va = virtual_avail;
virtual_avail += round_page(MSGBUF_SIZE);
while (va < virtual_avail) {
- moea64_kenter(mmup, va, pa);;
+ moea64_kenter(mmup, va, pa);
pa += PAGE_SIZE;
va += PAGE_SIZE;
}
@@ -1045,7 +1045,7 @@ moea64_bridge_bootstrap(mmu_t mmup, vm_offset_t kernelstart, vm_offset_t kernele
va = virtual_avail;
virtual_avail += DPCPU_SIZE;
while (va < virtual_avail) {
- moea64_kenter(mmup, va, pa);;
+ moea64_kenter(mmup, va, pa);
pa += PAGE_SIZE;
va += PAGE_SIZE;
}
diff --git a/sys/powerpc/booke/pmap.c b/sys/powerpc/booke/pmap.c
index 26302a5..13e637c 100644
--- a/sys/powerpc/booke/pmap.c
+++ b/sys/powerpc/booke/pmap.c
@@ -2307,7 +2307,7 @@ make_sure_to_unlock:
static void
mmu_booke_change_wiring(mmu_t mmu, pmap_t pmap, vm_offset_t va, boolean_t wired)
{
- pte_t *pte;;
+ pte_t *pte;
PMAP_LOCK(pmap);
if ((pte = pte_find(mmu, pmap, va)) != NULL) {
@@ -2791,7 +2791,7 @@ tlb1_write_entry(unsigned int idx)
mtspr(SPR_MAS7, mas7);
__asm __volatile("isync; tlbwe; isync; msync");
- //debugf("tlb1_write_entry: e\n");;
+ //debugf("tlb1_write_entry: e\n");
}
/*
diff --git a/sys/powerpc/conf/GENERIC b/sys/powerpc/conf/GENERIC
index e34d805..efa7764 100644
--- a/sys/powerpc/conf/GENERIC
+++ b/sys/powerpc/conf/GENERIC
@@ -66,6 +66,7 @@ options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
options HWPMC_HOOKS # Necessary kernel hooks for hwpmc(4)
options AUDIT # Security event auditing
options MAC # TrustedBSD MAC Framework
+options INCLUDE_CONFIG_FILE # Include this file in kernel
# Debugging for use in -current
options KDB #Enable the kernel debugger
diff --git a/sys/powerpc/conf/Makefile b/sys/powerpc/conf/Makefile
index 2c006e9..562bc46 100644
--- a/sys/powerpc/conf/Makefile
+++ b/sys/powerpc/conf/Makefile
@@ -1,3 +1,5 @@
# $FreeBSD$
+TARGET=powerpc
+
.include "${.CURDIR}/../../conf/makeLINT.mk"
diff --git a/sys/rpc/clnt_dg.c b/sys/rpc/clnt_dg.c
index 78f4a9a..e3fa02c 100644
--- a/sys/rpc/clnt_dg.c
+++ b/sys/rpc/clnt_dg.c
@@ -258,7 +258,7 @@ clnt_dg_create(
rpc_createerr.cf_error.re_errno = 0;
goto err2;
}
- cu->cu_mcalllen = XDR_GETPOS(&xdrs);;
+ cu->cu_mcalllen = XDR_GETPOS(&xdrs);
/*
* By default, closeit is always FALSE. It is users responsibility
diff --git a/sys/rpc/rpcsec_gss/rpcsec_gss_prot.c b/sys/rpc/rpcsec_gss/rpcsec_gss_prot.c
index 0654a6e..91112a1 100644
--- a/sys/rpc/rpcsec_gss/rpcsec_gss_prot.c
+++ b/sys/rpc/rpcsec_gss/rpcsec_gss_prot.c
@@ -307,7 +307,7 @@ xdr_rpc_gss_unwrap_data(struct mbuf **resultsp,
}
#ifdef DEBUG
-#include <ctype.h>
+#include <machine/stdarg.h>
void
rpc_gss_log_debug(const char *fmt, ...)
@@ -315,9 +315,9 @@ rpc_gss_log_debug(const char *fmt, ...)
va_list ap;
va_start(ap, fmt);
- fprintf(stderr, "rpcsec_gss: ");
- vfprintf(stderr, fmt, ap);
- fprintf(stderr, "\n");
+ printf("rpcsec_gss: ");
+ vprintf(fmt, ap);
+ printf("\n");
va_end(ap);
}
@@ -328,7 +328,7 @@ rpc_gss_log_status(const char *m, gss_OID mech, OM_uint32 maj_stat, OM_uint32 mi
gss_buffer_desc msg;
int msg_ctx = 0;
- fprintf(stderr, "rpcsec_gss: %s: ", m);
+ printf("rpcsec_gss: %s: ", m);
gss_display_status(&min, maj_stat, GSS_C_GSS_CODE, GSS_C_NULL_OID,
&msg_ctx, &msg);
diff --git a/sys/rpc/rpcsec_gss/svc_rpcsec_gss.c b/sys/rpc/rpcsec_gss/svc_rpcsec_gss.c
index 55c0a83..7433b79d 100644
--- a/sys/rpc/rpcsec_gss/svc_rpcsec_gss.c
+++ b/sys/rpc/rpcsec_gss/svc_rpcsec_gss.c
@@ -121,6 +121,9 @@ enum svc_rpc_gss_client_state {
};
#define SVC_RPC_GSS_SEQWINDOW 128
+#ifndef RPCAUTH_UNIXGIDS
+#define RPCAUTH_UNIXGIDS 16
+#endif
struct svc_rpc_gss_clientid {
unsigned long ci_hostid;
@@ -147,7 +150,7 @@ struct svc_rpc_gss_client {
int cl_rpcflavor; /* RPC pseudo sec flavor */
bool_t cl_done_callback; /* TRUE after call */
void *cl_cookie; /* user cookie from callback */
- gid_t cl_gid_storage[NGROUPS];
+ gid_t cl_gid_storage[RPCAUTH_UNIXGIDS];
gss_OID cl_mech; /* mechanism */
gss_qop_t cl_qop; /* quality of protection */
uint32_t cl_seqlast; /* sequence window origin */
@@ -735,7 +738,7 @@ svc_rpc_gss_build_ucred(struct svc_rpc_gss_client *client,
uc->gid = 65534;
uc->gidlist = client->cl_gid_storage;
- numgroups = NGROUPS;
+ numgroups = RPCAUTH_UNIXGIDS;
maj_stat = gss_pname_to_unix_cred(&min_stat, name, client->cl_mech,
&uc->uid, &uc->gid, &numgroups, &uc->gidlist[0]);
if (GSS_ERROR(maj_stat))
@@ -932,7 +935,7 @@ svc_rpc_gss_accept_sec_context(struct svc_rpc_gss_client *client,
"<mech %.*s, qop %d, svc %d>",
client->cl_rawcred.client_principal->name,
mechname.length, (char *)mechname.value,
- client->cl_qop, client->rawcred.service);
+ client->cl_qop, client->cl_rawcred.service);
gss_release_buffer(&min_stat, &mechname);
}
diff --git a/sys/sparc64/conf/GENERIC b/sys/sparc64/conf/GENERIC
index a2953d1..a5d4649 100644
--- a/sys/sparc64/conf/GENERIC
+++ b/sys/sparc64/conf/GENERIC
@@ -72,6 +72,7 @@ options PRINTF_BUFR_SIZE=128 # Prevent printf output being interspersed.
options HWPMC_HOOKS # Necessary kernel hooks for hwpmc(4)
options AUDIT # Security event auditing
options MAC # TrustedBSD MAC Framework
+options INCLUDE_CONFIG_FILE # Include this file in kernel
# Debugging for use in -current
options KDB # Enable kernel debugger support.
@@ -150,6 +151,7 @@ device eeprom # eeprom (really a front-end for the MK48Txx)
device mk48txx # Mostek MK48Txx clocks
device rtc # rtc (really a front-end for the MC146818)
device mc146818 # Motorola MC146818 and compatible clocks
+device epic # Sun Fire V215/V245 LEDs
# Serial (COM) ports
device puc # Multi-channel uarts
@@ -190,7 +192,7 @@ device rl # RealTek 8129/8139
device sf # Adaptec AIC-6915 (``Starfire'')
#device sis # Silicon Integrated Systems SiS 900/SiS 7016
device sk # SysKonnect SK-984x & SK-982x gigabit Ethernet
-#device ste # Sundance ST201 (D-Link DFE-550TX)
+device ste # Sundance ST201 (D-Link DFE-550TX)
device stge # Sundance/Tamarack TC9021 gigabit Ethernet
#device tl # Texas Instruments ThunderLAN
#device tx # SMC EtherPower II (83c170 ``EPIC'')
diff --git a/sys/sparc64/conf/Makefile b/sys/sparc64/conf/Makefile
index 2c006e9..b0b5857 100644
--- a/sys/sparc64/conf/Makefile
+++ b/sys/sparc64/conf/Makefile
@@ -1,3 +1,5 @@
# $FreeBSD$
+TARGET=sparc64
+
.include "${.CURDIR}/../../conf/makeLINT.mk"
diff --git a/sys/sparc64/ebus/epic.c b/sys/sparc64/ebus/epic.c
new file mode 100644
index 0000000..8c20e94
--- /dev/null
+++ b/sys/sparc64/ebus/epic.c
@@ -0,0 +1,216 @@
+/*-
+ * Copyright (c) 2009 Marius Strobl <marius@FreeBSD.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+#include <sys/kernel.h>
+#include <sys/lock.h>
+#include <sys/module.h>
+#include <sys/mutex.h>
+#include <sys/resource.h>
+#include <sys/rman.h>
+
+#include <dev/led/led.h>
+#include <dev/ofw/ofw_bus.h>
+
+#include <machine/bus.h>
+#include <machine/resource.h>
+
+#define EPIC_DELAY 10000
+
+#define EPIC_NREG 1
+#define EPIC_FW_LED 0
+
+#define EPIC_FW_LED_DATA 0x40
+#define EPIC_FW_LED_ADDR 0x41
+#define EPIC_FW_LED_WRITE_MASK 0x80
+
+#define EPIC_FW_VERSION 0x05
+#define EPIC_LED_STATE0 0x06
+
+#define EPIC_LED_ALERT_MASK 0x0c
+#define EPIC_LED_ALERT_OFF 0x00
+#define EPIC_LED_ALERT_ON 0x04
+
+#define EPIC_LED_POWER_MASK 0x30
+#define EPIC_LED_POWER_OFF 0x00
+#define EPIC_LED_POWER_ON 0x10
+#define EPIC_LED_POWER_SB_BLINK 0x20
+#define EPIC_LED_POWER_FAST_BLINK 0x30
+
+static struct resource_spec epic_res_spec[] = {
+ { SYS_RES_MEMORY, EPIC_FW_LED, RF_ACTIVE },
+ { -1, 0 }
+};
+
+struct epic_softc {
+ struct mtx sc_mtx;
+ struct resource *sc_res[EPIC_NREG];
+ struct cdev *sc_led_dev_alert;
+ struct cdev *sc_led_dev_power;
+};
+
+#define EPIC_FW_LED_READ(sc, off) ({ \
+ uint8_t __val; \
+ bus_write_1((sc)->sc_res[EPIC_FW_LED], EPIC_FW_LED_ADDR, (off));\
+ bus_barrier((sc)->sc_res[EPIC_FW_LED], EPIC_FW_LED_ADDR, 1, \
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); \
+ DELAY(EPIC_DELAY); \
+ __val = bus_read_1((sc)->sc_res[EPIC_FW_LED], EPIC_FW_LED_DATA);\
+ bus_barrier((sc)->sc_res[EPIC_FW_LED], EPIC_FW_LED_DATA, 1, \
+ BUS_SPACE_BARRIER_READ); \
+ DELAY(EPIC_DELAY); \
+ __val; \
+})
+
+#define EPIC_FW_LED_WRITE(sc, off, mask, val) do { \
+ bus_write_1((sc)->sc_res[EPIC_FW_LED], EPIC_FW_LED_ADDR, (off));\
+ bus_barrier((sc)->sc_res[EPIC_FW_LED], EPIC_FW_LED_ADDR, 1, \
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); \
+ DELAY(EPIC_DELAY); \
+ bus_write_1((sc)->sc_res[EPIC_FW_LED], EPIC_FW_LED_WRITE_MASK, \
+ (mask)); \
+ bus_barrier((sc)->sc_res[EPIC_FW_LED], EPIC_FW_LED_WRITE_MASK, \
+ 1, BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); \
+ DELAY(EPIC_DELAY); \
+ bus_write_1((sc)->sc_res[EPIC_FW_LED], EPIC_FW_LED_DATA, (val));\
+ bus_barrier((sc)->sc_res[EPIC_FW_LED], EPIC_FW_LED_DATA, 1, \
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); \
+ DELAY(EPIC_DELAY); \
+} while (0)
+
+#define EPIC_LOCK_INIT(sc) \
+ mtx_init(&(sc)->sc_mtx, "epic mtx", NULL, MTX_DEF)
+#define EPIC_LOCK_DESTROY(sc) mtx_destroy(&(sc)->sc_mtx)
+#define EPIC_LOCK(sc) mtx_lock(&(sc)->sc_mtx)
+#define EPIC_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx)
+
+static device_probe_t epic_probe;
+static device_attach_t epic_attach;
+static device_detach_t epic_detach;
+
+static void epic_led_alert(void *arg, int onoff);
+static void epic_led_power(void *arg, int onoff);
+
+static device_method_t epic_methods[] = {
+ /* Device interface */
+ DEVMETHOD(device_probe, epic_probe),
+ DEVMETHOD(device_attach, epic_attach),
+ DEVMETHOD(device_detach, epic_detach),
+
+ KOBJMETHOD_END
+};
+
+static devclass_t epic_devclass;
+
+DEFINE_CLASS_0(epic, epic_driver, epic_methods,
+ sizeof(struct epic_softc));
+DRIVER_MODULE(epic, ebus, epic_driver, epic_devclass, 0, 0);
+
+static int
+epic_probe(device_t dev)
+{
+ const char* compat;
+
+ compat = ofw_bus_get_compat(dev);
+ if (compat != NULL && strcmp(ofw_bus_get_name(dev),
+ "env-monitor") == 0 && strcmp(compat, "epic") == 0) {
+ device_set_desc(dev, "Sun Fire V215/V245 LEDs");
+ return (BUS_PROBE_DEFAULT);
+ }
+ return (ENXIO);
+}
+
+static int
+epic_attach(device_t dev)
+{
+ struct epic_softc *sc;
+
+ sc = device_get_softc(dev);
+ if (bus_alloc_resources(dev, epic_res_spec, sc->sc_res)) {
+ device_printf(dev, "failed to allocate resources\n");
+ bus_release_resources(dev, epic_res_spec, sc->sc_res);
+ return (ENXIO);
+ }
+
+ EPIC_LOCK_INIT(sc);
+
+ if (bootverbose)
+ device_printf(dev, "version 0x%x\n",
+ EPIC_FW_LED_READ(sc, EPIC_FW_VERSION));
+
+ sc->sc_led_dev_alert = led_create(epic_led_alert, sc, "alert");
+ sc->sc_led_dev_power = led_create(epic_led_power, sc, "power");
+
+ return (0);
+}
+
+static int
+epic_detach(device_t dev)
+{
+ struct epic_softc *sc;
+
+ sc = device_get_softc(dev);
+
+ led_destroy(sc->sc_led_dev_alert);
+ led_destroy(sc->sc_led_dev_power);
+
+ bus_release_resources(dev, epic_res_spec, sc->sc_res);
+
+ EPIC_LOCK_DESTROY(sc);
+
+ return (0);
+}
+
+static void
+epic_led_alert(void *arg, int onoff)
+{
+ struct epic_softc *sc;
+
+ sc = (struct epic_softc *)arg;
+
+ EPIC_LOCK(sc);
+ EPIC_FW_LED_WRITE(sc, EPIC_LED_STATE0, EPIC_LED_ALERT_MASK,
+ onoff ? EPIC_LED_ALERT_ON : EPIC_LED_ALERT_OFF);
+ EPIC_UNLOCK(sc);
+}
+
+static void
+epic_led_power(void *arg, int onoff)
+{
+ struct epic_softc *sc;
+
+ sc = (struct epic_softc *)arg;
+
+ EPIC_LOCK(sc);
+ EPIC_FW_LED_WRITE(sc, EPIC_LED_STATE0, EPIC_LED_POWER_MASK,
+ onoff ? EPIC_LED_POWER_ON : EPIC_LED_POWER_OFF);
+ EPIC_UNLOCK(sc);
+}
diff --git a/sys/sparc64/pci/fire.c b/sys/sparc64/pci/fire.c
index 9d78a60..f8a18c1 100644
--- a/sys/sparc64/pci/fire.c
+++ b/sys/sparc64/pci/fire.c
@@ -83,6 +83,8 @@ __FBSDID("$FreeBSD$");
#include "pcib_if.h"
+struct fire_msiqarg;
+
static bus_space_tag_t fire_alloc_bus_tag(struct fire_softc *sc, int type);
static const struct fire_desc *fire_get_desc(device_t dev);
static void fire_dmamap_sync(bus_dma_tag_t dt __unused, bus_dmamap_t map,
@@ -94,6 +96,9 @@ static void fire_intr_clear(void *arg);
static void fire_intr_disable(void *arg);
static void fire_intr_enable(void *arg);
static int fire_intr_register(struct fire_softc *sc, u_int ino);
+static inline void fire_msiq_common(struct intr_vector *iv,
+ struct fire_msiqarg *fmqa);
+static void fire_msiq_filter(void *cookie);
static void fire_msiq_handler(void *cookie);
static void fire_set_intr(struct fire_softc *sc, u_int index, u_int ino,
driver_filter_t handler, void *arg);
@@ -184,6 +189,13 @@ struct fire_icarg {
bus_addr_t fica_clr;
};
+static const struct intr_controller fire_msiqc_filter = {
+ fire_intr_enable,
+ fire_intr_disable,
+ fire_intr_assign,
+ NULL
+};
+
struct fire_msiqarg {
struct fire_icarg fmqa_fica;
struct mtx fmqa_mtx;
@@ -1611,7 +1623,7 @@ fire_intr_clear(void *arg)
*/
static int
-fire_alloc_msi(device_t dev, device_t child, int count, int maxcount,
+fire_alloc_msi(device_t dev, device_t child, int count, int maxcount __unused,
int *irqs)
{
struct fire_softc *sc;
@@ -1637,16 +1649,11 @@ fire_alloc_msi(device_t dev, device_t child, int count, int maxcount,
mtx_unlock(&sc->sc_msi_mtx);
return (ENXIO);
}
- /*
- * It's unclear whether we need to actually align the MSIs in the
- * mapping table based on the maxcount or just the count. We use
- * maxcount to be on the safe side.
- */
- for (i = 0; i + maxcount < sc->sc_msi_count; i += maxcount) {
- for (j = i; j < i + maxcount; j++)
+ for (i = 0; i + count < sc->sc_msi_count; i += count) {
+ for (j = i; j < i + count; j++)
if (isclr(sc->sc_msi_bitmap, j) == 0)
break;
- if (j == i + maxcount) {
+ if (j == i + count) {
for (j = 0; j < count; j++) {
setbit(sc->sc_msiq_bitmap, msiqrun + j);
setbit(sc->sc_msi_bitmap, i + j);
@@ -1765,33 +1772,67 @@ fire_msiq_handler(void *cookie)
{
struct intr_vector *iv;
struct fire_msiqarg *fmqa;
- struct fire_softc *sc;
- struct fo_msiq_record *qrec;
- device_t dev;
- uint64_t word0;
- u_int head, msi, msiq;
iv = cookie;
fmqa = iv->iv_icarg;
- sc = fmqa->fmqa_fica.fica_sc;
- dev = sc->sc_dev;
- msiq = fmqa->fmqa_msiq;
/*
* Note that since fire_intr_clear() will clear the event queue
- * interrupt after the filter/handler associated with the MSI [sic]
- * has been executed we have to protect the access to the event queue
- * as otherwise nested event queue interrupts cause corruption of the
+ * interrupt after the handler associated with the MSI [sic] has
+ * been executed we have to protect the access to the event queue as
+ * otherwise nested event queue interrupts cause corruption of the
* event queue on MP machines. Obviously especially when abandoning
* the 1:1 mapping it would be better to not clear the event queue
- * interrupt after each filter/handler invocation but only once when
- * the outstanding MSIs have been processed but unfortunately that
+ * interrupt after each handler invocation but only once when the
+ * outstanding MSIs have been processed but unfortunately that
* doesn't work well and leads to interrupt storms with controllers/
- * drivers which don't mask interrupts while the filter/handler is
- * executed. Maybe delaying clearing the MSI until after the filter/
- * handler has been executed could be used to work around this but
- * that's not the intended usage and might in turn cause lost MSIs.
+ * drivers which don't mask interrupts while the handler is executed.
+ * Maybe delaying clearing the MSI until after the handler has been
+ * executed could be used to work around this but that's not the
+ * intended usage and might in turn cause lost MSIs.
*/
mtx_lock_spin(&fmqa->fmqa_mtx);
+ fire_msiq_common(iv, fmqa);
+ mtx_unlock_spin(&fmqa->fmqa_mtx);
+}
+
+static void
+fire_msiq_filter(void *cookie)
+{
+ struct intr_vector *iv;
+ struct fire_msiqarg *fmqa;
+
+ iv = cookie;
+ fmqa = iv->iv_icarg;
+ /*
+ * For filters we don't use fire_intr_clear() since it would clear
+ * the event queue interrupt while we're still processing the event
+ * queue as filters and associated post-filter handler are executed
+ * directly, which in turn would lead to lost MSIs. So we clear the
+ * event queue interrupt only once after processing the event queue.
+ * Given that this still guarantees the filters to not be executed
+ * concurrently and no other CPU can clear the event queue interrupt
+ * while the event queue is still processed, we don't even need to
+ * interlock the access to the event queue in this case.
+ */
+ critical_enter();
+ fire_msiq_common(iv, fmqa);
+ FIRE_PCI_WRITE_8(fmqa->fmqa_fica.fica_sc, fmqa->fmqa_fica.fica_clr,
+ INTCLR_IDLE);
+ critical_exit();
+}
+
+static inline void
+fire_msiq_common(struct intr_vector *iv, struct fire_msiqarg *fmqa)
+{
+ struct fire_softc *sc;
+ struct fo_msiq_record *qrec;
+ device_t dev;
+ uint64_t word0;
+ u_int head, msi, msiq;
+
+ sc = fmqa->fmqa_fica.fica_sc;
+ dev = sc->sc_dev;
+ msiq = fmqa->fmqa_msiq;
head = (FIRE_PCI_READ_8(sc, fmqa->fmqa_head) & FO_PCI_EQ_HD_MASK) >>
FO_PCI_EQ_HD_SHFT;
qrec = &fmqa->fmqa_base[head];
@@ -1833,7 +1874,6 @@ fire_msiq_handler(void *cookie)
FIRE_PCI_READ_8(sc, FO_PCI_EQ_CTRL_CLR_BASE + msiq) |
FO_PCI_EQ_CTRL_CLR_COVERR);
}
- mtx_unlock_spin(&fmqa->fmqa_mtx);
}
static int
@@ -1842,6 +1882,7 @@ fire_setup_intr(device_t dev, device_t child, struct resource *ires,
void **cookiep)
{
struct fire_softc *sc;
+ struct fire_msiqarg *fmqa;
u_long vec;
int error;
u_int msi, msiq;
@@ -1872,31 +1913,39 @@ fire_setup_intr(device_t dev, device_t child, struct resource *ires,
intr, arg, cookiep);
rman_set_start(ires, msi);
rman_set_end(ires, msi);
- if (error == 0) {
+ if (error != 0)
+ return (error);
+ fmqa = intr_vectors[vec].iv_icarg;
+ /*
+ * XXX inject our event queue handler.
+ */
+ if (filt != NULL) {
+ intr_vectors[vec].iv_func = fire_msiq_filter;
+ intr_vectors[vec].iv_ic = &fire_msiqc_filter;
/*
- * XXX inject our event queue handler.
+ * Ensure the event queue interrupt is cleared, it
+ * might have triggered before. Given we supply NULL
+ * as ic_clear, inthand_add() won't do this for us.
*/
+ FIRE_PCI_WRITE_8(sc, fmqa->fmqa_fica.fica_clr,
+ INTCLR_IDLE);
+ } else
intr_vectors[vec].iv_func = fire_msiq_handler;
- /*
- * Record the MSI/MSI-X as long as we we use a 1:1
- * mapping.
- */
- ((struct fire_msiqarg *)intr_vectors[vec].iv_icarg)->
- fmqa_msi = msi;
- FIRE_PCI_WRITE_8(sc, FO_PCI_EQ_CTRL_SET_BASE +
- (msiq << 3), FO_PCI_EQ_CTRL_SET_EN);
- msi <<= 3;
- FIRE_PCI_WRITE_8(sc, FO_PCI_MSI_MAP_BASE + msi,
- (FIRE_PCI_READ_8(sc, FO_PCI_MSI_MAP_BASE + msi) &
- ~FO_PCI_MSI_MAP_EQNUM_MASK) |
- ((msiq << FO_PCI_MSI_MAP_EQNUM_SHFT) &
- FO_PCI_MSI_MAP_EQNUM_MASK));
- FIRE_PCI_WRITE_8(sc, FO_PCI_MSI_CLR_BASE + msi,
- FO_PCI_MSI_CLR_EQWR_N);
- FIRE_PCI_WRITE_8(sc, FO_PCI_MSI_MAP_BASE + msi,
- FIRE_PCI_READ_8(sc, FO_PCI_MSI_MAP_BASE + msi) |
- FO_PCI_MSI_MAP_V);
- }
+ /* Record the MSI/MSI-X as long as we we use a 1:1 mapping. */
+ fmqa->fmqa_msi = msi;
+ FIRE_PCI_WRITE_8(sc, FO_PCI_EQ_CTRL_SET_BASE + (msiq << 3),
+ FO_PCI_EQ_CTRL_SET_EN);
+ msi <<= 3;
+ FIRE_PCI_WRITE_8(sc, FO_PCI_MSI_MAP_BASE + msi,
+ (FIRE_PCI_READ_8(sc, FO_PCI_MSI_MAP_BASE + msi) &
+ ~FO_PCI_MSI_MAP_EQNUM_MASK) |
+ ((msiq << FO_PCI_MSI_MAP_EQNUM_SHFT) &
+ FO_PCI_MSI_MAP_EQNUM_MASK));
+ FIRE_PCI_WRITE_8(sc, FO_PCI_MSI_CLR_BASE + msi,
+ FO_PCI_MSI_CLR_EQWR_N);
+ FIRE_PCI_WRITE_8(sc, FO_PCI_MSI_MAP_BASE + msi,
+ FIRE_PCI_READ_8(sc, FO_PCI_MSI_MAP_BASE + msi) |
+ FO_PCI_MSI_MAP_V);
return (error);
}
@@ -1945,14 +1994,16 @@ fire_teardown_intr(device_t dev, device_t child, struct resource *ires,
(0 << FO_PCI_EQ_TL_SHFT) & FO_PCI_EQ_TL_MASK);
FIRE_PCI_WRITE_8(sc, FO_PCI_EQ_HD_BASE + msiq,
(0 << FO_PCI_EQ_HD_SHFT) & FO_PCI_EQ_HD_MASK);
+ intr_vectors[vec].iv_ic = &fire_ic;
/*
* The MD interrupt code needs the vector rather than the MSI.
*/
rman_set_start(ires, vec);
rman_set_end(ires, vec);
error = bus_generic_teardown_intr(dev, child, ires, cookie);
+ msi >>= 3;
rman_set_start(ires, msi);
- rman_set_end(ires, msi >> 3);
+ rman_set_end(ires, msi);
return (error);
}
return (bus_generic_teardown_intr(dev, child, ires, cookie));
diff --git a/sys/sun4v/conf/GENERIC b/sys/sun4v/conf/GENERIC
index e0e2cc2..2ff3fa5 100644
--- a/sys/sun4v/conf/GENERIC
+++ b/sys/sun4v/conf/GENERIC
@@ -66,6 +66,7 @@ options PRINTF_BUFR_SIZE=128 # Prevent printf output being interspersed.
options HWPMC_HOOKS # Necessary kernel hooks for hwpmc(4)
options AUDIT # Security event auditing
options MAC # TrustedBSD MAC Framework
+options INCLUDE_CONFIG_FILE # Include this file in kernel
# Debugging for use in -current
options KDB # Enable kernel debugger support.
@@ -219,4 +220,3 @@ device ccd
# on most arches and in most cases 1000Hz pessimizes performance
# its choice was not adequately researched
options HZ=100
-
diff --git a/sys/sun4v/conf/Makefile b/sys/sun4v/conf/Makefile
index 2c006e9..1c33841 100644
--- a/sys/sun4v/conf/Makefile
+++ b/sys/sun4v/conf/Makefile
@@ -1,3 +1,5 @@
# $FreeBSD$
+TARGET=sun4v
+
.include "${.CURDIR}/../../conf/makeLINT.mk"
diff --git a/sys/sys/proc.h b/sys/sys/proc.h
index d8e9fc8..0ae36af 100644
--- a/sys/sys/proc.h
+++ b/sys/sys/proc.h
@@ -217,7 +217,8 @@ struct thread {
int td_pinned; /* (k) Temporary cpu pin count. */
struct ucred *td_ucred; /* (k) Reference to credentials. */
u_int td_estcpu; /* (t) estimated cpu utilization */
- u_int td_slptick; /* (t) Time at sleep. */
+ int td_slptick; /* (t) Time at sleep. */
+ int td_blktick; /* (t) Time spent blocked. */
struct rusage td_ru; /* (t) rusage information */
uint64_t td_incruntime; /* (t) Cpu ticks to transfer to proc. */
uint64_t td_runtime; /* (t) How many cpu ticks we've run. */
diff --git a/sys/sys/sleepqueue.h b/sys/sys/sleepqueue.h
index 224d602..3e33e6b 100644
--- a/sys/sys/sleepqueue.h
+++ b/sys/sys/sleepqueue.h
@@ -112,6 +112,7 @@ void sleepq_set_timeout(void *wchan, int timo);
u_int sleepq_sleepcnt(void *wchan, int queue);
int sleepq_timedwait(void *wchan, int pri);
int sleepq_timedwait_sig(void *wchan, int pri);
+int sleepq_type(void *wchan);
void sleepq_wait(void *wchan, int pri);
int sleepq_wait_sig(void *wchan, int pri);
diff --git a/sys/sys/socket.h b/sys/sys/socket.h
index 13961e0..9f22748 100644
--- a/sys/sys/socket.h
+++ b/sys/sys/socket.h
@@ -462,8 +462,8 @@ struct cmsghdr {
#if __BSD_VISIBLE
/*
* While we may have more groups than this, the cmsgcred struct must
- * be able to fit in an mbuf, and NGROUPS_MAX is too large to allow
- * this.
+ * be able to fit in an mbuf and we have historically supported a
+ * maximum of 16 groups.
*/
#define CMGROUP_MAX 16
diff --git a/sys/sys/user.h b/sys/sys/user.h
index c1fd14a..b135034 100644
--- a/sys/sys/user.h
+++ b/sys/sys/user.h
@@ -100,12 +100,8 @@
#define KINFO_PROC_SIZE 768
#endif
#ifdef __mips__
-#if defined(__mips_n64)
-#define KINFO_PROC_SIZE 1088
-#else
#define KINFO_PROC_SIZE 816
#endif
-#endif
#ifdef __powerpc__
#define KINFO_PROC_SIZE 768
#endif
diff --git a/sys/teken/sequences b/sys/teken/sequences
index 9737b0f..cf720b0 100644
--- a/sys/teken/sequences
+++ b/sys/teken/sequences
@@ -105,6 +105,7 @@ C25ADBG Cons25 set adapter background ^[ [ = G r
C25ADFG Cons25 set adapter foreground ^[ [ = F r
C25BLPD Cons25 set bell pitch duration ^[ [ = B r r
C25CURS Cons25 set cursor type ^[ [ = S r
+C25MODE Cons25 set terminal mode ^[ [ = T r
C25VTSW Cons25 switch virtual terminal ^[ [ z r
# VT52 compatibility
diff --git a/sys/teken/teken_demo.c b/sys/teken/teken_demo.c
index e68cca1..49397a6 100644
--- a/sys/teken/teken_demo.c
+++ b/sys/teken/teken_demo.c
@@ -71,11 +71,7 @@ struct pixel {
};
#define NCOLS 80
-#ifdef TEKEN_XTERM
#define NROWS 24
-#else /* !TEKEN_XTERM */
-#define NROWS 25
-#endif /* TEKEN_XTERM */
struct pixel buffer[NCOLS][NROWS];
static int ptfd;
@@ -95,7 +91,6 @@ printchar(const teken_pos_t *p)
px = &buffer[p->tp_col][p->tp_row];
/* Convert Unicode to UTF-8. */
-#ifdef TEKEN_UTF8
if (px->c < 0x80) {
str[0] = px->c;
} else if (px->c < 0x800) {
@@ -111,9 +106,6 @@ printchar(const teken_pos_t *p)
str[2] = 0x80 | ((px->c >> 6) & 0x3f);
str[3] = 0x80 | (px->c & 0x3f);
}
-#else /* !TEKEN_UTF8 */
- str[0] = px->c;
-#endif /* TEKEN_UTF8 */
if (px->a.ta_format & TF_BOLD)
attr |= A_BOLD;
@@ -124,7 +116,8 @@ printchar(const teken_pos_t *p)
if (px->a.ta_format & TF_REVERSE)
attr |= A_REVERSE;
- bkgdset(attr | COLOR_PAIR(px->a.ta_fgcolor + 8 * px->a.ta_bgcolor));
+ bkgdset(attr | COLOR_PAIR(teken_256to8(px->a.ta_fgcolor) +
+ 8 * teken_256to8(px->a.ta_bgcolor)));
mvaddstr(p->tp_row, p->tp_col, str);
move(y, x);
@@ -294,9 +287,7 @@ main(int argc __unused, char *argv[] __unused)
};
int i, j;
-#ifdef TEKEN_UTF8
setlocale(LC_CTYPE, "UTF-8");
-#endif /* TEKEN_UTF8 */
tp.tp_row = ws.ws_row = NROWS;
tp.tp_col = ws.ws_col = NCOLS;
@@ -306,14 +297,8 @@ main(int argc __unused, char *argv[] __unused)
perror("forkpty");
exit(1);
case 0:
-#ifdef TEKEN_XTERM
setenv("TERM", "xterm", 1);
-#else /* !TEKEN_XTERM */
- setenv("TERM", "cons25", 1);
-#endif /* TEKEN_XTERM */
-#ifdef TEKEN_UTF8
setenv("LC_CTYPE", "UTF-8", 0);
-#endif /* TEKEN_UTF8 */
execlp("zsh", "-zsh", NULL);
execlp("bash", "-bash", NULL);
execlp("sh", "-sh", NULL);
diff --git a/sys/teken/teken_scs.h b/sys/teken/teken_scs.h
index baeb296..815e1d7 100644
--- a/sys/teken/teken_scs.h
+++ b/sys/teken/teken_scs.h
@@ -26,71 +26,53 @@
* $FreeBSD$
*/
-static void
-teken_scs_set(teken_t *t, unsigned int g, teken_scs_t *ts)
-{
-
- t->t_scs[g] = ts;
-}
-
-static void
-teken_scs_switch(teken_t *t, unsigned int g)
-{
-
- t->t_curscs = g;
-}
-
-static void
-teken_scs_restore(teken_t *t)
-{
-
- t->t_scs[t->t_curscs] = t->t_saved_curscs;
-}
-
-static void
-teken_scs_save(teken_t *t)
-{
-
- t->t_saved_curscs = t->t_scs[t->t_curscs];
-}
-
-static teken_char_t
+static inline teken_char_t
teken_scs_process(teken_t *t, teken_char_t c)
{
- return (t->t_scs[t->t_curscs](c));
+ return (t->t_scs[t->t_curscs](t, c));
}
/* Unicode points for VT100 box drawing. */
-static const uint16_t teken_boxdrawing[31] = {
+static const uint16_t teken_boxdrawing_unicode[31] = {
0x25c6, 0x2592, 0x2409, 0x240c, 0x240d, 0x240a, 0x00b0, 0x00b1,
0x2424, 0x240b, 0x2518, 0x2510, 0x250c, 0x2514, 0x253c, 0x23ba,
0x23bb, 0x2500, 0x23bc, 0x23bd, 0x251c, 0x2524, 0x2534, 0x252c,
0x2502, 0x2264, 0x2265, 0x03c0, 0x2260, 0x00a3, 0x00b7
};
+/* CP437 points for VT100 box drawing. */
+static const uint8_t teken_boxdrawing_8bit[31] = {
+ 0x04, 0xb1, 0x48, 0x46, 0x43, 0x4c, 0xf8, 0xf1,
+ 0x4e, 0x56, 0xd9, 0xbf, 0xda, 0xc0, 0xc5, 0xc4,
+ 0xc4, 0xc4, 0xc4, 0xc4, 0xc3, 0xb4, 0xc1, 0xc2,
+ 0xb3, 0xf3, 0xf2, 0xe3, 0xd8, 0x9c, 0xfa,
+};
+
static teken_char_t
-teken_scs_special_graphics(teken_char_t c)
+teken_scs_special_graphics(teken_t *t, teken_char_t c)
{
/* Box drawing. */
if (c >= '`' && c <= '~')
- return (teken_boxdrawing[c - '`']);
+ return (t->t_stateflags & TS_8BIT ?
+ teken_boxdrawing_8bit[c - '`'] :
+ teken_boxdrawing_unicode[c - '`']);
return (c);
}
static teken_char_t
-teken_scs_uk_national(teken_char_t c)
+teken_scs_uk_national(teken_t *t, teken_char_t c)
{
/* Pound sign. */
if (c == '#')
- return (0xa3);
+ return (t->t_stateflags & TS_8BIT ? 0x9c : 0xa3);
return (c);
}
static teken_char_t
-teken_scs_us_ascii(teken_char_t c)
+teken_scs_us_ascii(teken_t *t __unused, teken_char_t c)
{
/* No processing. */
diff --git a/sys/teken/teken_stress.c b/sys/teken/teken_stress.c
index 40d09bf..1f1c572 100644
--- a/sys/teken/teken_stress.c
+++ b/sys/teken/teken_stress.c
@@ -92,13 +92,16 @@ stress_respond(void *s __unused, const void *buf __unused, size_t len __unused)
{
}
+static const char replacement[] =
+ { 0x1b, '[', '0', '1', '2', '3', '4', '5', '6', '7', '8', '9', ';' };
+
int
main(int argc __unused, char *argv[] __unused)
{
teken_t t;
int rnd;
- unsigned int iteration = 0;
- char buf[2048];
+ unsigned int i, iteration = 0;
+ unsigned char buf[2048];
rnd = open("/dev/urandom", O_RDONLY);
if (rnd < 0) {
@@ -114,6 +117,12 @@ main(int argc __unused, char *argv[] __unused)
exit(1);
}
+ for (i = 0; i < sizeof buf; i++) {
+ if (buf[i] >= 0x80)
+ buf[i] =
+ replacement[buf[i] % sizeof replacement];
+ }
+
teken_input(&t, buf, sizeof buf);
iteration++;
diff --git a/sys/teken/teken_subr.h b/sys/teken/teken_subr.h
index 49257a0..6bad71e 100644
--- a/sys/teken/teken_subr.h
+++ b/sys/teken/teken_subr.h
@@ -185,11 +185,11 @@ teken_subr_alignment_test(teken_t *t)
{
teken_rect_t tr;
+ t->t_cursor.tp_row = t->t_cursor.tp_col = 0;
t->t_scrollreg.ts_begin = 0;
t->t_scrollreg.ts_end = t->t_winsize.tp_row;
-
- t->t_cursor.tp_row = t->t_cursor.tp_col = 0;
- t->t_stateflags &= ~TS_WRAPPED;
+ t->t_originreg = t->t_scrollreg;
+ t->t_stateflags &= ~(TS_WRAPPED|TS_ORIGIN);
teken_funcs_cursor(t);
tr.tr_begin.tp_row = 0;
@@ -202,22 +202,22 @@ static void
teken_subr_backspace(teken_t *t)
{
-#ifdef TEKEN_XTERM
- if (t->t_cursor.tp_col == 0)
- return;
-
- t->t_cursor.tp_col--;
- t->t_stateflags &= ~TS_WRAPPED;
-#else /* !TEKEN_XTERM */
- if (t->t_cursor.tp_col == 0) {
- if (t->t_cursor.tp_row == t->t_originreg.ts_begin)
- return;
- t->t_cursor.tp_row--;
- t->t_cursor.tp_col = t->t_winsize.tp_col - 1;
+ if (t->t_stateflags & TS_CONS25) {
+ if (t->t_cursor.tp_col == 0) {
+ if (t->t_cursor.tp_row == t->t_originreg.ts_begin)
+ return;
+ t->t_cursor.tp_row--;
+ t->t_cursor.tp_col = t->t_winsize.tp_col - 1;
+ } else {
+ t->t_cursor.tp_col--;
+ }
} else {
+ if (t->t_cursor.tp_col == 0)
+ return;
+
t->t_cursor.tp_col--;
+ t->t_stateflags &= ~TS_WRAPPED;
}
-#endif /* TEKEN_XTERM */
teken_funcs_cursor(t);
}
@@ -397,6 +397,11 @@ teken_subr_delete_line(teken_t *t, unsigned int nrows)
{
teken_rect_t tr;
+ /* Ignore if outside scrolling region. */
+ if (t->t_cursor.tp_row < t->t_scrollreg.ts_begin ||
+ t->t_cursor.tp_row >= t->t_scrollreg.ts_end)
+ return;
+
tr.tr_begin.tp_col = 0;
tr.tr_end.tp_row = t->t_scrollreg.ts_end;
tr.tr_end.tp_col = t->t_winsize.tp_col;
@@ -536,42 +541,42 @@ static void
teken_subr_g0_scs_special_graphics(teken_t *t __unused)
{
- teken_scs_set(t, 0, teken_scs_special_graphics);
+ t->t_scs[0] = teken_scs_special_graphics;
}
static void
teken_subr_g0_scs_uk_national(teken_t *t __unused)
{
- teken_scs_set(t, 0, teken_scs_uk_national);
+ t->t_scs[0] = teken_scs_uk_national;
}
static void
teken_subr_g0_scs_us_ascii(teken_t *t __unused)
{
- teken_scs_set(t, 0, teken_scs_us_ascii);
+ t->t_scs[0] = teken_scs_us_ascii;
}
static void
teken_subr_g1_scs_special_graphics(teken_t *t __unused)
{
- teken_scs_set(t, 1, teken_scs_special_graphics);
+ t->t_scs[1] = teken_scs_special_graphics;
}
static void
teken_subr_g1_scs_uk_national(teken_t *t __unused)
{
- teken_scs_set(t, 1, teken_scs_uk_national);
+ t->t_scs[1] = teken_scs_uk_national;
}
static void
teken_subr_g1_scs_us_ascii(teken_t *t __unused)
{
- teken_scs_set(t, 1, teken_scs_us_ascii);
+ t->t_scs[1] = teken_scs_us_ascii;
}
static void
@@ -589,21 +594,21 @@ teken_subr_horizontal_position_absolute(teken_t *t, unsigned int col)
static void
teken_subr_horizontal_tab(teken_t *t)
{
-#ifdef TEKEN_XTERM
- teken_rect_t tr;
- tr.tr_begin = t->t_cursor;
- teken_subr_cursor_forward_tabulation(t, 1);
- tr.tr_end.tp_row = tr.tr_begin.tp_row + 1;
- tr.tr_end.tp_col = t->t_cursor.tp_col;
+ if (t->t_stateflags & TS_CONS25) {
+ teken_subr_cursor_forward_tabulation(t, 1);
+ } else {
+ teken_rect_t tr;
- /* Blank region that we skipped. */
- if (tr.tr_end.tp_col > tr.tr_begin.tp_col)
- teken_funcs_fill(t, &tr, BLANK, &t->t_curattr);
-#else /* !TEKEN_XTERM */
+ tr.tr_begin = t->t_cursor;
+ teken_subr_cursor_forward_tabulation(t, 1);
+ tr.tr_end.tp_row = tr.tr_begin.tp_row + 1;
+ tr.tr_end.tp_col = t->t_cursor.tp_col;
- teken_subr_cursor_forward_tabulation(t, 1);
-#endif /* TEKEN_XTERM */
+ /* Blank region that we skipped. */
+ if (tr.tr_end.tp_col > tr.tr_begin.tp_col)
+ teken_funcs_fill(t, &tr, BLANK, &t->t_curattr);
+ }
}
static void
@@ -657,6 +662,11 @@ teken_subr_insert_line(teken_t *t, unsigned int nrows)
{
teken_rect_t tr;
+ /* Ignore if outside scrolling region. */
+ if (t->t_cursor.tp_row < t->t_scrollreg.ts_begin ||
+ t->t_cursor.tp_row >= t->t_scrollreg.ts_end)
+ return;
+
tr.tr_begin.tp_row = t->t_cursor.tp_row;
tr.tr_begin.tp_col = 0;
tr.tr_end.tp_col = t->t_winsize.tp_col;
@@ -711,19 +721,19 @@ teken_subr_newline(teken_t *t)
static void
teken_subr_newpage(teken_t *t)
{
-#ifdef TEKEN_XTERM
- teken_subr_newline(t);
-#else /* !TEKEN_XTERM */
- teken_rect_t tr;
+ if (t->t_stateflags & TS_CONS25) {
+ teken_rect_t tr;
- tr.tr_begin.tp_row = tr.tr_begin.tp_col = 0;
- tr.tr_end = t->t_winsize;
- teken_funcs_fill(t, &tr, BLANK, &t->t_curattr);
+ tr.tr_begin.tp_row = tr.tr_begin.tp_col = 0;
+ tr.tr_end = t->t_winsize;
+ teken_funcs_fill(t, &tr, BLANK, &t->t_curattr);
- t->t_cursor.tp_row = t->t_cursor.tp_col = 0;
- teken_funcs_cursor(t);
-#endif /* TEKEN_XTERM */
+ t->t_cursor.tp_row = t->t_cursor.tp_col = 0;
+ teken_funcs_cursor(t);
+ } else {
+ teken_subr_newline(t);
+ }
}
static void
@@ -788,6 +798,20 @@ teken_subr_do_putchar(teken_t *t, const teken_pos_t *tp, teken_char_t c,
teken_funcs_copy(t, &ctr, &ctp);
}
+ if (width == 2 && tp->tp_col + 1 < t->t_winsize.tp_col) {
+ teken_pos_t tp2;
+
+ /*
+ * Store a space behind double width characters before
+ * actually printing them. This prevents artifacts when
+ * the consumer doesn't render it using double width
+ * glyphs.
+ */
+ tp2.tp_row = tp->tp_row;
+ tp2.tp_col = tp->tp_col + 1;
+ teken_funcs_putchar(t, &tp2, BLANK, &t->t_curattr);
+ }
+
teken_funcs_putchar(t, tp, c, &t->t_curattr);
}
@@ -795,16 +819,37 @@ static void
teken_subr_regular_character(teken_t *t, teken_char_t c)
{
int width;
-
- c = teken_scs_process(t, c);
- /* XXX: Don't process zero-width characters yet. */
- width = teken_wcwidth(c);
- if (width <= 0)
- return;
+ if (t->t_stateflags & TS_8BIT) {
+ if (!(t->t_stateflags & TS_CONS25) && (c <= 0x1b || c == 0x7f))
+ return;
+ c = teken_scs_process(t, c);
+ width = 1;
+ } else {
+ c = teken_scs_process(t, c);
+ width = teken_wcwidth(c);
+ /* XXX: Don't process zero-width characters yet. */
+ if (width <= 0)
+ return;
+ }
-#ifdef TEKEN_XTERM
- if (t->t_cursor.tp_col == t->t_winsize.tp_col - 1 &&
+ if (t->t_stateflags & TS_CONS25) {
+ teken_subr_do_putchar(t, &t->t_cursor, c, width);
+ t->t_cursor.tp_col += width;
+
+ if (t->t_cursor.tp_col >= t->t_winsize.tp_col) {
+ if (t->t_cursor.tp_row == t->t_scrollreg.ts_end - 1) {
+ /* Perform scrolling. */
+ teken_subr_do_scroll(t, 1);
+ } else {
+ /* No scrolling needed. */
+ if (t->t_cursor.tp_row <
+ t->t_winsize.tp_row - 1)
+ t->t_cursor.tp_row++;
+ }
+ t->t_cursor.tp_col = 0;
+ }
+ } else if (t->t_cursor.tp_col == t->t_winsize.tp_col - 1 &&
(t->t_stateflags & (TS_WRAPPED|TS_AUTOWRAP)) ==
(TS_WRAPPED|TS_AUTOWRAP)) {
teken_pos_t tp;
@@ -848,22 +893,6 @@ teken_subr_regular_character(teken_t *t, teken_char_t c)
t->t_stateflags &= ~TS_WRAPPED;
}
}
-#else /* !TEKEN_XTERM */
- teken_subr_do_putchar(t, &t->t_cursor, c, width);
- t->t_cursor.tp_col += width;
-
- if (t->t_cursor.tp_col >= t->t_winsize.tp_col) {
- if (t->t_cursor.tp_row == t->t_scrollreg.ts_end - 1) {
- /* Perform scrolling. */
- teken_subr_do_scroll(t, 1);
- } else {
- /* No scrolling needed. */
- if (t->t_cursor.tp_row < t->t_winsize.tp_row - 1)
- t->t_cursor.tp_row++;
- }
- t->t_cursor.tp_col = 0;
- }
-#endif /* TEKEN_XTERM */
teken_funcs_cursor(t);
}
@@ -912,6 +941,9 @@ teken_subr_reset_dec_mode(teken_t *t, unsigned int cmd)
case 47: /* Switch to alternate buffer. */
teken_printf("Switch to alternate buffer\n");
break;
+ case 1000: /* Mouse input. */
+ teken_funcs_param(t, TP_MOUSE, 0);
+ break;
default:
teken_printf("Unknown DECRST: %u\n", cmd);
}
@@ -936,11 +968,15 @@ teken_subr_do_reset(teken_t *t)
t->t_curattr = t->t_defattr;
t->t_cursor.tp_row = t->t_cursor.tp_col = 0;
- t->t_stateflags = TS_AUTOWRAP;
+ t->t_scrollreg.ts_begin = 0;
+ t->t_scrollreg.ts_end = t->t_winsize.tp_row;
+ t->t_originreg = t->t_scrollreg;
+ t->t_stateflags &= TS_8BIT|TS_CONS25;
+ t->t_stateflags |= TS_AUTOWRAP;
- teken_scs_set(t, 0, teken_scs_us_ascii);
- teken_scs_set(t, 1, teken_scs_us_ascii);
- teken_scs_switch(t, 0);
+ t->t_scs[0] = teken_scs_us_ascii;
+ t->t_scs[1] = teken_scs_us_ascii;
+ t->t_curscs = 0;
teken_subr_save_cursor(t);
teken_tab_default(t);
@@ -962,8 +998,17 @@ teken_subr_restore_cursor(teken_t *t)
t->t_cursor = t->t_saved_cursor;
t->t_curattr = t->t_saved_curattr;
+ t->t_scs[t->t_curscs] = t->t_saved_curscs;
t->t_stateflags &= ~TS_WRAPPED;
- teken_scs_restore(t);
+
+ /* Get out of origin mode when the cursor is moved outside. */
+ if (t->t_cursor.tp_row < t->t_originreg.ts_begin ||
+ t->t_cursor.tp_row >= t->t_originreg.ts_end) {
+ t->t_stateflags &= ~TS_ORIGIN;
+ t->t_originreg.ts_begin = 0;
+ t->t_originreg.ts_end = t->t_winsize.tp_row;
+ }
+
teken_funcs_cursor(t);
}
@@ -986,7 +1031,7 @@ teken_subr_save_cursor(teken_t *t)
t->t_saved_cursor = t->t_cursor;
t->t_saved_curattr = t->t_curattr;
- teken_scs_save(t);
+ t->t_saved_curscs = t->t_scs[t->t_curscs];
}
static void
@@ -1045,6 +1090,9 @@ teken_subr_set_dec_mode(teken_t *t, unsigned int cmd)
case 47: /* Switch to alternate buffer. */
teken_printf("Switch away from alternate buffer\n");
break;
+ case 1000: /* Mouse input. */
+ teken_funcs_param(t, TP_MOUSE, 1);
+ break;
default:
teken_printf("Unknown DECSET: %u\n", cmd);
}
@@ -1117,6 +1165,12 @@ teken_subr_set_graphic_rendition(teken_t *t, unsigned int ncmds,
case 37: /* Set foreground color: white */
t->t_curattr.ta_fgcolor = n - 30;
break;
+ case 38: /* Set foreground color: 256 color mode */
+ if (i + 2 >= ncmds || cmds[i + 1] != 5)
+ continue;
+ t->t_curattr.ta_fgcolor = cmds[i + 2];
+ i += 2;
+ break;
case 39: /* Set default foreground color. */
t->t_curattr.ta_fgcolor = t->t_defattr.ta_fgcolor;
break;
@@ -1130,9 +1184,35 @@ teken_subr_set_graphic_rendition(teken_t *t, unsigned int ncmds,
case 47: /* Set background color: white */
t->t_curattr.ta_bgcolor = n - 40;
break;
+ case 48: /* Set background color: 256 color mode */
+ if (i + 2 >= ncmds || cmds[i + 1] != 5)
+ continue;
+ t->t_curattr.ta_bgcolor = cmds[i + 2];
+ i += 2;
+ break;
case 49: /* Set default background color. */
t->t_curattr.ta_bgcolor = t->t_defattr.ta_bgcolor;
break;
+ case 90: /* Set bright foreground color: black */
+ case 91: /* Set bright foreground color: red */
+ case 92: /* Set bright foreground color: green */
+ case 93: /* Set bright foreground color: brown */
+ case 94: /* Set bright foreground color: blue */
+ case 95: /* Set bright foreground color: magenta */
+ case 96: /* Set bright foreground color: cyan */
+ case 97: /* Set bright foreground color: white */
+ t->t_curattr.ta_fgcolor = n - 90 + 8;
+ break;
+ case 100: /* Set bright background color: black */
+ case 101: /* Set bright background color: red */
+ case 102: /* Set bright background color: green */
+ case 103: /* Set bright background color: brown */
+ case 104: /* Set bright background color: blue */
+ case 105: /* Set bright background color: magenta */
+ case 106: /* Set bright background color: cyan */
+ case 107: /* Set bright background color: white */
+ t->t_curattr.ta_bgcolor = n - 100 + 8;
+ break;
default:
teken_printf("unsupported attribute %u\n", n);
}
diff --git a/sys/teken/teken_subr_compat.h b/sys/teken/teken_subr_compat.h
index 4e03c66..e937298 100644
--- a/sys/teken/teken_subr_compat.h
+++ b/sys/teken/teken_subr_compat.h
@@ -59,6 +59,18 @@ teken_subr_cons25_set_adapter_foreground(teken_t *t, unsigned int c)
}
}
+static const teken_color_t cons25_revcolors[8] = { 0, 4, 2, 6, 1, 5, 3, 7 };
+
+void
+teken_get_defattr_cons25(teken_t *t, int *fg, int *bg)
+{
+
+ *fg = cons25_revcolors[teken_256to8(t->t_defattr.ta_fgcolor)];
+ if (t->t_defattr.ta_format & TF_BOLD)
+ *fg += 8;
+ *bg = cons25_revcolors[teken_256to8(t->t_defattr.ta_bgcolor)];
+}
+
static void
teken_subr_cons25_switch_virtual_terminal(teken_t *t, unsigned int vt)
{
@@ -75,6 +87,20 @@ teken_subr_cons25_set_bell_pitch_duration(teken_t *t, unsigned int pitch,
(duration & 0xffff));
}
+static void
+teken_subr_cons25_set_terminal_mode(teken_t *t, unsigned int mode)
+{
+
+ switch (mode) {
+ case 0: /* Switch terminal to xterm. */
+ t->t_stateflags &= ~TS_CONS25;
+ break;
+ case 1: /* Switch terminal to cons25. */
+ t->t_stateflags |= TS_CONS25;
+ break;
+ }
+}
+
#if 0
static void
teken_subr_vt52_decid(teken_t *t)
diff --git a/sys/ufs/ffs/ffs_snapshot.c b/sys/ufs/ffs/ffs_snapshot.c
index a6e73f5..b36cb58 100644
--- a/sys/ufs/ffs/ffs_snapshot.c
+++ b/sys/ufs/ffs/ffs_snapshot.c
@@ -739,7 +739,7 @@ out1:
auio.uio_iovcnt = 1;
aiov.iov_base = (void *)snapblklist;
aiov.iov_len = snaplistsize * sizeof(daddr_t);
- auio.uio_resid = aiov.iov_len;;
+ auio.uio_resid = aiov.iov_len;
auio.uio_offset = ip->i_size;
auio.uio_segflg = UIO_SYSSPACE;
auio.uio_rw = UIO_WRITE;
diff --git a/sys/ufs/ufs/ufs_dirhash.c b/sys/ufs/ufs/ufs_dirhash.c
index e18b838..c85fdc8 100644
--- a/sys/ufs/ufs/ufs_dirhash.c
+++ b/sys/ufs/ufs/ufs_dirhash.c
@@ -632,6 +632,7 @@ restart:
goto fail;
}
}
+ KASSERT(bp != NULL, ("no buffer allocated"));
dp = (struct direct *)(bp->b_data + (offset & bmask));
if (dp->d_reclen == 0 || dp->d_reclen >
DIRBLKSIZ - (offset & (DIRBLKSIZ - 1))) {
diff --git a/sys/xen/xenbus/xenbus_probe.c b/sys/xen/xenbus/xenbus_probe.c
index f04f8ec..b1e9a21 100644
--- a/sys/xen/xenbus/xenbus_probe.c
+++ b/sys/xen/xenbus/xenbus_probe.c
@@ -330,7 +330,7 @@ xenbus_devices_changed(struct xenbus_watch *watch,
device_t dev = sc->xs_dev;
char *node, *bus, *type, *id, *p;
- node = strdup(vec[XS_WATCH_PATH], M_DEVBUF);;
+ node = strdup(vec[XS_WATCH_PATH], M_DEVBUF);
p = strchr(node, '/');
if (!p)
goto out;
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