diff options
Diffstat (limited to 'sys/pci/if_sis.c')
| -rw-r--r-- | sys/pci/if_sis.c | 58 |
1 files changed, 31 insertions, 27 deletions
diff --git a/sys/pci/if_sis.c b/sys/pci/if_sis.c index b5b96ce..8394674 100644 --- a/sys/pci/if_sis.c +++ b/sys/pci/if_sis.c @@ -666,6 +666,16 @@ static void sis_reset(sc) /* Wait a little while for the chip to get its brains in order. */ DELAY(1000); + + /* + * If this is a NetSemi chip, make sure to clear + * PME mode. + */ + if (sc->sis_type == SIS_TYPE_83815) { + CSR_WRITE_4(sc, NS_CLKRUN, NS_CLKRUN_PMESTS); + CSR_WRITE_4(sc, NS_CLKRUN, 0); + } + return; } @@ -722,38 +732,32 @@ static int sis_attach(dev) /* * Handle power management nonsense. */ - - command = pci_read_config(dev, SIS_PCI_CAPID, 4) & 0x000000FF; - if (command == 0x01) { - - command = pci_read_config(dev, SIS_PCI_PWRMGMTCTRL, 4); - if (command & SIS_PSTATE_MASK) { - u_int32_t iobase, membase, irq; - - /* Save important PCI config data. */ - iobase = pci_read_config(dev, SIS_PCI_LOIO, 4); - membase = pci_read_config(dev, SIS_PCI_LOMEM, 4); - irq = pci_read_config(dev, SIS_PCI_INTLINE, 4); - - /* Reset the power state. */ - printf("sis%d: chip is in D%d power mode " - "-- setting to D0\n", unit, command & SIS_PSTATE_MASK); - command &= 0xFFFFFFFC; - pci_write_config(dev, SIS_PCI_PWRMGMTCTRL, command, 4); - - /* Restore PCI config data. */ - pci_write_config(dev, SIS_PCI_LOIO, iobase, 4); - pci_write_config(dev, SIS_PCI_LOMEM, membase, 4); - pci_write_config(dev, SIS_PCI_INTLINE, irq, 4); - } + if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) { + u_int32_t iobase, membase, irq; + + /* Save important PCI config data. */ + iobase = pci_read_config(dev, SIS_PCI_LOIO, 4); + membase = pci_read_config(dev, SIS_PCI_LOMEM, 4); + irq = pci_read_config(dev, SIS_PCI_INTLINE, 4); + + /* Reset the power state. */ + printf("sis%d: chip is in D%d power mode " + "-- setting to D0\n", unit, + pci_get_powerstate(dev)); + pci_set_powerstate(dev, PCI_POWERSTATE_D0); + + /* Restore PCI config data. */ + pci_write_config(dev, SIS_PCI_LOIO, iobase, 4); + pci_write_config(dev, SIS_PCI_LOMEM, membase, 4); + pci_write_config(dev, SIS_PCI_INTLINE, irq, 4); } /* * Map control/status registers. */ - command = pci_read_config(dev, PCIR_COMMAND, 4); - command |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN); - pci_write_config(dev, PCIR_COMMAND, command, 4); + pci_enable_busmaster(dev); + pci_enable_io(dev, PCIM_CMD_PORTEN); + pci_enable_io(dev, PCIM_CMD_MEMEN); command = pci_read_config(dev, PCIR_COMMAND, 4); #ifdef SIS_USEIOSPACE |
