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-rw-r--r--sys/pccard/i82365.h3
-rw-r--r--sys/pccard/pccard.c16
-rw-r--r--sys/pccard/pcic.c92
-rw-r--r--sys/pccard/pcic_pci.c100
-rw-r--r--sys/pccard/pcic_pci.h17
5 files changed, 154 insertions, 74 deletions
diff --git a/sys/pccard/i82365.h b/sys/pccard/i82365.h
index 6f19bb4..7e2ca8d 100644
--- a/sys/pccard/i82365.h
+++ b/sys/pccard/i82365.h
@@ -118,7 +118,8 @@
#define PCIC_IBM3 0x8a /* IBM KING PCIC clone; Both Memory and I/O */
/* For Interface Status register (PCIC_STATUS) */
-#define PCIC_VPPV 0x80 /* Vpp_valid */
+#define PCIC_VPPV 0x80 /* Vpp_valid or reserved*/
+#define PCIC_RICOH_5VCARD 0x80 /* 5V card detected */
#define PCIC_POW 0x40 /* PC Card power active */
#define PCIC_READY 0x20 /* Ready/~Busy */
#define PCIC_MWP 0x10 /* Memory Write Protect */
diff --git a/sys/pccard/pccard.c b/sys/pccard/pccard.c
index 964748b..aa2bf3c 100644
--- a/sys/pccard/pccard.c
+++ b/sys/pccard/pccard.c
@@ -290,25 +290,23 @@ inserted(void *arg)
slt->state = filled;
/*
- * Enable 5V to the card so that the CIS can be read.
- */
- slt->pwr.vcc = -1;
- slt->pwr.vpp = -1;
-
- /*
* Disable any pending timeouts for this slot, and explicitly
* power it off right now. Then, re-enable the power using
* the (possibly new) power settings.
*/
untimeout(power_off_slot, (caddr_t)slt, slt->poff_ch);
power_off_slot(slt);
+
+ /*
+ * Enable 5V to the card so that the CIS can be read. Well,
+ * enable the most natural voltage so that the CIS can be read.
+ */
+ slt->pwr.vcc = -1;
+ slt->pwr.vpp = -1;
slt->ctrl->power(slt);
printf("pccard: card inserted, slot %d\n", slt->slotnum);
pccard_insert_beep();
- /*
- * Now start resetting the card.
- */
slt->ctrl->reset(slt);
}
diff --git a/sys/pccard/pcic.c b/sys/pccard/pcic.c
index c4e60d3..c628ce7 100644
--- a/sys/pccard/pcic.c
+++ b/sys/pccard/pcic.c
@@ -387,7 +387,6 @@ pcic_attach(device_t dev)
sp->slt->irq = sc->irq;
/* Check for changes */
- pcic_setb(sp, PCIC_POWER, PCIC_PCPWRE | PCIC_DISRST);
sp->slt->laststate = sp->slt->state = empty;
if (pcic_boot_deactivated) {
if ((sp->getb(sp, PCIC_STATUS) & PCIC_CD) == PCIC_CD) {
@@ -497,9 +496,6 @@ pcic_ioctl(struct slot *slt, int cmd, caddr_t data)
*
* An expamination of the code will show the relative ease that we do
* Vpp in comparison to the ExCA case (which may be partially broken).
- *
- * Too bad it appears to not work. When used we seem to be unable to
- * read the card's CIS.
*/
static int
pcic_cardbus_power(struct pcic_slot *sp, struct slot *slt)
@@ -507,13 +503,39 @@ pcic_cardbus_power(struct pcic_slot *sp, struct slot *slt)
uint32_t power;
uint32_t state;
- /*
- * Preserve the clock stop bit of the socket power register.
- */
- power = bus_space_read_4(sp->bst, sp->bsh, CB_SOCKET_POWER);
- state = bus_space_read_4(sp->bst, sp->bsh, CB_SOCKET_STATE);
- printf("old value 0x%x\n", power);
- power &= ~CB_SP_CLKSTOP;
+ /*
+ * If we're doing an auto-detect, and we're in a badvcc state, then
+ * we need to force the socket to rescan the card. We don't do this
+ * all the time because the socket can take up to 200ms to do the deed,
+ * and that's too long to busy wait. Since this is a relatively rare
+ * event (some BIOSes, and earlier versions of OLDCARD caused it), we
+ * test for it special.
+ */
+ state = bus_space_read_4(sp->bst, sp->bsh, CB_SOCKET_STATE);
+ if (slt->pwr.vcc == -1 && (state & CB_SS_BADVCC)) {
+ /*
+ * Force the bridge to scan the card for the proper voltages
+ * that it supports.
+ */
+ bus_space_write_4(sp->bst, sp->bsh, CB_SOCKET_FORCE,
+ CB_SF_INTCVS);
+ state = bus_space_read_4(sp->bst, sp->bsh, CB_SOCKET_STATE);
+ /* This while loop can take 100-150ms */
+ while ((state & CB_SS_CARD_MASK) == 0) {
+ DELAY(10 * 1000);
+ state = bus_space_read_4(sp->bst, sp->bsh,
+ CB_SOCKET_STATE);
+ }
+ }
+
+
+ /*
+ * Preserve the clock stop bit of the socket power register. Not
+ * sure that we want to do that, but maybe we should set it based
+ * on the power state.
+ */
+ power = bus_space_read_4(sp->bst, sp->bsh, CB_SOCKET_POWER);
+ power = 0;
/*
* vcc == -1 means automatically detect the voltage of the card.
@@ -528,7 +550,12 @@ pcic_cardbus_power(struct pcic_slot *sp, struct slot *slt)
slt->pwr.vcc = 22;
else if (state & CB_SS_YVCARD)
slt->pwr.vcc = 11;
+ if (bootverbose && slt->pwr.vcc != -1)
+ device_printf(sp->sc->dev,
+ "Autodetected %d.%dV card\n",
+ slt->pwr.vcc / 10, slt->pwr.vcc % 10);
}
+
switch(slt->pwr.vcc) {
default:
return (EINVAL);
@@ -576,10 +603,26 @@ pcic_cardbus_power(struct pcic_slot *sp, struct slot *slt)
power |= CB_SP_VPP_12V;
break;
}
- printf("Setting power reg to 0x%x", power);
bus_space_write_4(sp->bst, sp->bsh, CB_SOCKET_POWER, power);
- return (EIO);
+ /*
+ * OK. We need to bring the card out of reset. Let the power
+ * stabilize for 300ms (why 300?) and then enable the outputs
+ * and then wait 100ms (why 100?) for it to stabilize. These numbers
+ * were stolen from the dim, dark past of OLDCARD and I have no clue
+ * how they were derived. I also use the bit setting routines here
+ * as a measure of conservatism.
+ */
+ if (power) {
+ pcic_setb(sp, PCIC_POWER, PCIC_DISRST);
+ DELAY(300*1000);
+ pcic_setb(sp, PCIC_POWER, PCIC_DISRST | PCIC_OUTENA);
+ DELAY(100*1000);
+ } else {
+ pcic_clrb(sp, PCIC_POWER, PCIC_DISRST | PCIC_OUTENA);
+ }
+
+ return (0);
}
/*
@@ -631,7 +674,9 @@ pcic_power(struct slot *slt)
* seem to have the signals wired right for the '29
* method to work, so we always use the '10 method for
* the '22. The laptops that don't work hang solid
- * when the pccard memory is accessed.
+ * when the pccard memory is accessed. The '32 and
+ * '33 cases are taken care of in cardbus code, so
+ * it doesn't matter that I have no clue.
*/
switch (sp->controller) {
case PCIC_PD6710:
@@ -668,6 +713,22 @@ pcic_power(struct slot *slt)
*/
reg |= PCIC_APSENA;
}
+ if (sc->flags & PCIC_RICOH_POWER) {
+ switch (sp->controller) {
+ case PCIC_RF5C396:
+ case PCIC_RF5C296:
+ /*
+ * The ISA bridge have the 5V/3.3V in register
+ * 1, bit 7.
+ */
+ c = sp->getb(sp, PCIC_STATUS);
+ if ((c & PCIC_RICOH_5VCARD) == 0)
+ slt->pwr.vcc = 33;
+ else
+ slt->pwr.vcc = 50;
+ break;
+ }
+ }
/* Other bridges here */
if (bootverbose && slt->pwr.vcc != -1)
device_printf(sc->dev, "Autodetected %d.%dV card\n",
@@ -881,7 +942,8 @@ pcic_disable(struct slot *slt)
pcic_clrb(sp, PCIC_INT_GEN, PCIC_CARDTYPE | PCIC_CARDRESET);
pcic_mapirq(slt, 0);
- sp->putb(sp, PCIC_POWER, 0);
+ slt->pwr.vcc = slt->pwr.vpp = 0;
+ pcic_power(slt);
}
/*
diff --git a/sys/pccard/pcic_pci.c b/sys/pccard/pcic_pci.c
index a063935..4c49068 100644
--- a/sys/pccard/pcic_pci.c
+++ b/sys/pccard/pcic_pci.c
@@ -208,13 +208,13 @@ struct pcic_pci_table
PCIC_PD6729, PCIC_PD_POWER, &pcic_pci_pd67xx_chip },
{ PCI_DEVICE_ID_PCIC_CLPD6832,
"Cirrus Logic PD6832 PCI-CardBus Bridge",
- PCIC_PD673X, PCIC_PD_POWER, &pcic_pci_pd68xx_chip },
+ PCIC_PD673X, PCIC_CARDBUS_POWER, &pcic_pci_pd68xx_chip },
{ PCI_DEVICE_ID_PCIC_CLPD6833,
"Cirrus Logic PD6833 PCI-CardBus Bridge",
- PCIC_PD673X, PCIC_PD_POWER, &pcic_pci_pd68xx_chip },
+ PCIC_PD673X, PCIC_CARDBUS_POWER, &pcic_pci_pd68xx_chip },
{ PCI_DEVICE_ID_PCIC_CLPD6834,
"Cirrus Logic PD6834 PCI-CardBus Bridge",
- PCIC_PD673X, PCIC_PD_POWER, &pcic_pci_pd68xx_chip },
+ PCIC_PD673X, PCIC_CARDBUS_POWER, &pcic_pci_pd68xx_chip },
{ PCI_DEVICE_ID_PCIC_OZ6729,
"O2micro OZ6729 PC-Card Bridge",
PCIC_I82365, PCIC_AB_POWER, &pcic_pci_oz67xx_chip },
@@ -223,16 +223,16 @@ struct pcic_pci_table
PCIC_I82365, PCIC_AB_POWER, &pcic_pci_oz67xx_chip },
{ PCI_DEVICE_ID_PCIC_OZ6832,
"O2micro 6832/6833 PCI-Cardbus Bridge",
- PCIC_I82365, PCIC_AB_POWER, &pcic_pci_oz68xx_chip },
+ PCIC_I82365, PCIC_CARDBUS_POWER, &pcic_pci_oz68xx_chip },
{ PCI_DEVICE_ID_PCIC_OZ6860,
"O2micro 6836/6860 PCI-Cardbus Bridge",
- PCIC_I82365, PCIC_AB_POWER, &pcic_pci_oz68xx_chip },
+ PCIC_I82365, PCIC_CARDBUS_POWER, &pcic_pci_oz68xx_chip },
{ PCI_DEVICE_ID_PCIC_OZ6872,
"O2micro 6812/6872 PCI-Cardbus Bridge",
- PCIC_I82365, PCIC_AB_POWER, &pcic_pci_oz68xx_chip },
+ PCIC_I82365, PCIC_CARDBUS_POWER, &pcic_pci_oz68xx_chip },
{ PCI_DEVICE_ID_PCIC_OZ6912,
"O2micro 6912 PCI-Cardbus Bridge",
- PCIC_I82365, PCIC_AB_POWER, &pcic_pci_oz68xx_chip },
+ PCIC_I82365, PCIC_CARDBUS_POWER, &pcic_pci_oz68xx_chip },
{ PCI_DEVICE_ID_PCIC_OZ6922,
"O2micro 6922 PCI-Cardbus Bridge",
PCIC_I82365, PCIC_AB_POWER, &pcic_pci_oz68xx_chip },
@@ -241,94 +241,94 @@ struct pcic_pci_table
PCIC_I82365, PCIC_AB_POWER, &pcic_pci_oz68xx_chip },
{ PCI_DEVICE_ID_RICOH_RL5C465,
"Ricoh RL5C465 PCI-CardBus Bridge",
- PCIC_RF5C296, PCIC_RICOH_POWER, &pcic_pci_ricoh_chip },
+ PCIC_RF5C296, PCIC_CARDBUS_POWER, &pcic_pci_ricoh_chip },
{ PCI_DEVICE_ID_RICOH_RL5C475,
"Ricoh RL5C475 PCI-CardBus Bridge",
- PCIC_RF5C296, PCIC_RICOH_POWER, &pcic_pci_ricoh_chip },
+ PCIC_RF5C296, PCIC_CARDBUS_POWER, &pcic_pci_ricoh_chip },
{ PCI_DEVICE_ID_RICOH_RL5C476,
"Ricoh RL5C476 PCI-CardBus Bridge",
- PCIC_RF5C296, PCIC_RICOH_POWER, &pcic_pci_ricoh_chip },
+ PCIC_RF5C296, PCIC_CARDBUS_POWER, &pcic_pci_ricoh_chip },
{ PCI_DEVICE_ID_RICOH_RL5C477,
"Ricoh RL5C477 PCI-CardBus Bridge",
- PCIC_RF5C296, PCIC_RICOH_POWER, &pcic_pci_ricoh_chip },
+ PCIC_RF5C296, PCIC_CARDBUS_POWER, &pcic_pci_ricoh_chip },
{ PCI_DEVICE_ID_RICOH_RL5C478,
"Ricoh RL5C478 PCI-CardBus Bridge",
- PCIC_RF5C296, PCIC_RICOH_POWER, &pcic_pci_ricoh_chip },
+ PCIC_RF5C296, PCIC_CARDBUS_POWER, &pcic_pci_ricoh_chip },
{ PCI_DEVICE_ID_PCIC_TI1031,
"TI PCI-1031 PCI-PCMCIA Bridge",
- PCIC_I82365SL_DF, PCIC_DF_POWER, &pcic_pci_ti113x_chip },
+ PCIC_I82365SL_DF, PCIC_CARDBUS_POWER, &pcic_pci_ti113x_chip },
{ PCI_DEVICE_ID_PCIC_TI1130,
"TI PCI-1130 PCI-CardBus Bridge",
- PCIC_I82365SL_DF, PCIC_DF_POWER, &pcic_pci_ti113x_chip },
+ PCIC_I82365SL_DF, PCIC_CARDBUS_POWER, &pcic_pci_ti113x_chip },
{ PCI_DEVICE_ID_PCIC_TI1131,
"TI PCI-1131 PCI-CardBus Bridge",
- PCIC_I82365SL_DF, PCIC_DF_POWER, &pcic_pci_ti113x_chip },
+ PCIC_I82365SL_DF, PCIC_CARDBUS_POWER, &pcic_pci_ti113x_chip },
{ PCI_DEVICE_ID_PCIC_TI1210,
"TI PCI-1210 PCI-CardBus Bridge",
- PCIC_I82365SL_DF, PCIC_DF_POWER, &pcic_pci_ti12xx_chip },
+ PCIC_I82365SL_DF, PCIC_CARDBUS_POWER, &pcic_pci_ti12xx_chip },
{ PCI_DEVICE_ID_PCIC_TI1211,
"TI PCI-1211 PCI-CardBus Bridge",
- PCIC_I82365SL_DF, PCIC_DF_POWER, &pcic_pci_ti12xx_chip },
+ PCIC_I82365SL_DF, PCIC_CARDBUS_POWER, &pcic_pci_ti12xx_chip },
{ PCI_DEVICE_ID_PCIC_TI1220,
"TI PCI-1220 PCI-CardBus Bridge",
- PCIC_I82365SL_DF, PCIC_DF_POWER, &pcic_pci_ti12xx_chip },
+ PCIC_I82365SL_DF, PCIC_CARDBUS_POWER, &pcic_pci_ti12xx_chip },
{ PCI_DEVICE_ID_PCIC_TI1221,
"TI PCI-1221 PCI-CardBus Bridge",
- PCIC_I82365SL_DF, PCIC_DF_POWER, &pcic_pci_ti12xx_chip },
+ PCIC_I82365SL_DF, PCIC_CARDBUS_POWER, &pcic_pci_ti12xx_chip },
{ PCI_DEVICE_ID_PCIC_TI1225,
"TI PCI-1225 PCI-CardBus Bridge",
- PCIC_I82365SL_DF, PCIC_DF_POWER, &pcic_pci_ti12xx_chip },
+ PCIC_I82365SL_DF, PCIC_CARDBUS_POWER, &pcic_pci_ti12xx_chip },
{ PCI_DEVICE_ID_PCIC_TI1250,
"TI PCI-1250 PCI-CardBus Bridge",
- PCIC_I82365SL_DF, PCIC_DF_POWER, &pcic_pci_ti12xx_chip },
+ PCIC_I82365SL_DF, PCIC_CARDBUS_POWER, &pcic_pci_ti12xx_chip },
{ PCI_DEVICE_ID_PCIC_TI1251,
"TI PCI-1251 PCI-CardBus Bridge",
- PCIC_I82365SL_DF, PCIC_DF_POWER, &pcic_pci_ti12xx_chip },
+ PCIC_I82365SL_DF, PCIC_CARDBUS_POWER, &pcic_pci_ti12xx_chip },
{ PCI_DEVICE_ID_PCIC_TI1251B,
"TI PCI-1251B PCI-CardBus Bridge",
- PCIC_I82365SL_DF, PCIC_DF_POWER, &pcic_pci_ti12xx_chip },
+ PCIC_I82365SL_DF, PCIC_CARDBUS_POWER, &pcic_pci_ti12xx_chip },
{ PCI_DEVICE_ID_PCIC_TI1260,
"TI PCI-1260 PCI-CardBus Bridge",
- PCIC_I82365SL_DF, PCIC_DF_POWER, &pcic_pci_ti12xx_chip },
+ PCIC_I82365SL_DF, PCIC_CARDBUS_POWER, &pcic_pci_ti12xx_chip },
{ PCI_DEVICE_ID_PCIC_TI1260B,
"TI PCI-1260B PCI-CardBus Bridge",
- PCIC_I82365SL_DF, PCIC_DF_POWER, &pcic_pci_ti12xx_chip },
+ PCIC_I82365SL_DF, PCIC_CARDBUS_POWER, &pcic_pci_ti12xx_chip },
{ PCI_DEVICE_ID_PCIC_TI1410,
"TI PCI-1410 PCI-CardBus Bridge",
- PCIC_I82365SL_DF, PCIC_DF_POWER, &pcic_pci_ti12xx_chip },
+ PCIC_I82365SL_DF, PCIC_CARDBUS_POWER, &pcic_pci_ti12xx_chip },
{ PCI_DEVICE_ID_PCIC_TI1420,
"TI PCI-1420 PCI-CardBus Bridge",
- PCIC_I82365SL_DF, PCIC_DF_POWER, &pcic_pci_ti12xx_chip },
+ PCIC_I82365SL_DF, PCIC_CARDBUS_POWER, &pcic_pci_ti12xx_chip },
{ PCI_DEVICE_ID_PCIC_TI1421,
"TI PCI-1421 PCI-CardBus Bridge",
- PCIC_I82365SL_DF, PCIC_DF_POWER, &pcic_pci_ti12xx_chip },
+ PCIC_I82365SL_DF, PCIC_CARDBUS_POWER, &pcic_pci_ti12xx_chip },
{ PCI_DEVICE_ID_PCIC_TI1450,
"TI PCI-1450 PCI-CardBus Bridge",
- PCIC_I82365SL_DF, PCIC_DF_POWER, &pcic_pci_ti12xx_chip },
+ PCIC_I82365SL_DF, PCIC_CARDBUS_POWER, &pcic_pci_ti12xx_chip },
{ PCI_DEVICE_ID_PCIC_TI1451,
"TI PCI-1451 PCI-CardBus Bridge",
- PCIC_I82365SL_DF, PCIC_DF_POWER, &pcic_pci_ti12xx_chip },
+ PCIC_I82365SL_DF, PCIC_CARDBUS_POWER, &pcic_pci_ti12xx_chip },
{ PCI_DEVICE_ID_PCIC_TI4410,
"TI PCI-4410 PCI-CardBus Bridge",
- PCIC_I82365SL_DF, PCIC_DF_POWER, &pcic_pci_ti12xx_chip },
+ PCIC_I82365SL_DF, PCIC_CARDBUS_POWER, &pcic_pci_ti12xx_chip },
{ PCI_DEVICE_ID_PCIC_TI4450,
"TI PCI-4450 PCI-CardBus Bridge",
- PCIC_I82365SL_DF, PCIC_DF_POWER, &pcic_pci_ti12xx_chip },
+ PCIC_I82365SL_DF, PCIC_CARDBUS_POWER, &pcic_pci_ti12xx_chip },
{ PCI_DEVICE_ID_PCIC_TI4451,
"TI PCI-4451 PCI-CardBus Bridge",
- PCIC_I82365SL_DF, PCIC_DF_POWER, &pcic_pci_ti12xx_chip },
+ PCIC_I82365SL_DF, PCIC_CARDBUS_POWER, &pcic_pci_ti12xx_chip },
{ PCI_DEVICE_ID_TOSHIBA_TOPIC95,
"Toshiba ToPIC95 PCI-CardBus Bridge",
- PCIC_I82365, PCIC_AB_POWER, &pcic_pci_topic_chip },
+ PCIC_I82365, PCIC_CARDBUS_POWER, &pcic_pci_topic_chip },
{ PCI_DEVICE_ID_TOSHIBA_TOPIC95B,
"Toshiba ToPIC95B PCI-CardBus Bridge",
- PCIC_I82365, PCIC_AB_POWER, &pcic_pci_topic_chip },
+ PCIC_I82365, PCIC_CARDBUS_POWER, &pcic_pci_topic_chip },
{ PCI_DEVICE_ID_TOSHIBA_TOPIC97,
"Toshiba ToPIC97 PCI-CardBus Bridge",
- PCIC_I82365, PCIC_DF_POWER, &pcic_pci_topic_chip },
+ PCIC_I82365, PCIC_CARDBUS_POWER, &pcic_pci_topic_chip },
{ PCI_DEVICE_ID_TOSHIBA_TOPIC100,
"Toshiba ToPIC100 PCI-CardBus Bridge",
- PCIC_I82365, PCIC_DF_POWER, &pcic_pci_topic_chip },
+ PCIC_I82365, PCIC_CARDBUS_POWER, &pcic_pci_topic_chip },
{ 0, NULL, 0, 0, NULL }
};
@@ -824,6 +824,18 @@ pcic_pci_topic_init(device_t dev)
u_int32_t device_id;
device_id = pci_get_devid(dev);
+ reg = pci_read_config(dev, TOPIC_SLOT_CTRL, 4);
+ reg |= (TOPIC_SLOT_CTRL_SLOTON | TOPIC_SLOT_CTRL_SLOTEN |
+ TOPIC_SLOT_CTRL_ID_LOCK | TOPIC_SLOT_CTRL_CARDBUS);
+ reg &= ~TOPIC_SLOT_CTRL_SWDETECT;
+ if (device_id == PCI_DEVICE_ID_TOSHIBA_TOPIC100 ||
+ device_id == PCI_DEVICE_ID_TOSHIBA_TOPIC97) {
+ reg |= TOPIC97_SLOT_CTRL_PCIINT;
+ reg &= ~(TOPIC97_SLOT_CTRL_STSIRQP | TOPIC97_SLOT_CTRL_IRQP);
+ }
+ pci_write_config(dev, TOPIC_SLOT_CTRL, reg, 4);
+ pcic_pci_cardbus_init(dev);
+
if (device_id == PCI_DEVICE_ID_TOSHIBA_TOPIC100 ||
device_id == PCI_DEVICE_ID_TOSHIBA_TOPIC97) {
/*
@@ -836,15 +848,6 @@ pcic_pci_topic_init(device_t dev)
pcic_setb(&sc->slots[0], PCIC_TOPIC_FCR,
PCIC_FCR_3V_EN | PCIC_FCR_VS_EN);
}
- reg = pci_read_config(dev, TOPIC_SLOT_CTRL, 4);
- reg |= (TOPIC_SLOT_CTRL_SLOTON | TOPIC_SLOT_CTRL_SLOTEN |
- TOPIC_SLOT_CTRL_ID_LOCK | TOPIC_SLOT_CTRL_CARDBUS);
- reg &= ~TOPIC_SLOT_CTRL_SWDETECT;
- if (device_id == PCI_DEVICE_ID_TOSHIBA_TOPIC100 ||
- device_id == PCI_DEVICE_ID_TOSHIBA_TOPIC97)
- reg &= ~(TOPIC97_SLOT_CTRL_STSIRQP | TOPIC97_SLOT_CTRL_IRQP);
- pci_write_config(dev, TOPIC_SLOT_CTRL, reg, 4);
- pcic_pci_cardbus_init(dev);
}
static void
@@ -936,7 +939,7 @@ pcic_cd_change(void *arg)
sc->cd_present = 1;
if (bootverbose && (stat & CB_SS_BADVCC) != 0)
- device_printf(sc->dev, "BAD Vcc request\n");
+ device_printf(sc->dev, "BAD Vcc request: 0x%x\n", stat);
if ((stat & CB_SS_16BIT) == 0)
device_printf(sp->sc->dev, "Card type %s is unsupported\n",
pcic_pci_cardtype(stat));
@@ -1232,9 +1235,8 @@ pcic_pci_attach(device_t dev)
/* By default, assume we're a D step compatible */
sp->controller = PCIC_I82365SL_DF;
sp->revision = 0;
- sc->flags = PCIC_DF_POWER;
+ sc->flags = PCIC_CARDBUS_POWER;
}
- /* sc->flags = PCIC_CARDBUS_POWER; */
sp->slt = (struct slot *) 1;
sc->csc_route = pcic_intr_path;
sc->func_route = pcic_intr_path;
diff --git a/sys/pccard/pcic_pci.h b/sys/pccard/pcic_pci.h
index dbba582..95f5e89 100644
--- a/sys/pccard/pcic_pci.h
+++ b/sys/pccard/pcic_pci.h
@@ -201,6 +201,7 @@
#define CB_SM_CD 0x6 /* Socket MASK Card detect */
#define CB_SM_POWER 0x8
+/* Socket State Register */
#define CB_SS_CARDSTS 0x00000001 /* Card Status Change */
#define CB_SS_CD1 0x00000002 /* Card Detect 1 */
#define CB_SS_CD2 0x00000004 /* Card Detect 2 */
@@ -216,11 +217,13 @@
#define CB_SS_3VCARD 0x00000800 /* 3.3 V Card */
#define CB_SS_XVCARD 0x00001000 /* X.X V Card */
#define CB_SS_YVCARD 0x00002000 /* Y.Y V Card */
+#define CB_SS_CARD_MASK 0x00003c00 /* *VCARD signal */
#define CB_SS_5VSOCK 0x10000000 /* 5 V Socket */
#define CB_SS_3VSOCK 0x20000000 /* 3.3 V Socket */
#define CB_SS_XVSOCK 0x40000000 /* X.X V Socket */
#define CB_SS_YVSOCK 0x80000000 /* Y.Y V Socket */
+/* Socket power register */
#define CB_SP_CLKSTOP 0x80 /* Cardbus clock stop protocol */
#define CB_SP_VCC_MASK 0x70
#define CB_SP_VCC_0V 0x00
@@ -237,4 +240,18 @@
#define CB_SP_VPP_3V 0x03
#define CB_SP_VPP_XV 0x04
#define CB_SP_VPP_YV 0x05
+
+/* Socket force register */
+#define CB_SF_INTCVS (1 << 14) /* Interregate CVS/CCD pins */
+#define CB_SF_5VCARD (1 << 11)
+#define CB_SF_3VCARD (1 << 10)
+#define CB_SF_BADVCC (1 << 9)
+#define CB_SF_DATALOST (1 << 8)
+#define CB_SF_NOTACARD (1 << 7)
+#define CB_SF_CBCARD (1 << 5)
+#define CB_SF_16CARD (1 << 4)
+#define CB_SF_POWERCYCLE (1 << 3)
+#define CB_SF_CCD2 (1 << 2)
+#define CB_SF_CCD1 (1 << 1)
+#define CB_SF_CSTCHG (1 << 0)
/* 0x6 and 0x7 are reserved */
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