diff options
Diffstat (limited to 'sys/mips/atheros/ar71xxreg.h')
| -rw-r--r-- | sys/mips/atheros/ar71xxreg.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/sys/mips/atheros/ar71xxreg.h b/sys/mips/atheros/ar71xxreg.h index 5e3505b..f12c0df 100644 --- a/sys/mips/atheros/ar71xxreg.h +++ b/sys/mips/atheros/ar71xxreg.h @@ -162,7 +162,7 @@ #define AR71XX_BASE_FREQ 40000000 #define AR71XX_PLL_CPU_BASE 0x18050000 #define AR71XX_PLL_CPU_CONFIG 0x18050000 -#define PLL_SW_UPDATE (1 << 31) +#define PLL_SW_UPDATE (1U << 31) #define PLL_LOCKED (1 << 30) #define PLL_AHB_DIV_SHIFT 20 #define PLL_AHB_DIV_MASK 7 @@ -200,7 +200,7 @@ #define AR71XX_RST_BLOCK_BASE 0x18060000 #define AR71XX_RST_WDOG_CONTROL 0x18060008 -#define RST_WDOG_LAST (1 << 31) +#define RST_WDOG_LAST (1U << 31) #define RST_WDOG_ACTION_MASK 3 #define RST_WDOG_ACTION_RESET 3 #define RST_WDOG_ACTION_NMI 2 @@ -303,7 +303,7 @@ typedef enum { #define AR71XX_MAC1_BASE 0x1A000000 #define AR71XX_MAC_CFG1 0x00 -#define MAC_CFG1_SOFT_RESET (1 << 31) +#define MAC_CFG1_SOFT_RESET (1U << 31) #define MAC_CFG1_SIMUL_RESET (1 << 30) #define MAC_CFG1_MAC_RX_BLOCK_RESET (1 << 19) #define MAC_CFG1_MAC_TX_BLOCK_RESET (1 << 18) @@ -332,7 +332,7 @@ typedef enum { #define AR71XX_MAC_HDUPLEX 0x0C #define AR71XX_MAC_MAX_FRAME_LEN 0x10 #define AR71XX_MAC_MII_CFG 0x20 -#define MAC_MII_CFG_RESET (1 << 31) +#define MAC_MII_CFG_RESET (1U << 31) #define MAC_MII_CFG_SCAN_AUTO_INC (1 << 5) #define MAC_MII_CFG_PREAMBLE_SUP (1 << 4) #define MAC_MII_CFG_CLOCK_SELECT_MASK 0x7 |
