1 files changed, 12 insertions, 0 deletions
diff --git a/sys/isa/fdreg.h b/sys/isa/fdreg.h
index c082668..893aefd 100644
--- a/sys/isa/fdreg.h
+++ b/sys/isa/fdreg.h
@@ -69,3 +69,15 @@
 #define	FDI_DCHG	0x80	/* diskette has been changed */
 				/* requires drive and motor being selected */
 				/* is cleared by any step pulse to drive */
+
+/*
+ * Timeout value for the PIO loops to wait until the FDC main status
+ * register matches our expextations (request for master, direction
+ * bit).  This is the number of cycles to loop while waiting, with a
+ * 1-microsecond (in theory) DELAY() in each cycle.  In particular on
+ * slower hardware, it could take a fair amount more to execute.  Of
+ * course, as soon as the FDC main status register indicates the correct
+ * bits are set, the loop will terminate, so this is merely a safety
+ * measure to avoid looping forever in case of broken hardware.
+ */
+#define	FDSTS_TIMEOUT	200