1 files changed, 41 insertions, 24 deletions

diff --git a/sys/i386/i386/identcpu.c b/sys/i386/i386/identcpu.c
index ec8ac90..ccf6824 100644
--- a/sys/i386/i386/identcpu.c
+++ b/sys/i386/i386/identcpu.c
@@ -86,6 +86,7 @@ static void print_INTEL_info(void);
 static void print_INTEL_TLB(u_int data);
 static void print_AMD_assoc(int i);
 static void print_transmeta_info(void);
+static void print_via_padlock_info(void);
 
 int	cpu_class;
 u_int	cpu_exthigh;		/* Highest arg to extended CPUID */
@@ -581,31 +582,10 @@ printcpuinfo(void)
 			break;
 		case 0x690:
 			strcpy(cpu_model, "VIA C3 Nehemiah");
-			if ((cpu_id & 0xf) < 3)
-				break;
-			goto via_common;
+			break;
 		case 0x6a0:
 		case 0x6d0:
 			strcpy(cpu_model, "VIA C7 Esther");
-			goto via_common;
-via_common:
-			do_cpuid(0xc0000000, regs);
-			i = regs[0];
-			if (i >= 0xC0000001) {
-				do_cpuid(0xc0000001, regs);
-				i = regs[3];
-			} else
-				i = 0;
-			if (i & VIA_CPUID_HAS_RNG)
-				strcat(cpu_model, "+RNG");
-			if (i & VIA_CPUID_HAS_ACE)
-				strcat(cpu_model, "+AES");
-			if (i & VIA_CPUID_HAS_ACE2)
-				strcat(cpu_model, "+AES-CTR");
-			if (i & VIA_CPUID_HAS_PHE)
-				strcat(cpu_model, "+SHA1+SHA256");
-			if (i & VIA_CPUID_HAS_PMM)
-				strcat(cpu_model, "+RSA");
 			break;
 		default:
 			strcpy(cpu_model, "VIA/IDT Unknown");
@@ -892,6 +872,9 @@ via_common:
 			printf("\n  CPU cache: write-through mode");
 #endif
 	}
+	if (strcmp(cpu_vendor, "CentaurHauls") == 0)
+		print_via_padlock_info();
+
 	/* Avoid ugly blank lines: only print newline when we have to. */
 	if (*cpu_vendor || cpu_id)
 		printf("\n");
@@ -1476,7 +1459,8 @@ print_INTEL_TLB(u_int data)
 
 
 static void
-setPQL2_AMD(int *const size, int *const ways) {
+setPQL2_AMD(int *const size, int *const ways)
+{
 	if (cpu_exthigh >= 0x80000006) {
 		u_int regs[4];
 
@@ -1768,7 +1752,7 @@ setPQL2(int *const size, int *const ways)
 }
 
 static void
-print_transmeta_info()
+print_transmeta_info(void)
 {
 	u_int regs[4], nreg = 0;
 
@@ -1801,3 +1785,36 @@ print_transmeta_info()
 		printf("  %s\n", info);
 	}
 }
+
+static void
+print_via_padlock_info(void)
+{
+	u_int regs[4];
+
+	/* Check for supported models. */
+	switch (cpu_id & 0xff0) {
+	case 0x690:
+		if ((cpu_id & 0xf) < 3)
+			return;
+	case 0x6a0:
+	case 0x6d0:
+		break;
+	default:
+		return;
+	}
+	
+	do_cpuid(0xc0000000, regs);
+	if (regs[0] >= 0xc0000001)
+		do_cpuid(0xc0000001, regs);
+	else
+		return;
+
+	printf("\n  VIA Padlock Features=0x%b", regs[3],
+	"\020"
+	"\003RNG"		/* RNG */
+	"\007AES"		/* ACE */
+	"\011AES-CTR"		/* ACE2 */
+	"\013SHA1,SHA256"	/* PHE */
+	"\015RSA"		/* PMM */
+	);
+}