summaryrefslogtreecommitdiffstats
path: root/sys/dev
diff options
context:
space:
mode:
Diffstat (limited to 'sys/dev')
-rw-r--r--sys/dev/e1000/if_em.c53
-rw-r--r--sys/dev/e1000/if_igb.c64
-rw-r--r--sys/dev/e1000/if_igb.h8
-rw-r--r--sys/dev/gpioapu/gpioapu.c336
-rw-r--r--sys/dev/ichwd/ichwd.c473
-rw-r--r--sys/dev/ichwd/ichwd.h65
-rw-r--r--sys/dev/ixgbe/if_ix.c389
-rw-r--r--sys/dev/ixgbe/ix_txrx.c57
-rw-r--r--sys/dev/ixgbe/ixgbe.h6
-rw-r--r--sys/dev/ixgbe/ixgbe_common.c5
-rw-r--r--sys/dev/ixgbe/ixgbe_dcb.c2
-rw-r--r--sys/dev/ixgbe/ixgbe_osdep.h30
-rw-r--r--sys/dev/ixgbe/ixgbe_phy.c4
-rw-r--r--sys/dev/ixgbe/ixgbe_type.h24
-rw-r--r--sys/dev/ixgbe/ixgbe_vf.c4
-rw-r--r--sys/dev/ixgbe/ixgbe_x550.c220
-rw-r--r--sys/dev/netmap/netmap_generic.c3
-rw-r--r--sys/dev/oce/oce_if.c11
-rw-r--r--sys/dev/oce/oce_mbox.c2
-rw-r--r--sys/dev/random/hash.c6
-rw-r--r--sys/dev/random/hash.h6
-rw-r--r--sys/dev/usb/serial/u3g.c12
-rw-r--r--sys/dev/usb/usbdevs2
-rw-r--r--sys/dev/virtio/network/if_vtnet.c26
-rw-r--r--sys/dev/vmware/vmxnet3/if_vmx.c24
25 files changed, 1066 insertions, 766 deletions
diff --git a/sys/dev/e1000/if_em.c b/sys/dev/e1000/if_em.c
index 6883a7a..b77d0e9 100644
--- a/sys/dev/e1000/if_em.c
+++ b/sys/dev/e1000/if_em.c
@@ -213,15 +213,15 @@ static int em_detach(device_t);
static int em_shutdown(device_t);
static int em_suspend(device_t);
static int em_resume(device_t);
-#ifdef EM_MULTIQUEUE
+
static int em_mq_start(struct ifnet *, struct mbuf *);
static int em_mq_start_locked(struct ifnet *,
struct tx_ring *);
static void em_qflush(struct ifnet *);
-#else
+
static void em_start(struct ifnet *);
static void em_start_locked(struct ifnet *, struct tx_ring *);
-#endif
+
static int em_ioctl(struct ifnet *, u_long, caddr_t);
static void em_init(void *);
static void em_init_locked(struct adapter *);
@@ -944,13 +944,13 @@ em_resume(device_t dev)
(ifp->if_drv_flags & IFF_DRV_RUNNING) && adapter->link_active) {
for (int i = 0; i < adapter->num_queues; i++, txr++) {
EM_TX_LOCK(txr);
-#ifdef EM_MULTIQUEUE
+
if (!drbr_empty(ifp, txr->br))
em_mq_start_locked(ifp, txr);
-#else
+
if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
em_start_locked(ifp, txr);
-#endif
+
EM_TX_UNLOCK(txr);
}
}
@@ -960,7 +960,7 @@ em_resume(device_t dev)
}
-#ifndef EM_MULTIQUEUE
+
static void
em_start_locked(struct ifnet *ifp, struct tx_ring *txr)
{
@@ -1023,7 +1023,7 @@ em_start(struct ifnet *ifp)
}
return;
}
-#else /* EM_MULTIQUEUE */
+
/*********************************************************************
* Multiqueue Transmit routines
*
@@ -1130,7 +1130,7 @@ em_qflush(struct ifnet *ifp)
}
if_qflush(ifp);
}
-#endif /* EM_MULTIQUEUE */
+
/*********************************************************************
* Ioctl entry point
@@ -1532,13 +1532,13 @@ em_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
EM_TX_LOCK(txr);
em_txeof(txr);
-#ifdef EM_MULTIQUEUE
+
if (!drbr_empty(ifp, txr->br))
em_mq_start_locked(ifp, txr);
-#else
+
if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
em_start_locked(ifp, txr);
-#endif
+
EM_TX_UNLOCK(txr);
return (rx_done);
@@ -1606,13 +1606,13 @@ em_handle_que(void *context, int pending)
EM_TX_LOCK(txr);
em_txeof(txr);
-#ifdef EM_MULTIQUEUE
+
if (!drbr_empty(ifp, txr->br))
em_mq_start_locked(ifp, txr);
-#else
+
if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
em_start_locked(ifp, txr);
-#endif
+
EM_TX_UNLOCK(txr);
if (more) {
taskqueue_enqueue(adapter->tq, &adapter->que_task);
@@ -1640,13 +1640,13 @@ em_msix_tx(void *arg)
++txr->tx_irq;
EM_TX_LOCK(txr);
em_txeof(txr);
-#ifdef EM_MULTIQUEUE
+
if (!drbr_empty(ifp, txr->br))
em_mq_start_locked(ifp, txr);
-#else
+
if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
em_start_locked(ifp, txr);
-#endif
+
/* Reenable this interrupt */
E1000_WRITE_REG(&adapter->hw, E1000_IMS, txr->ims);
@@ -1741,13 +1741,13 @@ em_handle_tx(void *context, int pending)
EM_TX_LOCK(txr);
em_txeof(txr);
-#ifdef EM_MULTIQUEUE
+
if (!drbr_empty(ifp, txr->br))
em_mq_start_locked(ifp, txr);
-#else
+
if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
em_start_locked(ifp, txr);
-#endif
+
E1000_WRITE_REG(&adapter->hw, E1000_IMS, txr->ims);
EM_TX_UNLOCK(txr);
}
@@ -1771,13 +1771,13 @@ em_handle_link(void *context, int pending)
if (adapter->link_active) {
for (int i = 0; i < adapter->num_queues; i++, txr++) {
EM_TX_LOCK(txr);
-#ifdef EM_MULTIQUEUE
+
if (!drbr_empty(ifp, txr->br))
em_mq_start_locked(ifp, txr);
-#else
+
if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
em_start_locked(ifp, txr);
-#endif
+
EM_TX_UNLOCK(txr);
}
}
@@ -3244,16 +3244,15 @@ em_setup_interface(device_t dev, struct adapter *adapter)
ifp->if_hw_tsomaxsegcount = EM_MAX_SCATTER - 5;
ifp->if_hw_tsomaxsegsize = EM_TSO_SEG_SIZE;
-#ifdef EM_MULTIQUEUE
/* Multiqueue stack interface */
ifp->if_transmit = em_mq_start;
ifp->if_qflush = em_qflush;
-#else
+
ifp->if_start = em_start;
IFQ_SET_MAXLEN(&ifp->if_snd, adapter->num_tx_desc - 1);
ifp->if_snd.ifq_drv_maxlen = adapter->num_tx_desc - 1;
IFQ_SET_READY(&ifp->if_snd);
-#endif
+
ether_ifattach(ifp, adapter->hw.mac.addr);
diff --git a/sys/dev/e1000/if_igb.c b/sys/dev/e1000/if_igb.c
index cdd067f..4945950 100644
--- a/sys/dev/e1000/if_igb.c
+++ b/sys/dev/e1000/if_igb.c
@@ -121,15 +121,12 @@ static int igb_detach(device_t);
static int igb_shutdown(device_t);
static int igb_suspend(device_t);
static int igb_resume(device_t);
-#ifndef IGB_LEGACY_TX
static int igb_mq_start(struct ifnet *, struct mbuf *);
static int igb_mq_start_locked(struct ifnet *, struct tx_ring *);
static void igb_qflush(struct ifnet *);
static void igb_deferred_mq_start(void *, int);
-#else
static void igb_start(struct ifnet *);
static void igb_start_locked(struct tx_ring *, struct ifnet *ifp);
-#endif
static int igb_ioctl(struct ifnet *, u_long, caddr_t);
static void igb_init(void *);
static void igb_init_locked(struct adapter *);
@@ -293,7 +290,6 @@ TUNABLE_INT("hw.igb.max_interrupt_rate", &igb_max_interrupt_rate);
SYSCTL_INT(_hw_igb, OID_AUTO, max_interrupt_rate, CTLFLAG_RDTUN,
&igb_max_interrupt_rate, 0, "Maximum interrupts per second");
-#ifndef IGB_LEGACY_TX
/*
** Tuneable number of buffers in the buf-ring (drbr_xxx)
*/
@@ -301,7 +297,6 @@ static int igb_buf_ring_size = IGB_BR_SIZE;
TUNABLE_INT("hw.igb.buf_ring_size", &igb_buf_ring_size);
SYSCTL_INT(_hw_igb, OID_AUTO, buf_ring_size, CTLFLAG_RDTUN,
&igb_buf_ring_size, 0, "Size of the bufring");
-#endif
/*
** Header split causes the packet header to
@@ -807,15 +802,15 @@ igb_resume(device_t dev)
(ifp->if_drv_flags & IFF_DRV_RUNNING) && adapter->link_active) {
for (int i = 0; i < adapter->num_queues; i++, txr++) {
IGB_TX_LOCK(txr);
-#ifndef IGB_LEGACY_TX
+
/* Process the stack queue only if not depleted */
if (((txr->queue_status & IGB_QUEUE_DEPLETED) == 0) &&
!drbr_empty(ifp, txr->br))
igb_mq_start_locked(ifp, txr);
-#else
+
if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
igb_start_locked(txr, ifp);
-#endif
+
IGB_TX_UNLOCK(txr);
}
}
@@ -825,7 +820,6 @@ igb_resume(device_t dev)
}
-#ifdef IGB_LEGACY_TX
/*********************************************************************
* Transmit entry point
@@ -903,7 +897,6 @@ igb_start(struct ifnet *ifp)
return;
}
-#else /* ~IGB_LEGACY_TX */
/*
** Multiqueue Transmit Entry:
@@ -1022,7 +1015,6 @@ igb_qflush(struct ifnet *ifp)
}
if_qflush(ifp);
}
-#endif /* ~IGB_LEGACY_TX */
/*********************************************************************
* Ioctl entry point
@@ -1360,15 +1352,15 @@ igb_handle_que(void *context, int pending)
IGB_TX_LOCK(txr);
igb_txeof(txr);
-#ifndef IGB_LEGACY_TX
+
/* Process the stack queue only if not depleted */
if (((txr->queue_status & IGB_QUEUE_DEPLETED) == 0) &&
!drbr_empty(ifp, txr->br))
igb_mq_start_locked(ifp, txr);
-#else
+
if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
igb_start_locked(txr, ifp);
-#endif
+
IGB_TX_UNLOCK(txr);
/* Do we need another? */
if (more) {
@@ -1411,15 +1403,15 @@ igb_handle_link_locked(struct adapter *adapter)
if ((ifp->if_drv_flags & IFF_DRV_RUNNING) && adapter->link_active) {
for (int i = 0; i < adapter->num_queues; i++, txr++) {
IGB_TX_LOCK(txr);
-#ifndef IGB_LEGACY_TX
+
/* Process the stack queue only if not depleted */
if (((txr->queue_status & IGB_QUEUE_DEPLETED) == 0) &&
!drbr_empty(ifp, txr->br))
igb_mq_start_locked(ifp, txr);
-#else
+
if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
igb_start_locked(txr, ifp);
-#endif
+
IGB_TX_UNLOCK(txr);
}
}
@@ -1513,13 +1505,10 @@ igb_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
do {
more = igb_txeof(txr);
} while (loop-- && more);
-#ifndef IGB_LEGACY_TX
if (!drbr_empty(ifp, txr->br))
igb_mq_start_locked(ifp, txr);
-#else
if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
igb_start_locked(txr, ifp);
-#endif
IGB_TX_UNLOCK(txr);
}
@@ -1552,15 +1541,12 @@ igb_msix_que(void *arg)
IGB_TX_LOCK(txr);
igb_txeof(txr);
-#ifndef IGB_LEGACY_TX
/* Process the stack queue only if not depleted */
if (((txr->queue_status & IGB_QUEUE_DEPLETED) == 0) &&
!drbr_empty(ifp, txr->br))
igb_mq_start_locked(ifp, txr);
-#else
if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
igb_start_locked(txr, ifp);
-#endif
IGB_TX_UNLOCK(txr);
more_rx = igb_rxeof(que, adapter->rx_process_limit, NULL);
@@ -2323,9 +2309,7 @@ igb_allocate_legacy(struct adapter *adapter)
{
device_t dev = adapter->dev;
struct igb_queue *que = adapter->queues;
-#ifndef IGB_LEGACY_TX
struct tx_ring *txr = adapter->tx_rings;
-#endif
int error, rid = 0;
/* Turn off all interrupts */
@@ -2344,9 +2328,7 @@ igb_allocate_legacy(struct adapter *adapter)
return (ENXIO);
}
-#ifndef IGB_LEGACY_TX
TASK_INIT(&txr->txq_task, 0, igb_deferred_mq_start, txr);
-#endif
/*
* Try allocating a fast interrupt and the associated deferred
@@ -2428,10 +2410,8 @@ igb_allocate_msix(struct adapter *adapter)
i,igb_last_bind_cpu);
igb_last_bind_cpu = CPU_NEXT(igb_last_bind_cpu);
}
-#ifndef IGB_LEGACY_TX
TASK_INIT(&que->txr->txq_task, 0, igb_deferred_mq_start,
que->txr);
-#endif
/* Make tasklet for deferred handling */
TASK_INIT(&que->que_task, 0, igb_handle_que, que);
que->tq = taskqueue_create("igb_que", M_NOWAIT,
@@ -2655,9 +2635,9 @@ igb_free_pci_resources(struct adapter *adapter)
for (int i = 0; i < adapter->num_queues; i++, que++) {
if (que->tq != NULL) {
-#ifndef IGB_LEGACY_TX
+
taskqueue_drain(que->tq, &que->txr->txq_task);
-#endif
+
taskqueue_drain(que->tq, &que->que_task);
taskqueue_free(que->tq);
}
@@ -3049,15 +3029,15 @@ igb_setup_interface(device_t dev, struct adapter *adapter)
ifp->if_hw_tsomaxsegcount = IGB_MAX_SCATTER;
ifp->if_hw_tsomaxsegsize = IGB_TSO_SEG_SIZE;
-#ifndef IGB_LEGACY_TX
+
ifp->if_transmit = igb_mq_start;
ifp->if_qflush = igb_qflush;
-#else
+
ifp->if_start = igb_start;
IFQ_SET_MAXLEN(&ifp->if_snd, adapter->num_tx_desc - 1);
ifp->if_snd.ifq_drv_maxlen = adapter->num_tx_desc - 1;
IFQ_SET_READY(&ifp->if_snd);
-#endif
+
ether_ifattach(ifp, adapter->hw.mac.addr);
@@ -3296,11 +3276,11 @@ igb_allocate_queues(struct adapter *adapter)
error = ENOMEM;
goto err_tx_desc;
}
-#ifndef IGB_LEGACY_TX
+
/* Allocate a buf ring */
txr->br = buf_ring_alloc(igb_buf_ring_size, M_DEVBUF,
M_WAITOK, &txr->tx_mtx);
-#endif
+
}
/*
@@ -3357,9 +3337,9 @@ err_tx_desc:
igb_dma_free(adapter, &txr->txdma);
free(adapter->rx_rings, M_DEVBUF);
rx_fail:
-#ifndef IGB_LEGACY_TX
+
buf_ring_free(txr->br, M_DEVBUF);
-#endif
+
free(adapter->tx_rings, M_DEVBUF);
tx_fail:
free(adapter->queues, M_DEVBUF);
@@ -3615,10 +3595,10 @@ igb_free_transmit_buffers(struct tx_ring *txr)
tx_buffer->map = NULL;
}
}
-#ifndef IGB_LEGACY_TX
+
if (txr->br != NULL)
buf_ring_free(txr->br, M_DEVBUF);
-#endif
+
if (txr->tx_buffers != NULL) {
free(txr->tx_buffers, M_DEVBUF);
txr->tx_buffers = NULL;
@@ -4924,10 +4904,10 @@ igb_rxeof(struct igb_queue *que, int count, int *done)
*/
M_HASHTYPE_SET(rxr->fmp, M_HASHTYPE_OPAQUE);
} else {
-#ifndef IGB_LEGACY_TX
+
rxr->fmp->m_pkthdr.flowid = que->msix;
M_HASHTYPE_SET(rxr->fmp, M_HASHTYPE_OPAQUE);
-#endif
+
}
sendmp = rxr->fmp;
/* Make sure to set M_PKTHDR. */
diff --git a/sys/dev/e1000/if_igb.h b/sys/dev/e1000/if_igb.h
index 98df1ec..431437d 100644
--- a/sys/dev/e1000/if_igb.h
+++ b/sys/dev/e1000/if_igb.h
@@ -37,9 +37,9 @@
#include <sys/param.h>
#include <sys/systm.h>
-#ifndef IGB_LEGACY_TX
+
#include <sys/buf_ring.h>
-#endif
+
#include <sys/bus.h>
#include <sys/endian.h>
#include <sys/kernel.h>
@@ -365,10 +365,10 @@ struct tx_ring {
u32 txd_cmd;
bus_dma_tag_t txtag;
char mtx_name[16];
-#ifndef IGB_LEGACY_TX
+
struct buf_ring *br;
struct task txq_task;
-#endif
+
u32 bytes; /* used for AIM */
u32 packets;
/* Soft Stats */
diff --git a/sys/dev/gpioapu/gpioapu.c b/sys/dev/gpioapu/gpioapu.c
new file mode 100644
index 0000000..11e5e13
--- /dev/null
+++ b/sys/dev/gpioapu/gpioapu.c
@@ -0,0 +1,336 @@
+/*-
+ * Copyright (c) 2013 Ermal Luci <eri@FreeBSD.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+
+#include <sys/types.h>
+#include <sys/param.h>
+#include <sys/conf.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <sys/systm.h>
+#include <sys/sysctl.h>
+#include <sys/priv.h>
+#include <sys/bus.h>
+#include <machine/bus.h>
+#include <sys/rman.h>
+#include <machine/resource.h>
+#include <sys/proc.h>
+#include <sys/uio.h>
+
+#include <dev/pci/pcivar.h>
+#include <isa/isavar.h>
+
+/* SB7xx RRG 2.3.3.1.1. */
+#define AMDSB_PMIO_INDEX 0xcd6
+#define AMDSB_PMIO_DATA (PMIO_INDEX + 1)
+#define AMDSB_PMIO_WIDTH 2
+
+#define AMDSB_SMBUS_DEVID 0x43851002
+#define AMDSB8_SMBUS_REVID 0x40
+
+#define IOMUX_OFFSET 0xD00
+#define GPIO_SPACE_OFFSET 0x100
+#define GPIO_SPACE_SIZE 0x100
+/* SB8xx RRG 2.3.3. */
+#define AMDSB8_PM_WDT_EN 0x24
+
+#define GPIO_187 187 // MODESW
+#define GPIO_189 189 // LED1#
+#define GPIO_190 190 // LED2#
+#define GPIO_191 191 // LED3#
+#define GPIO_OUTPUT 0x08
+#define GPIO_INPUT 0x28
+
+struct gpioapu_softc {
+ device_t dev;
+ struct cdev *cdev;
+ struct resource *res_ctrl;
+ struct resource *res_count;
+ int rid_ctrl;
+ int rid_count;
+};
+
+static int gpioapu_open(struct cdev *dev, int flags, int fmt,
+ struct thread *td);
+static int gpioapu_close(struct cdev *dev, int flags, int fmt,
+ struct thread *td);
+static int gpioapu_write(struct cdev *dev, struct uio *uio, int ioflag);
+static int gpioapu_read(struct cdev *dev, struct uio *uio, int ioflag);
+
+static struct cdevsw gpioapu_cdevsw = {
+ .d_version = D_VERSION,
+ .d_open = gpioapu_open,
+ .d_read = gpioapu_read,
+ .d_write = gpioapu_write,
+ .d_close = gpioapu_close,
+ .d_name = "gpioapu",
+};
+
+static void gpioapu_identify(driver_t *driver, device_t parent);
+static int gpioapu_probe(device_t dev);
+static int gpioapu_attach(device_t dev);
+static int gpioapu_detach(device_t dev);
+
+static device_method_t gpioapu_methods[] = {
+ DEVMETHOD(device_identify, gpioapu_identify),
+ DEVMETHOD(device_probe, gpioapu_probe),
+ DEVMETHOD(device_attach, gpioapu_attach),
+ DEVMETHOD(device_detach, gpioapu_detach),
+ {0, 0}
+};
+
+static devclass_t gpioapu_devclass;
+
+static driver_t gpioapu_driver = {
+ "gpioapu",
+ gpioapu_methods,
+ sizeof(struct gpioapu_softc)
+};
+
+DRIVER_MODULE(gpioapu, isa, gpioapu_driver, gpioapu_devclass, NULL, NULL);
+
+
+static uint8_t
+pmio_read(struct resource *res, uint8_t reg)
+{
+ bus_write_1(res, 0, reg); /* Index */
+ return (bus_read_1(res, 1)); /* Data */
+}
+
+#if 0
+static void
+pmio_write(struct resource *res, uint8_t reg, uint8_t val)
+{
+ bus_write_1(res, 0, reg); /* Index */
+ bus_write_1(res, 1, val); /* Data */
+}
+#endif
+
+/* ARGSUSED */
+static int
+gpioapu_open(struct cdev *dev __unused, int flags __unused, int fmt __unused,
+ struct thread *td)
+{
+ int error;
+
+ error = priv_check(td, PRIV_IO);
+ if (error != 0)
+ return (error);
+ error = securelevel_gt(td->td_ucred, 0);
+ if (error != 0)
+ return (error);
+
+ return (error);
+}
+
+static int
+gpioapu_read(struct cdev *dev, struct uio *uio, int ioflag) {
+ struct gpioapu_softc *sc = dev->si_drv1;
+ uint8_t tmp;
+ char ch;
+ int error;
+
+ tmp = bus_read_1(sc->res_ctrl, GPIO_187);
+#ifdef DEBUG
+ device_printf(sc->dev, "returned %x\n", (u_int)tmp);
+#endif
+ if (tmp & 0x80)
+ ch = '1';
+ else
+ ch = '0';
+
+ error = uiomove(&ch, sizeof(ch), uio);
+
+ return (error);
+}
+static int
+gpioapu_write(struct cdev *dev, struct uio *uio, int ioflag) {
+ struct gpioapu_softc *sc = dev->si_drv1;
+ char ch[3];
+ uint8_t old;
+ int error, i, start;
+
+ error = uiomove(ch, sizeof(ch), uio);
+ if (error)
+ return (error);
+
+ start = GPIO_189;
+ for (i = 0; i < 3; i++) {
+ old = bus_read_1(sc->res_ctrl, start + i);
+#ifdef DEBUG
+ device_printf(sc->dev, "returned %x - %c\n", (u_int)old, ch[i]);
+#endif
+ if (ch[i] == '1')
+ old &= 0x80;
+ else
+ old = 0xc8;
+ bus_write_1(sc->res_ctrl, start + i, old);
+ }
+
+ return (error);
+}
+
+static int
+gpioapu_close(struct cdev *dev __unused, int flags __unused, int fmt __unused,
+ struct thread *td)
+{
+ struct gpioapu_softc *sc = dev->si_drv1;
+ int i, start;
+
+ start = GPIO_187;
+ for (i = 0; i < 2; i++) {
+ bus_write_1(sc->res_ctrl, start, 0xc8);
+ }
+
+ return (0);
+}
+
+static void
+gpioapu_identify(driver_t *driver, device_t parent)
+{
+ device_t child;
+ device_t smb_dev;
+
+ if (resource_disabled("gpioapu", 0))
+ return;
+
+
+ if (device_find_child(parent, "gpioapu", -1) != NULL)
+ return;
+
+ /*
+ * Try to identify SB600/SB7xx by PCI Device ID of SMBus device
+ * that should be present at bus 0, device 20, function 0.
+ */
+ smb_dev = pci_find_bsf(0, 20, 0);
+ if (smb_dev == NULL)
+ return;
+
+ if (pci_get_devid(smb_dev) != AMDSB_SMBUS_DEVID)
+ return;
+
+ child = BUS_ADD_CHILD(parent, ISA_ORDER_SPECULATIVE, "gpioapu", -1);
+ if (child == NULL)
+ device_printf(parent, "add gpioapu child failed\n");
+}
+
+static int
+gpioapu_probe(device_t dev)
+{
+ struct resource *res;
+ uint32_t addr;
+ int rid;
+ int rc, i;
+ char *value;
+
+ value = getenv("smbios.system.product");
+ device_printf(dev, "Environment returned %s\n", value);
+ if (value == NULL || strncmp(value, "APU", strlen("APU")))
+ return (ENXIO);
+
+ /* Do not claim some ISA PnP device by accident. */
+ if (isa_get_logicalid(dev) != 0)
+ return (ENXIO);
+
+ rc = bus_set_resource(dev, SYS_RES_IOPORT, 0, AMDSB_PMIO_INDEX,
+ AMDSB_PMIO_WIDTH);
+ if (rc != 0) {
+ device_printf(dev, "bus_set_resource for IO failed\n");
+ return (ENXIO);
+ }
+ rid = 0;
+ res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 0ul, ~0ul,
+ AMDSB_PMIO_WIDTH, RF_ACTIVE | RF_SHAREABLE);
+ if (res == NULL) {
+ device_printf(dev, "bus_alloc_resource for IO failed\n");
+ return (ENXIO);
+ }
+
+ /* Find base address of memory mapped WDT registers. */
+ for (addr = 0, i = 0; i < 4; i++) {
+ addr <<= 8;
+ addr |= pmio_read(res, AMDSB8_PM_WDT_EN + 3 - i);
+ }
+ addr &= 0xFFFFF000;
+ device_printf(dev, "Address on reg 0x24 is 0x%x/%u\n", addr, addr);
+
+ bus_release_resource(dev, SYS_RES_IOPORT, rid, res);
+ bus_delete_resource(dev, SYS_RES_IOPORT, rid);
+
+ rc = bus_set_resource(dev, SYS_RES_MEMORY, 0, addr + GPIO_SPACE_OFFSET,
+ GPIO_SPACE_SIZE);
+ if (rc != 0) {
+ device_printf(dev, "bus_set_resource for memory failed\n");
+ return (ENXIO);
+ }
+
+ return (0);
+}
+
+static int
+gpioapu_attach(device_t dev)
+{
+ struct gpioapu_softc *sc;
+
+ sc = device_get_softc(dev);
+ sc->dev = dev;
+ sc->rid_ctrl = 0;
+
+ sc->res_ctrl = bus_alloc_resource(dev, SYS_RES_MEMORY, &sc->rid_ctrl, 0ul, ~0ul,
+ GPIO_SPACE_SIZE, RF_ACTIVE | RF_SHAREABLE);
+ if (sc->res_ctrl == NULL) {
+ device_printf(dev, "bus_alloc_resource for memory failed\n");
+ return (ENXIO);
+ }
+
+ sc->dev = dev;
+ sc->cdev = make_dev(&gpioapu_cdevsw, 0,
+ UID_ROOT, GID_WHEEL, 0600, "gpioapu");
+
+ sc->cdev->si_drv1 = sc;
+
+ return (0);
+
+}
+
+static int
+gpioapu_detach(device_t dev)
+{
+ struct gpioapu_softc *sc;
+
+ sc = device_get_softc(dev);
+
+ if (sc->res_ctrl != NULL) {
+ bus_release_resource(dev, SYS_RES_MEMORY, sc->rid_ctrl,
+ sc->res_ctrl);
+ bus_delete_resource(dev, SYS_RES_MEMORY, sc->rid_ctrl);
+ }
+
+ destroy_dev(sc->cdev);
+
+ return (0);
+}
diff --git a/sys/dev/ichwd/ichwd.c b/sys/dev/ichwd/ichwd.c
index 9f8704f..73fcd7e 100644
--- a/sys/dev/ichwd/ichwd.c
+++ b/sys/dev/ichwd/ichwd.c
@@ -53,6 +53,7 @@
* (document no. 252516-001) sections 9.10 and 9.11.
*
* ICH6/7/8 support by Takeharu KATO <takeharu1219@ybb.ne.jp>
+ * SoC PMC support by Denir Li <denir.li@cas-well.com>
*/
#include <sys/cdefs.h>
@@ -74,161 +75,216 @@ __FBSDID("$FreeBSD$");
#include <dev/ichwd/ichwd.h>
static struct ichwd_device ichwd_devices[] = {
- { DEVICEID_82801AA, "Intel 82801AA watchdog timer", 1 },
- { DEVICEID_82801AB, "Intel 82801AB watchdog timer", 1 },
- { DEVICEID_82801BA, "Intel 82801BA watchdog timer", 2 },
- { DEVICEID_82801BAM, "Intel 82801BAM watchdog timer", 2 },
- { DEVICEID_82801CA, "Intel 82801CA watchdog timer", 3 },
- { DEVICEID_82801CAM, "Intel 82801CAM watchdog timer", 3 },
- { DEVICEID_82801DB, "Intel 82801DB watchdog timer", 4 },
- { DEVICEID_82801DBM, "Intel 82801DBM watchdog timer", 4 },
- { DEVICEID_82801E, "Intel 82801E watchdog timer", 5 },
- { DEVICEID_82801EB, "Intel 82801EB watchdog timer", 5 },
- { DEVICEID_82801EBR, "Intel 82801EB/ER watchdog timer", 5 },
- { DEVICEID_6300ESB, "Intel 6300ESB watchdog timer", 5 },
- { DEVICEID_82801FBR, "Intel 82801FB/FR watchdog timer", 6 },
- { DEVICEID_ICH6M, "Intel ICH6M watchdog timer", 6 },
- { DEVICEID_ICH6W, "Intel ICH6W watchdog timer", 6 },
- { DEVICEID_ICH7, "Intel ICH7 watchdog timer", 7 },
- { DEVICEID_ICH7DH, "Intel ICH7DH watchdog timer", 7 },
- { DEVICEID_ICH7M, "Intel ICH7M watchdog timer", 7 },
- { DEVICEID_ICH7MDH, "Intel ICH7MDH watchdog timer", 7 },
- { DEVICEID_NM10, "Intel NM10 watchdog timer", 7 },
- { DEVICEID_ICH8, "Intel ICH8 watchdog timer", 8 },
- { DEVICEID_ICH8DH, "Intel ICH8DH watchdog timer", 8 },
- { DEVICEID_ICH8DO, "Intel ICH8DO watchdog timer", 8 },
- { DEVICEID_ICH8M, "Intel ICH8M watchdog timer", 8 },
- { DEVICEID_ICH8ME, "Intel ICH8M-E watchdog timer", 8 },
- { DEVICEID_63XXESB, "Intel 63XXESB watchdog timer", 8 },
- { DEVICEID_ICH9, "Intel ICH9 watchdog timer", 9 },
- { DEVICEID_ICH9DH, "Intel ICH9DH watchdog timer", 9 },
- { DEVICEID_ICH9DO, "Intel ICH9DO watchdog timer", 9 },
- { DEVICEID_ICH9M, "Intel ICH9M watchdog timer", 9 },
- { DEVICEID_ICH9ME, "Intel ICH9M-E watchdog timer", 9 },
- { DEVICEID_ICH9R, "Intel ICH9R watchdog timer", 9 },
- { DEVICEID_ICH10, "Intel ICH10 watchdog timer", 10 },
- { DEVICEID_ICH10D, "Intel ICH10D watchdog timer", 10 },
- { DEVICEID_ICH10DO, "Intel ICH10DO watchdog timer", 10 },
- { DEVICEID_ICH10R, "Intel ICH10R watchdog timer", 10 },
- { DEVICEID_PCH, "Intel PCH watchdog timer", 10 },
- { DEVICEID_PCHM, "Intel PCH watchdog timer", 10 },
- { DEVICEID_P55, "Intel P55 watchdog timer", 10 },
- { DEVICEID_PM55, "Intel PM55 watchdog timer", 10 },
- { DEVICEID_H55, "Intel H55 watchdog timer", 10 },
- { DEVICEID_QM57, "Intel QM57 watchdog timer", 10 },
- { DEVICEID_H57, "Intel H57 watchdog timer", 10 },
- { DEVICEID_HM55, "Intel HM55 watchdog timer", 10 },
- { DEVICEID_Q57, "Intel Q57 watchdog timer", 10 },
- { DEVICEID_HM57, "Intel HM57 watchdog timer", 10 },
- { DEVICEID_PCHMSFF, "Intel PCHMSFF watchdog timer", 10 },
- { DEVICEID_QS57, "Intel QS57 watchdog timer", 10 },
- { DEVICEID_3400, "Intel 3400 watchdog timer", 10 },
- { DEVICEID_3420, "Intel 3420 watchdog timer", 10 },
- { DEVICEID_3450, "Intel 3450 watchdog timer", 10 },
- { DEVICEID_CPT0, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT1, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT2, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT3, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT4, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT5, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT6, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT7, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT8, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT9, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT10, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT11, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT12, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT13, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT14, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT15, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT16, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT17, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT18, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT19, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT20, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT21, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT22, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT23, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT23, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT25, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT26, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT27, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT28, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT29, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT30, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_CPT31, "Intel Cougar Point watchdog timer", 10 },
- { DEVICEID_PATSBURG_LPC1, "Intel Patsburg watchdog timer", 10 },
- { DEVICEID_PATSBURG_LPC2, "Intel Patsburg watchdog timer", 10 },
- { DEVICEID_PPT0, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT1, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT2, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT3, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT4, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT5, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT6, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT7, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT8, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT9, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT10, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT11, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT12, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT13, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT14, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT15, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT16, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT17, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT18, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT19, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT20, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT21, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT22, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT23, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT24, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT25, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT26, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT27, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT28, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT29, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT30, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_PPT31, "Intel Panther Point watchdog timer", 10 },
- { DEVICEID_LPT0, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT1, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT2, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT3, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT4, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT5, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT6, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT7, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT8, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT9, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT10, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT11, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT12, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT13, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT14, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT15, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT16, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT17, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT18, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT19, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT20, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT21, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT22, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT23, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT24, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT25, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT26, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT27, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT28, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT29, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT30, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_LPT31, "Intel Lynx Point watchdog timer", 10 },
- { DEVICEID_WCPT2, "Intel Wildcat Point watchdog timer", 10 },
- { DEVICEID_WCPT4, "Intel Wildcat Point watchdog timer", 10 },
- { DEVICEID_WCPT6, "Intel Wildcat Point watchdog timer", 10 },
- { DEVICEID_DH89XXCC_LPC, "Intel DH89xxCC watchdog timer", 10 },
- { DEVICEID_COLETOCRK_LPC, "Intel Coleto Creek watchdog timer", 10 },
- { 0, NULL, 0 },
+ { DEVICEID_82801AA, "Intel 82801AA watchdog timer", 1, 1 },
+ { DEVICEID_82801AB, "Intel 82801AB watchdog timer", 1, 1 },
+ { DEVICEID_82801BA, "Intel 82801BA watchdog timer", 2, 1 },
+ { DEVICEID_82801BAM, "Intel 82801BAM watchdog timer", 2, 1 },
+ { DEVICEID_82801CA, "Intel 82801CA watchdog timer", 3, 1 },
+ { DEVICEID_82801CAM, "Intel 82801CAM watchdog timer", 3, 1 },
+ { DEVICEID_82801DB, "Intel 82801DB watchdog timer", 4, 1 },
+ { DEVICEID_82801DBM, "Intel 82801DBM watchdog timer", 4, 1 },
+ { DEVICEID_82801E, "Intel 82801E watchdog timer", 5, 1 },
+ { DEVICEID_82801EB, "Intel 82801EB watchdog timer", 5, 1 },
+ { DEVICEID_82801EBR, "Intel 82801EB/ER watchdog timer", 5, 1 },
+ { DEVICEID_6300ESB, "Intel 6300ESB watchdog timer", 5, 1 },
+ { DEVICEID_82801FBR, "Intel 82801FB/FR watchdog timer", 6, 2 },
+ { DEVICEID_ICH6M, "Intel ICH6M watchdog timer", 6, 2 },
+ { DEVICEID_ICH6W, "Intel ICH6W watchdog timer", 6, 2 },
+ { DEVICEID_ICH7, "Intel ICH7 watchdog timer", 7, 2 },
+ { DEVICEID_ICH7DH, "Intel ICH7DH watchdog timer", 7, 2 },
+ { DEVICEID_ICH7M, "Intel ICH7M watchdog timer", 7, 2 },
+ { DEVICEID_ICH7MDH, "Intel ICH7MDH watchdog timer", 7, 2 },
+ { DEVICEID_NM10, "Intel NM10 watchdog timer", 7, 2 },
+ { DEVICEID_ICH8, "Intel ICH8 watchdog timer", 8, 2 },
+ { DEVICEID_ICH8DH, "Intel ICH8DH watchdog timer", 8, 2 },
+ { DEVICEID_ICH8DO, "Intel ICH8DO watchdog timer", 8, 2 },
+ { DEVICEID_ICH8M, "Intel ICH8M watchdog timer", 8, 2 },
+ { DEVICEID_ICH8ME, "Intel ICH8M-E watchdog timer", 8, 2 },
+ { DEVICEID_63XXESB, "Intel 63XXESB watchdog timer", 8, 2 },
+ { DEVICEID_ICH9, "Intel ICH9 watchdog timer", 9, 2 },
+ { DEVICEID_ICH9DH, "Intel ICH9DH watchdog timer", 9, 2 },
+ { DEVICEID_ICH9DO, "Intel ICH9DO watchdog timer", 9, 2 },
+ { DEVICEID_ICH9M, "Intel ICH9M watchdog timer", 9, 2 },
+ { DEVICEID_ICH9ME, "Intel ICH9M-E watchdog timer", 9, 2 },
+ { DEVICEID_ICH9R, "Intel ICH9R watchdog timer", 9, 2 },
+ { DEVICEID_ICH10, "Intel ICH10 watchdog timer", 10, 2 },
+ { DEVICEID_ICH10D, "Intel ICH10D watchdog timer", 10, 2 },
+ { DEVICEID_ICH10DO, "Intel ICH10DO watchdog timer", 10, 2 },
+ { DEVICEID_ICH10R, "Intel ICH10R watchdog timer", 10, 2 },
+ { DEVICEID_PCH, "Intel PCH watchdog timer", 10, 2 },
+ { DEVICEID_PCHM, "Intel PCH watchdog timer", 10, 2 },
+ { DEVICEID_P55, "Intel P55 watchdog timer", 10, 2 },
+ { DEVICEID_PM55, "Intel PM55 watchdog timer", 10, 2 },
+ { DEVICEID_H55, "Intel H55 watchdog timer", 10, 2 },
+ { DEVICEID_QM57, "Intel QM57 watchdog timer", 10, 2 },
+ { DEVICEID_H57, "Intel H57 watchdog timer", 10, 2 },
+ { DEVICEID_HM55, "Intel HM55 watchdog timer", 10, 2 },
+ { DEVICEID_Q57, "Intel Q57 watchdog timer", 10, 2 },
+ { DEVICEID_HM57, "Intel HM57 watchdog timer", 10, 2 },
+ { DEVICEID_PCHMSFF, "Intel PCHMSFF watchdog timer", 10, 2 },
+ { DEVICEID_QS57, "Intel QS57 watchdog timer", 10, 2 },
+ { DEVICEID_3400, "Intel 3400 watchdog timer", 10, 2 },
+ { DEVICEID_3420, "Intel 3420 watchdog timer", 10, 2 },
+ { DEVICEID_3450, "Intel 3450 watchdog timer", 10, 2 },
+ { DEVICEID_CPT0, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT1, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT2, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT3, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT4, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT5, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT6, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT7, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT8, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT9, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT10, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT11, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT12, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT13, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT14, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT15, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT16, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT17, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT18, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT19, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT20, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT21, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT22, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT23, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT24, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT25, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT26, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT27, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT28, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT29, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT30, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_CPT31, "Intel Cougar Point watchdog timer", 10, 2 },
+ { DEVICEID_PATSBURG_LPC1, "Intel Patsburg watchdog timer", 10, 2 },
+ { DEVICEID_PATSBURG_LPC2, "Intel Patsburg watchdog timer", 10, 2 },
+ { DEVICEID_PPT0, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT1, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT2, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT3, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT4, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT5, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT6, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT7, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT8, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT9, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT10, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT11, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT12, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT13, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT14, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT15, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT16, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT17, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT18, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT19, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT20, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT21, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT22, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT23, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT24, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT25, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT26, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT27, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT28, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT29, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT30, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_PPT31, "Intel Panther Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT0, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT1, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT2, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT3, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT4, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT5, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT6, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT7, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT8, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT9, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT10, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT11, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT12, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT13, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT14, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT15, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT16, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT17, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT18, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT19, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT20, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT21, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT22, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT23, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT24, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT25, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT26, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT27, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT28, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT29, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT30, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_LPT31, "Intel Lynx Point watchdog timer", 10, 2 },
+ { DEVICEID_WCPT1, "Intel Wildcat Point watchdog timer", 10, 2 },
+ { DEVICEID_WCPT2, "Intel Wildcat Point watchdog timer", 10, 2 },
+ { DEVICEID_WCPT3, "Intel Wildcat Point watchdog timer", 10, 2 },
+ { DEVICEID_WCPT4, "Intel Wildcat Point watchdog timer", 10, 2 },
+ { DEVICEID_WCPT6, "Intel Wildcat Point watchdog timer", 10, 2 },
+ { DEVICEID_WBG0, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG1, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG2, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG3, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG4, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG5, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG6, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG7, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG8, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG9, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG10, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG11, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG12, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG13, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG14, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG15, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG16, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG17, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG18, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG19, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG20, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG21, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG22, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG23, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG24, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG25, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG26, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG27, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG28, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG29, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG30, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_WBG31, "Intel Wellsburg watchdog timer", 10, 2 },
+ { DEVICEID_LPT_LP0, "Intel Lynx Point-LP watchdog timer", 10, 2 },
+ { DEVICEID_LPT_LP1, "Intel Lynx Point-LP watchdog timer", 10, 2 },
+ { DEVICEID_LPT_LP2, "Intel Lynx Point-LP watchdog timer", 10, 2 },
+ { DEVICEID_LPT_LP3, "Intel Lynx Point-LP watchdog timer", 10, 2 },
+ { DEVICEID_LPT_LP4, "Intel Lynx Point-LP watchdog timer", 10, 2 },
+ { DEVICEID_LPT_LP5, "Intel Lynx Point-LP watchdog timer", 10, 2 },
+ { DEVICEID_LPT_LP6, "Intel Lynx Point-LP watchdog timer", 10, 2 },
+ { DEVICEID_LPT_LP7, "Intel Lynx Point-LP watchdog timer", 10, 2 },
+ { DEVICEID_WCPT_LP1, "Intel Wildcat Point-LP watchdog timer", 10, 2 },
+ { DEVICEID_WCPT_LP2, "Intel Wildcat Point-LP watchdog timer", 10, 2 },
+ { DEVICEID_WCPT_LP3, "Intel Wildcat Point-LP watchdog timer", 10, 2 },
+ { DEVICEID_WCPT_LP5, "Intel Wildcat Point-LP watchdog timer", 10, 2 },
+ { DEVICEID_WCPT_LP6, "Intel Wildcat Point-LP watchdog timer", 10, 2 },
+ { DEVICEID_WCPT_LP7, "Intel Wildcat Point-LP watchdog timer", 10, 2 },
+ { DEVICEID_WCPT_LP9, "Intel Wildcat Point-LP watchdog timer", 10, 2 },
+ { DEVICEID_DH89XXCC_LPC, "Intel DH89xxCC watchdog timer", 10, 2 },
+ { DEVICEID_COLETOCRK_LPC, "Intel Coleto Creek watchdog timer", 10, 2 },
+ { DEVICEID_AVN0, "Intel Avoton/Rangeley SoC watchdog timer",10, 3 },
+ { DEVICEID_AVN1, "Intel Avoton/Rangeley SoC watchdog timer",10, 3 },
+ { DEVICEID_AVN2, "Intel Avoton/Rangeley SoC watchdog timer",10, 3 },
+ { DEVICEID_AVN3, "Intel Avoton/Rangeley SoC watchdog timer",10, 3 },
+ { DEVICEID_BAYTRAIL, "Intel Bay Trail SoC watchdog timer", 10, 3 },
+ { DEVICEID_BRASWELL, "Intel Braswell SoC watchdog timer", 10, 3 },
+ { 0, NULL, 0, 0 },
};
static devclass_t ichwd_devclass;
@@ -241,7 +297,7 @@ static devclass_t ichwd_devclass;
bus_read_4((sc)->tco_res, (off))
#define ichwd_read_smi_4(sc, off) \
bus_read_4((sc)->smi_res, (off))
-#define ichwd_read_gcs_4(sc, off) \
+#define ichwd_read_gcs_pmc_4(sc, off) \
bus_read_4((sc)->gcs_res, (off))
#define ichwd_write_tco_1(sc, off, val) \
@@ -252,7 +308,7 @@ static devclass_t ichwd_devclass;
bus_write_4((sc)->tco_res, (off), (val))
#define ichwd_write_smi_4(sc, off, val) \
bus_write_4((sc)->smi_res, (off), (val))
-#define ichwd_write_gcs_4(sc, off, val) \
+#define ichwd_write_gcs_pmc_4(sc, off, val) \
bus_write_4((sc)->gcs_res, (off), (val))
#define ichwd_verbose_printf(dev, ...) \
@@ -352,7 +408,7 @@ ichwd_tmr_disable(struct ichwd_softc *sc)
static __inline void
ichwd_tmr_reload(struct ichwd_softc *sc)
{
- if (sc->ich_version <= 5)
+ if (sc->tco_version == 1)
ichwd_write_tco_1(sc, TCO_RLD, 1);
else
ichwd_write_tco_2(sc, TCO_RLD, 1);
@@ -369,7 +425,7 @@ ichwd_tmr_set(struct ichwd_softc *sc, unsigned int timeout)
if (timeout < TCO_RLD_TMR_MIN)
timeout = TCO_RLD_TMR_MIN;
- if (sc->ich_version <= 5) {
+ if (sc->tco_version == 1) {
uint8_t tmr_val8 = ichwd_read_tco_1(sc, TCO_TMR1);
tmr_val8 &= (~TCO_RLD1_TMR_MAX & 0xff);
@@ -399,20 +455,40 @@ ichwd_clear_noreboot(struct ichwd_softc *sc)
int rc = 0;
/* try to clear the NO_REBOOT bit */
- if (sc->ich_version <= 5) {
- status = pci_read_config(sc->ich, ICH_GEN_STA, 1);
- status &= ~ICH_GEN_STA_NO_REBOOT;
- pci_write_config(sc->ich, ICH_GEN_STA, status, 1);
- status = pci_read_config(sc->ich, ICH_GEN_STA, 1);
- if (status & ICH_GEN_STA_NO_REBOOT)
- rc = EIO;
- } else {
- status = ichwd_read_gcs_4(sc, 0);
- status &= ~ICH_GCS_NO_REBOOT;
- ichwd_write_gcs_4(sc, 0, status);
- status = ichwd_read_gcs_4(sc, 0);
- if (status & ICH_GCS_NO_REBOOT)
- rc = EIO;
+ switch (sc->tco_version)
+ {
+ case 1:
+ status = pci_read_config(sc->ich, ICH_GEN_STA, 1);
+ status &= ~ICH_GEN_STA_NO_REBOOT;
+ pci_write_config(sc->ich, ICH_GEN_STA, status, 1);
+ status = pci_read_config(sc->ich, ICH_GEN_STA, 1);
+ if (status & ICH_GEN_STA_NO_REBOOT)
+ rc = EIO;
+ break;
+
+ case 2:
+ status = ichwd_read_gcs_pmc_4(sc, 0);
+ status &= ~ICH_GCS_NO_REBOOT;
+ ichwd_write_gcs_pmc_4(sc, 0, status);
+ status = ichwd_read_gcs_pmc_4(sc, 0);
+ if (status & ICH_GCS_NO_REBOOT)
+ rc = EIO;
+ break;
+
+ case 3:
+ status = ichwd_read_gcs_pmc_4(sc, 0);
+ status &= ~ICH_PMC_NO_REBOOT;
+ ichwd_write_gcs_pmc_4(sc, 0, status);
+ status = ichwd_read_gcs_pmc_4(sc, 0);
+ if (status & ICH_PMC_NO_REBOOT)
+ rc = EIO;
+ break;
+
+ default:
+ ichwd_verbose_printf(sc->device,
+ "Unknown TCO Version: %d, can't set NO_REBOOT.\n",
+ sc->tco_version);
+ break;
}
if (rc)
@@ -463,7 +539,7 @@ ichwd_find_ich_lpc_bridge(struct ichwd_device **id_p)
return (NULL);
ichwd_verbose_printf(ich, "found ICH%d or equivalent chipset: %s\n",
- id->version, id->desc);
+ id->ich_version, id->desc);
if (id_p)
*id_p = id;
@@ -481,7 +557,7 @@ ichwd_identify(driver_t *driver, device_t parent)
struct ichwd_device *id_p;
device_t ich = NULL;
device_t dev;
- uint32_t rcba;
+ uint32_t base_address;
int rc;
ich = ichwd_find_ich_lpc_bridge(&id_p);
@@ -497,14 +573,40 @@ ichwd_identify(driver_t *driver, device_t parent)
device_set_desc_copy(dev, id_p->desc);
- if (id_p->version >= 6) {
- /* get RCBA (root complex base address) */
- rcba = pci_read_config(ich, ICH_RCBA, 4);
- rc = bus_set_resource(ich, SYS_RES_MEMORY, 0,
- (rcba & 0xffffc000) + ICH_GCS_OFFSET, ICH_GCS_SIZE);
- if (rc)
+ switch (id_p->tco_version)
+ {
+ case 1:
+ break;
+
+ case 2:
+ /* get RCBA (root complex base address) */
+ base_address = pci_read_config(ich, ICH_RCBA, 4);
+ rc = bus_set_resource(ich, SYS_RES_MEMORY, 0,
+ (base_address & 0xffffc000) + ICH_GCS_OFFSET,
+ ICH_GCS_SIZE);
+ if (rc)
+ ichwd_verbose_printf(dev,
+ "Can not set TCO v%d memory resource for RCBA\n",
+ id_p->tco_version);
+ break;
+
+ case 3:
+ /* get PBASE (Power Management Controller base address) */
+ base_address = pci_read_config(ich, ICH_PBASE, 4);
+ rc = bus_set_resource(ich, SYS_RES_MEMORY, 0,
+ (base_address & 0xfffffe00) + ICH_PMC_OFFSET,
+ ICH_PMC_SIZE);
+ if (rc)
+ ichwd_verbose_printf(dev,
+ "Can not set TCO v%d memory resource for PBASE\n",
+ id_p->tco_version);
+ break;
+
+ default:
ichwd_verbose_printf(dev,
- "Can not set memory resource for RCBA\n");
+ "Can not set unknown TCO v%d memory resource for unknown base address\n",
+ id_p->tco_version);
+ break;
}
}
@@ -535,7 +637,8 @@ ichwd_attach(device_t dev)
goto fail;
}
sc->ich = ich;
- sc->ich_version = id_p->version;
+ sc->ich_version = id_p->ich_version;
+ sc->tco_version = id_p->tco_version;
/* get ACPI base address */
pmbase = pci_read_config(ich, ICH_PMBASE, 2) & ICH_PMBASE_MASK;
@@ -564,7 +667,7 @@ ichwd_attach(device_t dev)
}
sc->gcs_rid = 0;
- if (sc->ich_version >= 6) {
+ if (sc->tco_version >= 2) {
sc->gcs_res = bus_alloc_resource_any(ich, SYS_RES_MEMORY,
&sc->gcs_rid, RF_ACTIVE|RF_SHAREABLE);
if (sc->gcs_res == NULL) {
@@ -577,7 +680,7 @@ ichwd_attach(device_t dev)
goto fail;
ichwd_verbose_printf(dev, "%s (ICH%d or equivalent)\n",
- device_get_desc(dev), sc->ich_version);
+ id_p->desc, sc->ich_version);
/*
* Determine if we are coming up after a watchdog-induced reset. Some
diff --git a/sys/dev/ichwd/ichwd.h b/sys/dev/ichwd/ichwd.h
index 0699279..dc24a9d 100644
--- a/sys/dev/ichwd/ichwd.h
+++ b/sys/dev/ichwd/ichwd.h
@@ -34,13 +34,15 @@
struct ichwd_device {
uint16_t device;
char *desc;
- unsigned int version;
+ unsigned int ich_version;
+ unsigned int tco_version;
};
struct ichwd_softc {
device_t device;
device_t ich;
int ich_version;
+ int tco_version;
int active;
unsigned int timeout;
@@ -59,6 +61,7 @@ struct ichwd_softc {
};
#define VENDORID_INTEL 0x8086
+#define DEVICEID_BAYTRAIL 0x0f1c
#define DEVICEID_CPT0 0x1c40
#define DEVICEID_CPT1 0x1c41
#define DEVICEID_CPT2 0x1c42
@@ -125,6 +128,11 @@ struct ichwd_softc {
#define DEVICEID_PPT29 0x1e5d
#define DEVICEID_PPT30 0x1e5e
#define DEVICEID_PPT31 0x1e5f
+#define DEVICEID_AVN0 0x1f38
+#define DEVICEID_AVN1 0x1f39
+#define DEVICEID_AVN2 0x1f3a
+#define DEVICEID_AVN3 0x1f3b
+#define DEVICEID_BRASWELL 0x229c
#define DEVICEID_DH89XXCC_LPC 0x2310
#define DEVICEID_COLETOCRK_LPC 0x2390
#define DEVICEID_82801AA 0x2410
@@ -210,9 +218,58 @@ struct ichwd_softc {
#define DEVICEID_LPT29 0x8c5d
#define DEVICEID_LPT30 0x8c5e
#define DEVICEID_LPT31 0x8c5f
+#define DEVICEID_WCPT1 0x8cc1
#define DEVICEID_WCPT2 0x8cc2
+#define DEVICEID_WCPT3 0x8cc3
#define DEVICEID_WCPT4 0x8cc4
#define DEVICEID_WCPT6 0x8cc6
+#define DEVICEID_WBG0 0x8d40
+#define DEVICEID_WBG1 0x8d41
+#define DEVICEID_WBG2 0x8d42
+#define DEVICEID_WBG3 0x8d43
+#define DEVICEID_WBG4 0x8d44
+#define DEVICEID_WBG5 0x8d45
+#define DEVICEID_WBG6 0x8d46
+#define DEVICEID_WBG7 0x8d47
+#define DEVICEID_WBG8 0x8d48
+#define DEVICEID_WBG9 0x8d49
+#define DEVICEID_WBG10 0x8d4a
+#define DEVICEID_WBG11 0x8d4b
+#define DEVICEID_WBG12 0x8d4c
+#define DEVICEID_WBG13 0x8d4d
+#define DEVICEID_WBG14 0x8d4e
+#define DEVICEID_WBG15 0x8d4f
+#define DEVICEID_WBG16 0x8d50
+#define DEVICEID_WBG17 0x8d51
+#define DEVICEID_WBG18 0x8d52
+#define DEVICEID_WBG19 0x8d53
+#define DEVICEID_WBG20 0x8d54
+#define DEVICEID_WBG21 0x8d55
+#define DEVICEID_WBG22 0x8d56
+#define DEVICEID_WBG23 0x8d57
+#define DEVICEID_WBG24 0x8d58
+#define DEVICEID_WBG25 0x8d59
+#define DEVICEID_WBG26 0x8d5a
+#define DEVICEID_WBG27 0x8d5b
+#define DEVICEID_WBG28 0x8d5c
+#define DEVICEID_WBG29 0x8d5d
+#define DEVICEID_WBG30 0x8d5e
+#define DEVICEID_WBG31 0x8d5f
+#define DEVICEID_LPT_LP0 0x9c40
+#define DEVICEID_LPT_LP1 0x9c41
+#define DEVICEID_LPT_LP2 0x9c42
+#define DEVICEID_LPT_LP3 0x9c43
+#define DEVICEID_LPT_LP4 0x9c44
+#define DEVICEID_LPT_LP5 0x9c45
+#define DEVICEID_LPT_LP6 0x9c46
+#define DEVICEID_LPT_LP7 0x9c47
+#define DEVICEID_WCPT_LP1 0x9cc1
+#define DEVICEID_WCPT_LP2 0x9cc2
+#define DEVICEID_WCPT_LP3 0x9cc3
+#define DEVICEID_WCPT_LP5 0x9cc5
+#define DEVICEID_WCPT_LP6 0x9cc6
+#define DEVICEID_WCPT_LP7 0x9cc7
+#define DEVICEID_WCPT_LP9 0x9cc9
/* ICH LPC Interface Bridge Registers (ICH5 and older) */
#define ICH_GEN_STA 0xd4
@@ -226,6 +283,12 @@ struct ichwd_softc {
#define ICH_GCS_SIZE 0x4
#define ICH_GCS_NO_REBOOT 0x20
+/* SoC Power Management Configuration Registers */
+#define ICH_PBASE 0x44
+#define ICH_PMC_OFFSET 0x08
+#define ICH_PMC_SIZE 0x4
+#define ICH_PMC_NO_REBOOT 0x10
+
/* register names and locations (relative to PMBASE) */
#define SMI_BASE 0x30 /* base address for SMI registers */
#define SMI_LEN 0x08
diff --git a/sys/dev/ixgbe/if_ix.c b/sys/dev/ixgbe/if_ix.c
index b06c485..d72833d 100644
--- a/sys/dev/ixgbe/if_ix.c
+++ b/sys/dev/ixgbe/if_ix.c
@@ -36,6 +36,9 @@
#ifndef IXGBE_STANDALONE_BUILD
#include "opt_inet.h"
#include "opt_inet6.h"
+#ifdef RSS
+#include "opt_rss.h"
+#endif
#endif
#include "ixgbe.h"
@@ -48,7 +51,7 @@
/*********************************************************************
* Driver version
*********************************************************************/
-char ixgbe_driver_version[] = "3.1.13-k";
+char ixgbe_driver_version[] = "3.1.14";
/*********************************************************************
@@ -165,14 +168,12 @@ static void ixgbe_unregister_vlan(void *, struct ifnet *, u16);
static void ixgbe_add_device_sysctls(struct adapter *);
static void ixgbe_add_hw_stats(struct adapter *);
-static int ixgbe_set_flowcntl(struct adapter *, int);
-static int ixgbe_set_advertise(struct adapter *, int);
/* Sysctl handlers */
static void ixgbe_set_sysctl_value(struct adapter *, const char *,
const char *, int *, int);
-static int ixgbe_sysctl_flowcntl(SYSCTL_HANDLER_ARGS);
-static int ixgbe_sysctl_advertise(SYSCTL_HANDLER_ARGS);
+static int ixgbe_set_flowcntl(SYSCTL_HANDLER_ARGS);
+static int ixgbe_set_advertise(SYSCTL_HANDLER_ARGS);
static int ixgbe_sysctl_thermal_test(SYSCTL_HANDLER_ARGS);
static int ixgbe_sysctl_dmac(SYSCTL_HANDLER_ARGS);
static int ixgbe_sysctl_phy_temp(SYSCTL_HANDLER_ARGS);
@@ -183,11 +184,6 @@ static int ixgbe_sysctl_print_rss_config(SYSCTL_HANDLER_ARGS);
#endif
static int ixgbe_sysctl_wol_enable(SYSCTL_HANDLER_ARGS);
static int ixgbe_sysctl_wufc(SYSCTL_HANDLER_ARGS);
-static int ixgbe_sysctl_eee_enable(SYSCTL_HANDLER_ARGS);
-static int ixgbe_sysctl_eee_negotiated(SYSCTL_HANDLER_ARGS);
-static int ixgbe_sysctl_eee_rx_lpi_status(SYSCTL_HANDLER_ARGS);
-static int ixgbe_sysctl_eee_tx_lpi_status(SYSCTL_HANDLER_ARGS);
-static int ixgbe_sysctl_eee_tx_lpi_delay(SYSCTL_HANDLER_ARGS);
/* Support for pluggable optic modules */
static bool ixgbe_sfp_probe(struct adapter *);
@@ -211,6 +207,7 @@ static void ixgbe_handle_phy(void *, int);
static void ixgbe_reinit_fdir(void *, int);
#endif
+
#ifdef PCI_IOV
static void ixgbe_ping_all_vfs(struct adapter *);
static void ixgbe_handle_mbx(void *, int);
@@ -270,18 +267,16 @@ static SYSCTL_NODE(_hw, OID_AUTO, ix, CTLFLAG_RD, 0,
** traffic for that interrupt vector
*/
static int ixgbe_enable_aim = TRUE;
-TUNABLE_INT("hw.ix.enable_aim", &ixgbe_enable_aim);
SYSCTL_INT(_hw_ix, OID_AUTO, enable_aim, CTLFLAG_RWTUN, &ixgbe_enable_aim, 0,
"Enable adaptive interrupt moderation");
static int ixgbe_max_interrupt_rate = (4000000 / IXGBE_LOW_LATENCY);
-TUNABLE_INT("hw.ix.max_interrupt_rate", &ixgbe_max_interrupt_rate);
SYSCTL_INT(_hw_ix, OID_AUTO, max_interrupt_rate, CTLFLAG_RDTUN,
&ixgbe_max_interrupt_rate, 0, "Maximum interrupts per second");
/* How many packets rxeof tries to clean at a time */
static int ixgbe_rx_process_limit = 256;
-TUNABLE_INT("hw.ix.rx_process_limit", &ixgbe_rx_process_limit);
+TUNABLE_INT("hw.ixgbe.rx_process_limit", &ixgbe_rx_process_limit);
SYSCTL_INT(_hw_ix, OID_AUTO, rx_process_limit, CTLFLAG_RDTUN,
&ixgbe_rx_process_limit, 0,
"Maximum number of received packets to process at a time,"
@@ -289,22 +284,12 @@ SYSCTL_INT(_hw_ix, OID_AUTO, rx_process_limit, CTLFLAG_RDTUN,
/* How many packets txeof tries to clean at a time */
static int ixgbe_tx_process_limit = 256;
-TUNABLE_INT("hw.ix.tx_process_limit", &ixgbe_tx_process_limit);
+TUNABLE_INT("hw.ixgbe.tx_process_limit", &ixgbe_tx_process_limit);
SYSCTL_INT(_hw_ix, OID_AUTO, tx_process_limit, CTLFLAG_RDTUN,
&ixgbe_tx_process_limit, 0,
"Maximum number of sent packets to process at a time,"
"-1 means unlimited");
-/* Flow control setting, default to full */
-static int ixgbe_flow_control = ixgbe_fc_full;
-SYSCTL_INT(_hw_ix, OID_AUTO, flow_control, CTLFLAG_RDTUN,
- &ixgbe_flow_control, 0, "Default flow control used for all adapters");
-
-/* Advertise Speed, default to 0 (auto) */
-static int ixgbe_advertise_speed = 0;
-SYSCTL_INT(_hw_ix, OID_AUTO, advertise_speed, CTLFLAG_RDTUN,
- &ixgbe_advertise_speed, 0, "Default advertised speed for all adapters");
-
/*
** Smart speed setting, default to on
** this only works as a compile option
@@ -319,7 +304,6 @@ static int ixgbe_smart_speed = ixgbe_smart_speed_on;
* but this allows it to be forced off for testing.
*/
static int ixgbe_enable_msix = 1;
-TUNABLE_INT("hw.ix.enable_msix", &ixgbe_enable_msix);
SYSCTL_INT(_hw_ix, OID_AUTO, enable_msix, CTLFLAG_RDTUN, &ixgbe_enable_msix, 0,
"Enable MSI-X interrupts");
@@ -330,10 +314,8 @@ SYSCTL_INT(_hw_ix, OID_AUTO, enable_msix, CTLFLAG_RDTUN, &ixgbe_enable_msix, 0,
* can be overriden manually here.
*/
static int ixgbe_num_queues = 0;
-TUNABLE_INT("hw.ix.num_queues", &ixgbe_num_queues);
SYSCTL_INT(_hw_ix, OID_AUTO, num_queues, CTLFLAG_RDTUN, &ixgbe_num_queues, 0,
- "Number of queues to configure up to a mximum of 8,"
- "0 indicates autoconfigure");
+ "Number of queues to configure, 0 indicates autoconfigure");
/*
** Number of TX descriptors per ring,
@@ -341,13 +323,11 @@ SYSCTL_INT(_hw_ix, OID_AUTO, num_queues, CTLFLAG_RDTUN, &ixgbe_num_queues, 0,
** the better performing choice.
*/
static int ixgbe_txd = PERFORM_TXD;
-TUNABLE_INT("hw.ix.txd", &ixgbe_txd);
SYSCTL_INT(_hw_ix, OID_AUTO, txd, CTLFLAG_RDTUN, &ixgbe_txd, 0,
"Number of transmit descriptors per queue");
/* Number of RX descriptors per ring */
static int ixgbe_rxd = PERFORM_RXD;
-TUNABLE_INT("hw.ix.rxd", &ixgbe_rxd);
SYSCTL_INT(_hw_ix, OID_AUTO, rxd, CTLFLAG_RDTUN, &ixgbe_rxd, 0,
"Number of receive descriptors per queue");
@@ -469,6 +449,7 @@ ixgbe_attach(device_t dev)
adapter->init_locked = ixgbe_init_locked;
adapter->stop_locked = ixgbe_stop;
#endif
+
/* Core Lock Init*/
IXGBE_CORE_LOCK_INIT(adapter, device_get_nameunit(dev));
@@ -587,11 +568,6 @@ ixgbe_attach(device_t dev)
break;
}
- /* hw.ix defaults init */
- ixgbe_set_advertise(adapter, ixgbe_advertise_speed);
- ixgbe_set_flowcntl(adapter, ixgbe_flow_control);
- adapter->enable_aim = ixgbe_enable_aim;
-
if ((adapter->msix > 1) && (ixgbe_enable_msix))
error = ixgbe_allocate_msix(adapter);
else
@@ -599,12 +575,6 @@ ixgbe_attach(device_t dev)
if (error)
goto err_late;
- /* Enable the optics for 82599 SFP+ fiber */
- ixgbe_enable_tx_laser(hw);
-
- /* Enable power to the phy. */
- ixgbe_set_phy_power(hw, TRUE);
-
/* Setup OS specific network interface */
if (ixgbe_setup_interface(dev, adapter) != 0)
goto err_late;
@@ -624,7 +594,6 @@ ixgbe_attach(device_t dev)
/* Set an initial default flow control & dmac value */
adapter->fc = ixgbe_fc_full;
adapter->dmac = 0;
- adapter->eee_enabled = 0;
#ifdef PCI_IOV
if ((hw->mac.type != ixgbe_mac_82598EB) && (adapter->msix > 1)) {
@@ -978,7 +947,7 @@ ixgbe_ioctl(struct ifnet * ifp, u_long command, caddr_t data)
VLAN_CAPABILITIES(ifp);
break;
}
-#if __FreeBSD_version >= 1002500
+#if __FreeBSD_version >= 1100036
case SIOCGI2C:
{
struct ixgbe_hw *hw = &adapter->hw;
@@ -1270,16 +1239,6 @@ ixgbe_init_locked(struct adapter *adapter)
/* Set moderation on the Link interrupt */
IXGBE_WRITE_REG(hw, IXGBE_EITR(adapter->vector), IXGBE_LINK_ITR);
- /* Configure Energy Efficient Ethernet for supported devices */
- if (hw->mac.ops.setup_eee) {
- err = hw->mac.ops.setup_eee(hw, adapter->eee_enabled);
- if (err)
- device_printf(dev, "Error setting up EEE: %d\n", err);
- }
-
- /* Enable power to the phy. */
- ixgbe_set_phy_power(hw, TRUE);
-
/* Config/Enable Link */
ixgbe_config_link(adapter);
@@ -1590,7 +1549,7 @@ ixgbe_msix_que(void *arg)
/* Do AIM now? */
- if (adapter->enable_aim == FALSE)
+ if (ixgbe_enable_aim == FALSE)
goto no_calc;
/*
** Do Adaptive Interrupt Moderation:
@@ -1985,16 +1944,10 @@ ixgbe_media_change(struct ifnet * ifp)
hw->mac.autotry_restart = TRUE;
hw->mac.ops.setup_link(hw, speed, TRUE);
- if (IFM_SUBTYPE(ifm->ifm_media) == IFM_AUTO) {
- adapter->advertise = 0;
- } else {
- if ((speed & IXGBE_LINK_SPEED_10GB_FULL) != 0)
- adapter->advertise |= 1 << 2;
- if ((speed & IXGBE_LINK_SPEED_1GB_FULL) != 0)
- adapter->advertise |= 1 << 1;
- if ((speed & IXGBE_LINK_SPEED_100_FULL) != 0)
- adapter->advertise |= 1 << 0;
- }
+ adapter->advertise =
+ ((speed & IXGBE_LINK_SPEED_10GB_FULL) << 2) |
+ ((speed & IXGBE_LINK_SPEED_1GB_FULL) << 1) |
+ ((speed & IXGBE_LINK_SPEED_100_FULL) << 0);
return (0);
@@ -2830,7 +2783,7 @@ ixgbe_setup_interface(device_t dev, struct adapter *adapter)
return (-1);
}
if_initname(ifp, device_get_name(dev), device_get_unit(dev));
- if_initbaudrate(ifp, IF_Gbps(10));
+ ifp->if_baudrate = IF_Gbps(10);
ifp->if_init = ixgbe_init;
ifp->if_softc = adapter;
ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
@@ -2990,7 +2943,12 @@ ixgbe_config_link(struct adapter *adapter)
sfp = ixgbe_is_sfp(hw);
if (sfp) {
- taskqueue_enqueue(adapter->tq, &adapter->mod_task);
+ if (hw->phy.multispeed_fiber) {
+ hw->mac.ops.setup_sfp(hw);
+ ixgbe_enable_tx_laser(hw);
+ taskqueue_enqueue(adapter->tq, &adapter->msf_task);
+ } else
+ taskqueue_enqueue(adapter->tq, &adapter->mod_task);
} else {
if (hw->mac.ops.check_link)
err = ixgbe_check_link(hw, &adapter->link_speed,
@@ -3796,66 +3754,23 @@ ixgbe_handle_mod(void *context, int pending)
{
struct adapter *adapter = context;
struct ixgbe_hw *hw = &adapter->hw;
- enum ixgbe_phy_type orig_type = hw->phy.type;
device_t dev = adapter->dev;
u32 err;
- IXGBE_CORE_LOCK(adapter);
-
- /* Check to see if the PHY type changed */
- if (hw->phy.ops.identify) {
- hw->phy.type = ixgbe_phy_unknown;
- hw->phy.ops.identify(hw);
- }
-
- if (hw->phy.type != orig_type) {
- device_printf(dev, "Detected phy_type %d\n", hw->phy.type);
-
- if (hw->phy.type == ixgbe_phy_none) {
- hw->phy.sfp_type = ixgbe_sfp_type_unknown;
- goto out;
- }
-
- /* Try to do the initialization that was skipped before */
- if (hw->phy.ops.init)
- hw->phy.ops.init(hw);
- if (hw->phy.ops.reset)
- hw->phy.ops.reset(hw);
- }
-
err = hw->phy.ops.identify_sfp(hw);
if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
device_printf(dev,
"Unsupported SFP+ module type was detected.\n");
- goto out;
+ return;
}
err = hw->mac.ops.setup_sfp(hw);
if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
device_printf(dev,
"Setup failure - unsupported SFP+ module type.\n");
- goto out;
- }
- if (hw->phy.multispeed_fiber)
- taskqueue_enqueue(adapter->tq, &adapter->msf_task);
-out:
- /* Update media type */
- switch (hw->mac.ops.get_media_type(hw)) {
- case ixgbe_media_type_fiber:
- adapter->optics = IFM_10G_SR;
- break;
- case ixgbe_media_type_copper:
- adapter->optics = IFM_10G_TWINAX;
- break;
- case ixgbe_media_type_cx4:
- adapter->optics = IFM_10G_CX4;
- break;
- default:
- adapter->optics = 0;
- break;
+ return;
}
-
- IXGBE_CORE_UNLOCK(adapter);
+ taskqueue_enqueue(adapter->tq, &adapter->msf_task);
return;
}
@@ -3871,7 +3786,6 @@ ixgbe_handle_msf(void *context, int pending)
u32 autoneg;
bool negotiate;
- IXGBE_CORE_LOCK(adapter);
/* get_supported_phy_layer will call hw->phy.ops.identify_sfp() */
adapter->phy_layer = ixgbe_get_supported_physical_layer(hw);
@@ -3884,7 +3798,6 @@ ixgbe_handle_msf(void *context, int pending)
/* Adjust media types shown in ifconfig */
ifmedia_removeall(&adapter->media);
ixgbe_add_media_types(adapter);
- IXGBE_CORE_UNLOCK(adapter);
return;
}
@@ -4000,9 +3913,6 @@ ixgbe_setup_low_power_mode(struct adapter *adapter)
mtx_assert(&adapter->core_mtx, MA_OWNED);
- if (!hw->wol_enabled)
- ixgbe_set_phy_power(hw, FALSE);
-
/* Limit power management flow to X550EM baseT */
if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T
&& hw->phy.ops.enter_lplu) {
@@ -4316,7 +4226,7 @@ ixgbe_add_device_sysctls(struct adapter *adapter)
/* Sysctls for all devices */
SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "fc",
CTLTYPE_INT | CTLFLAG_RW, adapter, 0,
- ixgbe_sysctl_flowcntl, "I", IXGBE_SYSCTL_DESC_SET_FC);
+ ixgbe_set_flowcntl, "I", IXGBE_SYSCTL_DESC_SET_FC);
SYSCTL_ADD_INT(ctx, child, OID_AUTO, "enable_aim",
CTLFLAG_RW,
@@ -4324,7 +4234,7 @@ ixgbe_add_device_sysctls(struct adapter *adapter)
SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "advertise_speed",
CTLTYPE_INT | CTLFLAG_RW, adapter, 0,
- ixgbe_sysctl_advertise, "I", IXGBE_SYSCTL_DESC_ADV_SPEED);
+ ixgbe_set_advertise, "I", IXGBE_SYSCTL_DESC_ADV_SPEED);
SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "thermal_test",
CTLTYPE_INT | CTLFLAG_RW, adapter, 0,
@@ -4346,42 +4256,6 @@ ixgbe_add_device_sysctls(struct adapter *adapter)
CTLTYPE_INT | CTLFLAG_RW, adapter, 0,
ixgbe_sysctl_dmac, "I", "DMA Coalesce");
- /* for X552 backplane devices */
- if (hw->device_id == IXGBE_DEV_ID_X550EM_X_KR) {
- struct sysctl_oid *eee_node;
- struct sysctl_oid_list *eee_list;
-
- eee_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "eee",
- CTLFLAG_RD, NULL,
- "Energy Efficient Ethernet sysctls");
- eee_list = SYSCTL_CHILDREN(eee_node);
-
- SYSCTL_ADD_PROC(ctx, eee_list, OID_AUTO, "enable",
- CTLTYPE_INT | CTLFLAG_RW, adapter, 0,
- ixgbe_sysctl_eee_enable, "I",
- "Enable or Disable EEE");
-
- SYSCTL_ADD_PROC(ctx, eee_list, OID_AUTO, "negotiated",
- CTLTYPE_INT | CTLFLAG_RD, adapter, 0,
- ixgbe_sysctl_eee_negotiated, "I",
- "EEE negotiated on link");
-
- SYSCTL_ADD_PROC(ctx, eee_list, OID_AUTO, "tx_lpi_status",
- CTLTYPE_INT | CTLFLAG_RD, adapter, 0,
- ixgbe_sysctl_eee_tx_lpi_status, "I",
- "Whether or not TX link is in LPI state");
-
- SYSCTL_ADD_PROC(ctx, eee_list, OID_AUTO, "rx_lpi_status",
- CTLTYPE_INT | CTLFLAG_RD, adapter, 0,
- ixgbe_sysctl_eee_rx_lpi_status, "I",
- "Whether or not RX link is in LPI state");
-
- SYSCTL_ADD_PROC(ctx, eee_list, OID_AUTO, "tx_lpi_delay",
- CTLTYPE_INT | CTLFLAG_RD, adapter, 0,
- ixgbe_sysctl_eee_tx_lpi_delay, "I",
- "TX LPI entry delay in microseconds");
- }
-
/* for WoL-capable devices */
if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) {
SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "wol_enable",
@@ -4689,51 +4563,41 @@ ixgbe_set_sysctl_value(struct adapter *adapter, const char *name,
** 3 - full
*/
static int
-ixgbe_sysctl_flowcntl(SYSCTL_HANDLER_ARGS)
+ixgbe_set_flowcntl(SYSCTL_HANDLER_ARGS)
{
- int error, fc;
- struct adapter *adapter;
-
- adapter = (struct adapter *) arg1;
- fc = adapter->fc;
+ int error, last;
+ struct adapter *adapter = (struct adapter *) arg1;
- error = sysctl_handle_int(oidp, &fc, 0, req);
+ last = adapter->fc;
+ error = sysctl_handle_int(oidp, &adapter->fc, 0, req);
if ((error) || (req->newptr == NULL))
return (error);
/* Don't bother if it's not changed */
- if (adapter->fc == fc)
+ if (adapter->fc == last)
return (0);
- return ixgbe_set_flowcntl(adapter, fc);
-}
-
-
-static int
-ixgbe_set_flowcntl(struct adapter *adapter, int fc)
-{
-
- switch (fc) {
- case ixgbe_fc_rx_pause:
- case ixgbe_fc_tx_pause:
- case ixgbe_fc_full:
- adapter->hw.fc.requested_mode = adapter->fc;
- if (adapter->num_queues > 1)
- ixgbe_disable_rx_drop(adapter);
- break;
- case ixgbe_fc_none:
- adapter->hw.fc.requested_mode = ixgbe_fc_none;
- if (adapter->num_queues > 1)
- ixgbe_enable_rx_drop(adapter);
- break;
- default:
- return (EINVAL);
+ switch (adapter->fc) {
+ case ixgbe_fc_rx_pause:
+ case ixgbe_fc_tx_pause:
+ case ixgbe_fc_full:
+ adapter->hw.fc.requested_mode = adapter->fc;
+ if (adapter->num_queues > 1)
+ ixgbe_disable_rx_drop(adapter);
+ break;
+ case ixgbe_fc_none:
+ adapter->hw.fc.requested_mode = ixgbe_fc_none;
+ if (adapter->num_queues > 1)
+ ixgbe_enable_rx_drop(adapter);
+ break;
+ default:
+ adapter->fc = last;
+ return (EINVAL);
}
- adapter->fc = fc;
/* Don't autoneg if forcing a value */
adapter->hw.fc.disable_fc_autoneg = TRUE;
ixgbe_fc_enable(&adapter->hw);
- return (0);
+ return error;
}
/*
@@ -4744,39 +4608,31 @@ ixgbe_set_flowcntl(struct adapter *adapter, int fc)
** 0x4 - advertise 10G
*/
static int
-ixgbe_sysctl_advertise(SYSCTL_HANDLER_ARGS)
+ixgbe_set_advertise(SYSCTL_HANDLER_ARGS)
{
- int error, advertise;
- struct adapter *adapter;
+ int error = 0, requested;
+ struct adapter *adapter;
+ device_t dev;
+ struct ixgbe_hw *hw;
+ ixgbe_link_speed speed = 0;
adapter = (struct adapter *) arg1;
- advertise = adapter->advertise;
+ dev = adapter->dev;
+ hw = &adapter->hw;
- error = sysctl_handle_int(oidp, &advertise, 0, req);
+ requested = adapter->advertise;
+ error = sysctl_handle_int(oidp, &requested, 0, req);
if ((error) || (req->newptr == NULL))
return (error);
- /* Checks to validate new value */
- if (adapter->advertise == advertise) /* no change */
- return (0);
-
- return ixgbe_set_advertise(adapter, advertise);
-}
-
-static int
-ixgbe_set_advertise(struct adapter *adapter, int advertise)
-{
- device_t dev;
- struct ixgbe_hw *hw;
- ixgbe_link_speed speed;
-
- hw = &adapter->hw;
- dev = adapter->dev;
-
/* No speed changes for backplane media */
if (hw->phy.media_type == ixgbe_media_type_backplane)
return (ENODEV);
+ /* Checks to validate new value */
+ if (adapter->advertise == requested) /* no change */
+ return (0);
+
if (!((hw->phy.media_type == ixgbe_media_type_copper) ||
(hw->phy.multispeed_fiber))) {
device_printf(dev,
@@ -4785,13 +4641,13 @@ ixgbe_set_advertise(struct adapter *adapter, int advertise)
return (EINVAL);
}
- if (advertise < 0x1 || advertise > 0x7) {
+ if (requested < 0x1 || requested > 0x7) {
device_printf(dev,
"Invalid advertised speed; valid modes are 0x1 through 0x7\n");
return (EINVAL);
}
- if ((advertise & 0x1)
+ if ((requested & 0x1)
&& (hw->mac.type != ixgbe_mac_X540)
&& (hw->mac.type != ixgbe_mac_X550)) {
device_printf(dev, "Set Advertise: 100Mb on X540/X550 only\n");
@@ -4799,19 +4655,18 @@ ixgbe_set_advertise(struct adapter *adapter, int advertise)
}
/* Set new value and report new advertised mode */
- speed = 0;
- if (advertise & 0x1)
+ if (requested & 0x1)
speed |= IXGBE_LINK_SPEED_100_FULL;
- if (advertise & 0x2)
+ if (requested & 0x2)
speed |= IXGBE_LINK_SPEED_1GB_FULL;
- if (advertise & 0x4)
+ if (requested & 0x4)
speed |= IXGBE_LINK_SPEED_10GB_FULL;
- adapter->advertise = advertise;
hw->mac.autotry_restart = TRUE;
hw->mac.ops.setup_link(hw, speed, TRUE);
+ adapter->advertise = requested;
- return (0);
+ return (error);
}
/*
@@ -5022,104 +4877,6 @@ ixgbe_sysctl_wol_enable(SYSCTL_HANDLER_ARGS)
}
/*
- * Sysctl to enable/disable the Energy Efficient Ethernet capability,
- * if supported by the adapter.
- * Values:
- * 0 - disabled
- * 1 - enabled
- */
-static int
-ixgbe_sysctl_eee_enable(SYSCTL_HANDLER_ARGS)
-{
- struct adapter *adapter = (struct adapter *) arg1;
- struct ixgbe_hw *hw = &adapter->hw;
- struct ifnet *ifp = adapter->ifp;
- int new_eee_enabled, error = 0;
-
- new_eee_enabled = adapter->eee_enabled;
- error = sysctl_handle_int(oidp, &new_eee_enabled, 0, req);
- if ((error) || (req->newptr == NULL))
- return (error);
- new_eee_enabled = !!(new_eee_enabled);
- if (new_eee_enabled == adapter->eee_enabled)
- return (0);
-
- if (new_eee_enabled > 0 && !hw->mac.ops.setup_eee)
- return (ENODEV);
- else
- adapter->eee_enabled = new_eee_enabled;
-
- /* Re-initialize hardware if it's already running */
- if (ifp->if_drv_flags & IFF_DRV_RUNNING)
- ixgbe_init(adapter);
-
- return (0);
-}
-
-/*
- * Read-only sysctl indicating whether EEE support was negotiated
- * on the link.
- */
-static int
-ixgbe_sysctl_eee_negotiated(SYSCTL_HANDLER_ARGS)
-{
- struct adapter *adapter = (struct adapter *) arg1;
- struct ixgbe_hw *hw = &adapter->hw;
- bool status;
-
- status = !!(IXGBE_READ_REG(hw, IXGBE_EEE_STAT) & IXGBE_EEE_STAT_NEG);
-
- return (sysctl_handle_int(oidp, 0, status, req));
-}
-
-/*
- * Read-only sysctl indicating whether RX Link is in LPI state.
- */
-static int
-ixgbe_sysctl_eee_rx_lpi_status(SYSCTL_HANDLER_ARGS)
-{
- struct adapter *adapter = (struct adapter *) arg1;
- struct ixgbe_hw *hw = &adapter->hw;
- bool status;
-
- status = !!(IXGBE_READ_REG(hw, IXGBE_EEE_STAT) &
- IXGBE_EEE_RX_LPI_STATUS);
-
- return (sysctl_handle_int(oidp, 0, status, req));
-}
-
-/*
- * Read-only sysctl indicating whether TX Link is in LPI state.
- */
-static int
-ixgbe_sysctl_eee_tx_lpi_status(SYSCTL_HANDLER_ARGS)
-{
- struct adapter *adapter = (struct adapter *) arg1;
- struct ixgbe_hw *hw = &adapter->hw;
- bool status;
-
- status = !!(IXGBE_READ_REG(hw, IXGBE_EEE_STAT) &
- IXGBE_EEE_TX_LPI_STATUS);
-
- return (sysctl_handle_int(oidp, 0, status, req));
-}
-
-/*
- * Read-only sysctl indicating TX Link LPI delay
- */
-static int
-ixgbe_sysctl_eee_tx_lpi_delay(SYSCTL_HANDLER_ARGS)
-{
- struct adapter *adapter = (struct adapter *) arg1;
- struct ixgbe_hw *hw = &adapter->hw;
- u32 reg;
-
- reg = IXGBE_READ_REG(hw, IXGBE_EEE_SU);
-
- return (sysctl_handle_int(oidp, 0, reg >> 26, req));
-}
-
-/*
* Sysctl to enable/disable the types of packets that the
* adapter will wake up on upon receipt.
* WUFC - Wake Up Filter Control
diff --git a/sys/dev/ixgbe/ix_txrx.c b/sys/dev/ixgbe/ix_txrx.c
index 9e90e0d..8c311c1 100644
--- a/sys/dev/ixgbe/ix_txrx.c
+++ b/sys/dev/ixgbe/ix_txrx.c
@@ -36,6 +36,9 @@
#ifndef IXGBE_STANDALONE_BUILD
#include "opt_inet.h"
#include "opt_inet6.h"
+#ifdef RSS
+#include "opt_rss.h"
+#endif
#endif
#include "ixgbe.h"
@@ -748,6 +751,7 @@ ixgbe_tx_ctx_setup(struct tx_ring *txr, struct mbuf *mp,
if ((mp->m_pkthdr.csum_flags & CSUM_OFFLOAD) == 0)
offload = FALSE;
+
/* Indicate the whole packet as payload when not doing TSO */
*olinfo_status |= mp->m_pkthdr.len << IXGBE_ADVTXD_PAYLEN_SHIFT;
@@ -796,7 +800,6 @@ ixgbe_tx_ctx_setup(struct tx_ring *txr, struct mbuf *mp,
l3d = mtod(mp, caddr_t) + ehdrlen;
switch (etype) {
-#ifdef INET
case ETHERTYPE_IP:
ip = (struct ip *)(l3d);
ip_hlen = ip->ip_hl << 2;
@@ -808,15 +811,12 @@ ixgbe_tx_ctx_setup(struct tx_ring *txr, struct mbuf *mp,
*olinfo_status |= IXGBE_TXD_POPTS_IXSM << 8;
}
break;
-#endif
-#ifdef INET6
case ETHERTYPE_IPV6:
ip6 = (struct ip6_hdr *)(l3d);
ip_hlen = sizeof(struct ip6_hdr);
ipproto = ip6->ip6_nxt;
type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV6;
break;
-#endif
default:
offload = FALSE;
break;
@@ -1923,12 +1923,49 @@ ixgbe_rxeof(struct ix_queue *que)
if (adapter->num_queues > 1) {
sendmp->m_pkthdr.flowid =
le32toh(cur->wb.lower.hi_dword.rss);
- /*
- * Full RSS support is not avilable in
- * FreeBSD 10 so setting the hash type to
- * OPAQUE.
- */
- M_HASHTYPE_SET(sendmp, M_HASHTYPE_OPAQUE);
+ switch (pkt_info & IXGBE_RXDADV_RSSTYPE_MASK) {
+ case IXGBE_RXDADV_RSSTYPE_IPV4:
+ M_HASHTYPE_SET(sendmp,
+ M_HASHTYPE_RSS_IPV4);
+ break;
+ case IXGBE_RXDADV_RSSTYPE_IPV4_TCP:
+ M_HASHTYPE_SET(sendmp,
+ M_HASHTYPE_RSS_TCP_IPV4);
+ break;
+ case IXGBE_RXDADV_RSSTYPE_IPV6:
+ M_HASHTYPE_SET(sendmp,
+ M_HASHTYPE_RSS_IPV6);
+ break;
+ case IXGBE_RXDADV_RSSTYPE_IPV6_TCP:
+ M_HASHTYPE_SET(sendmp,
+ M_HASHTYPE_RSS_TCP_IPV6);
+ break;
+ case IXGBE_RXDADV_RSSTYPE_IPV6_EX:
+ M_HASHTYPE_SET(sendmp,
+ M_HASHTYPE_RSS_IPV6_EX);
+ break;
+ case IXGBE_RXDADV_RSSTYPE_IPV6_TCP_EX:
+ M_HASHTYPE_SET(sendmp,
+ M_HASHTYPE_RSS_TCP_IPV6_EX);
+ break;
+#if __FreeBSD_version > 1100000
+ case IXGBE_RXDADV_RSSTYPE_IPV4_UDP:
+ M_HASHTYPE_SET(sendmp,
+ M_HASHTYPE_RSS_UDP_IPV4);
+ break;
+ case IXGBE_RXDADV_RSSTYPE_IPV6_UDP:
+ M_HASHTYPE_SET(sendmp,
+ M_HASHTYPE_RSS_UDP_IPV6);
+ break;
+ case IXGBE_RXDADV_RSSTYPE_IPV6_UDP_EX:
+ M_HASHTYPE_SET(sendmp,
+ M_HASHTYPE_RSS_UDP_IPV6_EX);
+ break;
+#endif
+ default:
+ M_HASHTYPE_SET(sendmp,
+ M_HASHTYPE_OPAQUE);
+ }
} else {
sendmp->m_pkthdr.flowid = que->msix;
M_HASHTYPE_SET(sendmp, M_HASHTYPE_OPAQUE);
diff --git a/sys/dev/ixgbe/ixgbe.h b/sys/dev/ixgbe/ixgbe.h
index 558b532..696eb21 100644
--- a/sys/dev/ixgbe/ixgbe.h
+++ b/sys/dev/ixgbe/ixgbe.h
@@ -497,7 +497,6 @@ struct adapter {
u32 optics;
u32 fc; /* local flow ctrl setting */
int advertise; /* link speeds */
- bool enable_aim; /* adaptive interrupt moderation */
bool link_active;
u16 max_frame_size;
u16 num_segs;
@@ -505,7 +504,6 @@ struct adapter {
bool link_up;
u32 vector;
u16 dmac;
- bool eee_enabled;
u32 phy_layer;
/* Power management-related */
@@ -563,8 +561,8 @@ struct adapter {
struct ixgbe_vf *vfs;
#endif
#ifdef DEV_NETMAP
- void (*init_locked)(struct adapter *);
- void (*stop_locked)(void *);
+ void (*init_locked)(struct adapter *);
+ void (*stop_locked)(void *);
#endif
/* Misc stats maintained by the driver */
diff --git a/sys/dev/ixgbe/ixgbe_common.c b/sys/dev/ixgbe/ixgbe_common.c
index feb74f6..13a5825 100644
--- a/sys/dev/ixgbe/ixgbe_common.c
+++ b/sys/dev/ixgbe/ixgbe_common.c
@@ -2250,7 +2250,7 @@ s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw)
* ixgbe_validate_mac_addr - Validate MAC address
* @mac_addr: pointer to MAC address.
*
- * Tests a MAC address to ensure it is a valid Individual Address
+ * Tests a MAC address to ensure it is a valid Individual Address.
**/
s32 ixgbe_validate_mac_addr(u8 *mac_addr)
{
@@ -2260,16 +2260,13 @@ s32 ixgbe_validate_mac_addr(u8 *mac_addr)
/* Make sure it is not a multicast address */
if (IXGBE_IS_MULTICAST(mac_addr)) {
- DEBUGOUT("MAC address is multicast\n");
status = IXGBE_ERR_INVALID_MAC_ADDR;
/* Not a broadcast address */
} else if (IXGBE_IS_BROADCAST(mac_addr)) {
- DEBUGOUT("MAC address is broadcast\n");
status = IXGBE_ERR_INVALID_MAC_ADDR;
/* Reject the zero address */
} else if (mac_addr[0] == 0 && mac_addr[1] == 0 && mac_addr[2] == 0 &&
mac_addr[3] == 0 && mac_addr[4] == 0 && mac_addr[5] == 0) {
- DEBUGOUT("MAC address is all zeros\n");
status = IXGBE_ERR_INVALID_MAC_ADDR;
}
return status;
diff --git a/sys/dev/ixgbe/ixgbe_dcb.c b/sys/dev/ixgbe/ixgbe_dcb.c
index 437d336..2fd71e5 100644
--- a/sys/dev/ixgbe/ixgbe_dcb.c
+++ b/sys/dev/ixgbe/ixgbe_dcb.c
@@ -375,8 +375,6 @@ s32 ixgbe_dcb_check_config_cee(struct ixgbe_dcb_config *dcb_config)
}
err_config:
- DEBUGOUT2("DCB error code %d while checking %s settings.\n",
- ret_val, (i == IXGBE_DCB_TX_CONFIG) ? "Tx" : "Rx");
return ret_val;
}
diff --git a/sys/dev/ixgbe/ixgbe_osdep.h b/sys/dev/ixgbe/ixgbe_osdep.h
index 79d1166..388e26c 100644
--- a/sys/dev/ixgbe/ixgbe_osdep.h
+++ b/sys/dev/ixgbe/ixgbe_osdep.h
@@ -32,6 +32,7 @@
******************************************************************************/
/*$FreeBSD$*/
+
#ifndef _IXGBE_OS_H_
#define _IXGBE_OS_H_
@@ -57,15 +58,6 @@
#define ASSERT(x) if(!(x)) panic("IXGBE: x")
#define EWARN(H, W, S) printf(W)
-enum {
- IXGBE_ERROR_SOFTWARE,
- IXGBE_ERROR_POLLING,
- IXGBE_ERROR_INVALID_STATE,
- IXGBE_ERROR_UNSUPPORTED,
- IXGBE_ERROR_ARGUMENT,
- IXGBE_ERROR_CAUTION,
-};
-
/* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */
#define usec_delay(x) DELAY(x)
#define msec_delay(x) DELAY(1000*(x))
@@ -82,23 +74,9 @@ enum {
#define DEBUGOUT5(S,A,B,C,D,E) printf(S "\n",A,B,C,D,E)
#define DEBUGOUT6(S,A,B,C,D,E,F) printf(S "\n",A,B,C,D,E,F)
#define DEBUGOUT7(S,A,B,C,D,E,F,G) printf(S "\n",A,B,C,D,E,F,G)
- #define ERROR_REPORT1 ERROR_REPORT
- #define ERROR_REPORT2 ERROR_REPORT
- #define ERROR_REPORT3 ERROR_REPORT
- #define ERROR_REPORT(level, format, arg...) do { \
- switch (level) { \
- case IXGBE_ERROR_SOFTWARE: \
- case IXGBE_ERROR_CAUTION: \
- case IXGBE_ERROR_POLLING: \
- case IXGBE_ERROR_INVALID_STATE: \
- case IXGBE_ERROR_UNSUPPORTED: \
- case IXGBE_ERROR_ARGUMENT: \
- device_printf(ixgbe_dev_from_hw(hw), format, ## arg); \
- break; \
- default: \
- break; \
- } \
- } while (0)
+ #define ERROR_REPORT1(S,A) printf(S "\n",A)
+ #define ERROR_REPORT2(S,A,B) printf(S "\n",A,B)
+ #define ERROR_REPORT3(S,A,B,C) printf(S "\n",A,B,C)
#else
#define DEBUGOUT(S)
#define DEBUGOUT1(S,A)
diff --git a/sys/dev/ixgbe/ixgbe_phy.c b/sys/dev/ixgbe/ixgbe_phy.c
index f5d22b2..8b0d165 100644
--- a/sys/dev/ixgbe/ixgbe_phy.c
+++ b/sys/dev/ixgbe/ixgbe_phy.c
@@ -495,7 +495,7 @@ s32 ixgbe_get_phy_id(struct ixgbe_hw *hw)
/**
* ixgbe_get_phy_type_from_id - Get the phy type
- * @hw: pointer to hardware structure
+ * @phy_id: PHY ID information
*
**/
enum ixgbe_phy_type ixgbe_get_phy_type_from_id(u32 phy_id)
@@ -527,8 +527,6 @@ enum ixgbe_phy_type ixgbe_get_phy_type_from_id(u32 phy_id)
phy_type = ixgbe_phy_unknown;
break;
}
-
- DEBUGOUT1("phy type found is %d\n", phy_type);
return phy_type;
}
diff --git a/sys/dev/ixgbe/ixgbe_type.h b/sys/dev/ixgbe/ixgbe_type.h
index da03f79..86e60b3 100644
--- a/sys/dev/ixgbe/ixgbe_type.h
+++ b/sys/dev/ixgbe/ixgbe_type.h
@@ -1481,7 +1481,7 @@ struct ixgbe_dmac_config {
#define IXGBE_MDIO_GLOBAL_ALARM_1 0xCC00 /* Global alarm 1 */
#define IXGBE_MDIO_GLOBAL_ALM_1_DEV_FAULT 0x0010 /* device fault */
#define IXGBE_MDIO_GLOBAL_ALM_1_HI_TMP_FAIL 0x4000 /* high temp failure */
-#define IXGBE_MDIO_GLOBAL_FAULT_MSG 0xC850 /* Global Fault Message */
+#define IXGBE_MDIO_GLOBAL_FAULT_MSG 0xC850 /* Global Fault Message */
#define IXGBE_MDIO_GLOBAL_FAULT_MSG_HI_TMP 0x8007 /* high temp failure */
#define IXGBE_MDIO_GLOBAL_INT_MASK 0xD400 /* Global int mask */
#define IXGBE_MDIO_GLOBAL_AN_VEN_ALM_INT_EN 0x1000 /* autoneg vendor alarm int enable */
@@ -1489,6 +1489,7 @@ struct ixgbe_dmac_config {
#define IXGBE_MDIO_GLOBAL_VEN_ALM_INT_EN 0x1 /* vendor alarm int enable */
#define IXGBE_MDIO_GLOBAL_STD_ALM2_INT 0x200 /* vendor alarm2 int mask */
#define IXGBE_MDIO_GLOBAL_INT_HI_TEMP_EN 0x4000 /* int high temp enable */
+#define IXGBE_MDIO_GLOBAL_INT_DEV_FAULT_EN 0x0010 /* int dev fault enable */
#define IXGBE_MDIO_PMA_PMD_CONTROL_ADDR 0x0000 /* PMA/PMD Control Reg */
#define IXGBE_MDIO_PMA_PMD_SDA_SCL_ADDR 0xC30A /* PHY_XS SDA/SCL Addr Reg */
#define IXGBE_MDIO_PMA_PMD_SDA_SCL_DATA 0xC30B /* PHY_XS SDA/SCL Data Reg */
@@ -2917,6 +2918,15 @@ enum ixgbe_fdir_pballoc_type {
#define FW_DISABLE_RXEN_CMD 0xDE
#define FW_DISABLE_RXEN_LEN 0x1
#define FW_PHY_MGMT_REQ_CMD 0x20
+#define FW_PHY_TOKEN_REQ_CMD 0xA
+#define FW_PHY_TOKEN_REQ_LEN 2
+#define FW_PHY_TOKEN_REQ 0
+#define FW_PHY_TOKEN_REL 1
+#define FW_PHY_TOKEN_OK 1
+#define FW_PHY_TOKEN_RETRY 0x80
+#define FW_PHY_TOKEN_DELAY 5 /* milliseconds */
+#define FW_PHY_TOKEN_WAIT 5 /* seconds */
+#define FW_PHY_TOKEN_RETRIES ((FW_PHY_TOKEN_WAIT * 1000) / FW_PHY_TOKEN_DELAY)
#define FW_INT_PHY_REQ_CMD 0xB
#define FW_INT_PHY_REQ_LEN 10
#define FW_INT_PHY_REQ_READ 0
@@ -2990,6 +3000,13 @@ struct ixgbe_hic_disable_rxen {
u16 pad3;
};
+struct ixgbe_hic_phy_token_req {
+ struct ixgbe_hic_hdr hdr;
+ u8 port_number;
+ u8 command_type;
+ u16 pad;
+};
+
struct ixgbe_hic_internal_phy_req {
struct ixgbe_hic_hdr hdr;
u8 port_number;
@@ -3130,6 +3147,7 @@ struct ixgbe_adv_tx_context_desc {
#define IXGBE_ADVTXD_TUCMD_L4T_UDP 0x00000000 /* L4 Packet TYPE of UDP */
#define IXGBE_ADVTXD_TUCMD_L4T_TCP 0x00000800 /* L4 Packet TYPE of TCP */
#define IXGBE_ADVTXD_TUCMD_L4T_SCTP 0x00001000 /* L4 Packet TYPE of SCTP */
+#define IXGBE_ADVTXD_TUCMD_L4T_RSV 0x00001800 /* RSV L4 Packet TYPE */
#define IXGBE_ADVTXD_TUCMD_MKRREQ 0x00002000 /* req Markers and CRC */
#define IXGBE_ADVTXD_POPTS_IPSEC 0x00000400 /* IPSec offload request */
#define IXGBE_ADVTXD_TUCMD_IPSEC_TYPE_ESP 0x00002000 /* IPSec Type ESP */
@@ -3943,13 +3961,15 @@ struct ixgbe_hw {
#define IXGBE_ERR_FEATURE_NOT_SUPPORTED -36
#define IXGBE_ERR_EEPROM_PROTECTED_REGION -37
#define IXGBE_ERR_FDIR_CMD_INCOMPLETE -38
+#define IXGBE_ERR_FW_RESP_INVALID -39
+#define IXGBE_ERR_TOKEN_RETRY -40
#define IXGBE_NOT_IMPLEMENTED 0x7FFFFFFF
#define IXGBE_FUSES0_GROUP(_i) (0x11158 + ((_i) * 4))
#define IXGBE_FUSES0_300MHZ (1 << 5)
-#define IXGBE_FUSES0_REV1 (1 << 6)
+#define IXGBE_FUSES0_REV_MASK (3 << 6)
#define IXGBE_KRM_PORT_CAR_GEN_CTRL(P) ((P) ? 0x8010 : 0x4010)
#define IXGBE_KRM_LINK_CTRL_1(P) ((P) ? 0x820C : 0x420C)
diff --git a/sys/dev/ixgbe/ixgbe_vf.c b/sys/dev/ixgbe/ixgbe_vf.c
index 2ce4d32..ee3d325 100644
--- a/sys/dev/ixgbe/ixgbe_vf.c
+++ b/sys/dev/ixgbe/ixgbe_vf.c
@@ -229,7 +229,9 @@ s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw)
msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_NACK))
return IXGBE_ERR_INVALID_MAC_ADDR;
- memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS);
+ if (msgbuf[0] == (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK))
+ memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS);
+
hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD];
return ret_val;
diff --git a/sys/dev/ixgbe/ixgbe_x550.c b/sys/dev/ixgbe/ixgbe_x550.c
index 1199d38..ce2b0dc 100644
--- a/sys/dev/ixgbe/ixgbe_x550.c
+++ b/sys/dev/ixgbe/ixgbe_x550.c
@@ -81,9 +81,13 @@ s32 ixgbe_init_ops_X550(struct ixgbe_hw *hw)
mac->ops.mdd_event = ixgbe_mdd_event_X550;
mac->ops.restore_mdd_vf = ixgbe_restore_mdd_vf_X550;
mac->ops.disable_rx = ixgbe_disable_rx_x550;
- if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) {
+ switch (hw->device_id) {
+ case IXGBE_DEV_ID_X550EM_X_10G_T:
hw->mac.ops.led_on = ixgbe_led_on_t_X550em;
hw->mac.ops.led_off = ixgbe_led_off_t_X550em;
+ break;
+ default:
+ break;
}
return ret_val;
}
@@ -336,7 +340,6 @@ static s32 ixgbe_identify_phy_x550em(struct ixgbe_hw *hw)
hw->phy.phy_semaphore_mask = IXGBE_GSSR_SHARED_I2C_SM;
ixgbe_setup_mux_ctl(hw);
ixgbe_check_cs4227(hw);
-
return ixgbe_identify_module_generic(hw);
break;
case IXGBE_DEV_ID_X550EM_X_KX4:
@@ -414,6 +417,8 @@ s32 ixgbe_init_ops_X550EM(struct ixgbe_hw *hw)
if (hw->mac.type == ixgbe_mac_X550EM_x) {
mac->ops.read_iosf_sb_reg = ixgbe_read_iosf_sb_reg_x550;
mac->ops.write_iosf_sb_reg = ixgbe_write_iosf_sb_reg_x550;
+ mac->ops.acquire_swfw_sync = ixgbe_acquire_swfw_sync_X550em;
+ mac->ops.release_swfw_sync = ixgbe_release_swfw_sync_X550em;
}
mac->ops.get_media_type = ixgbe_get_media_type_X550em;
@@ -428,8 +433,6 @@ s32 ixgbe_init_ops_X550EM(struct ixgbe_hw *hw)
else
mac->ops.setup_fc = ixgbe_setup_fc_X550em;
- mac->ops.acquire_swfw_sync = ixgbe_acquire_swfw_sync_X550em;
- mac->ops.release_swfw_sync = ixgbe_release_swfw_sync_X550em;
if (hw->device_id != IXGBE_DEV_ID_X550EM_X_KR)
mac->ops.setup_eee = NULL;
@@ -632,7 +635,6 @@ s32 ixgbe_setup_eee_X550(struct ixgbe_hw *hw, bool enable_eee)
u16 autoneg_eee_reg;
u32 link_reg;
s32 status;
- u32 fuse;
DEBUGFUNC("ixgbe_setup_eee_X550");
@@ -653,9 +655,10 @@ s32 ixgbe_setup_eee_X550(struct ixgbe_hw *hw, bool enable_eee)
hw->phy.ops.write_reg(hw, IXGBE_MDIO_AUTO_NEG_EEE_ADVT,
IXGBE_MDIO_AUTO_NEG_DEV_TYPE, autoneg_eee_reg);
} else if (hw->device_id == IXGBE_DEV_ID_X550EM_X_KR) {
- /* Not supported on first revision. */
- fuse = IXGBE_READ_REG(hw, IXGBE_FUSES0_GROUP(0));
- if (!(fuse & IXGBE_FUSES0_REV1))
+ /* Not supported on first revision of X550EM_x. */
+ if ((hw->mac.type == ixgbe_mac_X550EM_x) &&
+ !(IXGBE_FUSES0_REV_MASK &
+ IXGBE_READ_REG(hw, IXGBE_FUSES0_GROUP(0))))
return IXGBE_SUCCESS;
status = ixgbe_read_iosf_sb_reg_x550(hw,
@@ -965,7 +968,7 @@ void ixgbe_restore_mdd_vf_X550(struct ixgbe_hw *hw, u32 vf)
num_qs = 4; /* 32 VFs / pools */
bitmask = 0x0000000F;
break;
- default: /* 64 VFs / pools */
+ default: /* 64 VFs / pools */
num_qs = 2;
bitmask = 0x00000003;
break;
@@ -1349,7 +1352,7 @@ static s32 ixgbe_enable_lasi_ext_t_x550em(struct ixgbe_hw *hw)
if (status != IXGBE_SUCCESS)
return status;
- /* Enables high temperature failure alarm */
+ /* Enable high temperature failure and global fault alarms */
status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_MASK,
IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE,
&reg);
@@ -1357,7 +1360,8 @@ static s32 ixgbe_enable_lasi_ext_t_x550em(struct ixgbe_hw *hw)
if (status != IXGBE_SUCCESS)
return status;
- reg |= IXGBE_MDIO_GLOBAL_INT_HI_TEMP_EN;
+ reg |= (IXGBE_MDIO_GLOBAL_INT_HI_TEMP_EN |
+ IXGBE_MDIO_GLOBAL_INT_DEV_FAULT_EN);
status = hw->phy.ops.write_reg(hw, IXGBE_MDIO_GLOBAL_INT_MASK,
IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE,
@@ -1452,7 +1456,6 @@ static s32 ixgbe_setup_kr_speed_x550em(struct ixgbe_hw *hw,
s32 ixgbe_init_phy_ops_X550em(struct ixgbe_hw *hw)
{
struct ixgbe_phy_info *phy = &hw->phy;
- ixgbe_link_speed speed;
s32 ret_val;
DEBUGFUNC("ixgbe_init_phy_ops_X550em");
@@ -1467,10 +1470,6 @@ s32 ixgbe_init_phy_ops_X550em(struct ixgbe_hw *hw)
* to determine internal PHY mode.
*/
phy->nw_mng_if_sel = IXGBE_READ_REG(hw, IXGBE_NW_MNG_IF_SEL);
- if (phy->nw_mng_if_sel & IXGBE_NW_MNG_IF_SEL_INT_PHY_MODE) {
- speed = IXGBE_LINK_SPEED_10GB_FULL |
- IXGBE_LINK_SPEED_1GB_FULL;
- }
phy->ops.identify_sfp = ixgbe_identify_sfp_module_X550em;
}
@@ -1505,18 +1504,13 @@ s32 ixgbe_init_phy_ops_X550em(struct ixgbe_hw *hw)
/* If internal link mode is XFI, then setup iXFI internal link,
* else setup KR now.
*/
- if (!(phy->nw_mng_if_sel & IXGBE_NW_MNG_IF_SEL_INT_PHY_MODE)) {
- phy->ops.setup_internal_link =
+ phy->ops.setup_internal_link =
ixgbe_setup_internal_phy_t_x550em;
- } else {
- speed = IXGBE_LINK_SPEED_10GB_FULL |
- IXGBE_LINK_SPEED_1GB_FULL;
- ret_val = ixgbe_setup_kr_speed_x550em(hw, speed);
- }
- /* setup SW LPLU only for first revision */
- if (!(IXGBE_FUSES0_REV1 & IXGBE_READ_REG(hw,
- IXGBE_FUSES0_GROUP(0))))
+ /* setup SW LPLU only for first revision of X550EM_x */
+ if ((hw->mac.type == ixgbe_mac_X550EM_x) &&
+ !(IXGBE_FUSES0_REV_MASK &
+ IXGBE_READ_REG(hw, IXGBE_FUSES0_GROUP(0))))
phy->ops.enter_lplu = ixgbe_enter_lplu_t_x550em;
phy->ops.handle_lasi = ixgbe_handle_lasi_ext_t_x550em;
@@ -1555,11 +1549,15 @@ s32 ixgbe_reset_hw_X550em(struct ixgbe_hw *hw)
/* flush pending Tx transactions */
ixgbe_clear_tx_pending(hw);
- if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) {
+ switch (hw->device_id) {
+ case IXGBE_DEV_ID_X550EM_X_10G_T:
/* Config MDIO clock speed before the first MDIO PHY access */
hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
hlreg0 &= ~IXGBE_HLREG0_MDCSPD;
IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
+ break;
+ default:
+ break;
}
/* PHY ops must be identified and initialized prior to reset */
@@ -1639,6 +1637,13 @@ mac_reset_top:
hw->mac.num_rar_entries = 128;
hw->mac.ops.init_rx_addrs(hw);
+ if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) {
+ /* Reconfig MDIO clock speed after PHY reset */
+ hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
+ hlreg0 &= ~IXGBE_HLREG0_MDCSPD;
+ IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
+ }
+
if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP)
ixgbe_setup_mux_ctl(hw);
@@ -1778,47 +1783,16 @@ s32 ixgbe_setup_mac_link_sfp_x550em(struct ixgbe_hw *hw,
}
/**
- * ixgbe_setup_ixfi_x550em - Configure the KR PHY for iXFI mode.
+ * ixgbe_setup_ixfi_x550em_x - MAC specific iXFI configuration
* @hw: pointer to hardware structure
- * @speed: the link speed to force
*
- * Configures the integrated KR PHY to use iXFI mode. Used to connect an
- * internal and external PHY at a specific speed, without autonegotiation.
+ * iXfI configuration needed for ixgbe_mac_X550EM_x devices.
**/
-static s32 ixgbe_setup_ixfi_x550em(struct ixgbe_hw *hw, ixgbe_link_speed *speed)
+static s32 ixgbe_setup_ixfi_x550em_x(struct ixgbe_hw *hw)
{
s32 status;
u32 reg_val;
- /* Disable AN and force speed to 10G Serial. */
- status = ixgbe_read_iosf_sb_reg_x550(hw,
- IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),
- IXGBE_SB_IOSF_TARGET_KR_PHY, &reg_val);
- if (status != IXGBE_SUCCESS)
- return status;
-
- reg_val &= ~IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE;
- reg_val &= ~IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_MASK;
-
- /* Select forced link speed for internal PHY. */
- switch (*speed) {
- case IXGBE_LINK_SPEED_10GB_FULL:
- reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_10G;
- break;
- case IXGBE_LINK_SPEED_1GB_FULL:
- reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_1G;
- break;
- default:
- /* Other link speeds are not supported by internal KR PHY. */
- return IXGBE_ERR_LINK_SETUP;
- }
-
- status = ixgbe_write_iosf_sb_reg_x550(hw,
- IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),
- IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val);
- if (status != IXGBE_SUCCESS)
- return status;
-
/* Disable training protocol FSM. */
status = ixgbe_read_iosf_sb_reg_x550(hw,
IXGBE_KRM_RX_TRN_LINKUP_CTRL(hw->bus.lan_id),
@@ -1873,9 +1847,58 @@ static s32 ixgbe_setup_ixfi_x550em(struct ixgbe_hw *hw, ixgbe_link_speed *speed)
status = ixgbe_write_iosf_sb_reg_x550(hw,
IXGBE_KRM_TX_COEFF_CTRL_1(hw->bus.lan_id),
IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val);
+ return status;
+}
+
+/**
+ * ixgbe_setup_ixfi_x550em - Configure the KR PHY for iXFI mode.
+ * @hw: pointer to hardware structure
+ * @speed: the link speed to force
+ *
+ * Configures the integrated KR PHY to use iXFI mode. Used to connect an
+ * internal and external PHY at a specific speed, without autonegotiation.
+ **/
+static s32 ixgbe_setup_ixfi_x550em(struct ixgbe_hw *hw, ixgbe_link_speed *speed)
+{
+ s32 status;
+ u32 reg_val;
+
+ /* Disable AN and force speed to 10G Serial. */
+ status = ixgbe_read_iosf_sb_reg_x550(hw,
+ IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),
+ IXGBE_SB_IOSF_TARGET_KR_PHY, &reg_val);
if (status != IXGBE_SUCCESS)
return status;
+ reg_val &= ~IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE;
+ reg_val &= ~IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_MASK;
+
+ /* Select forced link speed for internal PHY. */
+ switch (*speed) {
+ case IXGBE_LINK_SPEED_10GB_FULL:
+ reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_10G;
+ break;
+ case IXGBE_LINK_SPEED_1GB_FULL:
+ reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_1G;
+ break;
+ default:
+ /* Other link speeds are not supported by internal KR PHY. */
+ return IXGBE_ERR_LINK_SETUP;
+ }
+
+ status = ixgbe_write_iosf_sb_reg_x550(hw,
+ IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),
+ IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val);
+ if (status != IXGBE_SUCCESS)
+ return status;
+
+ /* Additional configuration needed for x550em_x */
+ if (hw->mac.type == ixgbe_mac_X550EM_x) {
+ status = ixgbe_setup_ixfi_x550em_x(hw);
+ if (status != IXGBE_SUCCESS)
+ return status;
+ }
+
/* Toggle port SW reset by AN reset. */
status = ixgbe_read_iosf_sb_reg_x550(hw,
IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),
@@ -1944,43 +1967,50 @@ s32 ixgbe_setup_internal_phy_t_x550em(struct ixgbe_hw *hw)
if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_copper)
return IXGBE_ERR_CONFIG;
- /* If link is not up, then there is no setup necessary so return */
- status = ixgbe_ext_phy_t_x550em_get_link(hw, &link_up);
- if (status != IXGBE_SUCCESS)
- return status;
+ if (!(hw->phy.nw_mng_if_sel & IXGBE_NW_MNG_IF_SEL_INT_PHY_MODE)) {
+ /* If link is down, there is no setup necessary so return */
+ status = ixgbe_ext_phy_t_x550em_get_link(hw, &link_up);
+ if (status != IXGBE_SUCCESS)
+ return status;
- if (!link_up)
- return IXGBE_SUCCESS;
+ if (!link_up)
+ return IXGBE_SUCCESS;
- status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_VENDOR_STAT,
- IXGBE_MDIO_AUTO_NEG_DEV_TYPE,
- &speed);
- if (status != IXGBE_SUCCESS)
- return status;
+ status = hw->phy.ops.read_reg(hw,
+ IXGBE_MDIO_AUTO_NEG_VENDOR_STAT,
+ IXGBE_MDIO_AUTO_NEG_DEV_TYPE,
+ &speed);
+ if (status != IXGBE_SUCCESS)
+ return status;
- /* If link is not still up, then no setup is necessary so return */
- status = ixgbe_ext_phy_t_x550em_get_link(hw, &link_up);
- if (status != IXGBE_SUCCESS)
- return status;
- if (!link_up)
- return IXGBE_SUCCESS;
+ /* If link is still down - no setup is required so return */
+ status = ixgbe_ext_phy_t_x550em_get_link(hw, &link_up);
+ if (status != IXGBE_SUCCESS)
+ return status;
+ if (!link_up)
+ return IXGBE_SUCCESS;
- /* clear everything but the speed and duplex bits */
- speed &= IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_MASK;
+ /* clear everything but the speed and duplex bits */
+ speed &= IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_MASK;
- switch (speed) {
- case IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_10GB_FULL:
- force_speed = IXGBE_LINK_SPEED_10GB_FULL;
- break;
- case IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_1GB_FULL:
- force_speed = IXGBE_LINK_SPEED_1GB_FULL;
- break;
- default:
- /* Internal PHY does not support anything else */
- return IXGBE_ERR_INVALID_LINK_SETTINGS;
- }
+ switch (speed) {
+ case IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_10GB_FULL:
+ force_speed = IXGBE_LINK_SPEED_10GB_FULL;
+ break;
+ case IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_1GB_FULL:
+ force_speed = IXGBE_LINK_SPEED_1GB_FULL;
+ break;
+ default:
+ /* Internal PHY does not support anything else */
+ return IXGBE_ERR_INVALID_LINK_SETTINGS;
+ }
- return ixgbe_setup_ixfi_x550em(hw, &force_speed);
+ return ixgbe_setup_ixfi_x550em(hw, &force_speed);
+ } else {
+ speed = IXGBE_LINK_SPEED_10GB_FULL |
+ IXGBE_LINK_SPEED_1GB_FULL;
+ return ixgbe_setup_kr_speed_x550em(hw, speed);
+ }
}
/**
@@ -2695,7 +2725,9 @@ s32 ixgbe_enter_lplu_t_x550em(struct ixgbe_hw *hw)
bool link_up;
/* SW LPLU not required on later HW revisions. */
- if (IXGBE_FUSES0_REV1 & IXGBE_READ_REG(hw, IXGBE_FUSES0_GROUP(0)))
+ if ((hw->mac.type == ixgbe_mac_X550EM_x) &&
+ (IXGBE_FUSES0_REV_MASK &
+ IXGBE_READ_REG(hw, IXGBE_FUSES0_GROUP(0))))
return IXGBE_SUCCESS;
/* If blocked by MNG FW, then don't restart AN */
@@ -2963,6 +2995,7 @@ void ixgbe_release_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask)
ixgbe_release_swfw_sync_X540(hw, mask);
}
+
/**
* ixgbe_handle_lasi_ext_t_x550em - Handle external Base T PHY interrupt
* @hw: pointer to hardware structure
@@ -3142,4 +3175,3 @@ s32 ixgbe_led_off_t_X550em(struct ixgbe_hw *hw, u32 led_idx)
return IXGBE_SUCCESS;
}
-
diff --git a/sys/dev/netmap/netmap_generic.c b/sys/dev/netmap/netmap_generic.c
index ecdb368..4983516 100644
--- a/sys/dev/netmap/netmap_generic.c
+++ b/sys/dev/netmap/netmap_generic.c
@@ -129,8 +129,9 @@ static inline struct mbuf *
netmap_get_mbuf(int len)
{
struct mbuf *m;
- m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR | M_NOFREE);
+ m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
if (m) {
+ m->m_flags |= M_NOFREE; /* XXXNP: Almost certainly incorrect. */
m->m_ext.ext_arg1 = m->m_ext.ext_buf; // XXX save
m->m_ext.ext_free = (void *)netmap_default_mbuf_destructor;
m->m_ext.ext_type = EXT_EXTREF;
diff --git a/sys/dev/oce/oce_if.c b/sys/dev/oce/oce_if.c
index f37ef3a..3711503 100644
--- a/sys/dev/oce/oce_if.c
+++ b/sys/dev/oce/oce_if.c
@@ -1060,11 +1060,10 @@ oce_tx_restart(POCE_SOFTC sc, struct oce_wq *wq)
if ((sc->ifp->if_drv_flags & IFF_DRV_RUNNING) != IFF_DRV_RUNNING)
return;
-#if __FreeBSD_version >= 800000
if (!drbr_empty(sc->ifp, wq->br))
-#else
+ taskqueue_enqueue_fast(taskqueue_swi, &wq->txtask);
+
if (!IFQ_DRV_IS_EMPTY(&sc->ifp->if_snd))
-#endif
taskqueue_enqueue_fast(taskqueue_swi, &wq->txtask);
}
@@ -1147,7 +1146,7 @@ oce_tx_task(void *arg, int npending)
struct ifnet *ifp = sc->ifp;
int rc = 0;
-#if __FreeBSD_version >= 800000
+
LOCK(&wq->tx_lock);
rc = oce_multiq_transmit(ifp, NULL, wq);
if (rc) {
@@ -1155,9 +1154,9 @@ oce_tx_task(void *arg, int npending)
"TX[%d] restart failed\n", wq->queue_index);
}
UNLOCK(&wq->tx_lock);
-#else
+
oce_start(ifp);
-#endif
+
}
diff --git a/sys/dev/oce/oce_mbox.c b/sys/dev/oce/oce_mbox.c
index f3f7723..6dee15b 100644
--- a/sys/dev/oce/oce_mbox.c
+++ b/sys/dev/oce/oce_mbox.c
@@ -865,7 +865,7 @@ oce_rxf_set_promiscuous(POCE_SOFTC sc, uint8_t enable)
req->iface_flags = MBX_RX_IFACE_FLAGS_PROMISCUOUS;
if (enable & 0x02)
- req->iface_flags = MBX_RX_IFACE_FLAGS_VLAN_PROMISCUOUS;
+ req->iface_flags |= MBX_RX_IFACE_FLAGS_VLAN_PROMISCUOUS;
req->if_id = sc->if_id;
diff --git a/sys/dev/random/hash.c b/sys/dev/random/hash.c
index cf0feaa..e37f090 100644
--- a/sys/dev/random/hash.c
+++ b/sys/dev/random/hash.c
@@ -45,7 +45,7 @@ randomdev_hash_init(struct randomdev_hash *context)
/* Iterate the hash */
void
-randomdev_hash_iterate(struct randomdev_hash *context, void *data, size_t size)
+randomdev_hash_iterate(struct randomdev_hash *context, const void *data, size_t size)
{
SHA256_Update(&context->sha, data, size);
}
@@ -64,7 +64,7 @@ randomdev_hash_finish(struct randomdev_hash *context, void *buf)
* data. Use CBC mode for better avalanche.
*/
void
-randomdev_encrypt_init(struct randomdev_key *context, void *data)
+randomdev_encrypt_init(struct randomdev_key *context, const void *data)
{
rijndael_cipherInit(&context->cipher, MODE_CBC, NULL);
rijndael_makeKey(&context->key, DIR_ENCRYPT, KEYSIZE*8, data);
@@ -75,7 +75,7 @@ randomdev_encrypt_init(struct randomdev_key *context, void *data)
* a multiple of BLOCKSIZE.
*/
void
-randomdev_encrypt(struct randomdev_key *context, void *d_in, void *d_out, unsigned length)
+randomdev_encrypt(struct randomdev_key *context, const void *d_in, void *d_out, unsigned length)
{
rijndael_blockEncrypt(&context->cipher, &context->key, d_in, length*8, d_out);
}
diff --git a/sys/dev/random/hash.h b/sys/dev/random/hash.h
index 4e6a4a0..8655d88 100644
--- a/sys/dev/random/hash.h
+++ b/sys/dev/random/hash.h
@@ -42,9 +42,9 @@ struct randomdev_key { /* Big! Make static! */
};
void randomdev_hash_init(struct randomdev_hash *);
-void randomdev_hash_iterate(struct randomdev_hash *, void *, size_t);
+void randomdev_hash_iterate(struct randomdev_hash *, const void *, size_t);
void randomdev_hash_finish(struct randomdev_hash *, void *);
-void randomdev_encrypt_init(struct randomdev_key *, void *);
-void randomdev_encrypt(struct randomdev_key *context, void *, void *, unsigned);
+void randomdev_encrypt_init(struct randomdev_key *, const void *);
+void randomdev_encrypt(struct randomdev_key *context, const void *, void *, unsigned);
#endif
diff --git a/sys/dev/usb/serial/u3g.c b/sys/dev/usb/serial/u3g.c
index 9e55cb1..6c16713 100644
--- a/sys/dev/usb/serial/u3g.c
+++ b/sys/dev/usb/serial/u3g.c
@@ -317,6 +317,7 @@ static const STRUCT_USB_HOST_ID u3g_devs[] = {
U3G_DEV(HUAWEI, E220BIS, U3GINIT_HUAWEI),
U3G_DEV(HUAWEI, E392, U3GINIT_HUAWEISCSI),
U3G_DEV(HUAWEI, ME909U, U3GINIT_HUAWEISCSI2),
+ U3G_DEV(HUAWEI, ME909S, U3GINIT_HUAWEISCSI2),
U3G_DEV(HUAWEI, MOBILE, U3GINIT_HUAWEI),
U3G_DEV(HUAWEI, E1752, U3GINIT_HUAWEISCSI),
U3G_DEV(HUAWEI, E1820, U3GINIT_HUAWEISCSI),
@@ -524,6 +525,7 @@ static const STRUCT_USB_HOST_ID u3g_devs[] = {
U3G_DEV(SIERRA, MC5728, 0),
U3G_DEV(SIERRA, MC7354, 0),
U3G_DEV(SIERRA, MC7355, 0),
+ U3G_DEV(SIERRA, MC7430, 0),
U3G_DEV(SIERRA, MC8700, 0),
U3G_DEV(SIERRA, MC8755, 0),
U3G_DEV(SIERRA, MC8755_2, 0),
@@ -627,7 +629,7 @@ u3g_sael_m460_init(struct usb_device *udev)
static const uint8_t setup[][24] = {
{ 0x41, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
{ 0x41, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00 },
- { 0x41, 0x13, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00,
+ { 0x41, 0x13, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00,
0x01, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
{ 0xc1, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x40, 0x02 },
@@ -639,7 +641,7 @@ u3g_sael_m460_init(struct usb_device *udev)
{ 0x41, 0x03, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00 },
{ 0x41, 0x19, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00,
0x00, 0x00, 0x00, 0x00, 0x11, 0x13 },
- { 0x41, 0x13, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00,
+ { 0x41, 0x13, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00,
0x09, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00,
0x0a, 0x00, 0x00, 0x00, 0x0a, 0x00, 0x00, 0x00 },
{ 0x41, 0x12, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00 },
@@ -649,7 +651,7 @@ u3g_sael_m460_init(struct usb_device *udev)
{ 0x41, 0x19, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00,
0x00, 0x00, 0x00, 0x00, 0x11, 0x13 },
{ 0x41, 0x13, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00,
- 0x09, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00,
+ 0x09, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00,
0x0a, 0x00, 0x00, 0x00, 0x0a, 0x00, 0x00, 0x00 },
{ 0x41, 0x07, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00 },
};
@@ -683,7 +685,7 @@ u3g_sael_m460_init(struct usb_device *udev)
DPRINTFN(0, "too small buffer\n");
continue;
}
- err = usbd_do_request(udev, NULL, &req,
+ err = usbd_do_request(udev, NULL, &req,
__DECONST(uint8_t *, &setup[n][8]));
}
if (err) {
@@ -858,7 +860,7 @@ u3g_attach(device_t dev)
}
/* copy in USB config */
- for (n = 0; n != U3G_N_TRANSFER; n++)
+ for (n = 0; n != U3G_N_TRANSFER; n++)
u3g_config_tmp[n] = u3g_config[n];
device_set_usb_desc(dev);
diff --git a/sys/dev/usb/usbdevs b/sys/dev/usb/usbdevs
index 83d41e6..45a0e0a 100644
--- a/sys/dev/usb/usbdevs
+++ b/sys/dev/usb/usbdevs
@@ -2413,6 +2413,7 @@ product HUAWEI E3272_INIT 0x155b LTE modem initial
product HUAWEI ME909U 0x1573 LTE modem
product HUAWEI R215_INIT 0x1582 LTE modem initial
product HUAWEI R215 0x1588 LTE modem
+product HUAWEI ME909S 0x15c1 LTE modem
product HUAWEI ETS2055 0x1803 CDMA modem
product HUAWEI E173 0x1c05 3G modem
product HUAWEI E173_INIT 0x1c0b 3G modem initial
@@ -4073,6 +4074,7 @@ product SIERRA E6893 0x6893 E6893
product SIERRA MC8700 0x68A3 MC8700
product SIERRA MC7354 0x68C0 MC7354
product SIERRA MC7355 0x9041 MC7355
+product SIERRA MC7430 0x9071 Sierra Wireless MC7430 Qualcomm Snapdragon X7 LTE-A
product SIERRA AC313U 0x68aa Sierra Wireless AirCard 313U
product SIERRA TRUINSTALL 0x0fff Aircard Tru Installer
diff --git a/sys/dev/virtio/network/if_vtnet.c b/sys/dev/virtio/network/if_vtnet.c
index 5453998..a5e6383 100644
--- a/sys/dev/virtio/network/if_vtnet.c
+++ b/sys/dev/virtio/network/if_vtnet.c
@@ -139,23 +139,21 @@ static struct mbuf *
static int vtnet_txq_enqueue_buf(struct vtnet_txq *, struct mbuf **,
struct vtnet_tx_header *);
static int vtnet_txq_encap(struct vtnet_txq *, struct mbuf **);
-#ifdef VTNET_LEGACY_TX
+
static void vtnet_start_locked(struct vtnet_txq *, struct ifnet *);
static void vtnet_start(struct ifnet *);
-#else
+
static int vtnet_txq_mq_start_locked(struct vtnet_txq *, struct mbuf *);
static int vtnet_txq_mq_start(struct ifnet *, struct mbuf *);
static void vtnet_txq_tq_deferred(void *, int);
-#endif
+
static void vtnet_txq_start(struct vtnet_txq *);
static void vtnet_txq_tq_intr(void *, int);
static int vtnet_txq_eof(struct vtnet_txq *);
static void vtnet_tx_vq_intr(void *);
static void vtnet_tx_start_all(struct vtnet_softc *);
-#ifndef VTNET_LEGACY_TX
static void vtnet_qflush(struct ifnet *);
-#endif
static int vtnet_watchdog(struct vtnet_txq *);
static void vtnet_rxq_accum_stats(struct vtnet_rxq *,
@@ -922,16 +920,16 @@ vtnet_setup_interface(struct vtnet_softc *sc)
ifp->if_init = vtnet_init;
ifp->if_ioctl = vtnet_ioctl;
-#ifndef VTNET_LEGACY_TX
+
ifp->if_transmit = vtnet_txq_mq_start;
ifp->if_qflush = vtnet_qflush;
-#else
+
struct virtqueue *vq = sc->vtnet_txqs[0].vtntx_vq;
ifp->if_start = vtnet_start;
IFQ_SET_MAXLEN(&ifp->if_snd, virtqueue_size(vq) - 1);
ifp->if_snd.ifq_drv_maxlen = virtqueue_size(vq) - 1;
IFQ_SET_READY(&ifp->if_snd);
-#endif
+
ifmedia_init(&sc->vtnet_media, IFM_IMASK, vtnet_ifmedia_upd,
vtnet_ifmedia_sts);
@@ -2209,7 +2207,7 @@ fail:
return (error);
}
-#ifdef VTNET_LEGACY_TX
+
static void
vtnet_start_locked(struct vtnet_txq *txq, struct ifnet *ifp)
@@ -2275,7 +2273,7 @@ vtnet_start(struct ifnet *ifp)
VTNET_TXQ_UNLOCK(txq);
}
-#else /* !VTNET_LEGACY_TX */
+
static int
vtnet_txq_mq_start_locked(struct vtnet_txq *txq, struct mbuf *m)
@@ -2387,7 +2385,7 @@ vtnet_txq_tq_deferred(void *xtxq, int pending)
VTNET_TXQ_UNLOCK(txq);
}
-#endif /* VTNET_LEGACY_TX */
+
static void
vtnet_txq_start(struct vtnet_txq *txq)
@@ -2398,13 +2396,13 @@ vtnet_txq_start(struct vtnet_txq *txq)
sc = txq->vtntx_sc;
ifp = sc->vtnet_ifp;
-#ifdef VTNET_LEGACY_TX
+
if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
vtnet_start_locked(txq, ifp);
-#else
+
if (!drbr_empty(ifp, txq->vtntx_br))
vtnet_txq_mq_start_locked(txq, NULL);
-#endif
+
}
static void
diff --git a/sys/dev/vmware/vmxnet3/if_vmx.c b/sys/dev/vmware/vmxnet3/if_vmx.c
index e92cc00..0629f2b 100644
--- a/sys/dev/vmware/vmxnet3/if_vmx.c
+++ b/sys/dev/vmware/vmxnet3/if_vmx.c
@@ -166,15 +166,15 @@ static int vmxnet3_txq_load_mbuf(struct vmxnet3_txqueue *, struct mbuf **,
bus_dmamap_t, bus_dma_segment_t [], int *);
static void vmxnet3_txq_unload_mbuf(struct vmxnet3_txqueue *, bus_dmamap_t);
static int vmxnet3_txq_encap(struct vmxnet3_txqueue *, struct mbuf **);
-#ifdef VMXNET3_LEGACY_TX
+
static void vmxnet3_start_locked(struct ifnet *);
static void vmxnet3_start(struct ifnet *);
-#else
+
static int vmxnet3_txq_mq_start_locked(struct vmxnet3_txqueue *,
struct mbuf *);
static int vmxnet3_txq_mq_start(struct ifnet *, struct mbuf *);
static void vmxnet3_txq_tq_deferred(void *, int);
-#endif
+
static void vmxnet3_txq_start(struct vmxnet3_txqueue *);
static void vmxnet3_tx_start_all(struct vmxnet3_softc *);
@@ -1731,15 +1731,15 @@ vmxnet3_setup_interface(struct vmxnet3_softc *sc)
ifp->if_hw_tsomaxsegcount = VMXNET3_TX_MAXSEGS;
ifp->if_hw_tsomaxsegsize = VMXNET3_TX_MAXSEGSIZE;
-#ifdef VMXNET3_LEGACY_TX
+
ifp->if_start = vmxnet3_start;
ifp->if_snd.ifq_drv_maxlen = sc->vmx_ntxdescs - 1;
IFQ_SET_MAXLEN(&ifp->if_snd, sc->vmx_ntxdescs - 1);
IFQ_SET_READY(&ifp->if_snd);
-#else
+
ifp->if_transmit = vmxnet3_txq_mq_start;
ifp->if_qflush = vmxnet3_qflush;
-#endif
+
vmxnet3_get_lladdr(sc);
ether_ifattach(ifp, sc->vmx_lladdr);
@@ -2872,7 +2872,7 @@ vmxnet3_txq_encap(struct vmxnet3_txqueue *txq, struct mbuf **m0)
return (0);
}
-#ifdef VMXNET3_LEGACY_TX
+
static void
vmxnet3_start_locked(struct ifnet *ifp)
@@ -2936,7 +2936,7 @@ vmxnet3_start(struct ifnet *ifp)
VMXNET3_TXQ_UNLOCK(txq);
}
-#else /* !VMXNET3_LEGACY_TX */
+
static int
vmxnet3_txq_mq_start_locked(struct vmxnet3_txqueue *txq, struct mbuf *m)
@@ -3043,7 +3043,7 @@ vmxnet3_txq_tq_deferred(void *xtxq, int pending)
VMXNET3_TXQ_UNLOCK(txq);
}
-#endif /* VMXNET3_LEGACY_TX */
+
static void
vmxnet3_txq_start(struct vmxnet3_txqueue *txq)
@@ -3054,13 +3054,13 @@ vmxnet3_txq_start(struct vmxnet3_txqueue *txq)
sc = txq->vxtxq_sc;
ifp = sc->vmx_ifp;
-#ifdef VMXNET3_LEGACY_TX
+
if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
vmxnet3_start_locked(ifp);
-#else
+
if (!drbr_empty(ifp, txq->vxtxq_br))
vmxnet3_txq_mq_start_locked(txq, NULL);
-#endif
+
}
static void
OpenPOWER on IntegriCloud