diff options
Diffstat (limited to 'sys/dev/vx')
| -rw-r--r-- | sys/dev/vx/if_vx.c | 1033 | ||||
| -rw-r--r-- | sys/dev/vx/if_vx_eisa.c | 194 | ||||
| -rw-r--r-- | sys/dev/vx/if_vx_pci.c | 182 | ||||
| -rw-r--r-- | sys/dev/vx/if_vxreg.h | 429 | ||||
| -rw-r--r-- | sys/dev/vx/if_vxvar.h | 76 |
5 files changed, 1914 insertions, 0 deletions
diff --git a/sys/dev/vx/if_vx.c b/sys/dev/vx/if_vx.c new file mode 100644 index 0000000..5f17e22 --- /dev/null +++ b/sys/dev/vx/if_vx.c @@ -0,0 +1,1033 @@ +/* + * Copyright (c) 1994 Herb Peyerl <hpeyerl@novatel.ca> + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Herb Peyerl. + * 4. The name of Herb Peyerl may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +/* + * Created from if_ep.c driver by Fred Gray (fgray@rice.edu) to support + * the 3c590 family. + */ + +/* + * Modified from the FreeBSD 1.1.5.1 version by: + * Andres Vega Garcia + * INRIA - Sophia Antipolis, France + * avega@sophia.inria.fr + */ + +/* + * Promiscuous mode added and interrupt logic slightly changed + * to reduce the number of adapter failures. Transceiver select + * logic changed to use value from EEPROM. Autoconfiguration + * features added. + * Done by: + * Serge Babkin + * Chelindbank (Chelyabinsk, Russia) + * babkin@hq.icb.chel.su + */ + + +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/sockio.h> +#include <sys/malloc.h> +#include <sys/mbuf.h> +#include <sys/socket.h> + +#include <net/if.h> + +#include <net/ethernet.h> +#include <net/if_arp.h> + +#include <machine/bus_pio.h> +#include <machine/bus.h> + +#include <sys/bus.h> + +#include <net/bpf.h> + +#include <dev/vx/if_vxreg.h> +#include <dev/vx/if_vxvar.h> + +#define ETHER_MAX_LEN 1518 +#define ETHER_ADDR_LEN 6 +#define ETHER_ALIGN 2 + +static struct connector_entry { + int bit; + char *name; +} conn_tab[VX_CONNECTORS] = { +#define CONNECTOR_UTP 0 + { 0x08, "utp"}, +#define CONNECTOR_AUI 1 + { 0x20, "aui"}, +/* dummy */ + { 0, "???"}, +#define CONNECTOR_BNC 3 + { 0x10, "bnc"}, +#define CONNECTOR_TX 4 + { 0x02, "tx"}, +#define CONNECTOR_FX 5 + { 0x04, "fx"}, +#define CONNECTOR_MII 6 + { 0x40, "mii"}, + { 0, "???"} +}; + +/* int vxattach(struct vx_softc *); */ +static void vxtxstat(struct vx_softc *); +static int vxstatus(struct vx_softc *); +static void vxinit(void *); +static int vxioctl(struct ifnet *, u_long, caddr_t); +static void vxstart(struct ifnet *ifp); +static void vxwatchdog(struct ifnet *); +static void vxreset(struct vx_softc *); +/* void vxstop(struct vx_softc *); */ +static void vxread(struct vx_softc *); +static struct mbuf *vxget(struct vx_softc *, u_int); +static void vxmbuffill(void *); +static void vxmbufempty(struct vx_softc *); +static void vxsetfilter(struct vx_softc *); +static void vxgetlink(struct vx_softc *); +static void vxsetlink(struct vx_softc *); +/* int vxbusyeeprom(struct vx_softc *); */ + + +int +vxattach(dev) + device_t dev; +{ + struct vx_softc *sc = device_get_softc(dev); + struct ifnet *ifp = &sc->arpcom.ac_if; + int i; + + callout_handle_init(&sc->ch); + GO_WINDOW(0); + CSR_WRITE_2(sc, VX_COMMAND, GLOBAL_RESET); + VX_BUSY_WAIT; + + vxgetlink(sc); + + /* + * Read the station address from the eeprom + */ + GO_WINDOW(0); + for (i = 0; i < 3; i++) { + int x; + if (vxbusyeeprom(sc)) + return 0; + CSR_WRITE_2(sc, VX_W0_EEPROM_COMMAND, EEPROM_CMD_RD + | (EEPROM_OEM_ADDR0 + i)); + if (vxbusyeeprom(sc)) + return 0; + x = CSR_READ_2(sc, VX_W0_EEPROM_DATA); + sc->arpcom.ac_enaddr[(i << 1)] = x >> 8; + sc->arpcom.ac_enaddr[(i << 1) + 1] = x; + } + + printf(" address %6D\n", sc->arpcom.ac_enaddr, ":"); + + if_initname(ifp, device_get_name(dev), device_get_unit(dev)); + ifp->if_mtu = ETHERMTU; + ifp->if_snd.ifq_maxlen = IFQ_MAXLEN; + ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; + ifp->if_output = ether_output; + ifp->if_start = vxstart; + ifp->if_ioctl = vxioctl; + ifp->if_init = vxinit; + ifp->if_watchdog = vxwatchdog; + ifp->if_softc = sc; + + ether_ifattach(ifp, sc->arpcom.ac_enaddr); + + sc->tx_start_thresh = 20; /* probably a good starting point. */ + + vxstop(sc); + + return 1; +} + + + +/* + * The order in here seems important. Otherwise we may not receive + * interrupts. ?! + */ +static void +vxinit(xsc) + void *xsc; +{ + struct vx_softc *sc = (struct vx_softc *) xsc; + struct ifnet *ifp = &sc->arpcom.ac_if; + int i; + + VX_BUSY_WAIT; + + GO_WINDOW(2); + + for (i = 0; i < 6; i++) /* Reload the ether_addr. */ + CSR_WRITE_1(sc, VX_W2_ADDR_0 + i, sc->arpcom.ac_enaddr[i]); + + CSR_WRITE_2(sc, VX_COMMAND, RX_RESET); + VX_BUSY_WAIT; + CSR_WRITE_2(sc, VX_COMMAND, TX_RESET); + VX_BUSY_WAIT; + + GO_WINDOW(1); /* Window 1 is operating window */ + for (i = 0; i < 31; i++) + CSR_READ_1(sc, VX_W1_TX_STATUS); + + CSR_WRITE_2(sc, VX_COMMAND,SET_RD_0_MASK | S_CARD_FAILURE | + S_RX_COMPLETE | S_TX_COMPLETE | S_TX_AVAIL); + CSR_WRITE_2(sc, VX_COMMAND,SET_INTR_MASK | S_CARD_FAILURE | + S_RX_COMPLETE | S_TX_COMPLETE | S_TX_AVAIL); + + /* + * Attempt to get rid of any stray interrupts that occured during + * configuration. On the i386 this isn't possible because one may + * already be queued. However, a single stray interrupt is + * unimportant. + */ + CSR_WRITE_2(sc, VX_COMMAND, ACK_INTR | 0xff); + + vxsetfilter(sc); + vxsetlink(sc); + + CSR_WRITE_2(sc, VX_COMMAND, RX_ENABLE); + CSR_WRITE_2(sc, VX_COMMAND, TX_ENABLE); + + vxmbuffill((caddr_t) sc); + + /* Interface is now `running', with no output active. */ + ifp->if_flags |= IFF_RUNNING; + ifp->if_flags &= ~IFF_OACTIVE; + + /* Attempt to start output, if any. */ + vxstart(ifp); +} + +static void +vxsetfilter(sc) + struct vx_softc *sc; +{ + register struct ifnet *ifp = &sc->arpcom.ac_if; + + GO_WINDOW(1); /* Window 1 is operating window */ + CSR_WRITE_2(sc, VX_COMMAND, SET_RX_FILTER | FIL_INDIVIDUAL | FIL_BRDCST | + FIL_MULTICAST | + ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0 )); +} + +static void +vxgetlink(sc) + struct vx_softc *sc; +{ + int n, k; + + GO_WINDOW(3); + sc->vx_connectors = CSR_READ_2(sc, VX_W3_RESET_OPT) & 0x7f; + for (n = 0, k = 0; k < VX_CONNECTORS; k++) { + if (sc->vx_connectors & conn_tab[k].bit) { + if (n > 0) { + printf("/"); + } + printf("%s", conn_tab[k].name); + n++; + } + } + if (sc->vx_connectors == 0) { + printf("no connectors!"); + return; + } + GO_WINDOW(3); + sc->vx_connector = (CSR_READ_4(sc, VX_W3_INTERNAL_CFG) + & INTERNAL_CONNECTOR_MASK) + >> INTERNAL_CONNECTOR_BITS; + if (sc->vx_connector & 0x10) { + sc->vx_connector &= 0x0f; + printf("[*%s*]", conn_tab[(int)sc->vx_connector].name); + printf(": disable 'auto select' with DOS util!"); + } else { + printf("[*%s*]", conn_tab[(int)sc->vx_connector].name); + } +} + +static void +vxsetlink(sc) + struct vx_softc *sc; +{ + register struct ifnet *ifp = &sc->arpcom.ac_if; + int i, j, k; + char *reason, *warning; + static int prev_flags; + static char prev_conn = -1; + + if (prev_conn == -1) { + prev_conn = sc->vx_connector; + } + + /* + * S.B. + * + * Now behavior was slightly changed: + * + * if any of flags link[0-2] is used and its connector is + * physically present the following connectors are used: + * + * link0 - AUI * highest precedence + * link1 - BNC + * link2 - UTP * lowest precedence + * + * If none of them is specified then + * connector specified in the EEPROM is used + * (if present on card or UTP if not). + */ + + i = sc->vx_connector; /* default in EEPROM */ + reason = "default"; + warning = 0; + + if (ifp->if_flags & IFF_LINK0) { + if (sc->vx_connectors & conn_tab[CONNECTOR_AUI].bit) { + i = CONNECTOR_AUI; + reason = "link0"; + } else { + warning = "aui not present! (link0)"; + } + } else if (ifp->if_flags & IFF_LINK1) { + if (sc->vx_connectors & conn_tab[CONNECTOR_BNC].bit) { + i = CONNECTOR_BNC; + reason = "link1"; + } else { + warning = "bnc not present! (link1)"; + } + } else if (ifp->if_flags & IFF_LINK2) { + if (sc->vx_connectors & conn_tab[CONNECTOR_UTP].bit) { + i = CONNECTOR_UTP; + reason = "link2"; + } else { + warning = "utp not present! (link2)"; + } + } else if ((sc->vx_connectors & conn_tab[(int)sc->vx_connector].bit) == 0) { + warning = "strange connector type in EEPROM."; + reason = "forced"; + i = CONNECTOR_UTP; + } + + /* Avoid unnecessary message. */ + k = (prev_flags ^ ifp->if_flags) & (IFF_LINK0 | IFF_LINK1 | IFF_LINK2); + if ((k != 0) || (prev_conn != i)) { + if (warning != 0) { + printf("vx%d: warning: %s\n", sc->unit, warning); + } + printf("vx%d: selected %s. (%s)\n", + sc->unit, conn_tab[i].name, reason); + } + + /* Set the selected connector. */ + GO_WINDOW(3); + j = CSR_READ_4(sc, VX_W3_INTERNAL_CFG) & ~INTERNAL_CONNECTOR_MASK; + CSR_WRITE_4(sc, VX_W3_INTERNAL_CFG, j | (i <<INTERNAL_CONNECTOR_BITS)); + + /* First, disable all. */ + CSR_WRITE_2(sc, VX_COMMAND, STOP_TRANSCEIVER); + DELAY(800); + GO_WINDOW(4); + CSR_WRITE_2(sc, VX_W4_MEDIA_TYPE, 0); + + /* Second, enable the selected one. */ + switch(i) { + case CONNECTOR_UTP: + GO_WINDOW(4); + CSR_WRITE_2(sc, VX_W4_MEDIA_TYPE, ENABLE_UTP); + break; + case CONNECTOR_BNC: + CSR_WRITE_2(sc, VX_COMMAND, START_TRANSCEIVER); + DELAY(800); + break; + case CONNECTOR_TX: + case CONNECTOR_FX: + GO_WINDOW(4); + CSR_WRITE_2(sc, VX_W4_MEDIA_TYPE, LINKBEAT_ENABLE); + break; + default: /* AUI and MII fall here */ + break; + } + GO_WINDOW(1); + + prev_flags = ifp->if_flags; + prev_conn = i; +} + +static void +vxstart(ifp) + struct ifnet *ifp; +{ + register struct vx_softc *sc = ifp->if_softc; + register struct mbuf *m; + int sh, len, pad; + + /* Don't transmit if interface is busy or not running */ + if ((sc->arpcom.ac_if.if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING) + return; + +startagain: + /* Sneak a peek at the next packet */ + m = ifp->if_snd.ifq_head; + if (m == NULL) { + return; + } + + /* We need to use m->m_pkthdr.len, so require the header */ + M_ASSERTPKTHDR(m); + len = m->m_pkthdr.len; + + pad = (4 - len) & 3; + + /* + * The 3c509 automatically pads short packets to minimum ethernet length, + * but we drop packets that are too large. Perhaps we should truncate + * them instead? + */ + if (len + pad > ETHER_MAX_LEN) { + /* packet is obviously too large: toss it */ + ++ifp->if_oerrors; + IF_DEQUEUE(&ifp->if_snd, m); + m_freem(m); + goto readcheck; + } + VX_BUSY_WAIT; + if (CSR_READ_2(sc, VX_W1_FREE_TX) < len + pad + 4) { + CSR_WRITE_2(sc, VX_COMMAND, SET_TX_AVAIL_THRESH | ((len + pad + 4) >> 2)); + /* not enough room in FIFO */ + if (CSR_READ_2(sc, VX_W1_FREE_TX) < len + pad + 4) { /* make sure */ + ifp->if_flags |= IFF_OACTIVE; + ifp->if_timer = 1; + return; + } + } + CSR_WRITE_2(sc, VX_COMMAND, SET_TX_AVAIL_THRESH | (8188 >> 2)); + IF_DEQUEUE(&ifp->if_snd, m); + if (m == NULL) /* not really needed */ + return; + + VX_BUSY_WAIT; + CSR_WRITE_2(sc, VX_COMMAND, SET_TX_START_THRESH | + ((len / 4 + sc->tx_start_thresh) >> 2)); + + BPF_MTAP(&sc->arpcom.ac_if, m); + + /* + * Do the output at splhigh() so that an interrupt from another device + * won't cause a FIFO underrun. + */ + sh = splhigh(); + + CSR_WRITE_4(sc, VX_W1_TX_PIO_WR_1, len | TX_INDICATE); + + while (m) { + if (m->m_len > 3) + bus_space_write_multi_4(sc->bst, sc->bsh, + VX_W1_TX_PIO_WR_1, (u_int32_t *)mtod(m, caddr_t), m->m_len / 4); + if (m->m_len & 3) + bus_space_write_multi_1(sc->bst, sc->bsh, + VX_W1_TX_PIO_WR_1, + mtod(m, caddr_t) + (m->m_len & ~3) , m->m_len & 3); + m = m_free(m); + } + while (pad--) + CSR_WRITE_1(sc, VX_W1_TX_PIO_WR_1, 0); /* Padding */ + + splx(sh); + + ++ifp->if_opackets; + ifp->if_timer = 1; + +readcheck: + if ((CSR_READ_2(sc, VX_W1_RX_STATUS) & ERR_INCOMPLETE) == 0) { + /* We received a complete packet. */ + + if ((CSR_READ_2(sc, VX_STATUS) & S_INTR_LATCH) == 0) { + /* + * No interrupt, read the packet and continue + * Is this supposed to happen? Is my motherboard + * completely busted? + */ + vxread(sc); + } else + /* Got an interrupt, return so that it gets serviced. */ + return; + } else { + /* Check if we are stuck and reset [see XXX comment] */ + if (vxstatus(sc)) { + if (ifp->if_flags & IFF_DEBUG) + if_printf(ifp, "adapter reset\n"); + vxreset(sc); + } + } + + goto startagain; +} + +/* + * XXX: The 3c509 card can get in a mode where both the fifo status bit + * FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set + * We detect this situation and we reset the adapter. + * It happens at times when there is a lot of broadcast traffic + * on the cable (once in a blue moon). + */ +static int +vxstatus(sc) + struct vx_softc *sc; +{ + int fifost; + + /* + * Check the FIFO status and act accordingly + */ + GO_WINDOW(4); + fifost = CSR_READ_2(sc, VX_W4_FIFO_DIAG); + GO_WINDOW(1); + + if (fifost & FIFOS_RX_UNDERRUN) { + if (sc->arpcom.ac_if.if_flags & IFF_DEBUG) + printf("vx%d: RX underrun\n", sc->unit); + vxreset(sc); + return 0; + } + + if (fifost & FIFOS_RX_STATUS_OVERRUN) { + if (sc->arpcom.ac_if.if_flags & IFF_DEBUG) + printf("vx%d: RX Status overrun\n", sc->unit); + return 1; + } + + if (fifost & FIFOS_RX_OVERRUN) { + if (sc->arpcom.ac_if.if_flags & IFF_DEBUG) + printf("vx%d: RX overrun\n", sc->unit); + return 1; + } + + if (fifost & FIFOS_TX_OVERRUN) { + if (sc->arpcom.ac_if.if_flags & IFF_DEBUG) + printf("vx%d: TX overrun\n", sc->unit); + vxreset(sc); + return 0; + } + + return 0; +} + +static void +vxtxstat(sc) + struct vx_softc *sc; +{ + int i; + + /* + * We need to read+write TX_STATUS until we get a 0 status + * in order to turn off the interrupt flag. + */ + while ((i = CSR_READ_1(sc, VX_W1_TX_STATUS)) & TXS_COMPLETE) { + CSR_WRITE_1(sc, VX_W1_TX_STATUS, 0x0); + + if (i & TXS_JABBER) { + ++sc->arpcom.ac_if.if_oerrors; + if (sc->arpcom.ac_if.if_flags & IFF_DEBUG) + printf("vx%d: jabber (%x)\n", sc->unit, i); + vxreset(sc); + } else if (i & TXS_UNDERRUN) { + ++sc->arpcom.ac_if.if_oerrors; + if (sc->arpcom.ac_if.if_flags & IFF_DEBUG) + printf("vx%d: fifo underrun (%x) @%d\n", + sc->unit, i, sc->tx_start_thresh); + if (sc->tx_succ_ok < 100) + sc->tx_start_thresh = min(ETHER_MAX_LEN, sc->tx_start_thresh + 20); + sc->tx_succ_ok = 0; + vxreset(sc); + } else if (i & TXS_MAX_COLLISION) { + ++sc->arpcom.ac_if.if_collisions; + CSR_WRITE_2(sc, VX_COMMAND, TX_ENABLE); + sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; + } else + sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; + } +} + +void +vxintr(voidsc) + void *voidsc; +{ + register short status; + struct vx_softc *sc = voidsc; + struct ifnet *ifp = &sc->arpcom.ac_if; + + for (;;) { + CSR_WRITE_2(sc, VX_COMMAND, C_INTR_LATCH); + + status = CSR_READ_2(sc, VX_STATUS); + + if ((status & (S_TX_COMPLETE | S_TX_AVAIL | + S_RX_COMPLETE | S_CARD_FAILURE)) == 0) + break; + + /* + * Acknowledge any interrupts. It's important that we do this + * first, since there would otherwise be a race condition. + * Due to the i386 interrupt queueing, we may get spurious + * interrupts occasionally. + */ + CSR_WRITE_2(sc, VX_COMMAND, ACK_INTR | status); + + if (status & S_RX_COMPLETE) + vxread(sc); + if (status & S_TX_AVAIL) { + ifp->if_timer = 0; + sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; + vxstart(&sc->arpcom.ac_if); + } + if (status & S_CARD_FAILURE) { + printf("vx%d: adapter failure (%x)\n", sc->unit, status); + ifp->if_timer = 0; + vxreset(sc); + return; + } + if (status & S_TX_COMPLETE) { + ifp->if_timer = 0; + vxtxstat(sc); + vxstart(ifp); + } + } + + /* no more interrupts */ + return; +} + +static void +vxread(sc) + struct vx_softc *sc; +{ + struct ifnet *ifp = &sc->arpcom.ac_if; + struct mbuf *m; + struct ether_header *eh; + u_int len; + + len = CSR_READ_2(sc, VX_W1_RX_STATUS); + +again: + + if (ifp->if_flags & IFF_DEBUG) { + int err = len & ERR_MASK; + char *s = NULL; + + if (len & ERR_INCOMPLETE) + s = "incomplete packet"; + else if (err == ERR_OVERRUN) + s = "packet overrun"; + else if (err == ERR_RUNT) + s = "runt packet"; + else if (err == ERR_ALIGNMENT) + s = "bad alignment"; + else if (err == ERR_CRC) + s = "bad crc"; + else if (err == ERR_OVERSIZE) + s = "oversized packet"; + else if (err == ERR_DRIBBLE) + s = "dribble bits"; + + if (s) + printf("vx%d: %s\n", sc->unit, s); + } + + if (len & ERR_INCOMPLETE) + return; + + if (len & ERR_RX) { + ++ifp->if_ierrors; + goto abort; + } + + len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */ + + /* Pull packet off interface. */ + m = vxget(sc, len); + if (m == 0) { + ifp->if_ierrors++; + goto abort; + } + + ++ifp->if_ipackets; + + { + struct mbuf *m0; + + m0 = m_devget(mtod(m, char *), m->m_pkthdr.len, ETHER_ALIGN, ifp, NULL); + if (m0 == NULL) { + ifp->if_ierrors++; + goto abort; + } + + m_freem(m); + m = m0; + } + + /* We assume the header fit entirely in one mbuf. */ + eh = mtod(m, struct ether_header *); + + /* + * XXX: Some cards seem to be in promiscous mode all the time. + * we need to make sure we only get our own stuff always. + * bleah! + */ + + if ((eh->ether_dhost[0] & 1) == 0 /* !mcast and !bcast */ + && bcmp(eh->ether_dhost, sc->arpcom.ac_enaddr, ETHER_ADDR_LEN) != 0) { + m_freem(m); + return; + } + + (*ifp->if_input)(ifp, m); + + /* + * In periods of high traffic we can actually receive enough + * packets so that the fifo overrun bit will be set at this point, + * even though we just read a packet. In this case we + * are not going to receive any more interrupts. We check for + * this condition and read again until the fifo is not full. + * We could simplify this test by not using vxstatus(), but + * rechecking the RX_STATUS register directly. This test could + * result in unnecessary looping in cases where there is a new + * packet but the fifo is not full, but it will not fix the + * stuck behavior. + * + * Even with this improvement, we still get packet overrun errors + * which are hurting performance. Maybe when I get some more time + * I'll modify vxread() so that it can handle RX_EARLY interrupts. + */ + if (vxstatus(sc)) { + len = CSR_READ_2(sc, VX_W1_RX_STATUS); + /* Check if we are stuck and reset [see XXX comment] */ + if (len & ERR_INCOMPLETE) { + if (ifp->if_flags & IFF_DEBUG) + printf("vx%d: adapter reset\n", sc->unit); + vxreset(sc); + return; + } + goto again; + } + + return; + +abort: + CSR_WRITE_2(sc, VX_COMMAND, RX_DISCARD_TOP_PACK); +} + +static struct mbuf * +vxget(sc, totlen) + struct vx_softc *sc; + u_int totlen; +{ + struct ifnet *ifp = &sc->arpcom.ac_if; + struct mbuf *top, **mp, *m; + int len; + int sh; + + m = sc->mb[sc->next_mb]; + sc->mb[sc->next_mb] = 0; + if (m == 0) { + MGETHDR(m, M_DONTWAIT, MT_DATA); + if (m == 0) + return 0; + } else { + /* If the queue is no longer full, refill. */ + if (sc->last_mb == sc->next_mb && sc->buffill_pending == 0) { + sc->ch = timeout(vxmbuffill, sc, 1); + sc->buffill_pending = 1; + } + /* Convert one of our saved mbuf's. */ + sc->next_mb = (sc->next_mb + 1) % MAX_MBS; + m->m_data = m->m_pktdat; + m->m_flags = M_PKTHDR; + bzero(&m->m_pkthdr, sizeof(m->m_pkthdr)); + } + m->m_pkthdr.rcvif = ifp; + m->m_pkthdr.len = totlen; + len = MHLEN; + top = 0; + mp = ⊤ + + /* + * We read the packet at splhigh() so that an interrupt from another + * device doesn't cause the card's buffer to overflow while we're + * reading it. We may still lose packets at other times. + */ + sh = splhigh(); + + /* + * Since we don't set allowLargePackets bit in MacControl register, + * we can assume that totlen <= 1500bytes. + * The while loop will be performed iff we have a packet with + * MLEN < m_len < MINCLSIZE. + */ + while (totlen > 0) { + if (top) { + m = sc->mb[sc->next_mb]; + sc->mb[sc->next_mb] = 0; + if (m == 0) { + MGET(m, M_DONTWAIT, MT_DATA); + if (m == 0) { + splx(sh); + m_freem(top); + return 0; + } + } else { + sc->next_mb = (sc->next_mb + 1) % MAX_MBS; + } + len = MLEN; + } + if (totlen >= MINCLSIZE) { + MCLGET(m, M_DONTWAIT); + if (m->m_flags & M_EXT) + len = MCLBYTES; + } + len = min(totlen, len); + if (len > 3) + bus_space_read_multi_4(sc->bst, sc->bsh, + VX_W1_RX_PIO_RD_1, mtod(m, u_int32_t *), len / 4); + if (len & 3) { + bus_space_read_multi_1(sc->bst, sc->bsh, + VX_W1_RX_PIO_RD_1, mtod(m, u_int8_t *) + (len & ~3), + len & 3); + } + m->m_len = len; + totlen -= len; + *mp = m; + mp = &m->m_next; + } + + CSR_WRITE_2(sc, VX_COMMAND, RX_DISCARD_TOP_PACK); + + splx(sh); + + return top; +} + + +static int +vxioctl(ifp, cmd, data) + register struct ifnet *ifp; + u_long cmd; + caddr_t data; +{ + struct vx_softc *sc = ifp->if_softc; + struct ifreq *ifr = (struct ifreq *) data; + int s, error = 0; + + s = splimp(); + + switch (cmd) { + case SIOCSIFFLAGS: + if ((ifp->if_flags & IFF_UP) == 0 && + (ifp->if_flags & IFF_RUNNING) != 0) { + /* + * If interface is marked up and it is stopped, then + * start it. + */ + vxstop(sc); + ifp->if_flags &= ~IFF_RUNNING; + } else if ((ifp->if_flags & IFF_UP) != 0 && + (ifp->if_flags & IFF_RUNNING) == 0) { + /* + * If interface is marked up and it is stopped, then + * start it. + */ + vxinit(sc); + } else { + /* + * deal with flags changes: + * IFF_MULTICAST, IFF_PROMISC, + * IFF_LINK0, IFF_LINK1, + */ + vxsetfilter(sc); + vxsetlink(sc); + } + break; + + case SIOCSIFMTU: + /* + * Set the interface MTU. + */ + if (ifr->ifr_mtu > ETHERMTU) { + error = EINVAL; + } else { + ifp->if_mtu = ifr->ifr_mtu; + } + break; + + case SIOCADDMULTI: + case SIOCDELMULTI: + /* + * Multicast list has changed; set the hardware filter + * accordingly. + */ + vxreset(sc); + error = 0; + break; + + + default: + error = ether_ioctl(ifp, cmd, data); + break; + } + + splx(s); + + return (error); +} + +static void +vxreset(sc) + struct vx_softc *sc; +{ + int s; + s = splimp(); + + vxstop(sc); + vxinit(sc); + splx(s); +} + +static void +vxwatchdog(ifp) + struct ifnet *ifp; +{ + struct vx_softc *sc = ifp->if_softc; + + if (ifp->if_flags & IFF_DEBUG) + if_printf(ifp, "device timeout\n"); + ifp->if_flags &= ~IFF_OACTIVE; + vxstart(ifp); + vxintr(sc); +} + +void +vxstop(sc) + struct vx_softc *sc; +{ + struct ifnet *ifp = &sc->arpcom.ac_if; + + ifp->if_timer = 0; + + CSR_WRITE_2(sc, VX_COMMAND, RX_DISABLE); + CSR_WRITE_2(sc, VX_COMMAND, RX_DISCARD_TOP_PACK); + VX_BUSY_WAIT; + CSR_WRITE_2(sc, VX_COMMAND, TX_DISABLE); + CSR_WRITE_2(sc, VX_COMMAND, STOP_TRANSCEIVER); + DELAY(800); + CSR_WRITE_2(sc, VX_COMMAND, RX_RESET); + VX_BUSY_WAIT; + CSR_WRITE_2(sc, VX_COMMAND, TX_RESET); + VX_BUSY_WAIT; + CSR_WRITE_2(sc, VX_COMMAND, C_INTR_LATCH); + CSR_WRITE_2(sc, VX_COMMAND, SET_RD_0_MASK); + CSR_WRITE_2(sc, VX_COMMAND, SET_INTR_MASK); + CSR_WRITE_2(sc, VX_COMMAND, SET_RX_FILTER); + + vxmbufempty(sc); +} + +int +vxbusyeeprom(sc) + struct vx_softc *sc; +{ + int j, i = 100; + + while (i--) { + j = CSR_READ_2(sc, VX_W0_EEPROM_COMMAND); + if (j & EEPROM_BUSY) + DELAY(100); + else + break; + } + if (!i) { + printf("vx%d: eeprom failed to come ready\n", sc->unit); + return (1); + } + return (0); +} + +static void +vxmbuffill(sp) + void *sp; +{ + struct vx_softc *sc = (struct vx_softc *) sp; + int s, i; + + s = splimp(); + i = sc->last_mb; + do { + if (sc->mb[i] == NULL) + MGET(sc->mb[i], M_DONTWAIT, MT_DATA); + if (sc->mb[i] == NULL) + break; + i = (i + 1) % MAX_MBS; + } while (i != sc->next_mb); + sc->last_mb = i; + /* If the queue was not filled, try again. */ + if (sc->last_mb != sc->next_mb) { + sc->ch = timeout(vxmbuffill, sc, 1); + sc->buffill_pending = 1; + } else { + sc->buffill_pending = 0; + } + splx(s); +} + +static void +vxmbufempty(sc) + struct vx_softc *sc; +{ + int s, i; + + s = splimp(); + for (i = 0; i < MAX_MBS; i++) { + if (sc->mb[i]) { + m_freem(sc->mb[i]); + sc->mb[i] = NULL; + } + } + sc->last_mb = sc->next_mb = 0; + if (sc->buffill_pending != 0) + untimeout(vxmbuffill, sc, sc->ch); + splx(s); +} diff --git a/sys/dev/vx/if_vx_eisa.c b/sys/dev/vx/if_vx_eisa.c new file mode 100644 index 0000000..4c8931d --- /dev/null +++ b/sys/dev/vx/if_vx_eisa.c @@ -0,0 +1,194 @@ +/* + * Copyright (C) 1996 Naoki Hamada <nao@tom-yam.or.jp> + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the author nor the names of any co-contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/kernel.h> +#include <sys/socket.h> +#include <sys/module.h> +#include <sys/bus.h> + +#include <machine/bus.h> +#include <machine/resource.h> +#include <sys/rman.h> + +#include <net/if.h> +#include <net/if_arp.h> + +#include <dev/eisa/eisaconf.h> + +#include <dev/vx/if_vxreg.h> +#include <dev/vx/if_vxvar.h> + +#define EISA_DEVICE_ID_3COM_3C592 0x506d5920 +#define EISA_DEVICE_ID_3COM_3C597_TX 0x506d5970 +#define EISA_DEVICE_ID_3COM_3C597_T4 0x506d5971 +#define EISA_DEVICE_ID_3COM_3C597_MII 0x506d5972 + + +#define VX_EISA_SLOT_OFFSET 0x0c80 +#define VX_EISA_IOSIZE 0x000a +#define VX_RESOURCE_CONFIG 0x0008 + + +static const char *vx_match(eisa_id_t type); + +static const char* +vx_match(eisa_id_t type) +{ + switch (type) { + case EISA_DEVICE_ID_3COM_3C592: + return "3Com 3C592 Network Adapter"; + case EISA_DEVICE_ID_3COM_3C597_TX: + return "3Com 3C597-TX Network Adapter"; + case EISA_DEVICE_ID_3COM_3C597_T4: + return "3Com 3C597-T4 Network Adapter"; + case EISA_DEVICE_ID_3COM_3C597_MII: + return "3Com 3C597-MII Network Adapter"; + default: + break; + } + return (NULL); +} + +static int +vx_eisa_probe(device_t dev) +{ + const char *desc; + u_long iobase; + u_long port; + + desc = vx_match(eisa_get_id(dev)); + if (!desc) + return (ENXIO); + device_set_desc(dev, desc); + + port = eisa_get_slot(dev) * EISA_SLOT_SIZE; + iobase = port + VX_EISA_SLOT_OFFSET; + + eisa_add_iospace(dev, iobase, VX_EISA_IOSIZE, RESVADDR_NONE); + eisa_add_iospace(dev, port, VX_IOSIZE, RESVADDR_NONE); + + /* Set irq */ + eisa_add_intr(dev, inw(iobase + VX_RESOURCE_CONFIG) >> 12, + EISA_TRIGGER_EDGE); + + return (0); +} + +static int +vx_eisa_attach(device_t dev) +{ + struct vx_softc *sc; + struct resource *io = 0; + struct resource *eisa_io = 0; + struct resource *irq = 0; + int rid; + void *ih; + + /* + * The addresses are sorted in increasing order + * so we know the port to pass to the core ep + * driver comes first. + */ + rid = 0; + io = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, + 0, ~0, 1, RF_ACTIVE); + if (!io) { + device_printf(dev, "No I/O space?!\n"); + goto bad; + } + + rid = 1; + eisa_io = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, + 0, ~0, 1, RF_ACTIVE); + if (!eisa_io) { + device_printf(dev, "No I/O space?!\n"); + goto bad; + } + + sc = device_get_softc(dev); + + sc->vx_res = io; + sc->bst = rman_get_bustag(io); + sc->bsh = rman_get_bushandle(io); + + rid = 0; + irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, + 0, ~0, 1, RF_ACTIVE); + if (!irq) { + device_printf(dev, "No irq?!\n"); + goto bad; + } + + sc->vx_irq = irq; + + /* Now the registers are availible through the lower ioport */ + + vxattach(dev); + + if (bus_setup_intr(dev, irq, INTR_TYPE_NET, vxintr, sc, &ih)) { + goto bad; + } + + sc->vx_intrhand = ih; + + return 0; + + bad: + if (io) + bus_release_resource(dev, SYS_RES_IOPORT, 0, io); + if (eisa_io) + bus_release_resource(dev, SYS_RES_IOPORT, 0, eisa_io); + if (irq) + bus_release_resource(dev, SYS_RES_IRQ, 0, irq); + return -1; +} + +static device_method_t vx_eisa_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, vx_eisa_probe), + DEVMETHOD(device_attach, vx_eisa_attach), + + { 0, 0 } +}; + +static driver_t vx_eisa_driver = { + "vx", + vx_eisa_methods, + 1, /* unused */ +}; + +static devclass_t vx_devclass; + +DRIVER_MODULE(vx, eisa, vx_eisa_driver, vx_devclass, 0, 0); diff --git a/sys/dev/vx/if_vx_pci.c b/sys/dev/vx/if_vx_pci.c new file mode 100644 index 0000000..ff4f1fb --- /dev/null +++ b/sys/dev/vx/if_vx_pci.c @@ -0,0 +1,182 @@ +/* + * Copyright (C) 1996 Naoki Hamada <nao@tom-yam.or.jp> + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the author nor the names of any co-contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/kernel.h> +#include <sys/socket.h> + +#include <net/if.h> +#include <net/if_arp.h> + +#include <machine/bus_pio.h> +#include <machine/bus.h> +#include <machine/resource.h> +#include <sys/bus.h> +#include <sys/rman.h> + +#include <dev/pci/pcivar.h> +#include <dev/pci/pcireg.h> + +#include <dev/vx/if_vxreg.h> +#include <dev/vx/if_vxvar.h> + +static void vx_pci_shutdown(device_t); +static int vx_pci_probe(device_t); +static int vx_pci_attach(device_t); + +static device_method_t vx_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, vx_pci_probe), + DEVMETHOD(device_attach, vx_pci_attach), + DEVMETHOD(device_shutdown, vx_pci_shutdown), + + { 0, 0 } +}; + +static driver_t vx_driver = { + "vx", + vx_methods, + sizeof(struct vx_softc) +}; + +static devclass_t vx_devclass; + +DRIVER_MODULE(vx, pci, vx_driver, vx_devclass, 0, 0); +MODULE_DEPEND(vx, pci, 1, 1, 1); +MODULE_DEPEND(vx, ether, 1, 1, 1); + +static void +vx_pci_shutdown( + device_t dev) +{ + struct vx_softc *sc; + + sc = device_get_softc(dev); + vxstop(sc); + return; +} + +static int +vx_pci_probe( + device_t dev) +{ + u_int32_t device_id; + + device_id = pci_read_config(dev, PCIR_DEVVENDOR, 4); + + if(device_id == 0x590010b7ul) { + device_set_desc(dev, "3COM 3C590 Etherlink III PCI"); + return(0); + } + if(device_id == 0x595010b7ul || device_id == 0x595110b7ul || + device_id == 0x595210b7ul) { + device_set_desc(dev, "3COM 3C595 Etherlink III PCI"); + return(0); + } + /* + * The (Fast) Etherlink XL adapters are now supported by + * the xl driver, which uses bus master DMA and is much + * faster. (And which also supports the 3c905B. + */ +#ifdef VORTEX_ETHERLINK_XL + if(device_id == 0x900010b7ul || device_id == 0x900110b7ul) { + device_set_desc(dev, "3COM 3C900 Etherlink XL PCI"); + return(0); + } + if(device_id == 0x905010b7ul || device_id == 0x905110b7ul) { + device_set_desc(dev, "3COM 3C905 Etherlink XL PCI"); + return(0); + } +#endif + return (ENXIO); +} + +static int +vx_pci_attach( + device_t dev) +{ + struct vx_softc *sc; + int rid; + + sc = device_get_softc(dev); + + rid = PCIR_BAR(0); + sc->vx_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, + 0, ~0, 1, RF_ACTIVE); + + if (sc->vx_res == NULL) + goto bad; + + sc->bst = rman_get_bustag(sc->vx_res); + sc->bsh = rman_get_bushandle(sc->vx_res); + + rid = 0; + sc->vx_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1, + RF_SHAREABLE | RF_ACTIVE); + + if (sc->vx_irq == NULL) + goto bad; + + if (bus_setup_intr(dev, sc->vx_irq, INTR_TYPE_NET, + vxintr, sc, &sc->vx_intrhand)) + goto bad; + + if (vxattach(dev) == 0) { + goto bad; + } + + /* defect check for 3C590 */ + if ((pci_read_config(dev, PCIR_DEVVENDOR, 4) >> 16) == 0x5900) { + GO_WINDOW(0); + if (vxbusyeeprom(sc)) + goto bad; + CSR_WRITE_2(sc, VX_W0_EEPROM_COMMAND, + EEPROM_CMD_RD | EEPROM_SOFTINFO2); + if (vxbusyeeprom(sc)) + goto bad; + if (!(CSR_READ_2(sc, VX_W0_EEPROM_DATA) & NO_RX_OVN_ANOMALY)) { + printf("Warning! Defective early revision adapter!\n"); + } + } + + return(0); + +bad: + if (sc->vx_intrhand != NULL) + bus_teardown_intr(dev, sc->vx_irq, sc->vx_intrhand); + if (sc->vx_res != NULL) + bus_release_resource(dev, SYS_RES_IOPORT, 0, sc->vx_res); + if (sc->vx_irq != NULL) + bus_release_resource(dev, SYS_RES_IRQ, 0, sc->vx_irq); + return(ENXIO); +} diff --git a/sys/dev/vx/if_vxreg.h b/sys/dev/vx/if_vxreg.h new file mode 100644 index 0000000..6ee87bd --- /dev/null +++ b/sys/dev/vx/if_vxreg.h @@ -0,0 +1,429 @@ +/* + * Copyright (c) 1993 Herb Peyerl (hpeyerl@novatel.ca) All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. 2. The name + * of the author may not be used to endorse or promote products derived from + * this software without specific prior written permission + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO + * EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/* + * Created from if_epreg.h by Fred Gray (fgray@rice.edu) to support the + * 3c590 family. + */ + +/* + * Some global constants + */ + +#define TX_INIT_RATE 16 +#define TX_INIT_MAX_RATE 64 +#define RX_INIT_LATENCY 64 +#define RX_INIT_EARLY_THRESH 64 +#define MIN_RX_EARLY_THRESHF 16 /* not less than ether_header */ +#define MIN_RX_EARLY_THRESHL 4 + +#define EEPROMSIZE 0x40 +#define MAX_EEPROMBUSY 1000 +#define VX_LAST_TAG 0xd7 +#define VX_MAX_BOARDS 16 + +/* + * Commands to read/write EEPROM trough EEPROM command register (Window 0, + * Offset 0xa) + */ +#define EEPROM_CMD_RD 0x0080 /* Read: Address required (5 bits) */ +#define EEPROM_CMD_WR 0x0040 /* Write: Address required (5 bits) */ +#define EEPROM_CMD_ERASE 0x00c0 /* Erase: Address required (5 bits) */ +#define EEPROM_CMD_EWEN 0x0030 /* Erase/Write Enable: No data required */ + +#define EEPROM_BUSY (1<<15) +#define EEPROM_TST_MODE (1<<14) + +/* + * Some short functions, worth to let them be a macro + */ +#define GO_WINDOW(x) CSR_WRITE_2(sc, VX_COMMAND, WINDOW_SELECT|(x)) + +/************************************************************************** + * * + * These define the EEPROM data structure. They are used in the probe + * function to verify the existence of the adapter after having sent + * the ID_Sequence. + * + **************************************************************************/ + +#define EEPROM_NODE_ADDR_0 0x0 /* Word */ +#define EEPROM_NODE_ADDR_1 0x1 /* Word */ +#define EEPROM_NODE_ADDR_2 0x2 /* Word */ +#define EEPROM_PROD_ID 0x3 /* 0x9[0-f]50 */ +#define EEPROM_MFG_DATE 0x4 /* Manufacturing date */ +#define EEPROM_MFG_DIVSION 0x5 /* Manufacturing division */ +#define EEPROM_MFG_PRODUCT 0x6 /* Product code */ +#define EEPROM_MFG_ID 0x7 /* 0x6d50 */ +#define EEPROM_ADDR_CFG 0x8 /* Base addr */ +#define ADDR_CFG_EISA 0x1f +#define ADDR_CFG_MASK 0x1f +#define EEPROM_RESOURCE_CFG 0x9 /* IRQ. Bits 12-15 */ +#define EEPROM_OEM_ADDR0 0xa +#define EEPROM_OEM_ADDR1 0xb +#define EEPROM_OEM_ADDR2 0xc +#define EEPROM_SOFTINFO 0xd +#define EEPROM_COMPAT 0xe +#define EEPROM_SOFTINFO2 0xf +#define EEPROM_CAP 0x10 +#define CAP_ISA 0x2083 +#define CAP_PCMCIA 0x2082 +#define EEPROM_INT_CONFIG_0 0x12 +#define EEPROM_INT_CONFIG_1 0x13 +/* RAM Partition TX FIFO/RX FIFO */ +#define ICW1_RAM_PART_MASK 0x03 +#define ICW1_RAM_PART_35 0x00 /* 2:5 (only legal if RAM size == 000b + * default power-up/reset */ +#define ICW1_RAM_PART_13 0x01 /* 1:3 (only legal if RAM size == + * 000b) */ +#define ICW1_RAM_PART_11 0x10 /* 1:1 */ +#define ICW1_RAM_PART_RESV 0x11 /* Reserved */ +/* ISA Adapter Selection */ +#define ICW1_IAS_MASK 0x0c +#define ICW1_IAS_DIS 0x00 /* Both mechanisms disabled (default) */ +#define ICW1_IAS_ISA 0x04 /* ISA contention only */ +#define ICW1_IAS_PNP 0x08 /* ISA Plug and Play only */ +#define ICW1_IAS_BOTH 0x0c /* Both mechanisms enabled */ + +#define EEPROM_CHECKSUM_EL3 0x17 + +#define NO_RX_OVN_ANOMALY (1<<5) + +/************************************************************************** + * * + * These are the registers for the 3Com 3c509 and their bit patterns when * + * applicable. They have been taken out the the "EtherLink III Parallel * + * Tasking EISA and ISA Technical Reference" "Beta Draft 10/30/92" manual * + * from 3com. * + * * + **************************************************************************/ + +#define VX_COMMAND 0x0e /* Write. BASE+0x0e is always a + * command reg. */ +#define VX_STATUS 0x0e /* Read. BASE+0x0e is always status + * reg. */ +#define VX_WINDOW 0x0f /* Read. BASE+0x0f is always window + * reg. */ +/* + * Window 0 registers. Setup. + */ +/* Write */ +#define VX_W0_EEPROM_DATA 0x0c +#define VX_W0_EEPROM_COMMAND 0x0a +#define VX_W0_RESOURCE_CFG 0x08 +#define VX_W0_ADDRESS_CFG 0x06 +#define VX_W0_CONFIG_CTRL 0x04 + /* Read */ +#define VX_W0_PRODUCT_ID 0x02 +#define VX_W0_MFG_ID 0x00 + +/* + * Window 1 registers. Operating Set. + */ +/* Write */ +#define VX_W1_TX_PIO_WR_2 0x02 +#define VX_W1_TX_PIO_WR_1 0x00 +/* Read */ +#define VX_W1_FREE_TX 0x0c +#define VX_W1_TX_STATUS 0x0b /* byte */ +#define VX_W1_TIMER 0x0a /* byte */ +#define VX_W1_RX_STATUS 0x08 +#define VX_W1_RX_PIO_RD_2 0x02 +#define VX_W1_RX_PIO_RD_1 0x00 + +/* + * Window 2 registers. Station Address Setup/Read + */ +/* Read/Write */ +#define VX_W2_ADDR_5 0x05 +#define VX_W2_ADDR_4 0x04 +#define VX_W2_ADDR_3 0x03 +#define VX_W2_ADDR_2 0x02 +#define VX_W2_ADDR_1 0x01 +#define VX_W2_ADDR_0 0x00 + +/* + * Window 3 registers. FIFO Management. + */ +/* Read */ +#define VX_W3_INTERNAL_CFG 0x00 +#define VX_W3_RESET_OPT 0x08 +#define VX_W3_FREE_TX 0x0c +#define VX_W3_FREE_RX 0x0a + +/* + * Window 4 registers. Diagnostics. + */ +/* Read/Write */ +#define VX_W4_MEDIA_TYPE 0x0a +#define VX_W4_CTRLR_STATUS 0x08 +#define VX_W4_NET_DIAG 0x06 +#define VX_W4_FIFO_DIAG 0x04 +#define VX_W4_HOST_DIAG 0x02 +#define VX_W4_TX_DIAG 0x00 + +/* + * Window 5 Registers. Results and Internal status. + */ +/* Read */ +#define VX_W5_READ_0_MASK 0x0c +#define VX_W5_INTR_MASK 0x0a +#define VX_W5_RX_FILTER 0x08 +#define VX_W5_RX_EARLY_THRESH 0x06 +#define VX_W5_TX_AVAIL_THRESH 0x02 +#define VX_W5_TX_START_THRESH 0x00 + +/* + * Window 6 registers. Statistics. + */ +/* Read/Write */ +#define TX_TOTAL_OK 0x0c +#define RX_TOTAL_OK 0x0a +#define TX_DEFERRALS 0x08 +#define RX_FRAMES_OK 0x07 +#define TX_FRAMES_OK 0x06 +#define RX_OVERRUNS 0x05 +#define TX_COLLISIONS 0x04 +#define TX_AFTER_1_COLLISION 0x03 +#define TX_AFTER_X_COLLISIONS 0x02 +#define TX_NO_SQE 0x01 +#define TX_CD_LOST 0x00 + +/**************************************** + * + * Register definitions. + * + ****************************************/ + +/* + * Command register. All windows. + * + * 16 bit register. + * 15-11: 5-bit code for command to be executed. + * 10-0: 11-bit arg if any. For commands with no args; + * this can be set to anything. + */ +#define GLOBAL_RESET (u_short) 0x0000 /* Wait at least 1ms + * after issuing */ +#define WINDOW_SELECT (u_short) (0x1<<11) +#define START_TRANSCEIVER (u_short) (0x2<<11) /* Read ADDR_CFG reg to + * determine whether + * this is needed. If + * so; wait 800 uSec + * before using trans- + * ceiver. */ +#define RX_DISABLE (u_short) (0x3<<11) /* state disabled on + * power-up */ +#define RX_ENABLE (u_short) (0x4<<11) +#define RX_RESET (u_short) (0x5<<11) +#define RX_DISCARD_TOP_PACK (u_short) (0x8<<11) +#define TX_ENABLE (u_short) (0x9<<11) +#define TX_DISABLE (u_short) (0xa<<11) +#define TX_RESET (u_short) (0xb<<11) +#define REQ_INTR (u_short) (0xc<<11) +/* + * The following C_* acknowledge the various interrupts. Some of them don't + * do anything. See the manual. + */ +#define ACK_INTR (u_short) (0x6800) +# define C_INTR_LATCH (u_short) (ACK_INTR|0x1) +# define C_CARD_FAILURE (u_short) (ACK_INTR|0x2) +# define C_TX_COMPLETE (u_short) (ACK_INTR|0x4) +# define C_TX_AVAIL (u_short) (ACK_INTR|0x8) +# define C_RX_COMPLETE (u_short) (ACK_INTR|0x10) +# define C_RX_EARLY (u_short) (ACK_INTR|0x20) +# define C_INT_RQD (u_short) (ACK_INTR|0x40) +# define C_UPD_STATS (u_short) (ACK_INTR|0x80) +#define SET_INTR_MASK (u_short) (0xe<<11) +#define SET_RD_0_MASK (u_short) (0xf<<11) +#define SET_RX_FILTER (u_short) (0x10<<11) +# define FIL_INDIVIDUAL (u_short) (0x1) +# define FIL_MULTICAST (u_short) (0x02) +# define FIL_BRDCST (u_short) (0x04) +# define FIL_PROMISC (u_short) (0x08) +#define SET_RX_EARLY_THRESH (u_short) (0x11<<11) +#define SET_TX_AVAIL_THRESH (u_short) (0x12<<11) +#define SET_TX_START_THRESH (u_short) (0x13<<11) +#define STATS_ENABLE (u_short) (0x15<<11) +#define STATS_DISABLE (u_short) (0x16<<11) +#define STOP_TRANSCEIVER (u_short) (0x17<<11) + +/* + * Status register. All windows. + * + * 15-13: Window number(0-7). + * 12: Command_in_progress. + * 11: reserved. + * 10: reserved. + * 9: reserved. + * 8: reserved. + * 7: Update Statistics. + * 6: Interrupt Requested. + * 5: RX Early. + * 4: RX Complete. + * 3: TX Available. + * 2: TX Complete. + * 1: Adapter Failure. + * 0: Interrupt Latch. + */ +#define S_INTR_LATCH (u_short) (0x1) +#define S_CARD_FAILURE (u_short) (0x2) +#define S_TX_COMPLETE (u_short) (0x4) +#define S_TX_AVAIL (u_short) (0x8) +#define S_RX_COMPLETE (u_short) (0x10) +#define S_RX_EARLY (u_short) (0x20) +#define S_INT_RQD (u_short) (0x40) +#define S_UPD_STATS (u_short) (0x80) +#define S_COMMAND_IN_PROGRESS (u_short) (0x1000) + +#define VX_BUSY_WAIT while (CSR_READ_2(sc, VX_STATUS) & S_COMMAND_IN_PROGRESS) + +/* Address Config. Register. + * Window 0/Port 06 + */ + +#define ACF_CONNECTOR_BITS 14 +#define ACF_CONNECTOR_UTP 0 +#define ACF_CONNECTOR_AUI 1 +#define ACF_CONNECTOR_BNC 3 + +#define INTERNAL_CONNECTOR_BITS 20 +#define INTERNAL_CONNECTOR_MASK 0x01700000 + +/* + * FIFO Registers. RX Status. + * + * 15: Incomplete or FIFO empty. + * 14: 1: Error in RX Packet 0: Incomplete or no error. + * 13-11: Type of error. + * 1000 = Overrun. + * 1011 = Run Packet Error. + * 1100 = Alignment Error. + * 1101 = CRC Error. + * 1001 = Oversize Packet Error (>1514 bytes) + * 0010 = Dribble Bits. + * (all other error codes, no errors.) + * + * 10-0: RX Bytes (0-1514) + */ +#define ERR_INCOMPLETE (u_short) (0x8000) +#define ERR_RX (u_short) (0x4000) +#define ERR_MASK (u_short) (0x7800) +#define ERR_OVERRUN (u_short) (0x4000) +#define ERR_RUNT (u_short) (0x5800) +#define ERR_ALIGNMENT (u_short) (0x6000) +#define ERR_CRC (u_short) (0x6800) +#define ERR_OVERSIZE (u_short) (0x4800) +#define ERR_DRIBBLE (u_short) (0x1000) + +/* + * TX Status. + * + * Reports the transmit status of a completed transmission. Writing this + * register pops the transmit completion stack. + * + * Window 1/Port 0x0b. + * + * 7: Complete + * 6: Interrupt on successful transmission requested. + * 5: Jabber Error (TP Only, TX Reset required. ) + * 4: Underrun (TX Reset required. ) + * 3: Maximum Collisions. + * 2: TX Status Overflow. + * 1-0: Undefined. + * + */ +#define TXS_COMPLETE 0x80 +#define TXS_INTR_REQ 0x40 +#define TXS_JABBER 0x20 +#define TXS_UNDERRUN 0x10 +#define TXS_MAX_COLLISION 0x8 +#define TXS_STATUS_OVERFLOW 0x4 + +#define RS_AUI (1<<5) +#define RS_BNC (1<<4) +#define RS_UTP (1<<3) +#define RS_T4 (1<<0) +#define RS_TX (1<<1) +#define RS_FX (1<<2) +#define RS_MII (1<<6) + + +/* + * FIFO Status (Window 4) + * + * Supports FIFO diagnostics + * + * Window 4/Port 0x04.1 + * + * 15: 1=RX receiving (RO). Set when a packet is being received + * into the RX FIFO. + * 14: Reserved + * 13: 1=RX underrun (RO). Generates Adapter Failure interrupt. + * Requires RX Reset or Global Reset command to recover. + * It is generated when you read past the end of a packet - + * reading past what has been received so far will give bad + * data. + * 12: 1=RX status overrun (RO). Set when there are already 8 + * packets in the RX FIFO. While this bit is set, no additional + * packets are received. Requires no action on the part of + * the host. The condition is cleared once a packet has been + * read out of the RX FIFO. + * 11: 1=RX overrun (RO). Set when the RX FIFO is full (there + * may not be an overrun packet yet). While this bit is set, + * no additional packets will be received (some additional + * bytes can still be pending between the wire and the RX + * FIFO). Requires no action on the part of the host. The + * condition is cleared once a few bytes have been read out + * from the RX FIFO. + * 10: 1=TX overrun (RO). Generates adapter failure interrupt. + * Requires TX Reset or Global Reset command to recover. + * Disables Transmitter. + * 9-8: Unassigned. + * 7-0: Built in self test bits for the RX and TX FIFO's. + */ +#define FIFOS_RX_RECEIVING (u_short) 0x8000 +#define FIFOS_RX_UNDERRUN (u_short) 0x2000 +#define FIFOS_RX_STATUS_OVERRUN (u_short) 0x1000 +#define FIFOS_RX_OVERRUN (u_short) 0x0800 +#define FIFOS_TX_OVERRUN (u_short) 0x0400 + +/* + * Misc defines for various things. + */ +#define TAG_ADAPTER 0xd0 +#define ACTIVATE_ADAPTER_TO_CONFIG 0xff +#define ENABLE_DRQ_IRQ 0x0001 +#define MFG_ID 0x506d /* `TCM' */ +#define PROD_ID 0x5090 +#define JABBER_GUARD_ENABLE 0x40 +#define LINKBEAT_ENABLE 0x80 +#define ENABLE_UTP (JABBER_GUARD_ENABLE | LINKBEAT_ENABLE) +#define DISABLE_UTP 0x0 +#define RX_BYTES_MASK (u_short) (0x07ff) +#define TX_INDICATE 1<<15 + +#define VX_IOSIZE 0x20 + +#define VX_CONNECTORS 8 diff --git a/sys/dev/vx/if_vxvar.h b/sys/dev/vx/if_vxvar.h new file mode 100644 index 0000000..e8a7a32 --- /dev/null +++ b/sys/dev/vx/if_vxvar.h @@ -0,0 +1,76 @@ +/* + * Copyright (c) 1993 Herb Peyerl (hpeyerl@novatel.ca) All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. 2. The name + * of the author may not be used to endorse or promote products derived from + * this software without specific prior written permission + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO + * EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * $FreeBSD$ + * + October 2, 1994 + + Modified by: Andres Vega Garcia + + INRIA - Sophia Antipolis, France + e-mail: avega@sophia.inria.fr + finger: avega@pax.inria.fr + + */ + +/* + * Ethernet software status per interface. + */ +struct vx_softc { + struct arpcom arpcom; /* Ethernet common part */ + int unit; /* unit number */ + bus_space_tag_t bst; + bus_space_handle_t bsh; + void *vx_intrhand; + struct resource *vx_irq; + struct resource *vx_res; +#define MAX_MBS 8 /* # of mbufs we keep around */ + struct mbuf *mb[MAX_MBS]; /* spare mbuf storage. */ + int next_mb; /* Which mbuf to use next. */ + int last_mb; /* Last mbuf. */ + char vx_connectors; /* Connectors on this card. */ + char vx_connector; /* Connector to use. */ + short tx_start_thresh; /* Current TX_start_thresh. */ + int tx_succ_ok; /* # packets sent in sequence */ + /* w/o underrun */ + struct callout_handle ch; /* Callout handle for timeouts */ + int buffill_pending; +}; + +#define CSR_WRITE_4(sc, reg, val) \ + bus_space_write_4(sc->bst, sc->bsh, reg, val) +#define CSR_WRITE_2(sc, reg, val) \ + bus_space_write_2(sc->bst, sc->bsh, reg, val) +#define CSR_WRITE_1(sc, reg, val) \ + bus_space_write_1(sc->bst, sc->bsh, reg, val) + +#define CSR_READ_4(sc, reg) \ + bus_space_read_4(sc->bst, sc->bsh, reg) +#define CSR_READ_2(sc, reg) \ + bus_space_read_2(sc->bst, sc->bsh, reg) +#define CSR_READ_1(sc, reg) \ + bus_space_read_1(sc->bst, sc->bsh, reg) + +extern void vxfree(struct vx_softc *); +extern int vxattach(device_t); +extern void vxstop(struct vx_softc *); +extern void vxintr(void *); +extern int vxbusyeeprom(struct vx_softc *); |
