diff options
Diffstat (limited to 'sys/dev/siba/sibareg.h')
-rw-r--r-- | sys/dev/siba/sibareg.h | 62 |
1 files changed, 55 insertions, 7 deletions
diff --git a/sys/dev/siba/sibareg.h b/sys/dev/siba/sibareg.h index 9aa9e7c..c2a4fdb 100644 --- a/sys/dev/siba/sibareg.h +++ b/sys/dev/siba/sibareg.h @@ -32,7 +32,7 @@ */ #ifndef _SIBA_SIBAREG_H_ -#define _SIBA_SIBAREG_H_ +#define _SIBA_SIBAREG_H_ #define PCI_DEVICE_ID_BCM4401 0x4401 #define PCI_DEVICE_ID_BCM4401B0 0x4402 @@ -92,6 +92,8 @@ #define SIBA_CC_PMU_TABSEL 0x0620 #define SIBA_CC_PMU_DEPMSK 0x0624 #define SIBA_CC_PMU_UPDNTM 0x0628 +#define SIBA_CC_REGCTL_ADDR 0x0658 +#define SIBA_CC_REGCTL_DATA 0x065c #define SIBA_CC_PLLCTL_ADDR 0x0660 #define SIBA_CC_PLLCTL_DATA 0x0664 @@ -148,6 +150,7 @@ { 38400, 13, 45, 873813, }, { 40000, 14, 45, 0, }, \ } +#define SIBA_CC_PMU_4312_PA_REF 2 #define SIBA_CC_PMU_4325_BURST 1 #define SIBA_CC_PMU_4325_CLBURST 3 #define SIBA_CC_PMU_4325_LN 10 @@ -178,6 +181,7 @@ #define SIBA_CC_PMU_4328_BB_PLL_FILTBYP 17 #define SIBA_CC_PMU_4328_RF_PLL_FILTBYP 18 #define SIBA_CC_PMU_4328_BB_PLL_PU 19 +#define SIBA_CC_PMU_5354_PA_REF 8 #define SIBA_CC_PMU_5354_BB_PLL_PU 19 #define SIBA_CC_PMU_4325_RES_UPDOWN \ @@ -237,9 +241,9 @@ #define SIBA_REGWIN(x) \ (SIBA_ENUM_START + ((x) * SIBA_CORE_LEN)) -#define SIBA_CORE_LEN 0x00001000 /* Size of cfg per core */ -#define SIBA_CFG_END 0x00010000 /* Upper bound of cfg space */ -#define SIBA_MAX_CORES (SIBA_CFG_END/SIBA_CORE_LEN) /* #max cores */ +#define SIBA_CORE_LEN 0x00001000 /* Size of cfg per core */ +#define SIBA_CFG_END 0x00010000 /* Upper bound of cfg space */ +#define SIBA_MAX_CORES (SIBA_CFG_END/SIBA_CORE_LEN) /* #max cores */ #define SIBA_ENUM_START 0x18000000U #define SIBA_ENUM_END 0x18010000U @@ -372,6 +376,9 @@ #define SIBA_SPROM5_GPIOB_P3 0xff00 #define SIBA_SPROM8_BFLOW 0x1084 #define SIBA_SPROM8_BFHIGH 0x1086 +#define SIBA_SPROM8_BFL2LO 0x1088 +#define SIBA_SPROM8_BFL2HI 0x108a +#define SIBA_SPROM8_MAC_80211BG 0x108c #define SIBA_SPROM8_CCODE 0x1092 #define SIBA_SPROM8_ANTAVAIL 0x109c #define SIBA_SPROM8_ANTAVAIL_A 0xff00 @@ -379,21 +386,60 @@ #define SIBA_SPROM8_AGAIN01 0x109e #define SIBA_SPROM8_AGAIN0 0x00ff #define SIBA_SPROM8_AGAIN1 0xff00 -#define SIBA_SPROM8_AGAIN23 0x10a0 -#define SIBA_SPROM8_AGAIN2 0x00ff -#define SIBA_SPROM8_AGAIN3 0xff00 #define SIBA_SPROM8_GPIOA 0x1096 #define SIBA_SPROM8_GPIOA_P0 0x00ff #define SIBA_SPROM8_GPIOA_P1 0xff00 #define SIBA_SPROM8_GPIOB 0x1098 #define SIBA_SPROM8_GPIOB_P2 0x00ff #define SIBA_SPROM8_GPIOB_P3 0xff00 +#define SIBA_SPROM8_AGAIN23 0x10a0 +#define SIBA_SPROM8_AGAIN2 0x00ff +#define SIBA_SPROM8_AGAIN3 0xff00 +#define SIBA_SPROM8_RSSIPARM2G 0x10a4 +#define SIBA_SPROM8_RSSISMF2G 0x000f +#define SIBA_SPROM8_RSSISMC2G 0x00f0 +#define SIBA_SPROM8_RSSISAV2G 0x0700 /* BITMASK */ +#define SIBA_SPROM8_BXA2G 0x1800 /* BITMASK */ +#define SIBA_SPROM8_RSSIPARM5G 0x10a6 +#define SIBA_SPROM8_RSSISMF5G 0x000f +#define SIBA_SPROM8_RSSISMC5G 0x00f0 +#define SIBA_SPROM8_RSSISAV5G 0x0700 /* BITMASK */ +#define SIBA_SPROM8_BXA5G 0x1800 /* BITMASK */ +#define SIBA_SPROM8_TRI25G 0x10a8 +#define SIBA_SPROM8_TRI2G 0x00ff +#define SIBA_SPROM8_TRI5G 0xff00 +#define SIBA_SPROM8_TRI5GHL 0x10aa +#define SIBA_SPROM8_TRI5GL 0x00ff +#define SIBA_SPROM8_TRI5GH 0xff00 +#define SIBA_SPROM8_RXPO 0x10ac +#define SIBA_SPROM8_RXPO2G 0x00ff +#define SIBA_SPROM8_RXPO5G 0xff00 #define SIBA_SPROM8_MAXP_BG 0x10c0 #define SIBA_SPROM8_MAXP_BG_MASK 0x00ff #define SIBA_SPROM8_TSSI_BG 0xff00 +#define SIBA_SPROM8_PA0B0 0x10c2 +#define SIBA_SPROM8_PA0B1 0x10c4 +#define SIBA_SPROM8_PA0B2 0x10c6 #define SIBA_SPROM8_MAXP_A 0x10c8 #define SIBA_SPROM8_MAXP_A_MASK 0x00ff #define SIBA_SPROM8_TSSI_A 0xff00 +#define SIBA_SPROM8_MAXP_AHL 0x10ca +#define SIBA_SPROM8_MAXP_AH_MASK 0x00ff +#define SIBA_SPROM8_MAXP_AL_MASK 0xff00 +#define SIBA_SPROM8_PA1B0 0x10cc +#define SIBA_SPROM8_PA1B1 0x10ce +#define SIBA_SPROM8_PA1B2 0x10d0 +#define SIBA_SPROM8_PA1LOB0 0x10d2 +#define SIBA_SPROM8_PA1LOB1 0x10d4 +#define SIBA_SPROM8_PA1LOB2 0x10d6 +#define SIBA_SPROM8_PA1HIB0 0x10d8 +#define SIBA_SPROM8_PA1HIB1 0x10da +#define SIBA_SPROM8_PA1HIB2 0x10dc +#define SIBA_SPROM8_CCK2GPO 0x1140 +#define SIBA_SPROM8_OFDM2GPO 0x1142 +#define SIBA_SPROM8_OFDM5GPO 0x1146 +#define SIBA_SPROM8_OFDM5GLPO 0x114a +#define SIBA_SPROM8_OFDM5GHPO 0x114e #define SIBA_BOARDVENDOR_DELL 0x1028 #define SIBA_BOARDVENDOR_BCM 0x14e4 @@ -413,4 +459,6 @@ #define SIBA_PCICORE_SBTOPCI_BURST 0x00000008 #define SIBA_PCICORE_SBTOPCI_MRM 0x00000020 +#define SIBA_CHIPPACK_BCM4712S 1 /* Small 200pin 4712 */ + #endif /* _SIBA_SIBAREG_H_ */ |