diff options
Diffstat (limited to 'sys/dev/sdhci/sdhci.h')
-rw-r--r-- | sys/dev/sdhci/sdhci.h | 92 |
1 files changed, 75 insertions, 17 deletions
diff --git a/sys/dev/sdhci/sdhci.h b/sys/dev/sdhci/sdhci.h index 5c0253e..851e7e8 100644 --- a/sys/dev/sdhci/sdhci.h +++ b/sys/dev/sdhci/sdhci.h @@ -25,26 +25,33 @@ * $FreeBSD$ */ -/* - * PCI registers - */ +#ifndef __SDHCI_H__ +#define __SDHCI_H__ -#define PCI_SDHCI_IFPIO 0x00 -#define PCI_SDHCI_IFDMA 0x01 -#define PCI_SDHCI_IFVENDOR 0x02 +#define DMA_BLOCK_SIZE 4096 +#define DMA_BOUNDARY 0 /* DMA reload every 4K */ -#define PCI_SLOT_INFO 0x40 /* 8 bits */ -#define PCI_SLOT_INFO_SLOTS(x) (((x >> 4) & 7) + 1) -#define PCI_SLOT_INFO_FIRST_BAR(x) ((x) & 7) +/* Controller doesn't honor resets unless we touch the clock register */ +#define SDHCI_QUIRK_CLOCK_BEFORE_RESET (1<<0) +/* Controller really supports DMA */ +#define SDHCI_QUIRK_FORCE_DMA (1<<1) +/* Controller has unusable DMA engine */ +#define SDHCI_QUIRK_BROKEN_DMA (1<<2) +/* Controller doesn't like to be reset when there is no card inserted. */ +#define SDHCI_QUIRK_NO_CARD_NO_RESET (1<<3) +/* Controller has flaky internal state so reset it on each ios change */ +#define SDHCI_QUIRK_RESET_ON_IOS (1<<4) +/* Controller can only DMA chunk sizes that are a multiple of 32 bits */ +#define SDHCI_QUIRK_32BIT_DMA_SIZE (1<<5) +/* Controller needs to be reset after each request to stay stable */ +#define SDHCI_QUIRK_RESET_AFTER_REQUEST (1<<6) +/* Controller has an off-by-one issue with timeout value */ +#define SDHCI_QUIRK_INCR_TIMEOUT_CONTROL (1<<7) +/* Controller has broken read timings */ +#define SDHCI_QUIRK_BROKEN_TIMINGS (1<<8) +/* Controller needs lowered frequency */ +#define SDHCI_QUIRK_LOWER_FREQUENCY (1<<9) -/* - * RICOH specific PCI registers - */ -#define SDHC_PCI_MODE_KEY 0xf9 -#define SDHC_PCI_MODE 0x150 -#define SDHC_PCI_MODE_SD20 0x10 -#define SDHC_PCI_BASE_FREQ_KEY 0xfc -#define SDHC_PCI_BASE_FREQ 0xe1 /* * Controller registers @@ -197,3 +204,54 @@ #define SDHCI_VENDOR_VER_SHIFT 8 #define SDHCI_SPEC_VER_MASK 0x00FF #define SDHCI_SPEC_VER_SHIFT 0 + +struct sdhci_slot { + u_int quirks; /* Chip specific quirks */ + device_t bus; /* Bus device */ + device_t dev; /* Slot device */ + u_char num; /* Slot number */ + u_char opt; /* Slot options */ + u_char version; +#define SDHCI_HAVE_DMA 1 + uint32_t max_clk; /* Max possible freq */ + uint32_t timeout_clk; /* Timeout freq */ + bus_dma_tag_t dmatag; + bus_dmamap_t dmamap; + u_char *dmamem; + bus_addr_t paddr; /* DMA buffer address */ + struct task card_task; /* Card presence check task */ + struct callout card_callout; /* Card insert delay callout */ + struct mmc_host host; /* Host parameters */ + struct mmc_request *req; /* Current request */ + struct mmc_command *curcmd; /* Current command of current request */ + + uint32_t intmask; /* Current interrupt mask */ + uint32_t clock; /* Current clock freq. */ + size_t offset; /* Data buffer offset */ + uint8_t hostctrl; /* Current host control register */ + u_char power; /* Current power */ + u_char bus_busy; /* Bus busy status */ + u_char cmd_done; /* CMD command part done flag */ + u_char data_done; /* DAT command part done flag */ + u_char flags; /* Request execution flags */ +#define CMD_STARTED 1 +#define STOP_STARTED 2 +#define SDHCI_USE_DMA 4 /* Use DMA for this req. */ + struct mtx mtx; /* Slot mutex */ +}; + +int sdhci_generic_read_ivar(device_t bus, device_t child, int which, uintptr_t *result); +int sdhci_generic_write_ivar(device_t bus, device_t child, int which, uintptr_t value); +int sdhci_init_slot(device_t dev, struct sdhci_slot *slot, int num); +void sdhci_start_slot(struct sdhci_slot *slot); +int sdhci_cleanup_slot(struct sdhci_slot *slot); +int sdhci_generic_suspend(struct sdhci_slot *slot); +int sdhci_generic_resume(struct sdhci_slot *slot); +int sdhci_generic_update_ios(device_t brdev, device_t reqdev); +int sdhci_generic_request(device_t brdev, device_t reqdev, struct mmc_request *req); +int sdhci_generic_get_ro(device_t brdev, device_t reqdev); +int sdhci_generic_acquire_host(device_t brdev, device_t reqdev); +int sdhci_generic_release_host(device_t brdev, device_t reqdev); +void sdhci_generic_intr(struct sdhci_slot *slot); + +#endif /* __SDHCI_H__ */ |