diff options
Diffstat (limited to 'sys/dev/pccbb/pccbbreg.h')
| -rw-r--r-- | sys/dev/pccbb/pccbbreg.h | 74 |
1 files changed, 45 insertions, 29 deletions
diff --git a/sys/dev/pccbb/pccbbreg.h b/sys/dev/pccbb/pccbbreg.h index a8ca264..ae73fe1 100644 --- a/sys/dev/pccbb/pccbbreg.h +++ b/sys/dev/pccbb/pccbbreg.h @@ -132,44 +132,60 @@ # define CBBM_DEVCTRL_INT_PCI 0x02 /* ToPIC 95 ONLY */ -#define CBBR_TOPIC_SOCKETCTRL 0x90 -# define CBBM_TOPIC_SOCKETCTRL_SCR_IRQSEL 0x00000001 /* PCI intr */ +#define TOPIC95_SOCKETCTRL 0x90 +# define TOPIC95_SOCKETCTRL_SCR_IRQSEL 0x00000001 /* PCI intr */ /* ToPIC 97, 100 */ -#define CBBR_TOPIC_ZV_CONTROL 0x9c /* 1 byte */ -# define CBBM_TOPIC_ZVC_ENABLE 0x1 +#define TOPIC97_ZV_CONTROL 0x9c /* 1 byte */ +# define TOPIC97_ZVC_ENABLE 0x1 /* TOPIC 95+ */ -#define CBBR_TOPIC_SLOTCTRL 0xa0 /* 1 byte */ -# define CBBM_TOPIC_SLOTCTRL_SLOTON 0x80 -# define CBBM_TOPIC_SLOTCTRL_SLOTEN 0x40 -# define CBBM_TOPIC_SLOTCTRL_ID_LOCK 0x20 -# define CBBM_TOPIC_SLOTCTRL_ID_WP 0x10 -# define CBBM_TOPIC_SLOTCTRL_PORT_MASK 0x0c -# define CBBM_TOPIC_SLOTCTRL_PORT_SHIFT 2 -# define CBBM_TOPIC_SLOTCTRL_OSF_MASK 0x03 -# define CBBM_TOPIC_SLOTCTRL_OSF_SHIFT 0 +#define TOPIC_SLOTCTRL 0xa0 /* 1 byte */ +# define TOPIC_SLOTCTRL_SLOTON 0x80 +# define TOPIC_SLOTCTRL_SLOTEN 0x40 +# define TOPIC_SLOTCTRL_ID_LOCK 0x20 +# define TOPIC_SLOTCTRL_ID_WP 0x10 +# define TOPIC_SLOTCTRL_PORT_MASK 0x0c +# define TOPIC_SLOTCTRL_PORT_SHIFT 2 +# define TOPIC_SLOTCTRL_OSF_MASK 0x03 +# define TOPIC_SLOTCTRL_OSF_SHIFT 0 /* TOPIC 95+ */ -#define CBBR_TOPIC_INTCTRL 0xa1 /* 1 byte */ -# define CBBM_TOPIC_INTCTRL_INTB 0x20 -# define CBBM_TOPIC_INTCTRL_INTA 0x10 -# define CBBM_TOPIC_INTCTRL_INT_MASK 0x30 +#define TOPIC_INTCTRL 0xa1 /* 1 byte */ +# define TOPIC_INTCTRL_INTB 0x20 +# define TOPIC_INTCTRL_INTA 0x10 +# define TOPIC_INTCTRL_INT_MASK 0x30 /* The following bits may be for ToPIC 95 only */ -# define CBBM_TOPIC_INTCTRL_CLOCK_MASK 0x0c -# define CBBM_TOPIC_INTCTRL_CLOCK_2 0x08 /* PCI Clk/2 */ -# define CBBM_TOPIC_INTCTRL_CLOCK_1 0x04 /* PCI Clk */ -# define CBBM_TOPIC_INTCTRL_CLOCK_0 0x00 /* no clock */ +# define TOPIC95_INTCTRL_CLOCK_MASK 0x0c +# define TOPIC95_INTCTRL_CLOCK_2 0x08 /* PCI Clk/2 */ +# define TOPIC95_INTCTRL_CLOCK_1 0x04 /* PCI Clk */ +# define TOPIC95_INTCTRL_CLOCK_0 0x00 /* no clock */ /* ToPIC97, 100 defines the following bits */ -# define CBBM_TOPIC_INTCTRL_STSIRQNP 0x04 -# define CBBM_TOPIC_INTCTRL_IRQNP 0x02 -# define CBBM_TOPIC_INTCTRL_INTIRQSEL 0x01 +# define TOPIC97_INTCTRL_STSIRQNP 0x04 +# define TOPIC97_INTCTRL_IRQNP 0x02 +# define TOPIC97_INTCTRL_INTIRQSEL 0x01 /* TOPIC 95+ */ -#define CBBR_TOPIC_CDC 0xa3 /* 1 byte */ -# define CBBM_TOPIC_CDC_CARDBUS 0x80 -# define CBBM_TOPIC_CDC_VS1 0x04 -# define CBBM_TOPIC_CDC_VS2 0x02 -# define CBBM_TOPIC_CDC_SWDETECT 0x01 +#define TOPIC_CDC 0xa3 /* 1 byte */ +# define TOPIC_CDC_CARDBUS 0x80 +# define TOPIC_CDC_VS1 0x04 +# define TOPIC_CDC_VS2 0x02 +# define TOPIC_CDC_SWDETECT 0x01 + +/* TOPIC97+? */ +#define TOPIC_REG_CTRL 0xa4 /* 4 bytes */ +# define TOPIC_REG_CTRL_RESUME_RESET 0x80000000 +# define TOPIC_REG_CTRL_REMOVE_RESET 0x40000000 +# define TOPIC97_REG_CTRL_CLKRUN_ENA 0x20000000 +# define TOPIC97_REG_CTRL_TESTMODE 0x10000000 +# define TOPIC97_REG_CTRL_IOPLUP 0x08000000 +# define TOPIC_REG_CTRL_BUFOFF_PWROFF 0x02000000 +# define TOPIC_REG_CTRL_BUFOFF_SIGOFF 0x01000000 +# define TOPIC97_REG_CTRL_CB_DEV_MASK 0x0000f800 +# define TOPIC97_REG_CTRL_CB_DEV_SHIFT 11 +# define TOPIC97_REG_CTRL_RI_DISABLE 0x00000004 +# define TOPIC97_REG_CTRL_CAUDIO_OFF 0x00000002 +# define TOPIC_REG_CTRL_CAUDIO_INVERT 0x00000001 + /* Socket definitions */ #define CBB_SOCKET_EVENT_CSTS 0x01 /* Card Status Change */ |
