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-rw-r--r--sys/dev/mii/ciphyreg.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/sys/dev/mii/ciphyreg.h b/sys/dev/mii/ciphyreg.h
index 8c0a8a4..3c5c5de 100644
--- a/sys/dev/mii/ciphyreg.h
+++ b/sys/dev/mii/ciphyreg.h
@@ -251,6 +251,16 @@
/* Extended PHY control register #1 */
#define CIPHY_MII_ECTL1 0x17
#define CIPHY_ECTL1_ACTIPHY 0x0020 /* Enable ActiPHY power saving */
+#define CIPHY_ECTL1_IOVOL 0x0e00 /* MAC interface and I/O voltage select */
+#define CIPHY_ECTL1_INTSEL 0xf000 /* select MAC interface */
+
+#define CIPHY_IOVOL_3300MV 0x0000 /* 3.3V for I/O pins */
+#define CIPHY_IOVOL_2500MV 0x0200 /* 2.5V for I/O pins */
+
+#define CIPHY_INTSEL_GMII 0x0000 /* GMII/MII */
+#define CIPHY_INTSEL_RGMII 0x1000
+#define CIPHY_INTSEL_TBI 0x2000
+#define CIPHY_INTSEL_RTBI 0x3000
/* Extended PHY control register #2 */
#define CIPHY_MII_ECTL2 0x18
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