diff options
Diffstat (limited to 'sys/dev/hwpmc')
| -rw-r--r-- | sys/dev/hwpmc/hwpmc_core.c | 124 | ||||
| -rw-r--r-- | sys/dev/hwpmc/hwpmc_intel.c | 6 | ||||
| -rw-r--r-- | sys/dev/hwpmc/pmc_events.h | 109 |
3 files changed, 202 insertions, 37 deletions
diff --git a/sys/dev/hwpmc/hwpmc_core.c b/sys/dev/hwpmc/hwpmc_core.c index d4fae5b..111f3b3 100644 --- a/sys/dev/hwpmc/hwpmc_core.c +++ b/sys/dev/hwpmc/hwpmc_core.c @@ -245,7 +245,8 @@ iaf_allocate_pmc(int cpu, int ri, struct pmc *pm, validflags = IAF_MASK; - if (core_cputype != PMC_CPU_INTEL_ATOM) + if (core_cputype != PMC_CPU_INTEL_ATOM && + core_cputype != PMC_CPU_INTEL_ATOM_SILVERMONT) validflags &= ~IAF_ANY; if ((flags & ~validflags) != 0) @@ -434,7 +435,8 @@ iaf_stop_pmc(int cpu, int ri) fc = (IAF_MASK << (ri * 4)); - if (core_cputype != PMC_CPU_INTEL_ATOM) + if (core_cputype != PMC_CPU_INTEL_ATOM && + core_cputype != PMC_CPU_INTEL_ATOM_SILVERMONT) fc &= ~IAF_ANY; iafc->pc_iafctrl &= ~fc; @@ -566,7 +568,8 @@ struct iap_event_descr { #define IAP_F_SBX (1 << 8) /* CPU: Sandy Bridge Xeon */ #define IAP_F_IBX (1 << 9) /* CPU: Ivy Bridge Xeon */ #define IAP_F_HW (1 << 10) /* CPU: Haswell */ -#define IAP_F_FM (1 << 11) /* Fixed mask */ +#define IAP_F_CAS (1 << 11) /* CPU: Atom Silvermont */ +#define IAP_F_FM (1 << 12) /* Fixed mask */ #define IAP_F_ALLCPUSCORE2 \ (IAP_F_CC | IAP_F_CC2 | IAP_F_CC2E | IAP_F_CA) @@ -607,28 +610,38 @@ static struct iap_event_descr iap_events[] = { IAPDESCR(03H_00H, 0x03, 0x00, IAP_F_FM | IAP_F_CC), IAPDESCR(03H_01H, 0x03, 0x01, IAP_F_FM | IAP_F_I7O | IAP_F_SB | - IAP_F_SBX), + IAP_F_SBX | IAP_F_CAS), IAPDESCR(03H_02H, 0x03, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), - IAPDESCR(03H_04H, 0x03, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7O), + IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | + IAP_F_CAS), + IAPDESCR(03H_04H, 0x03, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7O | + IAP_F_CAS), IAPDESCR(03H_08H, 0x03, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_SB | - IAP_F_SBX), + IAP_F_SBX | IAP_F_CAS), IAPDESCR(03H_10H, 0x03, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_SB | - IAP_F_SBX), - IAPDESCR(03H_20H, 0x03, 0x20, IAP_F_FM | IAP_F_CA | IAP_F_CC2), - - IAPDESCR(04H_00H, 0x04, 0x00, IAP_F_FM | IAP_F_CC), - IAPDESCR(04H_01H, 0x04, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7O), - IAPDESCR(04H_02H, 0x04, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2), + IAP_F_SBX | IAP_F_CAS), + IAPDESCR(03H_20H, 0x03, 0x20, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_CAS), + IAPDESCR(03H_40H, 0x03, 0x40, IAP_F_CAS), + IAPDESCR(03H_80H, 0x03, 0x80, IAP_F_CAS), + + IAPDESCR(04H_00H, 0x04, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CAS), + IAPDESCR(04H_01H, 0x04, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7O | + IAP_F_CAS), + IAPDESCR(04H_02H, 0x04, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_CAS), + IAPDESCR(04H_04H, 0x04, 0x04, IAP_F_CAS), IAPDESCR(04H_07H, 0x04, 0x07, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(04H_08H, 0x04, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2), + IAPDESCR(04H_08H, 0x04, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_CAS), + IAPDESCR(04H_10H, 0x04, 0x10, IAP_F_CAS), + IAPDESCR(04H_20H, 0x04, 0x20, IAP_F_CAS), + IAPDESCR(04H_40H, 0x04, 0x40, IAP_F_CAS), + IAPDESCR(04H_80H, 0x04, 0x80, IAP_F_CAS), IAPDESCR(05H_00H, 0x05, 0x00, IAP_F_FM | IAP_F_CC), IAPDESCR(05H_01H, 0x05, 0x01, IAP_F_FM | IAP_F_I7O | IAP_F_SB | IAP_F_IB | - IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_CAS), IAPDESCR(05H_02H, 0x05, 0x02, IAP_F_FM | IAP_F_I7O | IAP_F_WM | IAP_F_SB | - IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), - IAPDESCR(05H_03H, 0x05, 0x03, IAP_F_FM | IAP_F_I7O), + IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_CAS), + IAPDESCR(05H_03H, 0x05, 0x03, IAP_F_FM | IAP_F_I7O | IAP_F_CAS), IAPDESCR(06H_00H, 0x06, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2 | IAP_F_CC2E | IAP_F_CA), @@ -864,12 +877,16 @@ static struct iap_event_descr iap_events[] = { IAPDESCR(2EH_01H, 0x2E, 0x01, IAP_F_FM | IAP_F_WM), IAPDESCR(2EH_02H, 0x2E, 0x02, IAP_F_FM | IAP_F_WM), IAPDESCR(2EH_41H, 0x2E, 0x41, IAP_F_FM | IAP_F_ALLCPUSCORE2 | IAP_F_I7 | - IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | + IAP_F_CAS), IAPDESCR(2EH_4FH, 0x2E, 0x4F, IAP_F_FM | IAP_F_ALLCPUSCORE2 | IAP_F_I7 | - IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | + IAP_F_CAS), IAPDESCR(30H, 0x30, IAP_M_CORE | IAP_M_MESI | IAP_M_PREFETCH, IAP_F_ALLCPUSCORE2), + IAPDESCR(30H_00H, 0x30, 0x00, IAP_F_CAS), + IAPDESCR(31H_00H, 0x31, 0x00, IAP_F_CAS), IAPDESCR(32H, 0x32, IAP_M_CORE | IAP_M_MESI | IAP_M_PREFETCH, IAP_F_CC), IAPDESCR(32H, 0x32, IAP_M_CORE, IAP_F_CA | IAP_F_CC2), @@ -880,10 +897,10 @@ static struct iap_event_descr iap_events[] = { IAPDESCR(3CH_00H, 0x3C, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2 | IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | - IAP_F_HW), + IAP_F_HW | IAP_F_CAS), IAPDESCR(3CH_01H, 0x3C, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 | IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | - IAP_F_HW), + IAP_F_HW | IAP_F_CAS), IAPDESCR(3CH_02H, 0x3C, 0x02, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(3DH_01H, 0x3D, 0x01, IAP_F_FM | IAP_F_I7O), @@ -1100,11 +1117,12 @@ static struct iap_event_descr iap_events[] = { IAPDESCR(7FH, 0x7F, IAP_M_CORE, IAP_F_CA | IAP_F_CC2), IAPDESCR(80H_00H, 0x80, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), - IAPDESCR(80H_01H, 0x80, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(80H_01H, 0x80, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_CAS), IAPDESCR(80H_02H, 0x80, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_I7 | - IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | + IAP_F_CAS), IAPDESCR(80H_03H, 0x80, 0x03, IAP_F_FM | IAP_F_CA | IAP_F_I7 | - IAP_F_WM), + IAP_F_WM | IAP_F_CAS), IAPDESCR(80H_04H, 0x80, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(81H_00H, 0x81, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), @@ -1332,9 +1350,11 @@ static struct iap_event_descr iap_events[] = { IAPDESCR(B4H_04H, 0xB4, 0x04, IAP_F_FM | IAP_F_WM), IAPDESCR(B6H_01H, 0xB6, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_SBX), + IAPDESCR(B6H_04H, 0xB6, 0x04, IAP_F_CAS), IAPDESCR(B7H_01H, 0xB7, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_CAS), + IAPDESCR(B7H_02H, 0xB7, 0x02, IAP_F_CAS), IAPDESCR(B8H_01H, 0xB8, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(B8H_02H, 0xB8, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), @@ -1363,7 +1383,8 @@ static struct iap_event_descr iap_events[] = { IAPDESCR(BFH_05H, 0xBF, 0x05, IAP_F_FM | IAP_F_SB | IAP_F_SBX), IAPDESCR(C0H_00H, 0xC0, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2 | - IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | + IAP_F_CAS), IAPDESCR(C0H_01H, 0xC0, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), @@ -1388,7 +1409,7 @@ static struct iap_event_descr iap_events[] = { IAPDESCR(C2H_00H, 0xC2, 0x00, IAP_F_FM | IAP_F_CC), IAPDESCR(C2H_01H, 0xC2, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | - IAP_F_IBX | IAP_F_HW), + IAP_F_IBX | IAP_F_HW | IAP_F_CAS), IAPDESCR(C2H_02H, 0xC2, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), @@ -1397,23 +1418,24 @@ static struct iap_event_descr iap_events[] = { IAPDESCR(C2H_07H, 0xC2, 0x07, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(C2H_08H, 0xC2, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(C2H_0FH, 0xC2, 0x0F, IAP_F_FM | IAP_F_CC2), - IAPDESCR(C2H_10H, 0xC2, 0x10, IAP_F_FM | IAP_F_CA), + IAPDESCR(C2H_10H, 0xC2, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CAS), IAPDESCR(C3H_00H, 0xC3, 0x00, IAP_F_FM | IAP_F_CC), IAPDESCR(C3H_01H, 0xC3, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM), + IAP_F_I7 | IAP_F_WM | IAP_F_CAS), IAPDESCR(C3H_02H, 0xC3, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_CAS), IAPDESCR(C3H_04H, 0xC3, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | - IAP_F_IBX | IAP_F_HW), + IAP_F_IBX | IAP_F_HW | IAP_F_CAS), + IAPDESCR(C3H_08H, 0xC3, 0x08, IAP_F_CAS), IAPDESCR(C3H_10H, 0xC3, 0x10, IAP_F_FM | IAP_F_I7O), IAPDESCR(C3H_20H, 0xC3, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(C4H_00H, 0xC4, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2 | IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | - IAP_F_IBX | IAP_F_HW), + IAP_F_IBX | IAP_F_HW | IAP_F_CAS), IAPDESCR(C4H_01H, 0xC4, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), @@ -1433,10 +1455,18 @@ static struct iap_event_descr iap_events[] = { IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(C4H_40H, 0xC4, 0x40, IAP_F_FM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(C4H_7EH, 0xC4, 0x7E, IAP_F_CAS), + IAPDESCR(C4H_BFH, 0xC4, 0xBF, IAP_F_CAS), + IAPDESCR(C4H_EBH, 0xC4, 0xEB, IAP_F_CAS), + IAPDESCR(C4H_F7H, 0xC4, 0xF7, IAP_F_CAS), + IAPDESCR(C4H_F9H, 0xC4, 0xF9, IAP_F_CAS), + IAPDESCR(C4H_FBH, 0xC4, 0xFB, IAP_F_CAS), + IAPDESCR(C4H_FDH, 0xC4, 0xFD, IAP_F_CAS), + IAPDESCR(C4H_FEH, 0xC4, 0xFE, IAP_F_CAS), IAPDESCR(C5H_00H, 0xC5, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2 | IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | - IAP_F_IBX | IAP_F_HW), + IAP_F_IBX | IAP_F_HW | IAP_F_CAS), IAPDESCR(C5H_01H, 0xC5, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(C5H_02H, 0xC5, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | @@ -1447,6 +1477,14 @@ static struct iap_event_descr iap_events[] = { IAP_F_SBX | IAP_F_IBX), IAPDESCR(C5H_20H, 0xC5, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(C5H_7EH, 0xC5, 0x7E, IAP_F_CAS), + IAPDESCR(C5H_BFH, 0xC5, 0xBF, IAP_F_CAS), + IAPDESCR(C5H_EBH, 0xC5, 0xEB, IAP_F_CAS), + IAPDESCR(C5H_F7H, 0xC5, 0xF7, IAP_F_CAS), + IAPDESCR(C5H_F9H, 0xC5, 0xF9, IAP_F_CAS), + IAPDESCR(C5H_FBH, 0xC5, 0xFB, IAP_F_CAS), + IAPDESCR(C5H_FDH, 0xC5, 0xFD, IAP_F_CAS), + IAPDESCR(C5H_FEH, 0xC5, 0xFE, IAP_F_CAS), IAPDESCR(C6H_00H, 0xC6, 0x00, IAP_F_FM | IAP_F_CC), IAPDESCR(C6H_01H, 0xC6, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2), @@ -1471,7 +1509,7 @@ static struct iap_event_descr iap_events[] = { IAPDESCR(C9H_00H, 0xC9, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(CAH_00H, 0xCA, 0x00, IAP_F_FM | IAP_F_CC), - IAPDESCR(CAH_01H, 0xCA, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2), + IAPDESCR(CAH_01H, 0xCA, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_CAS), IAPDESCR(CAH_02H, 0xCA, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(CAH_04H, 0xCA, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | @@ -1482,9 +1520,12 @@ static struct iap_event_descr iap_events[] = { IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(CAH_1EH, 0xCA, 0x1E, IAP_F_FM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(CAH_20H, 0xCA, 0x20, IAP_F_CAS), + IAPDESCR(CAH_3FH, 0xCA, 0x3F, IAP_F_CAS), + IAPDESCR(CAH_50H, 0xCA, 0x50, IAP_F_CAS), IAPDESCR(CBH_01H, 0xCB, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM), + IAP_F_I7 | IAP_F_WM | IAP_F_CAS), IAPDESCR(CBH_02H, 0xCB, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7 | IAP_F_WM), IAPDESCR(CBH_04H, 0xCB, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | @@ -1493,6 +1534,7 @@ static struct iap_event_descr iap_events[] = { IAP_F_I7 | IAP_F_WM), IAPDESCR(CBH_10H, 0xCB, 0x10, IAP_F_FM | IAP_F_CC2 | IAP_F_I7 | IAP_F_WM), + IAPDESCR(CBH_1FH, 0xCB, 0x1F, IAP_F_CAS), IAPDESCR(CBH_40H, 0xCB, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(CBH_80H, 0xCB, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM), @@ -1507,7 +1549,7 @@ static struct iap_event_descr iap_events[] = { IAPDESCR(CDH_00H, 0xCD, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(CDH_01H, 0xCD, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_IB | - IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAP_F_SBX | IAP_F_IBX | IAP_F_HW | IAP_F_CAS), IAPDESCR(CDH_02H, 0xCD, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX), @@ -1622,10 +1664,14 @@ static struct iap_event_descr iap_events[] = { IAPDESCR(E6H_00H, 0xE6, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2), IAPDESCR(E6H_01H, 0xE6, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7 | - IAP_F_WM | IAP_F_SBX), + IAP_F_WM | IAP_F_SBX | IAP_F_CAS), IAPDESCR(E6H_02H, 0xE6, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(E6H_08H, 0xE6, 0x08, IAP_F_CAS), + IAPDESCR(E6H_10H, 0xE6, 0x10, IAP_F_CAS), IAPDESCR(E6H_1FH, 0xE6, 0x1F, IAP_F_FM | IAP_F_IBX | IAP_F_HW), + IAPDESCR(E7H_01H, 0xE7, 0x01, IAP_F_CAS), + IAPDESCR(E8H_01H, 0xE8, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(E8H_02H, 0xE8, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(E8H_03H, 0xE8, 0x03, IAP_F_FM | IAP_F_I7O), @@ -2005,6 +2051,9 @@ iap_allocate_pmc(int cpu, int ri, struct pmc *pm, case PMC_CPU_INTEL_ATOM: cpuflag = IAP_F_CA; break; + case PMC_CPU_INTEL_ATOM_SILVERMONT: + cpuflag = IAP_F_CAS; + break; case PMC_CPU_INTEL_CORE: cpuflag = IAP_F_CC; break; @@ -2119,6 +2168,7 @@ iap_allocate_pmc(int cpu, int ri, struct pmc *pm, * Only Atom and SandyBridge CPUs support the 'ANY' qualifier. */ if (core_cputype == PMC_CPU_INTEL_ATOM || + core_cputype == PMC_CPU_INTEL_ATOM_SILVERMONT || core_cputype == PMC_CPU_INTEL_SANDYBRIDGE || core_cputype == PMC_CPU_INTEL_SANDYBRIDGE_XEON) evsel |= (config & IAP_ANY); diff --git a/sys/dev/hwpmc/hwpmc_intel.c b/sys/dev/hwpmc/hwpmc_intel.c index 026196c..4ce51c7 100644 --- a/sys/dev/hwpmc/hwpmc_intel.c +++ b/sys/dev/hwpmc/hwpmc_intel.c @@ -168,6 +168,10 @@ pmc_intel_initialize(void) cputype = PMC_CPU_INTEL_HASWELL; nclasses = 5; break; + case 0x4D: /* Per Intel document 330061-001 01/2014. */ + cputype = PMC_CPU_INTEL_ATOM_SILVERMONT; + nclasses = 3; + break; } break; #if defined(__i386__) || defined(__amd64__) @@ -200,6 +204,7 @@ pmc_intel_initialize(void) * Intel Core, Core 2 and Atom processors. */ case PMC_CPU_INTEL_ATOM: + case PMC_CPU_INTEL_ATOM_SILVERMONT: case PMC_CPU_INTEL_CORE: case PMC_CPU_INTEL_CORE2: case PMC_CPU_INTEL_CORE2EXTREME: @@ -288,6 +293,7 @@ pmc_intel_finalize(struct pmc_mdep *md) switch (md->pmd_cputype) { #if defined(__i386__) || defined(__amd64__) case PMC_CPU_INTEL_ATOM: + case PMC_CPU_INTEL_ATOM_SILVERMONT: case PMC_CPU_INTEL_CORE: case PMC_CPU_INTEL_CORE2: case PMC_CPU_INTEL_CORE2EXTREME: diff --git a/sys/dev/hwpmc/pmc_events.h b/sys/dev/hwpmc/pmc_events.h index a17b132..0caf2dd 100644 --- a/sys/dev/hwpmc/pmc_events.h +++ b/sys/dev/hwpmc/pmc_events.h @@ -484,11 +484,18 @@ __PMC_EV(IAP, EVENT_03H_04H) \ __PMC_EV(IAP, EVENT_03H_08H) \ __PMC_EV(IAP, EVENT_03H_10H) \ __PMC_EV(IAP, EVENT_03H_20H) \ +__PMC_EV(IAP, EVENT_03H_40H) \ +__PMC_EV(IAP, EVENT_03H_80H) \ __PMC_EV(IAP, EVENT_04H_00H) \ __PMC_EV(IAP, EVENT_04H_01H) \ __PMC_EV(IAP, EVENT_04H_02H) \ +__PMC_EV(IAP, EVENT_04H_04H) \ __PMC_EV(IAP, EVENT_04H_07H) \ __PMC_EV(IAP, EVENT_04H_08H) \ +__PMC_EV(IAP, EVENT_04H_10H) \ +__PMC_EV(IAP, EVENT_04H_20H) \ +__PMC_EV(IAP, EVENT_04H_40H) \ +__PMC_EV(IAP, EVENT_04H_80H) \ __PMC_EV(IAP, EVENT_05H_00H) \ __PMC_EV(IAP, EVENT_05H_01H) \ __PMC_EV(IAP, EVENT_05H_02H) \ @@ -671,6 +678,8 @@ __PMC_EV(IAP, EVENT_2EH_02H) \ __PMC_EV(IAP, EVENT_2EH_41H) \ __PMC_EV(IAP, EVENT_2EH_4FH) \ __PMC_EV(IAP, EVENT_30H) \ +__PMC_EV(IAP, EVENT_30H_00H) \ +__PMC_EV(IAP, EVENT_31H_00H) \ __PMC_EV(IAP, EVENT_32H) \ __PMC_EV(IAP, EVENT_3AH) \ __PMC_EV(IAP, EVENT_3AH_00H) \ @@ -951,7 +960,9 @@ __PMC_EV(IAP, EVENT_B4H_01H) \ __PMC_EV(IAP, EVENT_B4H_02H) \ __PMC_EV(IAP, EVENT_B4H_04H) \ __PMC_EV(IAP, EVENT_B6H_01H) \ +__PMC_EV(IAP, EVENT_B6H_04H) \ __PMC_EV(IAP, EVENT_B7H_01H) \ +__PMC_EV(IAP, EVENT_B7H_02H) \ __PMC_EV(IAP, EVENT_B8H_01H) \ __PMC_EV(IAP, EVENT_B8H_02H) \ __PMC_EV(IAP, EVENT_B8H_04H) \ @@ -994,6 +1005,7 @@ __PMC_EV(IAP, EVENT_C3H_00H) \ __PMC_EV(IAP, EVENT_C3H_01H) \ __PMC_EV(IAP, EVENT_C3H_02H) \ __PMC_EV(IAP, EVENT_C3H_04H) \ +__PMC_EV(IAP, EVENT_C3H_08H) \ __PMC_EV(IAP, EVENT_C3H_10H) \ __PMC_EV(IAP, EVENT_C3H_20H) \ __PMC_EV(IAP, EVENT_C4H_00H) \ @@ -1006,12 +1018,28 @@ __PMC_EV(IAP, EVENT_C4H_0FH) \ __PMC_EV(IAP, EVENT_C4H_10H) \ __PMC_EV(IAP, EVENT_C4H_20H) \ __PMC_EV(IAP, EVENT_C4H_40H) \ +__PMC_EV(IAP, EVENT_C4H_7EH) \ +__PMC_EV(IAP, EVENT_C4H_BFH) \ +__PMC_EV(IAP, EVENT_C4H_EBH) \ +__PMC_EV(IAP, EVENT_C4H_F7H) \ +__PMC_EV(IAP, EVENT_C4H_F9H) \ +__PMC_EV(IAP, EVENT_C4H_FBH) \ +__PMC_EV(IAP, EVENT_C4H_FDH) \ +__PMC_EV(IAP, EVENT_C4H_FEH) \ __PMC_EV(IAP, EVENT_C5H_00H) \ __PMC_EV(IAP, EVENT_C5H_01H) \ __PMC_EV(IAP, EVENT_C5H_02H) \ __PMC_EV(IAP, EVENT_C5H_04H) \ __PMC_EV(IAP, EVENT_C5H_10H) \ __PMC_EV(IAP, EVENT_C5H_20H) \ +__PMC_EV(IAP, EVENT_C5H_7EH) \ +__PMC_EV(IAP, EVENT_C5H_BFH) \ +__PMC_EV(IAP, EVENT_C5H_EBH) \ +__PMC_EV(IAP, EVENT_C5H_F7H) \ +__PMC_EV(IAP, EVENT_C5H_F9H) \ +__PMC_EV(IAP, EVENT_C5H_FBH) \ +__PMC_EV(IAP, EVENT_C5H_FDH) \ +__PMC_EV(IAP, EVENT_C5H_FEH) \ __PMC_EV(IAP, EVENT_C6H_00H) \ __PMC_EV(IAP, EVENT_C6H_01H) \ __PMC_EV(IAP, EVENT_C6H_02H) \ @@ -1031,12 +1059,16 @@ __PMC_EV(IAP, EVENT_CAH_02H) \ __PMC_EV(IAP, EVENT_CAH_04H) \ __PMC_EV(IAP, EVENT_CAH_08H) \ __PMC_EV(IAP, EVENT_CAH_10H) \ +__PMC_EV(IAP, EVENT_CAH_20H) \ __PMC_EV(IAP, EVENT_CAH_1EH) \ +__PMC_EV(IAP, EVENT_CAH_3FH) \ +__PMC_EV(IAP, EVENT_CAH_50H) \ __PMC_EV(IAP, EVENT_CBH_01H) \ __PMC_EV(IAP, EVENT_CBH_02H) \ __PMC_EV(IAP, EVENT_CBH_04H) \ __PMC_EV(IAP, EVENT_CBH_08H) \ __PMC_EV(IAP, EVENT_CBH_10H) \ +__PMC_EV(IAP, EVENT_CBH_1FH) \ __PMC_EV(IAP, EVENT_CBH_40H) \ __PMC_EV(IAP, EVENT_CBH_80H) \ __PMC_EV(IAP, EVENT_CCH_00H) \ @@ -1120,7 +1152,10 @@ __PMC_EV(IAP, EVENT_E5H_01H) \ __PMC_EV(IAP, EVENT_E6H_00H) \ __PMC_EV(IAP, EVENT_E6H_01H) \ __PMC_EV(IAP, EVENT_E6H_02H) \ +__PMC_EV(IAP, EVENT_E6H_08H) \ +__PMC_EV(IAP, EVENT_E6H_10H) \ __PMC_EV(IAP, EVENT_E6H_1FH) \ +__PMC_EV(IAP, EVENT_E7H_01H) \ __PMC_EV(IAP, EVENT_E8H_01H) \ __PMC_EV(IAP, EVENT_E8H_02H) \ __PMC_EV(IAP, EVENT_E8H_03H) \ @@ -1428,6 +1463,80 @@ __PMC_EV_ALIAS("X87_OPS_RETIRED.ANY", IAP_EVENT_C1H_FEH) \ __PMC_EV_ALIAS("X87_OPS_RETIRED.FXCH", IAP_EVENT_C1H_01H) /* + * Aliases for Atom Silvermont PMCs. + */ +#define __PMC_EV_ALIAS_ATOM_SILVERMONT() \ +__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ +__PMC_EV_ALIAS("REHABQ.LD_BLOCK_ST_FORWARD", IAP_EVENT_03H_01H) \ +__PMC_EV_ALIAS("REHABQ.LD_BLOCK_STD_NOTREADY", IAP_EVENT_03H_02H) \ +__PMC_EV_ALIAS("REHABQ.ST_SPLITS", IAP_EVENT_03H_04H) \ +__PMC_EV_ALIAS("REHABQ.LD_SPLITS", IAP_EVENT_03H_08H) \ +__PMC_EV_ALIAS("REHABQ.LOCK", IAP_EVENT_03H_10H) \ +__PMC_EV_ALIAS("REHABQ.STA_FULL", IAP_EVENT_03H_20H) \ +__PMC_EV_ALIAS("REHABQ.ANY_LD", IAP_EVENT_03H_40H) \ +__PMC_EV_ALIAS("REHABQ.ANY_ST", IAP_EVENT_03H_80H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.L1_MISS_LOADS", IAP_EVENT_04H_01H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.L2_HIT_LOADS", IAP_EVENT_04H_02H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.L2_MISS_LOADS", IAP_EVENT_04H_04H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.DTLB_MISS_LOADS", IAP_EVENT_04H_08H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.UTLB_MISS", IAP_EVENT_04H_10H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.HITM", IAP_EVENT_04H_20H) \ +__PMC_EV_ALIAS("MEM_UOPS_RETIRED.ALL_LOADS", IAP_EVENT_04H_40H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.ALL_STORES", IAP_EVENT_04H_80H) \ +__PMC_EV_ALIAS("PAGE_WALKS.D_SIDE_CYCLES", IAP_EVENT_05H_01H) \ +__PMC_EV_ALIAS("PAGE_WALKS.I_SIDE_CYCLES", IAP_EVENT_05H_02H) \ +__PMC_EV_ALIAS("PAGE_WALKS.WALKS", IAP_EVENT_05H_03H) \ +__PMC_EV_ALIAS("LONGEST_LAT_CACHE.MISS", IAP_EVENT_2EH_41H) \ +__PMC_EV_ALIAS("LONGEST_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_4FH) \ +__PMC_EV_ALIAS("L2_REJECT_XQ.ALL", IAP_EVENT_30H_00H) \ +__PMC_EV_ALIAS("CORE_REJECT_L2Q.ALL", IAP_EVENT_31H_00H) \ +__PMC_EV_ALIAS("CPU_CLK_UNHALTED.CORE_P", IAP_EVENT_3CH_00H) \ +__PMC_EV_ALIAS("CPU_CLK_UNHALTED.REF_P", IAP_EVENT_3CH_01H) \ +__PMC_EV_ALIAS("ICACHE.HIT", IAP_EVENT_80H_01H) \ +__PMC_EV_ALIAS("ICACHE.MISSES", IAP_EVENT_80H_02H) \ +__PMC_EV_ALIAS("ICACHE.ACCESSES", IAP_EVENT_80H_03H) \ +__PMC_EV_ALIAS("NIP_STALL.ICACHE_MISS", IAP_EVENT_B6H_04H) \ +__PMC_EV_ALIAS("OFFCORE_RESPONSE_0", IAP_EVENT_B7H_01H) \ +__PMC_EV_ALIAS("OFFCORE_RESPONSE_1", IAP_EVENT_B7H_02H) \ +__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_00H) \ +__PMC_EV_ALIAS("UOPS_RETIRED.MS", IAP_EVENT_C2H_01H) \ +__PMC_EV_ALIAS("UOPS_RETIRED.ALL", IAP_EVENT_C2H_10H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_01H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.MEMORY_ORDERING", IAP_EVENT_C3H_02H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.FP_ASSIST", IAP_EVENT_C3H_04H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.ALL", IAP_EVENT_C3H_08H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_00H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.JCC", IAP_EVENT_C4H_7EH) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.FAR_BRANCH", IAP_EVENT_C4H_BFH) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NON_RETURN_IND", IAP_EVENT_C4H_EBH) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.RETURN", IAP_EVENT_C4H_F7H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.CALL", IAP_EVENT_C4H_F9H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.IND_CALL", IAP_EVENT_C4H_FBH) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.REL_CALL", IAP_EVENT_C4H_FDH) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.TAKEN_JCC", IAP_EVENT_C4H_FEH) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_00H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.JCC", IAP_EVENT_C5H_7EH) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.FAR", IAP_EVENT_C5H_BFH) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.NON_RETURN_IND", IAP_EVENT_C5H_EBH) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.RETURN", IAP_EVENT_C5H_F7H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.CALL", IAP_EVENT_C5H_F9H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.IND_CALL", IAP_EVENT_C5H_FBH) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.REL_CALL", IAP_EVENT_C5H_FDH) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.TAKEN_JCC", IAP_EVENT_C5H_FEH) \ +__PMC_EV_ALIAS("NO_ALLOC_CYCLES.ROB_FULL", IAP_EVENT_CAH_01H) \ +__PMC_EV_ALIAS("NO_ALLOC_CYCLES.RAT_STALL", IAP_EVENT_CAH_20H) \ +__PMC_EV_ALIAS("NO_ALLOC_CYCLES.ALL", IAP_EVENT_CAH_3FH) \ +__PMC_EV_ALIAS("NO_ALLOC_CYCLES.NOT_DELIVERED", IAP_EVENT_CAH_50H) \ +__PMC_EV_ALIAS("RS_FULL_STALL.MEC", IAP_EVENT_CBH_01H) \ +__PMC_EV_ALIAS("RS_FULL_STALL.ALL", IAP_EVENT_CBH_1FH) \ +__PMC_EV_ALIAS("CYCLES_DIV_BUSY.ANY", IAP_EVENT_CDH_01H) \ +__PMC_EV_ALIAS("BACLEARS.ALL", IAP_EVENT_E6H_01H) \ +__PMC_EV_ALIAS("BACLEARS.RETURN", IAP_EVENT_E6H_08H) \ +__PMC_EV_ALIAS("BACLEARS.COND", IAP_EVENT_E6H_10H) \ +__PMC_EV_ALIAS("MS_DECODED.MS_ENTRY", IAP_EVENT_E7H_01H) + + +/* * Aliases for Core PMC events. */ #define __PMC_EV_ALIAS_CORE() \ |
