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-rw-r--r--sys/dev/hwpmc/pmc_events.h107
1 files changed, 105 insertions, 2 deletions
diff --git a/sys/dev/hwpmc/pmc_events.h b/sys/dev/hwpmc/pmc_events.h
index f43e128..628a693 100644
--- a/sys/dev/hwpmc/pmc_events.h
+++ b/sys/dev/hwpmc/pmc_events.h
@@ -2027,6 +2027,106 @@ __PMC_EV_ALIAS("SIMD_INT_64.SHUFFLE_MOVE", IAP_EVENT_FDH_40H)
#define PMC_EV_XSCALE_LAST PMC_EV_XSCALE_DATA_BUS_TRANS
/*
+ * MIPS Events from "Programming the MIPS32 24K Core Family",
+ * Document Number: MD00355 Revision 04.63 December 19, 2008
+ * These events are kept in the order found in Table 7.4.
+ * For counters which are different between the left hand
+ * column (0/2) and the right hand column (1/3) the left
+ * hand is given first, e.g. BRANCH_COMPLETED and BRANCH_MISPRED
+ * in the definition below.
+ */
+
+#define __PMC_EV_MIPS24K() \
+ __PMC_EV(MIPS24K, CYCLE) \
+ __PMC_EV(MIPS24K, INSTR_EXECUTED) \
+ __PMC_EV(MIPS24K, BRANCH_COMPLETED) \
+ __PMC_EV(MIPS24K, BRANCH_MISPRED) \
+ __PMC_EV(MIPS24K, RETURN) \
+ __PMC_EV(MIPS24K, RETURN_MISPRED) \
+ __PMC_EV(MIPS24K, RETURN_NOT_31) \
+ __PMC_EV(MIPS24K, RETURN_NOTPRED) \
+ __PMC_EV(MIPS24K, ITLB_ACCESS) \
+ __PMC_EV(MIPS24K, ITLB_MISS) \
+ __PMC_EV(MIPS24K, DTLB_ACCESS) \
+ __PMC_EV(MIPS24K, DTLB_MISS) \
+ __PMC_EV(MIPS24K, JTLB_IACCESS) \
+ __PMC_EV(MIPS24K, JTLB_IMISS) \
+ __PMC_EV(MIPS24K, JTLB_DACCESS) \
+ __PMC_EV(MIPS24K, JTLB_DMISS) \
+ __PMC_EV(MIPS24K, IC_FETCH) \
+ __PMC_EV(MIPS24K, IC_MISS) \
+ __PMC_EV(MIPS24K, DC_LOADSTORE) \
+ __PMC_EV(MIPS24K, DC_WRITEBACK) \
+ __PMC_EV(MIPS24K, DC_MISS) \
+ __PMC_EV(MIPS24K, STORE_MISS) \
+ __PMC_EV(MIPS24K, LOAD_MISS) \
+ __PMC_EV(MIPS24K, INTEGER_COMPLETED) \
+ __PMC_EV(MIPS24K, FP_COMPLETED) \
+ __PMC_EV(MIPS24K, LOAD_COMPLETED) \
+ __PMC_EV(MIPS24K, STORE_COMPLETED) \
+ __PMC_EV(MIPS24K, BARRIER_COMPLETED) \
+ __PMC_EV(MIPS24K, MIPS16_COMPLETED) \
+ __PMC_EV(MIPS24K, NOP_COMPLETED) \
+ __PMC_EV(MIPS24K, INTEGER_MULDIV_COMPLETED)\
+ __PMC_EV(MIPS24K, RF_STALL) \
+ __PMC_EV(MIPS24K, INSTR_REFETCH) \
+ __PMC_EV(MIPS24K, STORE_COND_COMPLETED) \
+ __PMC_EV(MIPS24K, STORE_COND_FAILED) \
+ __PMC_EV(MIPS24K, ICACHE_REQUESTS) \
+ __PMC_EV(MIPS24K, ICACHE_HIT) \
+ __PMC_EV(MIPS24K, L2_WRITEBACK) \
+ __PMC_EV(MIPS24K, L2_ACCESS) \
+ __PMC_EV(MIPS24K, L2_MISS) \
+ __PMC_EV(MIPS24K, L2_ERR_CORRECTED) \
+ __PMC_EV(MIPS24K, EXCEPTIONS) \
+ __PMC_EV(MIPS24K, RF_CYCLES_STALLED) \
+ __PMC_EV(MIPS24K, IFU_CYCLES_STALLED) \
+ __PMC_EV(MIPS24K, ALU_CYCLES_STALLED) \
+ __PMC_EV(MIPS24K, UNCACHED_LOAD) \
+ __PMC_EV(MIPS24K, UNCACHED_STORE) \
+ __PMC_EV(MIPS24K, CP2_REG_TO_REG_COMPLETED)\
+ __PMC_EV(MIPS24K, MFTC_COMPLETED) \
+ __PMC_EV(MIPS24K, IC_BLOCKED_CYCLES) \
+ __PMC_EV(MIPS24K, DC_BLOCKED_CYCLES) \
+ __PMC_EV(MIPS24K, L2_IMISS_STALL_CYCLES) \
+ __PMC_EV(MIPS24K, L2_DMISS_STALL_CYCLES) \
+ __PMC_EV(MIPS24K, DMISS_CYCLES) \
+ __PMC_EV(MIPS24K, L2_MISS_CYCLES) \
+ __PMC_EV(MIPS24K, UNCACHED_BLOCK_CYCLES) \
+ __PMC_EV(MIPS24K, MDU_STALL_CYCLES) \
+ __PMC_EV(MIPS24K, FPU_STALL_CYCLES) \
+ __PMC_EV(MIPS24K, CP2_STALL_CYCLES) \
+ __PMC_EV(MIPS24K, COREXTEND_STALL_CYCLES) \
+ __PMC_EV(MIPS24K, ISPRAM_STALL_CYCLES) \
+ __PMC_EV(MIPS24K, DSPRAM_STALL_CYCLES) \
+ __PMC_EV(MIPS24K, CACHE_STALL_CYCLES) \
+ __PMC_EV(MIPS24K, LOAD_TO_USE_STALLS) \
+ __PMC_EV(MIPS24K, BASE_MISPRED_STALLS) \
+ __PMC_EV(MIPS24K, CPO_READ_STALLS) \
+ __PMC_EV(MIPS24K, BRANCH_MISPRED_CYCLES) \
+ __PMC_EV(MIPS24K, IFETCH_BUFFER_FULL) \
+ __PMC_EV(MIPS24K, FETCH_BUFFER_ALLOCATED) \
+ __PMC_EV(MIPS24K, EJTAG_ITRIGGER) \
+ __PMC_EV(MIPS24K, EJTAG_DTRIGGER) \
+ __PMC_EV(MIPS24K, FSB_LT_QUARTER) \
+ __PMC_EV(MIPS24K, FSB_QUARTER_TO_HALF) \
+ __PMC_EV(MIPS24K, FSB_GT_HALF) \
+ __PMC_EV(MIPS24K, FSB_FULL_PIPELINE_STALLS)\
+ __PMC_EV(MIPS24K, LDQ_LT_QUARTER) \
+ __PMC_EV(MIPS24K, LDQ_QUARTER_TO_HALF) \
+ __PMC_EV(MIPS24K, LDQ_GT_HALF) \
+ __PMC_EV(MIPS24K, LDQ_FULL_PIPELINE_STALLS)\
+ __PMC_EV(MIPS24K, WBB_LT_QUARTER) \
+ __PMC_EV(MIPS24K, WBB_QUARTER_TO_HALF) \
+ __PMC_EV(MIPS24K, WBB_GT_HALF) \
+ __PMC_EV(MIPS24K, WBB_FULL_PIPELINE_STALLS) \
+ __PMC_EV(MIPS24K, REQUEST_LATENCY) \
+ __PMC_EV(MIPS24K, REQUEST_COUNT)
+
+#define PMC_EV_MIPS24K_FIRST PMC_EV_MIPS24K_CYCLE
+#define PMC_EV_MIPS24K_LAST PMC_EV_MIPS24K_WBB_FULL_PIPELINE_STALLS
+
+/*
* All known PMC events.
*
* PMC event numbers are allocated sparsely to allow new PMC events to
@@ -2044,6 +2144,7 @@ __PMC_EV_ALIAS("SIMD_INT_64.SHUFFLE_MOVE", IAP_EVENT_FDH_40H)
* 0x11080 0x0080 INTEL Pentium MMX events
* 0x11100 0x0100 INTEL Pentium Pro/P-II/P-III/Pentium-M events
* 0x11200 0x00FF INTEL XScale events
+ * 0x11300 0x00FF MIPS 24K events
*/
#define __PMC_EVENTS() \
__PMC_EV_BLOCK(TSC, 0x01000) \
@@ -2063,9 +2164,11 @@ __PMC_EV_ALIAS("SIMD_INT_64.SHUFFLE_MOVE", IAP_EVENT_FDH_40H)
__PMC_EV_BLOCK(P6, 0x11100) \
__PMC_EV_P6() \
__PMC_EV_BLOCK(XSCALE, 0x11200) \
- __PMC_EV_XSCALE()
+ __PMC_EV_XSCALE() \
+ __PMC_EV_BLOCK(MIPS24K, 0x11300) \
+ __PMC_EV_MIPS24K()
#define PMC_EVENT_FIRST PMC_EV_TSC_TSC
-#define PMC_EVENT_LAST PMC_EV_XSCALE_LAST
+#define PMC_EVENT_LAST PMC_EV_24K_LAST
#endif /* _DEV_HWPMC_PMC_EVENTS_H_ */
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