diff options
Diffstat (limited to 'sys/dev/gem/if_gemvar.h')
| -rw-r--r-- | sys/dev/gem/if_gemvar.h | 66 |
1 files changed, 39 insertions, 27 deletions
diff --git a/sys/dev/gem/if_gemvar.h b/sys/dev/gem/if_gemvar.h index 0986a8d..08b2105 100644 --- a/sys/dev/gem/if_gemvar.h +++ b/sys/dev/gem/if_gemvar.h @@ -58,9 +58,8 @@ * Receive descriptor list size. We have one Rx buffer per incoming * packet, so this logic is a little simpler. */ -#define GEM_NRXDESC 128 +#define GEM_NRXDESC 256 #define GEM_NRXDESC_MASK (GEM_NRXDESC - 1) -#define GEM_PREVRX(x) ((x - 1) & GEM_NRXDESC_MASK) #define GEM_NEXTRX(x) ((x + 1) & GEM_NRXDESC_MASK) /* @@ -118,15 +117,15 @@ struct gem_rxsoft { */ struct gem_softc { struct ifnet *sc_ifp; + struct mtx sc_mtx; device_t sc_miibus; struct mii_data *sc_mii; /* MII media control */ device_t sc_dev; /* generic device information */ - u_char sc_enaddr[6]; + u_char sc_enaddr[ETHER_ADDR_LEN]; struct callout sc_tick_ch; /* tick callout */ struct callout sc_rx_ch; /* delayed rx callout */ int sc_wdog_timer; /* watchdog timer */ - /* The following bus handles are to be provided by the bus front-end */ void *sc_ih; struct resource *sc_res[2]; bus_dma_tag_t sc_pdmatag; /* parent bus dma tag */ @@ -135,18 +134,24 @@ struct gem_softc { bus_dma_tag_t sc_cdmatag; /* control data bus dma tag */ bus_dmamap_t sc_dmamap; /* bus dma handle */ - int sc_phys[2]; /* MII instance -> PHY map */ - - int sc_mif_config; /* Selected MII reg setting */ + int sc_phyad; /* addr. of PHY to use or -1 for any */ - int sc_pci; /* XXXXX -- PCI buses are LE. */ u_int sc_variant; /* which GEM are we dealing with? */ #define GEM_UNKNOWN 0 /* don't know */ -#define GEM_SUN_GEM 1 /* Sun GEM variant */ -#define GEM_APPLE_GMAC 2 /* Apple GMAC variant */ +#define GEM_SUN_GEM 1 /* Sun GEM */ +#define GEM_SUN_ERI 2 /* Sun ERI */ +#define GEM_APPLE_GMAC 3 /* Apple GMAC */ +#define GEM_APPLE_K2_GMAC 4 /* Apple K2 GMAC */ + +#define GEM_IS_APPLE(sc) \ + ((sc)->sc_variant == GEM_APPLE_GMAC || \ + (sc)->sc_variant == GEM_APPLE_K2_GMAC) u_int sc_flags; /* */ -#define GEM_GIGABIT 0x0001 /* has a gigabit PHY */ +#define GEM_INITED (1 << 0) /* reset persistent regs initialized */ +#define GEM_LINK (1 << 1) /* link is up */ +#define GEM_PCI (1 << 2) /* XXX PCI busses are little-endian */ +#define GEM_SERDES (1 << 3) /* use the SERDES */ /* * Ring buffer DMA stuff. @@ -169,33 +174,31 @@ struct gem_softc { #define sc_txdescs sc_control_data->gcd_txdescs #define sc_rxdescs sc_control_data->gcd_rxdescs - int sc_txfree; /* number of free Tx descriptors */ - int sc_txnext; /* next ready Tx descriptor */ - int sc_txwin; /* Tx descriptors since last Tx int */ + int sc_txfree; /* number of free Tx descriptors */ + int sc_txnext; /* next ready Tx descriptor */ + int sc_txwin; /* Tx descriptors since last Tx int */ struct gem_txsq sc_txfreeq; /* free Tx descsofts */ struct gem_txsq sc_txdirtyq; /* dirty Tx descsofts */ - int sc_rxptr; /* next ready RX descriptor/descsoft */ - int sc_rxfifosize; /* Rx FIFO size (bytes) */ + int sc_rxptr; /* next ready RX descriptor/descsoft */ + int sc_rxfifosize; /* Rx FIFO size (bytes) */ /* ========== */ - int sc_inited; - int sc_debug; int sc_ifflags; int sc_csum_features; - - struct mtx sc_mtx; }; -#define GEM_DMA_READ(sc, v) (((sc)->sc_pci) ? le64toh(v) : be64toh(v)) -#define GEM_DMA_WRITE(sc, v) (((sc)->sc_pci) ? htole64(v) : htobe64(v)) +#define GEM_DMA_READ(sc, v) \ + ((((sc)->sc_flags & GEM_PCI) != 0) ? le64toh(v) : be64toh(v)) +#define GEM_DMA_WRITE(sc, v) \ + ((((sc)->sc_flags & GEM_PCI) != 0) ? htole64(v) : htobe64(v)) #define GEM_CDTXADDR(sc, x) ((sc)->sc_cddma + GEM_CDTXOFF((x))) #define GEM_CDRXADDR(sc, x) ((sc)->sc_cddma + GEM_CDRXOFF((x))) #define GEM_CDSYNC(sc, ops) \ - bus_dmamap_sync((sc)->sc_cdmatag, (sc)->sc_cddmamap, (ops)); \ + bus_dmamap_sync((sc)->sc_cdmatag, (sc)->sc_cddmamap, (ops)); #define GEM_INIT_RXDESC(sc, x) \ do { \ @@ -208,7 +211,19 @@ do { \ GEM_DMA_WRITE((sc), __rxs->rxs_paddr); \ __rxd->gd_flags = \ GEM_DMA_WRITE((sc), \ - (((__m->m_ext.ext_size)<<GEM_RD_BUFSHIFT) \ + (((__m->m_ext.ext_size) << GEM_RD_BUFSHIFT) \ + & GEM_RD_BUFSIZE) | GEM_RD_OWN); \ +} while (0) + +#define GEM_UPDATE_RXDESC(sc, x) \ +do { \ + struct gem_rxsoft *__rxs = &sc->sc_rxsoft[(x)]; \ + struct gem_desc *__rxd = &sc->sc_rxdescs[(x)]; \ + struct mbuf *__m = __rxs->rxs_mbuf; \ + \ + __rxd->gd_flags = \ + GEM_DMA_WRITE((sc), \ + (((__m->m_ext.ext_size) << GEM_RD_BUFSHIFT) \ & GEM_RD_BUFSIZE) | GEM_RD_OWN); \ } while (0) @@ -231,8 +246,6 @@ void gem_intr(void *); int gem_mediachange(struct ifnet *); void gem_mediastatus(struct ifnet *, struct ifmediareq *); -void gem_reset(struct gem_softc *); - /* MII methods & callbacks */ int gem_mii_readreg(device_t, int, int); int gem_mii_writereg(device_t, int, int, int); @@ -240,5 +253,4 @@ void gem_mii_statchg(device_t); #endif /* _KERNEL */ - #endif |
