diff options
Diffstat (limited to 'sys/dev/gem/if_gem.c')
-rw-r--r-- | sys/dev/gem/if_gem.c | 61 |
1 files changed, 33 insertions, 28 deletions
diff --git a/sys/dev/gem/if_gem.c b/sys/dev/gem/if_gem.c index 7f44f22..6f53eae 100644 --- a/sys/dev/gem/if_gem.c +++ b/sys/dev/gem/if_gem.c @@ -121,7 +121,7 @@ static void gem_rint_timeout(void *arg); #endif static inline void gem_rxcksum(struct mbuf *m, uint64_t flags); static void gem_rxdrain(struct gem_softc *sc); -static void gem_setladrf(struct gem_softc *sc, u_int enable); +static void gem_setladrf(struct gem_softc *sc); static void gem_start(struct ifnet *ifp); static void gem_start_locked(struct ifnet *ifp); static void gem_stop(struct ifnet *ifp, int disable); @@ -626,7 +626,9 @@ gem_reset(struct gem_softc *sc) gem_reset_tx(sc); /* Do a full reset. */ - GEM_BANK2_WRITE_4(sc, GEM_RESET, GEM_RESET_RX | GEM_RESET_TX); + GEM_BANK2_WRITE_4(sc, GEM_RESET, GEM_RESET_RX | GEM_RESET_TX | + (sc->sc_variant == GEM_SUN_ERI ? GEM_ERI_CACHE_LINE_SIZE << + GEM_RESET_CLSZ_SHFT : 0)); GEM_BANK2_BARRIER(sc, GEM_RESET, 4, BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); if (!GEM_BANK2_BITWAIT(sc, GEM_RESET, GEM_RESET_RX | GEM_RESET_TX, 0)) @@ -716,11 +718,12 @@ gem_reset_rx(struct gem_softc *sc) DELAY(5000); /* Reset the ERX. */ - GEM_BANK2_WRITE_4(sc, GEM_RESET, GEM_RESET_RX); + GEM_BANK2_WRITE_4(sc, GEM_RESET, GEM_RESET_RX | + (sc->sc_variant == GEM_SUN_ERI ? GEM_ERI_CACHE_LINE_SIZE << + GEM_RESET_CLSZ_SHFT : 0)); GEM_BANK2_BARRIER(sc, GEM_RESET, 4, BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); - if (!GEM_BANK2_BITWAIT(sc, GEM_RESET, GEM_RESET_RX | GEM_RESET_TX, - 0)) { + if (!GEM_BANK2_BITWAIT(sc, GEM_RESET, GEM_RESET_RX, 0)) { device_printf(sc->sc_dev, "cannot reset receiver\n"); return (1); } @@ -769,24 +772,22 @@ gem_reset_rxdma(struct gem_softc *sc) GEM_RX_CONFIG_CXM_START_SHFT) | (GEM_THRSH_1024 << GEM_RX_CONFIG_FIFO_THRS_SHIFT) | (ETHER_ALIGN << GEM_RX_CONFIG_FBOFF_SHFT)); - /* Adjust for the SBus clock probably isn't worth the fuzz. */ + /* Adjusting for the SBus clock probably isn't worth the fuzz. */ GEM_BANK1_WRITE_4(sc, GEM_RX_BLANKING, ((6 * (sc->sc_flags & GEM_PCI66) != 0 ? 2 : 1) << GEM_RX_BLANKING_TIME_SHIFT) | 6); GEM_BANK1_WRITE_4(sc, GEM_RX_PAUSE_THRESH, (3 * sc->sc_rxfifosize / 256) | ((sc->sc_rxfifosize / 256) << 12)); - /* - * Clear the RX filter and reprogram it. This will also set the - * current RX MAC configuration. - */ - gem_setladrf(sc, 0); GEM_BANK1_WRITE_4(sc, GEM_RX_CONFIG, GEM_BANK1_READ_4(sc, GEM_RX_CONFIG) | GEM_RX_CONFIG_RXDMA_EN); GEM_BANK1_WRITE_4(sc, GEM_MAC_RX_MASK, GEM_MAC_RX_DONE | GEM_MAC_RX_FRAME_CNT); - GEM_BANK1_WRITE_4(sc, GEM_MAC_RX_CONFIG, - sc->sc_mac_rxcfg | GEM_MAC_RX_ENABLE); + /* + * Clear the RX filter and reprogram it. This will also set the + * current RX MAC configuration and enable it. + */ + gem_setladrf(sc); } static int @@ -808,11 +809,12 @@ gem_reset_tx(struct gem_softc *sc) DELAY(5000); /* Finally, reset the ETX. */ - GEM_BANK2_WRITE_4(sc, GEM_RESET, GEM_RESET_TX); + GEM_BANK2_WRITE_4(sc, GEM_RESET, GEM_RESET_TX | + (sc->sc_variant == GEM_SUN_ERI ? GEM_ERI_CACHE_LINE_SIZE << + GEM_RESET_CLSZ_SHFT : 0)); GEM_BANK2_BARRIER(sc, GEM_RESET, 4, BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); - if (!GEM_BANK2_BITWAIT(sc, GEM_RESET, GEM_RESET_RX | GEM_RESET_TX, - 0)) { + if (!GEM_BANK2_BITWAIT(sc, GEM_RESET, GEM_RESET_TX, 0)) { device_printf(sc->sc_dev, "cannot reset transmitter\n"); return (1); } @@ -945,8 +947,10 @@ gem_init_locked(struct gem_softc *sc) GEM_LOCK_ASSERT(sc, MA_OWNED); +#ifdef notyet if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) return; +#endif #ifdef GEM_DEBUG CTR2(KTR_GEM, "%s: %s: calling stop", device_get_name(sc->sc_dev), @@ -979,7 +983,6 @@ gem_init_locked(struct gem_softc *sc) gem_init_regs(sc); /* step 5. RX MAC registers & counters */ - gem_setladrf(sc, 0); /* step 6 & 7. Program Descriptor Ring Base Addresses. */ /* NOTE: we use only 32-bit DMA addresses here. */ @@ -1051,7 +1054,7 @@ gem_init_locked(struct gem_softc *sc) (ETHER_ALIGN << GEM_RX_CONFIG_FBOFF_SHFT) | GEM_RX_CONFIG_RXDMA_EN); - /* Adjust for the SBus clock probably isn't worth the fuzz. */ + /* Adjusting for the SBus clock probably isn't worth the fuzz. */ GEM_BANK1_WRITE_4(sc, GEM_RX_BLANKING, ((6 * (sc->sc_flags & GEM_PCI66) != 0 ? 2 : 1) << GEM_RX_BLANKING_TIME_SHIFT) | 6); @@ -1068,10 +1071,14 @@ gem_init_locked(struct gem_softc *sc) /* step 12. RX_MAC Configuration Register */ v = GEM_BANK1_READ_4(sc, GEM_MAC_RX_CONFIG); - v |= GEM_MAC_RX_ENABLE | GEM_MAC_RX_STRIP_CRC; - (void)gem_disable_rx(sc); - sc->sc_mac_rxcfg = v & ~GEM_MAC_RX_ENABLE; - GEM_BANK1_WRITE_4(sc, GEM_MAC_RX_CONFIG, v); + v &= ~GEM_MAC_RX_ENABLE; + v |= GEM_MAC_RX_STRIP_CRC; + sc->sc_mac_rxcfg = v; + /* + * Clear the RX filter and reprogram it. This will also set the + * current RX MAC configuration and enable it. + */ + gem_setladrf(sc); /* step 13. TX_MAC Configuration Register */ v = GEM_BANK1_READ_4(sc, GEM_MAC_TX_CONFIG); @@ -2152,7 +2159,7 @@ gem_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0 && ((ifp->if_flags ^ sc->sc_ifflags) & (IFF_ALLMULTI | IFF_PROMISC)) != 0) - gem_setladrf(sc, 1); + gem_setladrf(sc); else gem_init_locked(sc); } else if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) @@ -2170,7 +2177,7 @@ gem_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) case SIOCDELMULTI: GEM_LOCK(sc); if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) - gem_setladrf(sc, 1); + gem_setladrf(sc); GEM_UNLOCK(sc); break; case SIOCGIFMEDIA: @@ -2195,7 +2202,7 @@ gem_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) } static void -gem_setladrf(struct gem_softc *sc, u_int enable) +gem_setladrf(struct gem_softc *sc) { struct ifnet *ifp = sc->sc_ifp; struct ifmultiaddr *inm; @@ -2265,7 +2272,5 @@ gem_setladrf(struct gem_softc *sc, u_int enable) chipit: sc->sc_mac_rxcfg = v; - if (enable) - v |= GEM_MAC_RX_ENABLE; - GEM_BANK1_WRITE_4(sc, GEM_MAC_RX_CONFIG, v); + GEM_BANK1_WRITE_4(sc, GEM_MAC_RX_CONFIG, v | GEM_MAC_RX_ENABLE); } |