diff options
Diffstat (limited to 'sys/dev/bge/if_bge.c')
-rw-r--r-- | sys/dev/bge/if_bge.c | 118 |
1 files changed, 71 insertions, 47 deletions
diff --git a/sys/dev/bge/if_bge.c b/sys/dev/bge/if_bge.c index 0f87eb0..4deecc8 100644 --- a/sys/dev/bge/if_bge.c +++ b/sys/dev/bge/if_bge.c @@ -1309,15 +1309,17 @@ bge_sig_pre_reset(struct bge_softc *sc, int type) * Some chips don't like this so only do this if ASF is enabled */ if (sc->bge_asf_mode) - bge_writemem_ind(sc, BGE_SOFTWARE_GENCOMM, BGE_MAGIC_NUMBER); + bge_writemem_ind(sc, BGE_SRAM_FW_MB, BGE_SRAM_FW_MB_MAGIC); if (sc->bge_asf_mode & ASF_NEW_HANDSHAKE) { switch (type) { case BGE_RESET_START: - bge_writemem_ind(sc, BGE_SDI_STATUS, 0x1); /* START */ + bge_writemem_ind(sc, BGE_SRAM_FW_DRV_STATE_MB, + BGE_FW_DRV_STATE_START); break; case BGE_RESET_STOP: - bge_writemem_ind(sc, BGE_SDI_STATUS, 0x2); /* UNLOAD */ + bge_writemem_ind(sc, BGE_SRAM_FW_DRV_STATE_MB, + BGE_FW_DRV_STATE_UNLOAD); break; } } @@ -1330,11 +1332,13 @@ bge_sig_post_reset(struct bge_softc *sc, int type) if (sc->bge_asf_mode & ASF_NEW_HANDSHAKE) { switch (type) { case BGE_RESET_START: - bge_writemem_ind(sc, BGE_SDI_STATUS, 0x80000001); + bge_writemem_ind(sc, BGE_SRAM_FW_DRV_STATE_MB, + BGE_FW_DRV_STATE_START_DONE); /* START DONE */ break; case BGE_RESET_STOP: - bge_writemem_ind(sc, BGE_SDI_STATUS, 0x80000002); + bge_writemem_ind(sc, BGE_SRAM_FW_DRV_STATE_MB, + BGE_FW_DRV_STATE_UNLOAD_DONE); break; } } @@ -1347,10 +1351,12 @@ bge_sig_legacy(struct bge_softc *sc, int type) if (sc->bge_asf_mode) { switch (type) { case BGE_RESET_START: - bge_writemem_ind(sc, BGE_SDI_STATUS, 0x1); /* START */ + bge_writemem_ind(sc, BGE_SRAM_FW_DRV_STATE_MB, + BGE_FW_DRV_STATE_START); break; case BGE_RESET_STOP: - bge_writemem_ind(sc, BGE_SDI_STATUS, 0x2); /* UNLOAD */ + bge_writemem_ind(sc, BGE_SRAM_FW_DRV_STATE_MB, + BGE_FW_DRV_STATE_UNLOAD); break; } } @@ -1362,12 +1368,12 @@ bge_stop_fw(struct bge_softc *sc) int i; if (sc->bge_asf_mode) { - bge_writemem_ind(sc, BGE_SOFTWARE_GENCOMM_FW, BGE_FW_PAUSE); - CSR_WRITE_4(sc, BGE_CPU_EVENT, - CSR_READ_4(sc, BGE_CPU_EVENT) | (1 << 14)); + bge_writemem_ind(sc, BGE_SRAM_FW_CMD_MB, BGE_FW_PAUSE); + CSR_WRITE_4(sc, BGE_RX_CPU_EVENT, + CSR_READ_4(sc, BGE_RX_CPU_EVENT) | (1 << 14)); for (i = 0; i < 100; i++ ) { - if (!(CSR_READ_4(sc, BGE_CPU_EVENT) & (1 << 14))) + if (!(CSR_READ_4(sc, BGE_RX_CPU_EVENT) & (1 << 14))) break; DELAY(10); } @@ -2828,7 +2834,6 @@ bge_attach(device_t dev) switch (sc->bge_asicrev) { case BGE_ASICREV_BCM5717: case BGE_ASICREV_BCM5719: - sc->bge_flags |= BGE_FLAG_SHORT_DMA_BUG; case BGE_ASICREV_BCM57765: sc->bge_flags |= BGE_FLAG_5717_PLUS | BGE_FLAG_5755_PLUS | BGE_FLAG_575X_PLUS | BGE_FLAG_5705_PLUS | BGE_FLAG_JUMBO | @@ -2863,8 +2868,6 @@ bge_attach(device_t dev) case BGE_ASICREV_BCM5752: case BGE_ASICREV_BCM5906: sc->bge_flags |= BGE_FLAG_575X_PLUS; - if (sc->bge_asicrev == BGE_ASICREV_BCM5906) - sc->bge_flags |= BGE_FLAG_SHORT_DMA_BUG; /* FALLTHROUGH */ case BGE_ASICREV_BCM5705: sc->bge_flags |= BGE_FLAG_5705_PLUS; @@ -2918,15 +2921,26 @@ bge_attach(device_t dev) sc->bge_mi_mode |= BGE_MIMODE_AUTOPOLL; /* - * All controllers that are not 5755 or higher have 4GB - * boundary DMA bug. + * All Broadcom controllers have 4GB boundary DMA bug. * Whenever an address crosses a multiple of the 4GB boundary * (including 4GB, 8Gb, 12Gb, etc.) and makes the transition * from 0xX_FFFF_FFFF to 0x(X+1)_0000_0000 an internal DMA * state machine will lockup and cause the device to hang. */ - if (BGE_IS_5755_PLUS(sc) == 0) - sc->bge_flags |= BGE_FLAG_4G_BNDRY_BUG; + sc->bge_flags |= BGE_FLAG_4G_BNDRY_BUG; + + /* BCM5755 or higher and BCM5906 have short DMA bug. */ + if (BGE_IS_5755_PLUS(sc) || sc->bge_asicrev == BGE_ASICREV_BCM5906) + sc->bge_flags |= BGE_FLAG_SHORT_DMA_BUG; + + /* + * BCM5719 cannot handle DMA requests for DMA segments that + * have larger than 4KB in size. However the maximum DMA + * segment size created in DMA tag is 4KB for TSO, so we + * wouldn't encounter the issue here. + */ + if (sc->bge_asicrev == BGE_ASICREV_BCM5719) + sc->bge_flags |= BGE_FLAG_4K_RDMA_BUG; misccfg = CSR_READ_4(sc, BGE_MISC_CFG) & BGE_MISCCFG_BOARD_ID; if (sc->bge_asicrev == BGE_ASICREV_BCM5705) { @@ -2985,9 +2999,9 @@ bge_attach(device_t dev) sc->bge_flags |= BGE_FLAG_TSO; } - /* + /* * Check if this is a PCI-X or PCI Express device. - */ + */ if (pci_find_cap(dev, PCIY_EXPRESS, ®) == 0) { /* * Found a PCI Express capabilities register, this @@ -3073,9 +3087,9 @@ bge_attach(device_t dev) } sc->bge_asf_mode = 0; - if (bge_allow_asf && (bge_readmem_ind(sc, BGE_SOFTWARE_GENCOMM_SIG) - == BGE_MAGIC_NUMBER)) { - if (bge_readmem_ind(sc, BGE_SOFTWARE_GENCOMM_NICCFG) + if (bge_allow_asf && (bge_readmem_ind(sc, BGE_SRAM_DATA_SIG) == + BGE_SRAM_DATA_SIG_MAGIC)) { + if (bge_readmem_ind(sc, BGE_SRAM_DATA_CFG) & BGE_HWCFG_ASF) { sc->bge_asf_mode |= ASF_ENABLE; sc->bge_asf_mode |= ASF_STACKUP; @@ -3189,8 +3203,8 @@ bge_attach(device_t dev) * by its PCI subsystem ID, as we do below for the SysKonnect * SK-9D41. */ - if (bge_readmem_ind(sc, BGE_SOFTWARE_GENCOMM_SIG) == BGE_MAGIC_NUMBER) - hwcfg = bge_readmem_ind(sc, BGE_SOFTWARE_GENCOMM_NICCFG); + if (bge_readmem_ind(sc, BGE_SRAM_DATA_SIG) == BGE_SRAM_DATA_SIG_MAGIC) + hwcfg = bge_readmem_ind(sc, BGE_SRAM_DATA_CFG); else if ((sc->bge_flags & BGE_FLAG_EADDR) && (sc->bge_asicrev != BGE_ASICREV_BCM5906)) { if (bge_read_eeprom(sc, (caddr_t)&hwcfg, BGE_EE_HWCFG_OFFSET, @@ -3425,9 +3439,9 @@ bge_reset(struct bge_softc *sc) /* * Write the magic number to SRAM at offset 0xB50. * When firmware finishes its initialization it will - * write ~BGE_MAGIC_NUMBER to the same location. + * write ~BGE_SRAM_FW_MB_MAGIC to the same location. */ - bge_writemem_ind(sc, BGE_SOFTWARE_GENCOMM, BGE_MAGIC_NUMBER); + bge_writemem_ind(sc, BGE_SRAM_FW_MB, BGE_SRAM_FW_MB_MAGIC); reset = BGE_MISCCFG_RESET_CORE_CLOCKS | BGE_32BITTIME_66MHZ; @@ -3446,7 +3460,8 @@ bge_reset(struct bge_softc *sc) * Set GPHY Power Down Override to leave GPHY * powered up in D0 uninitialized. */ - if (BGE_IS_5705_PLUS(sc)) + if (BGE_IS_5705_PLUS(sc) && + (sc->bge_flags & BGE_FLAG_CPMU_PRESENT) == 0) reset |= BGE_MISCCFG_GPHY_PD_OVERRIDE; /* Issue global reset */ @@ -3551,8 +3566,8 @@ bge_reset(struct bge_softc *sc) */ for (i = 0; i < BGE_TIMEOUT; i++) { DELAY(10); - val = bge_readmem_ind(sc, BGE_SOFTWARE_GENCOMM); - if (val == ~BGE_MAGIC_NUMBER) + val = bge_readmem_ind(sc, BGE_SRAM_FW_MB); + if (val == ~BGE_SRAM_FW_MB_MAGIC) break; } @@ -3995,7 +4010,7 @@ bge_intr_task(void *arg, int pending) if (ifp->if_drv_flags & IFF_DRV_RUNNING) { /* Check TX ring producer/consumer. */ bge_txeof(sc, tx_cons); - if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) + if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) bge_start_locked(ifp); } BGE_UNLOCK(sc); @@ -4091,12 +4106,12 @@ bge_asf_driver_up(struct bge_softc *sc) sc->bge_asf_count --; else { sc->bge_asf_count = 2; - bge_writemem_ind(sc, BGE_SOFTWARE_GENCOMM_FW, + bge_writemem_ind(sc, BGE_SRAM_FW_CMD_MB, BGE_FW_DRV_ALIVE); - bge_writemem_ind(sc, BGE_SOFTWARE_GENNCOMM_FW_LEN, 4); - bge_writemem_ind(sc, BGE_SOFTWARE_GENNCOMM_FW_DATA, 3); - CSR_WRITE_4(sc, BGE_CPU_EVENT, - CSR_READ_4(sc, BGE_CPU_EVENT) | (1 << 14)); + bge_writemem_ind(sc, BGE_SRAM_FW_CMD_LEN_MB, 4); + bge_writemem_ind(sc, BGE_SRAM_FW_CMD_DATA_MB, 3); + CSR_WRITE_4(sc, BGE_RX_CPU_EVENT, + CSR_READ_4(sc, BGE_RX_CPU_EVENT) | (1 << 14)); } } } @@ -4112,7 +4127,7 @@ bge_tick(void *xsc) /* Synchronize with possible callout reset/stop. */ if (callout_pending(&sc->bge_stat_ch) || !callout_active(&sc->bge_stat_ch)) - return; + return; if (BGE_IS_5705_PLUS(sc)) bge_stats_update_regs(sc); @@ -5036,7 +5051,7 @@ bge_ioctl(struct ifnet *ifp, u_long command, caddr_t data) break; } } else if (ifr->ifr_mtu < ETHERMIN || ifr->ifr_mtu > ETHERMTU) { - error = EINVAL; + error = EINVAL; break; } BGE_LOCK(sc); @@ -5797,8 +5812,7 @@ bge_sysctl_debug_info(SYSCTL_HANDLER_ARGS) { struct bge_softc *sc; uint16_t *sbdata; - int error; - int result; + int error, result, sbsz; int i, j; result = -1; @@ -5809,14 +5823,21 @@ bge_sysctl_debug_info(SYSCTL_HANDLER_ARGS) if (result == 1) { sc = (struct bge_softc *)arg1; + if (sc->bge_asicrev == BGE_ASICREV_BCM5700 && + sc->bge_chipid != BGE_CHIPID_BCM5700_C0) + sbsz = BGE_STATUS_BLK_SZ; + else + sbsz = 32; sbdata = (uint16_t *)sc->bge_ldata.bge_status_block; printf("Status Block:\n"); - for (i = 0x0; i < (BGE_STATUS_BLK_SZ / 4); ) { + BGE_LOCK(sc); + bus_dmamap_sync(sc->bge_cdata.bge_status_tag, + sc->bge_cdata.bge_status_map, + BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); + for (i = 0x0; i < sbsz / sizeof(uint16_t); ) { printf("%06x:", i); - for (j = 0; j < 8; j++) { - printf(" %04x", sbdata[i]); - i += 4; - } + for (j = 0; j < 8; j++) + printf(" %04x", sbdata[i++]); printf("\n"); } @@ -5829,8 +5850,11 @@ bge_sysctl_debug_info(SYSCTL_HANDLER_ARGS) } printf("\n"); } + BGE_UNLOCK(sc); printf("Hardware Flags:\n"); + if (BGE_IS_5717_PLUS(sc)) + printf(" - 5717 Plus\n"); if (BGE_IS_5755_PLUS(sc)) printf(" - 5755 Plus\n"); if (BGE_IS_575X_PLUS(sc)) @@ -5920,11 +5944,11 @@ bge_get_eaddr_mem(struct bge_softc *sc, uint8_t ether_addr[]) { uint32_t mac_addr; - mac_addr = bge_readmem_ind(sc, 0x0c14); + mac_addr = bge_readmem_ind(sc, BGE_SRAM_MAC_ADDR_HIGH_MB); if ((mac_addr >> 16) == 0x484b) { ether_addr[0] = (uint8_t)(mac_addr >> 8); ether_addr[1] = (uint8_t)mac_addr; - mac_addr = bge_readmem_ind(sc, 0x0c18); + mac_addr = bge_readmem_ind(sc, BGE_SRAM_MAC_ADDR_LOW_MB); ether_addr[2] = (uint8_t)(mac_addr >> 24); ether_addr[3] = (uint8_t)(mac_addr >> 16); ether_addr[4] = (uint8_t)(mac_addr >> 8); |