diff options
Diffstat (limited to 'sys/dev/ath')
-rw-r--r-- | sys/dev/ath/ath_hal/ah.h | 2 | ||||
-rw-r--r-- | sys/dev/ath/ath_hal/ar5210/ar5210.h | 1 | ||||
-rw-r--r-- | sys/dev/ath/ath_hal/ar5210/ar5210_attach.c | 1 | ||||
-rw-r--r-- | sys/dev/ath/ath_hal/ar5210/ar5210_misc.c | 6 | ||||
-rw-r--r-- | sys/dev/ath/ath_hal/ar5211/ar5211.h | 2 | ||||
-rw-r--r-- | sys/dev/ath/ath_hal/ar5211/ar5211_attach.c | 1 | ||||
-rw-r--r-- | sys/dev/ath/ath_hal/ar5211/ar5211_misc.c | 6 | ||||
-rw-r--r-- | sys/dev/ath/ath_hal/ar5212/ar5212.h | 1 | ||||
-rw-r--r-- | sys/dev/ath/ath_hal/ar5212/ar5212_attach.c | 1 | ||||
-rw-r--r-- | sys/dev/ath/ath_hal/ar5212/ar5212_misc.c | 6 | ||||
-rw-r--r-- | sys/dev/ath/ath_hal/ar5416/ar5416.h | 1 | ||||
-rw-r--r-- | sys/dev/ath/ath_hal/ar5416/ar5416_attach.c | 1 | ||||
-rw-r--r-- | sys/dev/ath/ath_hal/ar5416/ar5416_misc.c | 14 | ||||
-rw-r--r-- | sys/dev/ath/ath_hal/ar5416/ar5416_reset.c | 31 | ||||
-rw-r--r-- | sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c | 14 | ||||
-rw-r--r-- | sys/dev/ath/if_ath.c | 33 | ||||
-rw-r--r-- | sys/dev/ath/if_ath_tx_ht.c | 17 | ||||
-rw-r--r-- | sys/dev/ath/if_athvar.h | 8 |
18 files changed, 91 insertions, 55 deletions
diff --git a/sys/dev/ath/ath_hal/ah.h b/sys/dev/ath/ath_hal/ah.h index ddc4b6a..0e3d5ab 100644 --- a/sys/dev/ath/ath_hal/ah.h +++ b/sys/dev/ath/ath_hal/ah.h @@ -1437,6 +1437,8 @@ struct ath_hal { HAL_STATUS __ahdecl(*ah_setQuiet)(struct ath_hal *ah, uint32_t period, uint32_t duration, uint32_t nextStart, HAL_QUIET_FLAG flag); + void __ahdecl(*ah_setChainMasks)(struct ath_hal *, + uint32_t, uint32_t); /* DFS functions */ void __ahdecl(*ah_enableDfs)(struct ath_hal *ah, diff --git a/sys/dev/ath/ath_hal/ar5210/ar5210.h b/sys/dev/ath/ath_hal/ar5210/ar5210.h index 2dad124..48ccc20 100644 --- a/sys/dev/ath/ath_hal/ar5210/ar5210.h +++ b/sys/dev/ath/ath_hal/ar5210/ar5210.h @@ -259,6 +259,7 @@ extern HAL_BOOL ar5210GetDiagState(struct ath_hal *ah, int request, extern uint32_t ar5210Get11nExtBusy(struct ath_hal *); extern HAL_BOOL ar5210GetMibCycleCounts(struct ath_hal *, HAL_SURVEY_SAMPLE *); +extern void ar5210SetChainMasks(struct ath_hal *, uint32_t, uint32_t); extern void ar5210EnableDfs(struct ath_hal *, HAL_PHYERR_PARAM *); extern void ar5210GetDfsThresh(struct ath_hal *, HAL_PHYERR_PARAM *); extern void ar5210UpdateDiagReg(struct ath_hal *ah, uint32_t val); diff --git a/sys/dev/ath/ath_hal/ar5210/ar5210_attach.c b/sys/dev/ath/ath_hal/ar5210/ar5210_attach.c index 495a3d0..3c0ed71 100644 --- a/sys/dev/ath/ath_hal/ar5210/ar5210_attach.c +++ b/sys/dev/ath/ath_hal/ar5210/ar5210_attach.c @@ -137,6 +137,7 @@ static const struct ath_hal_private ar5210hal = {{ .ah_setCoverageClass = ar5210SetCoverageClass, .ah_get11nExtBusy = ar5210Get11nExtBusy, .ah_getMibCycleCounts = ar5210GetMibCycleCounts, + .ah_setChainMasks = ar5210SetChainMasks, .ah_enableDfs = ar5210EnableDfs, .ah_getDfsThresh = ar5210GetDfsThresh, /* XXX procRadarEvent */ diff --git a/sys/dev/ath/ath_hal/ar5210/ar5210_misc.c b/sys/dev/ath/ath_hal/ar5210/ar5210_misc.c index bf4b8d0..8170880 100644 --- a/sys/dev/ath/ath_hal/ar5210/ar5210_misc.c +++ b/sys/dev/ath/ath_hal/ar5210/ar5210_misc.c @@ -671,6 +671,12 @@ ar5210GetMibCycleCounts(struct ath_hal *ah, HAL_SURVEY_SAMPLE *hsample) } void +ar5210SetChainMasks(struct ath_hal *ah, uint32_t txchainmask, + uint32_t rxchainmask) +{ +} + +void ar5210EnableDfs(struct ath_hal *ah, HAL_PHYERR_PARAM *pe) { } diff --git a/sys/dev/ath/ath_hal/ar5211/ar5211.h b/sys/dev/ath/ath_hal/ar5211/ar5211.h index 6f813fb..c50531e 100644 --- a/sys/dev/ath/ath_hal/ar5211/ar5211.h +++ b/sys/dev/ath/ath_hal/ar5211/ar5211.h @@ -286,6 +286,8 @@ extern HAL_BOOL ar5211GetDiagState(struct ath_hal *ah, int request, extern uint32_t ar5211Get11nExtBusy(struct ath_hal *); extern HAL_BOOL ar5211GetMibCycleCounts(struct ath_hal *, HAL_SURVEY_SAMPLE *); +extern void ar5211SetChainMasks(struct ath_hal *ah, uint32_t, uint32_t); + extern void ar5211EnableDfs(struct ath_hal *, HAL_PHYERR_PARAM *); extern void ar5211GetDfsThresh(struct ath_hal *, HAL_PHYERR_PARAM *); diff --git a/sys/dev/ath/ath_hal/ar5211/ar5211_attach.c b/sys/dev/ath/ath_hal/ar5211/ar5211_attach.c index 6f0379b..4549295 100644 --- a/sys/dev/ath/ath_hal/ar5211/ar5211_attach.c +++ b/sys/dev/ath/ath_hal/ar5211/ar5211_attach.c @@ -137,6 +137,7 @@ static const struct ath_hal_private ar5211hal = {{ .ah_setCoverageClass = ar5211SetCoverageClass, .ah_get11nExtBusy = ar5211Get11nExtBusy, .ah_getMibCycleCounts = ar5211GetMibCycleCounts, + .ah_setChainMasks = ar5211SetChainMasks, .ah_enableDfs = ar5211EnableDfs, .ah_getDfsThresh = ar5211GetDfsThresh, /* XXX procRadarEvent */ diff --git a/sys/dev/ath/ath_hal/ar5211/ar5211_misc.c b/sys/dev/ath/ath_hal/ar5211/ar5211_misc.c index 55f39e9..a1a5967 100644 --- a/sys/dev/ath/ath_hal/ar5211/ar5211_misc.c +++ b/sys/dev/ath/ath_hal/ar5211/ar5211_misc.c @@ -711,6 +711,12 @@ ar5211GetMibCycleCounts(struct ath_hal *ah, HAL_SURVEY_SAMPLE *hsample) } void +ar5211SetChainMasks(struct ath_hal *ah, uint32_t txchainmask, + uint32_t rxchainmask) +{ +} + +void ar5211EnableDfs(struct ath_hal *ah, HAL_PHYERR_PARAM *pe) { } diff --git a/sys/dev/ath/ath_hal/ar5212/ar5212.h b/sys/dev/ath/ath_hal/ar5212/ar5212.h index d7063c4..0631432 100644 --- a/sys/dev/ath/ath_hal/ar5212/ar5212.h +++ b/sys/dev/ath/ath_hal/ar5212/ar5212.h @@ -513,6 +513,7 @@ extern HAL_STATUS ar5212SetQuiet(struct ath_hal *ah, uint32_t period, uint32_t duration, uint32_t nextStart, HAL_QUIET_FLAG flag); extern HAL_BOOL ar5212GetMibCycleCounts(struct ath_hal *, HAL_SURVEY_SAMPLE *); +extern void ar5212SetChainMasks(struct ath_hal *, uint32_t, uint32_t); extern HAL_BOOL ar5212SetPowerMode(struct ath_hal *ah, HAL_POWER_MODE mode, int setChip); diff --git a/sys/dev/ath/ath_hal/ar5212/ar5212_attach.c b/sys/dev/ath/ath_hal/ar5212/ar5212_attach.c index 1870f94..e0af27c 100644 --- a/sys/dev/ath/ath_hal/ar5212/ar5212_attach.c +++ b/sys/dev/ath/ath_hal/ar5212/ar5212_attach.c @@ -134,6 +134,7 @@ static const struct ath_hal_private ar5212hal = {{ .ah_setCoverageClass = ar5212SetCoverageClass, .ah_setQuiet = ar5212SetQuiet, .ah_getMibCycleCounts = ar5212GetMibCycleCounts, + .ah_setChainMasks = ar5212SetChainMasks, /* DFS Functions */ .ah_enableDfs = ar5212EnableDfs, diff --git a/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c b/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c index 143090f..486de30 100644 --- a/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c +++ b/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c @@ -1413,3 +1413,9 @@ ar5212GetMibCycleCounts(struct ath_hal *ah, HAL_SURVEY_SAMPLE *hsample) return (AH_FALSE); } + +void +ar5212SetChainMasks(struct ath_hal *ah, uint32_t tx_chainmask, + uint32_t rx_chainmask) +{ +} diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416.h b/sys/dev/ath/ath_hal/ar5416/ar5416.h index d570588..98dcf5e 100644 --- a/sys/dev/ath/ath_hal/ar5416/ar5416.h +++ b/sys/dev/ath/ath_hal/ar5416/ar5416.h @@ -239,6 +239,7 @@ extern HAL_BOOL ar5416SetDecompMask(struct ath_hal *, uint16_t, int); extern void ar5416SetCoverageClass(struct ath_hal *, uint8_t, int); extern HAL_BOOL ar5416GetMibCycleCounts(struct ath_hal *ah, HAL_SURVEY_SAMPLE *hsample); +extern void ar5416SetChainMasks(struct ath_hal *ah, uint32_t, uint32_t); extern uint32_t ar5416Get11nExtBusy(struct ath_hal *ah); extern void ar5416Set11nMac2040(struct ath_hal *ah, HAL_HT_MACMODE mode); extern HAL_HT_RXCLEAR ar5416Get11nRxClear(struct ath_hal *ah); diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c b/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c index c26ca4b..9a0a479 100644 --- a/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c +++ b/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c @@ -150,6 +150,7 @@ ar5416InitState(struct ath_hal_5416 *ahp5416, uint16_t devid, HAL_SOFTC sc, ah->ah_setCoverageClass = ar5416SetCoverageClass; ah->ah_setQuiet = ar5416SetQuiet; ah->ah_getMibCycleCounts = ar5416GetMibCycleCounts; + ah->ah_setChainMasks = ar5416SetChainMasks; ah->ah_resetKeyCacheEntry = ar5416ResetKeyCacheEntry; ah->ah_setKeyCacheEntry = ar5416SetKeyCacheEntry; diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_misc.c b/sys/dev/ath/ath_hal/ar5416/ar5416_misc.c index 7b0e92b..6f47c5c 100644 --- a/sys/dev/ath/ath_hal/ar5416/ar5416_misc.c +++ b/sys/dev/ath/ath_hal/ar5416/ar5416_misc.c @@ -256,6 +256,20 @@ ar5416GetMibCycleCounts(struct ath_hal *ah, HAL_SURVEY_SAMPLE *hsample) } /* + * Setup the TX/RX chainmasks - this needs to be done before a call + * to the reset method as it doesn't update the hardware. + */ +void +ar5416SetChainMasks(struct ath_hal *ah, uint32_t tx_chainmask, + uint32_t rx_chainmask) +{ + HAL_CAPABILITIES *pCap = &AH_PRIVATE(ah)->ah_caps; + + AH5416(ah)->ah_tx_chainmask = tx_chainmask & pCap->halTxChainMask; + AH5416(ah)->ah_rx_chainmask = rx_chainmask & pCap->halRxChainMask; +} + +/* * Return approximation of extension channel busy over an time interval * 0% (clear) -> 100% (busy) * diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c b/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c index 75df5e9..5f8f2ad 100644 --- a/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c +++ b/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c @@ -44,7 +44,6 @@ static void ar5416InitBB(struct ath_hal *ah, const struct ieee80211_channel *); static void ar5416InitIMR(struct ath_hal *ah, HAL_OPMODE opmode); static void ar5416InitQoS(struct ath_hal *ah); static void ar5416InitUserSettings(struct ath_hal *ah); -static void ar5416UpdateChainMasks(struct ath_hal *ah, HAL_BOOL is_ht); static void ar5416OverrideIni(struct ath_hal *ah, const struct ieee80211_channel *); #if 0 @@ -210,11 +209,6 @@ ar5416Reset(struct ath_hal *ah, HAL_OPMODE opmode, __func__, OS_REG_READ(ah,AR_PHY_ADC_CTL)); /* - * Setup ah_tx_chainmask / ah_rx_chainmask before we fiddle - * with enabling the TX/RX radio chains. - */ - ar5416UpdateChainMasks(ah, IEEE80211_IS_CHAN_HT(chan)); - /* * This routine swaps the analog chains - it should be done * before any radio register twiddling is done. */ @@ -1464,31 +1458,6 @@ ar5416RestoreChainMask(struct ath_hal *ah) } } -/* - * Update the chainmask based on the current channel configuration. - * - * XXX ath9k checks bluetooth co-existence here - * XXX ath9k checks whether the current state is "off-channel". - * XXX ath9k sticks the hardware into 1x1 mode for legacy; - * we're going to leave multi-RX on for multi-path cancellation. - */ -static void -ar5416UpdateChainMasks(struct ath_hal *ah, HAL_BOOL is_ht) -{ - struct ath_hal_private *ahpriv = AH_PRIVATE(ah); - HAL_CAPABILITIES *pCap = &ahpriv->ah_caps; - - if (is_ht) { - AH5416(ah)->ah_tx_chainmask = pCap->halTxChainMask; - } else { - AH5416(ah)->ah_tx_chainmask = 1; - } - AH5416(ah)->ah_rx_chainmask = pCap->halRxChainMask; - HALDEBUG(ah, HAL_DEBUG_RESET, "TX chainmask: 0x%x; RX chainmask: 0x%x\n", - AH5416(ah)->ah_tx_chainmask, - AH5416(ah)->ah_rx_chainmask); -} - void ar5416InitPLL(struct ath_hal *ah, const struct ieee80211_channel *chan) { diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c b/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c index 945c766..118a43b 100644 --- a/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c +++ b/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c @@ -701,20 +701,6 @@ ar5416Set11nRateScenario(struct ath_hal *ah, struct ath_desc *ds, (void)nseries; /* - * XXX since the upper layers doesn't know the current chainmask - * XXX setup, just override its decisions here. - * XXX The upper layers need to be taught this! - */ - if (series[0].Tries != 0) - series[0].ChSel = AH5416(ah)->ah_tx_chainmask; - if (series[1].Tries != 0) - series[1].ChSel = AH5416(ah)->ah_tx_chainmask; - if (series[2].Tries != 0) - series[2].ChSel = AH5416(ah)->ah_tx_chainmask; - if (series[3].Tries != 0) - series[3].ChSel = AH5416(ah)->ah_tx_chainmask; - - /* * Only one of RTS and CTS enable must be set. * If a frame has both set, just do RTS protection - * that's enough to satisfy legacy protection. diff --git a/sys/dev/ath/if_ath.c b/sys/dev/ath/if_ath.c index 2ea3909..a614d6f 100644 --- a/sys/dev/ath/if_ath.c +++ b/sys/dev/ath/if_ath.c @@ -1476,6 +1476,26 @@ ath_reset_keycache(struct ath_softc *sc) ieee80211_crypto_reload_keys(ic); } +/* + * Fetch the current chainmask configuration based on the current + * operating channel and options. + */ +static void +ath_update_chainmasks(struct ath_softc *sc, struct ieee80211_channel *chan) +{ + + /* + * Set TX chainmask to the currently configured chainmask; + * the TX chainmask depends upon the current operating mode. + */ + sc->sc_cur_rxchainmask = sc->sc_rxchainmask; + if (IEEE80211_IS_CHAN_HT(chan)) { + sc->sc_cur_txchainmask = sc->sc_txchainmask; + } else { + sc->sc_cur_txchainmask = 1; + } +} + void ath_resume(struct ath_softc *sc) { @@ -1494,6 +1514,10 @@ ath_resume(struct ath_softc *sc) * Must reset the chip before we reload the * keycache as we were powered down on suspend. */ + ath_update_chainmasks(sc, + sc->sc_curchan != NULL ? sc->sc_curchan : ic->ic_curchan); + ath_hal_setchainmasks(sc->sc_ah, sc->sc_cur_txchainmask, + sc->sc_cur_rxchainmask); ath_hal_reset(ah, sc->sc_opmode, sc->sc_curchan != NULL ? sc->sc_curchan : ic->ic_curchan, AH_FALSE, &status); @@ -1935,6 +1959,9 @@ ath_init(void *arg) * and then setup of the interrupt mask. */ ath_settkipmic(sc); + ath_update_chainmasks(sc, ic->ic_curchan); + ath_hal_setchainmasks(sc->sc_ah, sc->sc_cur_txchainmask, + sc->sc_cur_rxchainmask); if (!ath_hal_reset(ah, sc->sc_opmode, ic->ic_curchan, AH_FALSE, &status)) { if_printf(ifp, "unable to reset hardware; hal status %u\n", status); @@ -2250,6 +2277,9 @@ ath_reset(struct ifnet *ifp, ATH_RESET_TYPE reset_type) ath_settkipmic(sc); /* configure TKIP MIC handling */ /* NB: indicate channel change so we do a full reset */ + ath_update_chainmasks(sc, ic->ic_curchan); + ath_hal_setchainmasks(sc->sc_ah, sc->sc_cur_txchainmask, + sc->sc_cur_rxchainmask); if (!ath_hal_reset(ah, sc->sc_opmode, ic->ic_curchan, AH_TRUE, &status)) if_printf(ifp, "%s: unable to reset hardware; hal status %u\n", __func__, status); @@ -4440,6 +4470,9 @@ ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan) */ ath_draintxq(sc, ATH_RESET_FULL); /* clear pending tx frames */ + ath_update_chainmasks(sc, chan); + ath_hal_setchainmasks(sc->sc_ah, sc->sc_cur_txchainmask, + sc->sc_cur_rxchainmask); if (!ath_hal_reset(ah, sc->sc_opmode, chan, AH_TRUE, &status)) { if_printf(ifp, "%s: unable to reset " "channel %u (%u MHz, flags 0x%x), hal status %u\n", diff --git a/sys/dev/ath/if_ath_tx_ht.c b/sys/dev/ath/if_ath_tx_ht.c index 7245d06..c0e72ac 100644 --- a/sys/dev/ath/if_ath_tx_ht.c +++ b/sys/dev/ath/if_ath_tx_ht.c @@ -499,20 +499,13 @@ ath_rateseries_setup(struct ath_softc *sc, struct ieee80211_node *ni, series[i].Tries = rc[i].tries; /* - * XXX this isn't strictly correct - sc_txchainmask - * XXX isn't the currently active chainmask; - * XXX it's the interface chainmask at startup. - * XXX It's overridden in the HAL rate scenario function - * XXX for now. - */ - /* * XXX TODO: When the NIC is capable of three stream TX, * transmit 1/2 stream rates on two streams. * * This reduces the power consumption of the NIC and * keeps it within the PCIe slot power limits. */ - series[i].ChSel = sc->sc_txchainmask; + series[i].ChSel = sc->sc_cur_txchainmask; if (flags & (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA)) series[i].RateFlags |= HAL_RATESERIES_RTS_CTS; @@ -542,6 +535,14 @@ ath_rateseries_setup(struct ath_softc *sc, struct ieee80211_node *ni, ni->ni_htcap & IEEE80211_HTCAP_SHORTGI20) series[i].RateFlags |= HAL_RATESERIES_HALFGI; + /* + * XXX TODO: STBC if it's possible + */ + + /* + * XXX TODO: LDPC if it's possible + */ + series[i].Rate = rt->info[rc[i].rix].rateCode; series[i].RateIndex = rc[i].rix; series[i].tx_power_cap = 0x3f; /* XXX for now */ diff --git a/sys/dev/ath/if_athvar.h b/sys/dev/ath/if_athvar.h index 1b6e160..e8fdeff 100644 --- a/sys/dev/ath/if_athvar.h +++ b/sys/dev/ath/if_athvar.h @@ -715,8 +715,10 @@ struct ath_softc { u_int32_t sc_avgtsfdeltap;/* TDMA slot adjust (+) */ u_int32_t sc_avgtsfdeltam;/* TDMA slot adjust (-) */ uint16_t *sc_eepromdata; /* Local eeprom data, if AR9100 */ - int sc_txchainmask; /* currently configured TX chainmask */ - int sc_rxchainmask; /* currently configured RX chainmask */ + int sc_txchainmask; /* hardware TX chainmask */ + int sc_rxchainmask; /* hardware RX chainmask */ + int sc_cur_txchainmask; /* currently configured TX chainmask */ + int sc_cur_rxchainmask; /* currently configured RX chainmask */ int sc_rts_aggr_limit; /* TX limit on RTS aggregates */ int sc_aggr_limit; /* TX limit on all aggregates */ int sc_delim_min_pad; /* Minimum delimiter count */ @@ -1334,6 +1336,8 @@ void ath_intr(void *); ((*(_ah)->ah_getMibCycleCounts)((_ah), (_sample))) #define ath_hal_get_chan_ext_busy(_ah) \ ((*(_ah)->ah_get11nExtBusy)((_ah))) +#define ath_hal_setchainmasks(_ah, _txchainmask, _rxchainmask) \ + ((*(_ah)->ah_setChainMasks)((_ah), (_txchainmask), (_rxchainmask))) #define ath_hal_spectral_supported(_ah) \ (ath_hal_getcapability(_ah, HAL_CAP_SPECTRAL_SCAN, 0, NULL) == HAL_OK) |