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+/*-
+ * Copyright (c) 2002, 2003 Sam Leffler, Errno Consulting
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer,
+ * without modification.
+ * 2. Redistributions in binary form must reproduce at minimum a disclaimer
+ * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
+ * redistribution must be conditioned upon including a substantially
+ * similar Disclaimer requirement for further binary redistribution.
+ * 3. Neither the names of the above-listed copyright holders nor the names
+ * of any contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * Alternatively, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2 as published by the Free
+ * Software Foundation.
+ *
+ * NO WARRANTY
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
+ * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGES.
+ *
+ * $FreeBSD$
+ */
+
+/*
+ * Ioctl-related defintions for the Atheros Wireless LAN controller driver.
+ */
+#ifndef _DEV_ATH_ATHIOCTL_H
+#define _DEV_ATH_ATHIOCTL_H
+
+struct ath_stats {
+ u_int32_t ast_watchdog; /* device reset by watchdog */
+ u_int32_t ast_hardware; /* fatal hardware error interrupts */
+ u_int32_t ast_bmiss; /* beacon miss interrupts */
+ u_int32_t ast_rxorn; /* rx overrun interrupts */
+ u_int32_t ast_rxeol; /* rx eol interrupts */
+ u_int32_t ast_txurn; /* tx underrun interrupts */
+ u_int32_t ast_intrcoal; /* interrupts coalesced */
+ u_int32_t ast_tx_mgmt; /* management frames transmitted */
+ u_int32_t ast_tx_discard; /* frames discarded prior to assoc */
+ u_int32_t ast_tx_qstop; /* output stopped 'cuz no buffer */
+ u_int32_t ast_tx_encap; /* tx encapsulation failed */
+ u_int32_t ast_tx_nonode; /* tx failed 'cuz no node */
+ u_int32_t ast_tx_nombuf; /* tx failed 'cuz no mbuf */
+ u_int32_t ast_tx_nomcl; /* tx failed 'cuz no cluster */
+ u_int32_t ast_tx_linear; /* tx linearized to cluster */
+ u_int32_t ast_tx_nodata; /* tx discarded empty frame */
+ u_int32_t ast_tx_busdma; /* tx failed for dma resrcs */
+ u_int32_t ast_tx_xretries;/* tx failed 'cuz too many retries */
+ u_int32_t ast_tx_fifoerr; /* tx failed 'cuz FIFO underrun */
+ u_int32_t ast_tx_filtered;/* tx failed 'cuz xmit filtered */
+ u_int32_t ast_tx_shortretry;/* tx on-chip retries (short) */
+ u_int32_t ast_tx_longretry;/* tx on-chip retries (long) */
+ u_int32_t ast_tx_badrate; /* tx failed 'cuz bogus xmit rate */
+ u_int32_t ast_tx_noack; /* tx frames with no ack marked */
+ u_int32_t ast_tx_rts; /* tx frames with rts enabled */
+ u_int32_t ast_tx_cts; /* tx frames with cts enabled */
+ u_int32_t ast_tx_shortpre;/* tx frames with short preamble */
+ u_int32_t ast_rx_nombuf; /* rx setup failed 'cuz no mbuf */
+ u_int32_t ast_rx_busdma; /* rx setup failed for dma resrcs */
+ u_int32_t ast_rx_orn; /* rx failed 'cuz of desc overrun */
+ u_int32_t ast_rx_tooshort;/* rx failed 'cuz frame too short */
+ u_int32_t ast_rx_crcerr; /* rx failed 'cuz of bad CRC */
+ u_int32_t ast_rx_fifoerr; /* rx failed 'cuz of FIFO overrun */
+ u_int32_t ast_rx_badcrypt;/* rx failed 'cuz decryption */
+ u_int32_t ast_rx_phyerr; /* rx failed 'cuz of PHY err */
+ u_int32_t ast_rx_phy[32]; /* rx PHY error per-code counts */
+ u_int32_t ast_be_nombuf; /* beacon setup failed 'cuz no mbuf */
+ u_int32_t ast_per_cal; /* periodic calibration calls */
+ u_int32_t ast_per_calfail;/* periodic calibration failed */
+ u_int32_t ast_per_rfgain; /* periodic calibration rfgain reset */
+ u_int32_t ast_rate_calls; /* rate control checks */
+ u_int32_t ast_rate_raise; /* rate control raised xmit rate */
+ u_int32_t ast_rate_drop; /* rate control dropped xmit rate */
+};
+
+#define SIOCGATHSTATS _IOWR('i', 137, struct ifreq)
+
+#endif /* _DEV_ATH_ATHIOCTL_H */
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