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Diffstat (limited to 'sys/boot/fdt/dts/arm/armada-380.dtsi')
-rw-r--r--sys/boot/fdt/dts/arm/armada-380.dtsi47
1 files changed, 28 insertions, 19 deletions
diff --git a/sys/boot/fdt/dts/arm/armada-380.dtsi b/sys/boot/fdt/dts/arm/armada-380.dtsi
index 876bae4..20a236a 100644
--- a/sys/boot/fdt/dts/arm/armada-380.dtsi
+++ b/sys/boot/fdt/dts/arm/armada-380.dtsi
@@ -88,26 +88,29 @@
<0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000
0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000
- 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000
- 0x82000000 0x1 0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 0 MEM */
- 0x81000000 0x1 0 MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 0 IO */
- 0x82000000 0x2 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 1 MEM */
- 0x81000000 0x2 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 1 IO */
- 0x82000000 0x3 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 2 MEM */
- 0x81000000 0x3 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 2 IO */>;
+ 0x82000000 0x0 0xf1200000 MBUS_ID(0x08, 0xe8) 0xf1200000 0 0x00100000 /* Port 0 MEM */
+ 0x81000000 0x0 0xf1300000 MBUS_ID(0x08, 0xe0) 0xf1300000 0 0x00100000 /* Port 0 IO */
+ 0x82000000 0x0 0xf1400000 MBUS_ID(0x04, 0xe8) 0xf1400000 0 0x00100000 /* Port 1 MEM */
+ 0x81000000 0x0 0xf1500000 MBUS_ID(0x04, 0xe0) 0xf1500000 0 0x00100000 /* Port 1 IO */
+ 0x82000000 0x0 0xf1600000 MBUS_ID(0x04, 0xd8) 0xf1600000 0 0x00100000 /* Port 2 MEM */
+ 0x81000000 0x0 0xf1700000 MBUS_ID(0x04, 0xd0) 0xf1700000 0 0x00100000 /* Port 2 IO */
+ >;
/* x1 port */
pcie@1,0 {
+ compatible = "mrvl,pcie";
device_type = "pci";
assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
- reg = <0x0800 0 0 0 0>;
+ reg = <0x0 0x0 0x80000 0x0 0x2000>;
#address-cells = <3>;
#size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
- 0x81000000 0 0 0x81000000 0x1 0 1 0>;
+ #interrupt-cells = <3>;
+ bus-range = <0 255>;
+ ranges = <0x82000000 0x0 0x0 0x82000000 0x0 0xf1200000 0x0 0x00100000
+ 0x81000000 0x0 0x0 0x81000000 0x0 0xf1300000 0x0 0x00100000>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-parent = <&gic>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 8>;
@@ -116,16 +119,19 @@
/* x1 port */
pcie@2,0 {
+ compatible = "mrvl,pcie";
device_type = "pci";
assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
- reg = <0x1000 0 0 0 0>;
+ reg = <0x0 0x0 0x40000 0x0 0x2000>;
#address-cells = <3>;
#size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
- 0x81000000 0 0 0x81000000 0x2 0 1 0>;
+ #interrupt-cells = <3>;
+ bus-range = <0 255>;
+ ranges = <0x82000000 0x0 0x0 0x82000000 0x0 0xf1400000 0x0 0x00100000
+ 0x81000000 0x0 0x0 0x81000000 0x0 0xf1500000 0x0 0x00100000>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-parent = <&gic>;
marvell,pcie-port = <1>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 5>;
@@ -134,16 +140,19 @@
/* x1 port */
pcie@3,0 {
+ compatible = "mrvl,pcie";
device_type = "pci";
assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
- reg = <0x1800 0 0 0 0>;
+ reg = <0x0 0x0 0x44000 0x0 0x2000>;
#address-cells = <3>;
#size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
- 0x81000000 0 0 0x81000000 0x3 0 1 0>;
+ #interrupt-cells = <3>;
+ bus-range = <0 255>;
+ ranges = <0x82000000 0x0 0x0 0x82000000 0x0 0xf1600000 0x0 0x00100000
+ 0x81000000 0x0 0x0 0x81000000 0x0 0xf1700000 0x0 0x00100000>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-parent = <&gic>;
marvell,pcie-port = <2>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 6>;
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