diff options
Diffstat (limited to 'sys/arm/freescale')
-rw-r--r-- | sys/arm/freescale/imx/imx6_sdma.c | 2 | ||||
-rw-r--r-- | sys/arm/freescale/imx/imx6_ssi.c | 2 | ||||
-rw-r--r-- | sys/arm/freescale/imx/imx_gpio.c | 171 | ||||
-rw-r--r-- | sys/arm/freescale/vybrid/vf_ccm.c | 10 | ||||
-rw-r--r-- | sys/arm/freescale/vybrid/vf_edma.c | 6 | ||||
-rw-r--r-- | sys/arm/freescale/vybrid/vf_port.c | 2 | ||||
-rw-r--r-- | sys/arm/freescale/vybrid/vf_sai.c | 12 |
7 files changed, 84 insertions, 121 deletions
diff --git a/sys/arm/freescale/imx/imx6_sdma.c b/sys/arm/freescale/imx/imx6_sdma.c index ae9a339..4839270 100644 --- a/sys/arm/freescale/imx/imx6_sdma.c +++ b/sys/arm/freescale/imx/imx6_sdma.c @@ -444,7 +444,7 @@ boot_firmware(struct sdma_softc *sc) if (timeout-- <= 0) break; DELAY(10); - }; + } if (ret == 0) { device_printf(sc->dev, "SDMA failed to boot\n"); diff --git a/sys/arm/freescale/imx/imx6_ssi.c b/sys/arm/freescale/imx/imx6_ssi.c index 184de2a..9387aa3 100644 --- a/sys/arm/freescale/imx/imx6_ssi.c +++ b/sys/arm/freescale/imx/imx6_ssi.c @@ -463,7 +463,7 @@ find_sdma_controller(struct sc_info *sc) if (sdma_sc == NULL) { device_printf(sc->dev, "No sDMA found. Can't operate\n"); return (ENXIO); - }; + } sc->sdma_sc = sdma_sc; diff --git a/sys/arm/freescale/imx/imx_gpio.c b/sys/arm/freescale/imx/imx_gpio.c index cdff020..df0f2ad 100644 --- a/sys/arm/freescale/imx/imx_gpio.c +++ b/sys/arm/freescale/imx/imx_gpio.c @@ -157,45 +157,6 @@ static int imx51_gpio_pin_toggle(device_t, uint32_t pin); #ifdef ARM_INTRNG static int -gpio_pic_teardown_intr(device_t dev, struct intr_irqsrc *isrc, - struct resource *res, struct intr_map_data *data) -{ - struct imx51_gpio_softc *sc; - struct gpio_irqsrc *gi; - - sc = device_get_softc(dev); - if (isrc->isrc_handlers == 0) { - gi = (struct gpio_irqsrc *)isrc; - gi->gi_pol = INTR_POLARITY_CONFORM; - gi->gi_trig = INTR_TRIGGER_CONFORM; - - // XXX Not sure this is necessary - mtx_lock_spin(&sc->sc_mtx); - CLEAR4(sc, IMX_GPIO_IMR_REG, (1U << gi->gi_irq)); - WRITE4(sc, IMX_GPIO_ISR_REG, (1U << gi->gi_irq)); - mtx_unlock_spin(&sc->sc_mtx); - } - return (0); -} - -/* - * this is mask_intr - */ -static void -gpio_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc) -{ - struct imx51_gpio_softc *sc; - u_int irq; - - sc = device_get_softc(dev); - irq = ((struct gpio_irqsrc *)isrc)->gi_irq; - - mtx_lock_spin(&sc->sc_mtx); - CLEAR4(sc, IMX_GPIO_IMR_REG, (1U << irq)); - mtx_unlock_spin(&sc->sc_mtx); -} - -static int gpio_pic_map_fdt(device_t dev, u_int ncells, pcell_t *cells, u_int *irqp, enum intr_polarity *polp, enum intr_trigger *trigp) { @@ -279,6 +240,28 @@ gpio_pic_map_intr(device_t dev, struct intr_map_data *data, } static int +gpio_pic_teardown_intr(device_t dev, struct intr_irqsrc *isrc, + struct resource *res, struct intr_map_data *data) +{ + struct imx51_gpio_softc *sc; + struct gpio_irqsrc *gi; + + sc = device_get_softc(dev); + if (isrc->isrc_handlers == 0) { + gi = (struct gpio_irqsrc *)isrc; + gi->gi_pol = INTR_POLARITY_CONFORM; + gi->gi_trig = INTR_TRIGGER_CONFORM; + + // XXX Not sure this is necessary + mtx_lock_spin(&sc->sc_mtx); + CLEAR4(sc, IMX_GPIO_IMR_REG, (1U << gi->gi_irq)); + WRITE4(sc, IMX_GPIO_ISR_REG, (1U << gi->gi_irq)); + mtx_unlock_spin(&sc->sc_mtx); + } + return (0); +} + +static int gpio_pic_setup_intr(device_t dev, struct intr_irqsrc *isrc, struct resource *res, struct intr_map_data *data) { @@ -345,6 +328,23 @@ gpio_pic_setup_intr(device_t dev, struct intr_irqsrc *isrc, } /* + * this is mask_intr + */ +static void +gpio_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc) +{ + struct imx51_gpio_softc *sc; + u_int irq; + + sc = device_get_softc(dev); + irq = ((struct gpio_irqsrc *)isrc)->gi_irq; + + mtx_lock_spin(&sc->sc_mtx); + CLEAR4(sc, IMX_GPIO_IMR_REG, (1U << irq)); + mtx_unlock_spin(&sc->sc_mtx); +} + +/* * this is unmask_intr */ static void @@ -417,7 +417,7 @@ gpio_pic_filter(void *arg) } /* - * register our isrcs into intrng to make it known about them. + * Initialize our isrcs and register them with intrng. */ static int gpio_pic_register_isrcs(struct imx51_gpio_softc *sc) @@ -451,22 +451,27 @@ static void imx51_gpio_pin_configure(struct imx51_gpio_softc *sc, struct gpio_pin *pin, unsigned int flags) { + u_int newflags; mtx_lock_spin(&sc->sc_mtx); /* - * Manage input/output + * Manage input/output; other flags not supported yet. + * + * Note that changes to pin->gp_flags must be acccumulated in newflags + * and stored with a single writeback to gp_flags at the end, to enable + * unlocked reads of that value elsewhere. */ - if (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) { - pin->gp_flags &= ~(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT); + if (flags & (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT)) { + newflags = pin->gp_flags & ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT); if (flags & GPIO_PIN_OUTPUT) { - pin->gp_flags |= GPIO_PIN_OUTPUT; + newflags |= GPIO_PIN_OUTPUT; SET4(sc, IMX_GPIO_OE_REG, (1U << pin->gp_pin)); - } - else { - pin->gp_flags |= GPIO_PIN_INPUT; + } else { + newflags |= GPIO_PIN_INPUT; CLEAR4(sc, IMX_GPIO_OE_REG, (1U << pin->gp_pin)); } + pin->gp_flags = newflags; } mtx_unlock_spin(&sc->sc_mtx); @@ -497,20 +502,13 @@ static int imx51_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) { struct imx51_gpio_softc *sc; - int i; sc = device_get_softc(dev); - for (i = 0; i < sc->gpio_npins; i++) { - if (sc->gpio_pins[i].gp_pin == pin) - break; - } - if (i >= sc->gpio_npins) + if (pin >= sc->gpio_npins) return (EINVAL); - mtx_lock_spin(&sc->sc_mtx); - *caps = sc->gpio_pins[i].gp_caps; - mtx_unlock_spin(&sc->sc_mtx); + *caps = sc->gpio_pins[pin].gp_caps; return (0); } @@ -519,20 +517,13 @@ static int imx51_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags) { struct imx51_gpio_softc *sc; - int i; sc = device_get_softc(dev); - for (i = 0; i < sc->gpio_npins; i++) { - if (sc->gpio_pins[i].gp_pin == pin) - break; - } - if (i >= sc->gpio_npins) + if (pin >= sc->gpio_npins) return (EINVAL); - mtx_lock_spin(&sc->sc_mtx); - *flags = sc->gpio_pins[i].gp_flags; - mtx_unlock_spin(&sc->sc_mtx); + *flags = sc->gpio_pins[pin].gp_flags; return (0); } @@ -541,19 +532,13 @@ static int imx51_gpio_pin_getname(device_t dev, uint32_t pin, char *name) { struct imx51_gpio_softc *sc; - int i; sc = device_get_softc(dev); - for (i = 0; i < sc->gpio_npins; i++) { - if (sc->gpio_pins[i].gp_pin == pin) - break; - } - - if (i >= sc->gpio_npins) + if (pin >= sc->gpio_npins) return (EINVAL); mtx_lock_spin(&sc->sc_mtx); - memcpy(name, sc->gpio_pins[i].gp_name, GPIOMAXNAME); + memcpy(name, sc->gpio_pins[pin].gp_name, GPIOMAXNAME); mtx_unlock_spin(&sc->sc_mtx); return (0); @@ -563,18 +548,13 @@ static int imx51_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags) { struct imx51_gpio_softc *sc; - int i; sc = device_get_softc(dev); - for (i = 0; i < sc->gpio_npins; i++) { - if (sc->gpio_pins[i].gp_pin == pin) - break; - } - if (i >= sc->gpio_npins) + if (pin >= sc->gpio_npins) return (EINVAL); - imx51_gpio_pin_configure(sc, &sc->gpio_pins[i], flags); + imx51_gpio_pin_configure(sc, &sc->gpio_pins[pin], flags); return (0); } @@ -583,22 +563,17 @@ static int imx51_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value) { struct imx51_gpio_softc *sc; - int i; sc = device_get_softc(dev); - for (i = 0; i < sc->gpio_npins; i++) { - if (sc->gpio_pins[i].gp_pin == pin) - break; - } - if (i >= sc->gpio_npins) + if (pin >= sc->gpio_npins) return (EINVAL); mtx_lock_spin(&sc->sc_mtx); if (value) - SET4(sc, IMX_GPIO_DR_REG, (1U << i)); + SET4(sc, IMX_GPIO_DR_REG, (1U << pin)); else - CLEAR4(sc, IMX_GPIO_DR_REG, (1U << i)); + CLEAR4(sc, IMX_GPIO_DR_REG, (1U << pin)); mtx_unlock_spin(&sc->sc_mtx); return (0); @@ -608,20 +583,13 @@ static int imx51_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val) { struct imx51_gpio_softc *sc; - int i; sc = device_get_softc(dev); - for (i = 0; i < sc->gpio_npins; i++) { - if (sc->gpio_pins[i].gp_pin == pin) - break; - } - if (i >= sc->gpio_npins) + if (pin >= sc->gpio_npins) return (EINVAL); - mtx_lock_spin(&sc->sc_mtx); - *val = (READ4(sc, IMX_GPIO_DR_REG) >> i) & 1; - mtx_unlock_spin(&sc->sc_mtx); + *val = (READ4(sc, IMX_GPIO_DR_REG) >> pin) & 1; return (0); } @@ -630,20 +598,15 @@ static int imx51_gpio_pin_toggle(device_t dev, uint32_t pin) { struct imx51_gpio_softc *sc; - int i; sc = device_get_softc(dev); - for (i = 0; i < sc->gpio_npins; i++) { - if (sc->gpio_pins[i].gp_pin == pin) - break; - } - if (i >= sc->gpio_npins) + if (pin >= sc->gpio_npins) return (EINVAL); mtx_lock_spin(&sc->sc_mtx); WRITE4(sc, IMX_GPIO_DR_REG, - (READ4(sc, IMX_GPIO_DR_REG) ^ (1U << i))); + (READ4(sc, IMX_GPIO_DR_REG) ^ (1U << pin))); mtx_unlock_spin(&sc->sc_mtx); return (0); diff --git a/sys/arm/freescale/vybrid/vf_ccm.c b/sys/arm/freescale/vybrid/vf_ccm.c index 8f8a3f0..82284d5 100644 --- a/sys/arm/freescale/vybrid/vf_ccm.c +++ b/sys/arm/freescale/vybrid/vf_ccm.c @@ -379,15 +379,15 @@ set_clock(struct ccm_softc *sc, char *name) reg &= ~(clk->sel_mask << clk->sel_shift); reg |= (clk->sel_val << clk->sel_shift); WRITE4(sc, clk->sel_reg, reg); - }; + } reg = READ4(sc, clk->reg); reg |= clk->enable_reg; reg &= ~(clk->div_mask << clk->div_shift); reg |= (clk->div_val << clk->div_shift); WRITE4(sc, clk->reg, reg); - }; - }; + } + } return (0); } @@ -425,8 +425,8 @@ ccm_fdt_set(struct ccm_softc *sc) fdt_config += strlen(name) + 1; len -= strlen(name) + 1; set_clock(sc, name); - }; - }; + } + } if (OF_peer(child) == 0) { /* No more siblings. */ diff --git a/sys/arm/freescale/vybrid/vf_edma.c b/sys/arm/freescale/vybrid/vf_edma.c index ed12072..9317921 100644 --- a/sys/arm/freescale/vybrid/vf_edma.c +++ b/sys/arm/freescale/vybrid/vf_edma.c @@ -161,7 +161,7 @@ channel_configure(struct edma_softc *sc, int mux_grp, int mux_src) } else { channel_first = 0; mux_num = sc->device_id * 2; - }; + } /* Take first unused eDMA channel */ ch = NULL; @@ -171,12 +171,12 @@ channel_configure(struct edma_softc *sc, int mux_grp, int mux_src) break; } ch = NULL; - }; + } if (ch == NULL) { /* Can't find free channel */ return (-1); - }; + } chnum = i; diff --git a/sys/arm/freescale/vybrid/vf_port.c b/sys/arm/freescale/vybrid/vf_port.c index 943ca88..6ff8bfc 100644 --- a/sys/arm/freescale/vybrid/vf_port.c +++ b/sys/arm/freescale/vybrid/vf_port.c @@ -171,7 +171,7 @@ port_setup(int pnum, enum ev_type pevt, void (*ih)(void *), void *ih_user) break; default: return (-1); - }; + } reg = READ4(sc, PORT_PCR(pnum)); reg &= ~(PCR_IRQC_M << PCR_IRQC_S); diff --git a/sys/arm/freescale/vybrid/vf_sai.c b/sys/arm/freescale/vybrid/vf_sai.c index 309d95e..83f689f 100644 --- a/sys/arm/freescale/vybrid/vf_sai.c +++ b/sys/arm/freescale/vybrid/vf_sai.c @@ -433,7 +433,7 @@ find_edma_controller(struct sc_info *sc) if ((len = OF_getproplen(edma_node, "device-id")) <= 0) { return (ENXIO); - }; + } OF_getprop(edma_node, "device-id", &dts_value, len); edma_device_id = fdt32_to_cpu(dts_value); @@ -447,16 +447,16 @@ find_edma_controller(struct sc_info *sc) if (edma_sc->device_id == edma_device_id) { /* found */ break; - }; + } edma_sc = NULL; - }; - }; + } + } if (edma_sc == NULL) { device_printf(sc->dev, "no eDMA. can't operate\n"); return (ENXIO); - }; + } sc->edma_sc = edma_sc; @@ -465,7 +465,7 @@ find_edma_controller(struct sc_info *sc) if (sc->edma_chnum < 0) { /* cant setup eDMA */ return (ENXIO); - }; + } return (0); }; |