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Diffstat (limited to 'sys/arm/broadcom/bcm2835/bcm2835_sdhci.c')
-rw-r--r--sys/arm/broadcom/bcm2835/bcm2835_sdhci.c23
1 files changed, 22 insertions, 1 deletions
diff --git a/sys/arm/broadcom/bcm2835/bcm2835_sdhci.c b/sys/arm/broadcom/bcm2835/bcm2835_sdhci.c
index 14422e2..cfba2cd 100644
--- a/sys/arm/broadcom/bcm2835/bcm2835_sdhci.c
+++ b/sys/arm/broadcom/bcm2835/bcm2835_sdhci.c
@@ -78,6 +78,17 @@ __FBSDID("$FreeBSD$");
#define dprintf(fmt, args...)
#endif
+/*
+ * Arasan HC seems to have problem with Data CRC on lower frequencies.
+ * Use this tunable to cap initialization sequence frequency at higher
+ * value. Default is standard 400kHz
+ */
+static int bcm2835_sdhci_min_freq = 400000;
+static int bcm2835_sdhci_hs = 1;
+
+TUNABLE_INT("hw.bcm2835.sdhci.min_freq", &bcm2835_sdhci_min_freq);
+TUNABLE_INT("hw.bcm2835.sdhci.hs", &bcm2835_sdhci_hs);
+
struct bcm_sdhci_dmamap_arg {
bus_addr_t sc_dma_busaddr;
};
@@ -180,7 +191,9 @@ bcm_sdhci_attach(device_t dev)
goto fail;
}
- sc->sc_slot.caps = SDHCI_CAN_VDD_330 | SDHCI_CAN_VDD_180 | SDHCI_CAN_DO_HISPD;
+ sc->sc_slot.caps = SDHCI_CAN_VDD_330 | SDHCI_CAN_VDD_180;
+ if (bcm2835_sdhci_hs)
+ sc->sc_slot.caps |= SDHCI_CAN_DO_HISPD;
sc->sc_slot.caps |= (default_freq << SDHCI_CLOCK_BASE_SHIFT);
sc->sc_slot.quirks = SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK
| SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
@@ -334,6 +347,13 @@ bcm_sdhci_write_multi_4(device_t dev, struct sdhci_slot *slot, bus_size_t off,
bus_space_write_multi_4(sc->sc_bst, sc->sc_bsh, off, data, count);
}
+static uint32_t
+bcm_sdhci_min_freq(device_t dev, struct sdhci_slot *slot)
+{
+
+ return bcm2835_sdhci_min_freq;
+}
+
static device_method_t bcm_sdhci_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, bcm_sdhci_probe),
@@ -353,6 +373,7 @@ static device_method_t bcm_sdhci_methods[] = {
DEVMETHOD(mmcbr_release_host, sdhci_generic_release_host),
/* SDHCI registers accessors */
+ DEVMETHOD(sdhci_min_freq, bcm_sdhci_min_freq),
DEVMETHOD(sdhci_read_1, bcm_sdhci_read_1),
DEVMETHOD(sdhci_read_2, bcm_sdhci_read_2),
DEVMETHOD(sdhci_read_4, bcm_sdhci_read_4),
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