diff options
Diffstat (limited to 'sys/amd64')
-rw-r--r-- | sys/amd64/amd64/db_interface.c | 4 | ||||
-rw-r--r-- | sys/amd64/amd64/fpu.c | 16 | ||||
-rw-r--r-- | sys/amd64/amd64/genassym.c | 1 | ||||
-rw-r--r-- | sys/amd64/amd64/initcpu.c | 4 | ||||
-rw-r--r-- | sys/amd64/amd64/sys_machdep.c | 4 | ||||
-rw-r--r-- | sys/amd64/amd64/vm_machdep.c | 4 | ||||
-rw-r--r-- | sys/amd64/include/cpufunc.h | 11 | ||||
-rw-r--r-- | sys/amd64/include/mutex.h | 50 | ||||
-rw-r--r-- | sys/amd64/isa/npx.c | 16 |
9 files changed, 39 insertions, 71 deletions
diff --git a/sys/amd64/amd64/db_interface.c b/sys/amd64/amd64/db_interface.c index 9708cad..000085b 100644 --- a/sys/amd64/amd64/db_interface.c +++ b/sys/amd64/amd64/db_interface.c @@ -324,10 +324,10 @@ Debugger(msg) return; if (atomic_cmpset_acq_int(&in_Debugger, 0, 1)) { - savecrit = critical_enter(); + savecrit = cpu_critical_enter(); db_printf("Debugger(\"%s\")\n", msg); breakpoint(); - critical_exit(savecrit); + cpu_critical_exit(savecrit); atomic_store_rel_int(&in_Debugger, 0); } } diff --git a/sys/amd64/amd64/fpu.c b/sys/amd64/amd64/fpu.c index ff8c4cf..34a822a 100644 --- a/sys/amd64/amd64/fpu.c +++ b/sys/amd64/amd64/fpu.c @@ -515,7 +515,7 @@ npxinit(control) * fnsave to throw away any junk in the fpu. npxsave() initializes * the fpu and sets fpcurthread = NULL as important side effects. */ - savecrit = critical_enter(); + savecrit = cpu_critical_enter(); npxsave(&dummy); stop_emulating(); #ifdef CPU_ENABLE_SSE @@ -527,7 +527,7 @@ npxinit(control) if (PCPU_GET(curpcb) != NULL) fpusave(&PCPU_GET(curpcb)->pcb_save); start_emulating(); - critical_exit(savecrit); + cpu_critical_exit(savecrit); } /* @@ -539,10 +539,10 @@ npxexit(td) { critical_t savecrit; - savecrit = critical_enter(); + savecrit = cpu_critical_enter(); if (td == PCPU_GET(fpcurthread)) npxsave(&PCPU_GET(curpcb)->pcb_save); - critical_exit(savecrit); + cpu_critical_exit(savecrit); #ifdef NPX_DEBUG if (npx_exists) { u_int masked_exceptions; @@ -762,7 +762,7 @@ npxtrap() PCPU_GET(fpcurthread), curthread, npx_exists); panic("npxtrap from nowhere"); } - savecrit = critical_enter(); + savecrit = cpu_critical_enter(); /* * Interrupt handling (for another interrupt) may have pushed the @@ -783,7 +783,7 @@ npxtrap() GET_FPU_SW(curthread) &= ~0x80bf; else fnclex(); - critical_exit(savecrit); + cpu_critical_exit(savecrit); return (fpetable[status & ((~control & 0x3f) | 0x40)]); } @@ -807,7 +807,7 @@ npxdna() PCPU_GET(fpcurthread), curthread); panic("npxdna"); } - s = critical_enter(); + s = cpu_critical_enter(); stop_emulating(); /* * Record new context early in case frstor causes an IRQ13. @@ -829,7 +829,7 @@ npxdna() * first FPU instruction after a context switch. */ fpurstor(&PCPU_GET(curpcb)->pcb_save); - critical_exit(s); + cpu_critical_exit(s); return (1); } diff --git a/sys/amd64/amd64/genassym.c b/sys/amd64/amd64/genassym.c index 59f3147..99fa502 100644 --- a/sys/amd64/amd64/genassym.c +++ b/sys/amd64/amd64/genassym.c @@ -205,7 +205,6 @@ ASSYM(VM86_FRAMESIZE, sizeof(struct vm86frame)); ASSYM(MTX_LOCK, offsetof(struct mtx, mtx_lock)); ASSYM(MTX_RECURSECNT, offsetof(struct mtx, mtx_recurse)); -ASSYM(MTX_SAVECRIT, offsetof(struct mtx, mtx_savecrit)); #ifdef PC98 #include <machine/bus.h> diff --git a/sys/amd64/amd64/initcpu.c b/sys/amd64/amd64/initcpu.c index b32c786..8a9a2a5 100644 --- a/sys/amd64/amd64/initcpu.c +++ b/sys/amd64/amd64/initcpu.c @@ -646,7 +646,7 @@ enable_K5_wt_alloc(void) * a stepping of 4 or greater. */ if (((cpu_id & 0xf0) > 0) && ((cpu_id & 0x0f) > 3)) { - savecrit = critical_enter(); + savecrit = cpu_critical_enter(); msr = rdmsr(0x83); /* HWCR */ wrmsr(0x83, msr & !(0x10)); @@ -678,7 +678,7 @@ enable_K5_wt_alloc(void) msr=rdmsr(0x83); wrmsr(0x83, msr|0x10); /* enable write allocate */ - critical_exit(savecrit); + cpu_critical_exit(savecrit); } } diff --git a/sys/amd64/amd64/sys_machdep.c b/sys/amd64/amd64/sys_machdep.c index a88acc9..b7beea9 100644 --- a/sys/amd64/amd64/sys_machdep.c +++ b/sys/amd64/amd64/sys_machdep.c @@ -532,13 +532,13 @@ i386_set_ldt(td, args) } /* Fill in range */ - savecrit = critical_enter(); + savecrit = cpu_critical_enter(); error = copyin(uap->descs, &((union descriptor *)(pldt->ldt_base))[uap->start], uap->num * sizeof(union descriptor)); if (!error) td->td_retval[0] = uap->start; - critical_exit(savecrit); + cpu_critical_exit(savecrit); return(error); } diff --git a/sys/amd64/amd64/vm_machdep.c b/sys/amd64/amd64/vm_machdep.c index 322b5e7..4f1dab2 100644 --- a/sys/amd64/amd64/vm_machdep.c +++ b/sys/amd64/amd64/vm_machdep.c @@ -153,10 +153,10 @@ cpu_fork(td1, p2, flags) #ifdef DEV_NPX if (td1 == curthread) td1->td_pcb->pcb_gs = rgs(); - savecrit = critical_enter(); + savecrit = cpu_critical_enter(); if (PCPU_GET(fpcurthread) == td1) npxsave(&td1->td_pcb->pcb_save); - critical_exit(savecrit); + cpu_critical_exit(savecrit); #endif /* Point the pcb to the top of the stack */ diff --git a/sys/amd64/include/cpufunc.h b/sys/amd64/include/cpufunc.h index 4a9300a..a4f57cb 100644 --- a/sys/amd64/include/cpufunc.h +++ b/sys/amd64/include/cpufunc.h @@ -41,6 +41,7 @@ #define _MACHINE_CPUFUNC_H_ #include <sys/cdefs.h> +#include <machine/psl.h> __BEGIN_DECLS #define readb(va) (*(volatile u_int8_t *) (va)) @@ -51,6 +52,8 @@ __BEGIN_DECLS #define writew(va, d) (*(volatile u_int16_t *) (va) = (d)) #define writel(va, d) (*(volatile u_int32_t *) (va) = (d)) +#define CRITICAL_FORK (read_eflags() | PSL_I) + #ifdef __GNUC__ #ifdef SWTCH_OPTIM_STATS @@ -548,7 +551,7 @@ load_dr7(u_int sel) } static __inline critical_t -critical_enter(void) +cpu_critical_enter(void) { critical_t eflags; @@ -558,7 +561,7 @@ critical_enter(void) } static __inline void -critical_exit(critical_t eflags) +cpu_critical_exit(critical_t eflags) { write_eflags(eflags); } @@ -597,8 +600,8 @@ u_int rfs __P((void)); u_int rgs __P((void)); void load_fs __P((u_int sel)); void load_gs __P((u_int sel)); -critical_t critical_enter __P((void)); -void critical_exit __P((critical_t eflags)); +critical_t cpu_critical_enter __P((void)); +void cpu_critical_exit __P((critical_t eflags)); #endif /* __GNUC__ */ diff --git a/sys/amd64/include/mutex.h b/sys/amd64/include/mutex.h index ae37b23..e68bce7 100644 --- a/sys/amd64/include/mutex.h +++ b/sys/amd64/include/mutex.h @@ -35,13 +35,10 @@ #ifndef LOCORE #ifdef _KERNEL -#include <machine/psl.h> /* Global locks */ extern struct mtx clock_lock; -#define mtx_intr_enable(mutex) do (mutex)->mtx_savecrit |= PSL_I; while (0) - /* * Assembly macros (for internal use only) *------------------------------------------------------------------------------ @@ -246,51 +243,20 @@ extern struct mtx clock_lock; * locks) in the near future, however. */ #define MTX_LOCK_SPIN(lck, flags) \ - pushl %eax ; \ - pushl %ecx ; \ - pushl %ebx ; \ - movl $(MTX_UNOWNED) , %eax ; \ - movl PCPU(CURTHREAD), %ebx ; \ - pushfl ; \ - popl %ecx ; \ - cli ; \ - MPLOCKED cmpxchgl %ebx, lck+MTX_LOCK ; \ - jz 2f ; \ - cmpl lck+MTX_LOCK, %ebx ; \ - je 3f ; \ pushl $0 ; \ pushl $0 ; \ - pushl %ecx ; \ pushl $flags ; \ pushl $lck ; \ - call _mtx_lock_spin ; \ - addl $0x14, %esp ; \ - jmp 1f ; \ -3: movl lck+MTX_RECURSECNT, %ebx ; \ - incl %ebx ; \ - movl %ebx, lck+MTX_RECURSECNT ; \ - jmp 1f ; \ -2: movl %ecx, lck+MTX_SAVECRIT ; \ -1: popl %ebx ; \ - popl %ecx ; \ - popl %eax + call _mtx_lock_spin_flags ; \ + addl $0x10, %esp ; \ #define MTX_UNLOCK_SPIN(lck) \ - pushl %edx ; \ - pushl %eax ; \ - movl lck+MTX_SAVECRIT, %edx ; \ - movl lck+MTX_RECURSECNT, %eax ; \ - testl %eax, %eax ; \ - jne 2f ; \ - movl $(MTX_UNOWNED), %eax ; \ - xchgl %eax, lck+MTX_LOCK ; \ - pushl %edx ; \ - popfl ; \ - jmp 1f ; \ -2: decl %eax ; \ - movl %eax, lck+MTX_RECURSECNT ; \ -1: popl %eax ; \ - popl %edx + pushl $0 ; \ + pushl $0 ; \ + pushl $0 ; \ + pushl $lck ; \ + call _mtx_unlock_spin_flags ; \ + addl $0x10, %esp ; \ /* * XXX: These two are broken right now and need to be made to work for diff --git a/sys/amd64/isa/npx.c b/sys/amd64/isa/npx.c index ff8c4cf..34a822a 100644 --- a/sys/amd64/isa/npx.c +++ b/sys/amd64/isa/npx.c @@ -515,7 +515,7 @@ npxinit(control) * fnsave to throw away any junk in the fpu. npxsave() initializes * the fpu and sets fpcurthread = NULL as important side effects. */ - savecrit = critical_enter(); + savecrit = cpu_critical_enter(); npxsave(&dummy); stop_emulating(); #ifdef CPU_ENABLE_SSE @@ -527,7 +527,7 @@ npxinit(control) if (PCPU_GET(curpcb) != NULL) fpusave(&PCPU_GET(curpcb)->pcb_save); start_emulating(); - critical_exit(savecrit); + cpu_critical_exit(savecrit); } /* @@ -539,10 +539,10 @@ npxexit(td) { critical_t savecrit; - savecrit = critical_enter(); + savecrit = cpu_critical_enter(); if (td == PCPU_GET(fpcurthread)) npxsave(&PCPU_GET(curpcb)->pcb_save); - critical_exit(savecrit); + cpu_critical_exit(savecrit); #ifdef NPX_DEBUG if (npx_exists) { u_int masked_exceptions; @@ -762,7 +762,7 @@ npxtrap() PCPU_GET(fpcurthread), curthread, npx_exists); panic("npxtrap from nowhere"); } - savecrit = critical_enter(); + savecrit = cpu_critical_enter(); /* * Interrupt handling (for another interrupt) may have pushed the @@ -783,7 +783,7 @@ npxtrap() GET_FPU_SW(curthread) &= ~0x80bf; else fnclex(); - critical_exit(savecrit); + cpu_critical_exit(savecrit); return (fpetable[status & ((~control & 0x3f) | 0x40)]); } @@ -807,7 +807,7 @@ npxdna() PCPU_GET(fpcurthread), curthread); panic("npxdna"); } - s = critical_enter(); + s = cpu_critical_enter(); stop_emulating(); /* * Record new context early in case frstor causes an IRQ13. @@ -829,7 +829,7 @@ npxdna() * first FPU instruction after a context switch. */ fpurstor(&PCPU_GET(curpcb)->pcb_save); - critical_exit(s); + cpu_critical_exit(s); return (1); } |