diff options
Diffstat (limited to 'lib/libc/ia64')
52 files changed, 3879 insertions, 0 deletions
diff --git a/lib/libc/ia64/Makefile.inc b/lib/libc/ia64/Makefile.inc new file mode 100644 index 0000000..b451f85 --- /dev/null +++ b/lib/libc/ia64/Makefile.inc @@ -0,0 +1,9 @@ +# $FreeBSD$ +# +# Machine dependent definitions for the ia64 architecture. +# + +# Long double is 80 bits +GDTOASRCS+=strtorx.c +MDSRCS+=machdep_ldisx.c +SYM_MAPS+=${.CURDIR}/ia64/Symbol.map diff --git a/lib/libc/ia64/SYS.h b/lib/libc/ia64/SYS.h new file mode 100644 index 0000000..eb019a2 --- /dev/null +++ b/lib/libc/ia64/SYS.h @@ -0,0 +1,63 @@ +/* $NetBSD: SYS.h,v 1.5 1997/05/02 18:15:15 kleink Exp $ */ + +/* + * Copyright (c) 1994, 1995 Carnegie-Mellon University. + * All rights reserved. + * + * Author: Chris G. Demetriou + * + * Permission to use, copy, modify and distribute this software and + * its documentation is hereby granted, provided that both the copyright + * notice and this permission notice appear in all copies of the + * software, derivative works or modified versions, and any portions + * thereof, and that both notices appear in supporting documentation. + * + * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" + * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND + * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * + * Carnegie Mellon requests users of this software to return to + * + * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU + * School of Computer Science + * Carnegie Mellon University + * Pittsburgh PA 15213-3890 + * + * any improvements or extensions that they make and grant Carnegie the + * rights to redistribute these changes. + * + * $FreeBSD$ + */ + +#include <machine/asm.h> +#include <sys/syscall.h> + +#define CALLSYS_ERROR(name) \ + CALLSYS_NOERROR(name); \ + cmp.ne p6,p0=r0,r10; \ +(p6) br.cond.sptk.few .cerror + + +#define SYSCALL(name) \ +ENTRY(__sys_ ## name,0); /* XXX # of args? */ \ + WEAK_ALIAS(name, __sys_ ## name); \ + WEAK_ALIAS(_ ## name, __sys_ ## name); \ + CALLSYS_ERROR(name) + +#define SYSCALL_NOERROR(name) \ +ENTRY(__sys_ ## name,0); /* XXX # of args? */ \ + WEAK_ALIAS(name, __sys_ ## name); \ + WEAK_ALIAS(_ ## name, __sys_ ## name); \ + CALLSYS_NOERROR(name) + +#define RSYSCALL(name) \ + SYSCALL(name); \ + br.ret.sptk.few rp; \ +END(__sys_ ## name) + +#define PSEUDO(name) \ +ENTRY(__sys_ ## name,0); /* XXX # of args? */ \ + WEAK_ALIAS(_ ## name, __sys_ ## name); \ + CALLSYS_ERROR(name); \ + br.ret.sptk.few rp; \ +END(__sys_ ## name); diff --git a/lib/libc/ia64/Symbol.map b/lib/libc/ia64/Symbol.map new file mode 100644 index 0000000..a730922 --- /dev/null +++ b/lib/libc/ia64/Symbol.map @@ -0,0 +1,72 @@ +/* + * $FreeBSD$ + */ + +/* + * This only needs to contain symbols that are not listed in + * symbol maps from other parts of libc (i.e., not found in + * stdlib/Symbol.map, string/Symbol.map, sys/Symbol.map, ...). + */ +FBSD_1.0 { + /* PSEUDO syscalls */ + _exit; + + mcount; + _setjmp; + _longjmp; + fabs; + __flt_rounds; + fpgetmask; + fpgetround; + fpsetmask; + fpsetround; + __infinity; + __nan; + makecontext; + modf; + setjmp; + longjmp; + sigsetjmp; + siglongjmp; + htonl; + htons; + ntohl; + ntohs; + vfork; + brk; + exect; + sbrk; +}; + +FBSDprivate_1.0 { + /* PSEUDO syscalls */ + __sys_getlogin; + _getlogin; + __sys_exit; + + _set_tp; + __divdf3; + __divdi3; + __divsf3; + __divsi3; + __moddi3; + __modsi3; + __udivdi3; + __udivsi3; + __umoddi3; + __umodsi3; + _mcount; + ___longjmp; + __makecontext; + __longjmp; + signalcontext; + __signalcontext; + __siglongjmp; + _Unwind_FindTableEntry; + __sys_vfork; + _vfork; + _end; + minbrk; + .cerror; + curbrk; +}; diff --git a/lib/libc/ia64/_fpmath.h b/lib/libc/ia64/_fpmath.h new file mode 100644 index 0000000..936ce23 --- /dev/null +++ b/lib/libc/ia64/_fpmath.h @@ -0,0 +1,82 @@ +/*- + * Copyright (c) 2003 Mike Barcroft <mike@FreeBSD.org> + * Copyright (c) 2002, 2003 David Schultz <das@FreeBSD.ORG> + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#include <sys/endian.h> + +union IEEEl2bits { + long double e; + struct { +#if _BYTE_ORDER == _LITTLE_ENDIAN + unsigned int manl :32; + unsigned int manh :32; + unsigned int exp :15; + unsigned int sign :1; + unsigned long junk :48; +#else /* _BIG_ENDIAN */ + unsigned long junk :48; + unsigned int sign :1; + unsigned int exp :15; + unsigned int manh :32; + unsigned int manl :32; +#endif + } bits; + struct { +#if _BYTE_ORDER == _LITTLE_ENDIAN + unsigned long man :64; + unsigned int expsign :16; + unsigned long junk :48; +#else /* _BIG_ENDIAN */ + unsigned long junk :48; + unsigned int expsign :16; + unsigned long man :64; +#endif + } xbits; +}; + +#if _BYTE_ORDER == _LITTLE_ENDIAN +#define LDBL_NBIT 0x80000000 +#define mask_nbit_l(u) ((u).bits.manh &= ~LDBL_NBIT) +#else /* _BIG_ENDIAN */ +/* + * XXX This doesn't look right. Very few machines have a different + * endianness for integers and floating-point, and in nextafterl() + * we assume that none do. If you have an environment for testing + * this, please let me know. --das + */ +#define LDBL_NBIT 0x80 +#define mask_nbit_l(u) ((u).bits.manh &= ~LDBL_NBIT) +#endif + +#define LDBL_MANH_SIZE 32 +#define LDBL_MANL_SIZE 32 + +#define LDBL_TO_ARRAY32(u, a) do { \ + (a)[0] = (uint32_t)(u).bits.manl; \ + (a)[1] = (uint32_t)(u).bits.manh; \ +} while (0) diff --git a/lib/libc/ia64/arith.h b/lib/libc/ia64/arith.h new file mode 100644 index 0000000..6726528 --- /dev/null +++ b/lib/libc/ia64/arith.h @@ -0,0 +1,37 @@ +/* + * MD header for contrib/gdtoa + * + * $FreeBSD$ + */ + +/* + * NOTE: The definitions in this file must be correct or strtod(3) and + * floating point formats in printf(3) will break! The file can be + * generated by running contrib/gdtoa/arithchk.c on the target + * architecture. See contrib/gdtoa/gdtoaimp.h for details. + */ + +#include <machine/endian.h> + +#if _BYTE_ORDER == _LITTLE_ENDIAN + +#define IEEE_8087 +#define Arith_Kind_ASL 1 +#define Long int +#define Intcast (int)(long) +#define Double_Align +#define X64_bit_pointers + +#else /* _BYTE_ORDER == _LITTLE_ENDIAN */ + +#define IEEE_MC68k +#define Arith_Kind_ASL 2 +#define Long int +#define Intcast (int)(long) +#define Double_Align +#define X64_bit_pointers +#ifdef gcc_bug /* XXX Why does arithchk report sudden underflow here? */ +#define Sudden_Underflow +#endif + +#endif diff --git a/lib/libc/ia64/gd_qnan.h b/lib/libc/ia64/gd_qnan.h new file mode 100644 index 0000000..3992386 --- /dev/null +++ b/lib/libc/ia64/gd_qnan.h @@ -0,0 +1,21 @@ +/* + * MD header for contrib/gdtoa + * + * This file can be generated by compiling and running contrib/gdtoa/qnan.c + * on the target architecture after arith.h has been generated. + * + * $FreeBSD$ + */ + +#define f_QNAN 0x7fc00000 +#define d_QNAN0 0x0 +#define d_QNAN1 0x7ff80000 +#define ld_QNAN0 0x0 +#define ld_QNAN1 0xc0000000 +#define ld_QNAN2 0x7fff +#define ld_QNAN3 0x0 +#define ldus_QNAN0 0x0 +#define ldus_QNAN1 0x0 +#define ldus_QNAN2 0x0 +#define ldus_QNAN3 0xc000 +#define ldus_QNAN4 0x7fff diff --git a/lib/libc/ia64/gen/Makefile.inc b/lib/libc/ia64/gen/Makefile.inc new file mode 100644 index 0000000..5358ea8 --- /dev/null +++ b/lib/libc/ia64/gen/Makefile.inc @@ -0,0 +1,11 @@ +# $FreeBSD$ + +SRCS+= __divdf3.S __divdi3.S __divsf3.S __divsi3.S __moddi3.S __modsi3.S \ + __udivdi3.S __udivsi3.S __umoddi3.S __umodsi3.S _mcount.S _set_tp.c \ + _setjmp.S fabs.S flt_rounds.c fpgetmask.c fpgetround.c fpsetmask.c \ + fpsetround.c infinity.c ldexp.c makecontext.c modf.c setjmp.S \ + signalcontext.c sigsetjmp.S + +# The following may go away if function _Unwind_FindTableEntry() +# will be part of GCC. +SRCS+= unwind.c diff --git a/lib/libc/ia64/gen/__divdf3.S b/lib/libc/ia64/gen/__divdf3.S new file mode 100644 index 0000000..58425d9 --- /dev/null +++ b/lib/libc/ia64/gen/__divdf3.S @@ -0,0 +1,142 @@ +// +// Copyright (c) 2000, Intel Corporation +// All rights reserved. +// +// Contributed 2/15/2000 by Marius Cornea, John Harrison, Cristina Iordache, +// Ted Kubaska, Bob Norin, and Shane Story of the Computational Software Lab, +// Intel Corporation. +// +// WARRANTY DISCLAIMER +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS +// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY +// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING +// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// +// Intel Corporation is the author of this code, and requests that all +// problem reports or change requests be submitted to it directly at +// http://developer.intel.com/opensource. +// + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + + .section .text + +ENTRY(__divdf3, 0) +{ .mfi + // a is in f8 + // b is in f9 + + // predicate registers used: p6 + // floating-point registers used: f6, f7, f8, f9, f10, f11 + + // load a, the first argument, in f6 + nop.m 0 + mov f6=f8 + nop.i 0 +} { .mfi + // load b, the second argument, in f7 + nop.m 0 + mov f7=f9 + nop.i 0;; +} { .mfi + + // BEGIN DOUBLE PRECISION LATENCY-OPTIMIZED DIVIDE ALGORITHM + + nop.m 0 + // Step (1) + // y0 = 1 / b in f8 + frcpa.s0 f8,p6=f6,f7 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (2) + // q0 = a * y0 in f9 + (p6) fma.s1 f9=f6,f8,f0 + nop.i 0 +} { .mfi + nop.m 0 + // Step (3) + // e0 = 1 - b * y0 in f10 + (p6) fnma.s1 f10=f7,f8,f1 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (4) + // q1 = q0 + e0 * q0 in f9 + (p6) fma.s1 f9=f10,f9,f9 + nop.i 0 +} { .mfi + nop.m 0 + // Step (5) + // e1 = e0 * e0 in f11 + (p6) fma.s1 f11=f10,f10,f0 + nop.i 0 +} { .mfi + nop.m 0 + // Step (6) + // y1 = y0 + e0 * y0 in f8 + (p6) fma.s1 f8=f10,f8,f8 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (7) + // q2 = q1 + e1 * q1 in f9 + (p6) fma.s1 f9=f11,f9,f9 + nop.i 0 +} { .mfi + nop.m 0 + // Step (8) + // e2 = e1 * e1 in f10 + (p6) fma.s1 f10=f11,f11,f0 + nop.i 0 +} { .mfi + nop.m 0 + // Step (9) + // y2 = y1 + e1 * y1 in f8 + (p6) fma.s1 f8=f11,f8,f8 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (10) + // q3 = q2 + e2 * q2 in f9 + (p6) fma.d.s1 f9=f10,f9,f9 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (11) + // y3 = y2 + e2 * y2 in f8 + (p6) fma.s1 f8=f10,f8,f8 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (12) + // r0 = a - b * q3 in f6 + (p6) fnma.d.s1 f6=f7,f9,f6 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (13) + // q4 = q3 + r0 * y3 in f8 + (p6) fma.d.s0 f8=f6,f8,f9 + nop.i 0;; + + // END DOUBLE PRECISION LATENCY-OPTIMIZED DIVIDE ALGORITHM + +} { .mib + nop.m 0 + nop.i 0 + // return + br.ret.sptk b0;; +} + +END(__divdf3) + diff --git a/lib/libc/ia64/gen/__divdi3.S b/lib/libc/ia64/gen/__divdi3.S new file mode 100644 index 0000000..92e2911 --- /dev/null +++ b/lib/libc/ia64/gen/__divdi3.S @@ -0,0 +1,143 @@ +.file "__divdi3.s" + +// +// Copyright (c) 2000, Intel Corporation +// All rights reserved. +// +// Contributed 2/15/2000 by Marius Cornea, John Harrison, Cristina Iordache, +// Ted Kubaska, Bob Norin, and Shane Story of the Computational Software Lab, +// Intel Corporation. +// +// WARRANTY DISCLAIMER +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS +// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY +// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING +// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// +// Intel Corporation is the author of this code, and requests that all +// problem reports or change requests be submitted to it directly at +// http://developer.intel.com/opensource. +// + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +.section .text +.proc __divdi3# +.align 32 +.global __divdi3# +.align 32 + +// 64-bit signed integer divide + +__divdi3: + +{ .mii + alloc r31=ar.pfs,2,0,0,0 + nop.i 0 + nop.i 0;; +} { .mmi + + // 64-BIT SIGNED INTEGER DIVIDE BEGINS HERE + + setf.sig f8=r32 + setf.sig f9=r33 + nop.i 0;; +} { .mfb + nop.m 0 + fcvt.xf f6=f8 + nop.b 0 +} { .mfb + nop.m 0 + fcvt.xf f7=f9 + nop.b 0;; +} { .mfi + nop.m 0 + // Step (1) + // y0 = 1 / b in f8 + frcpa.s1 f8,p6=f6,f7 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (2) + // e0 = 1 - b * y0 in f9 + (p6) fnma.s1 f9=f7,f8,f1 + nop.i 0 +} { .mfi + nop.m 0 + // Step (3) + // q0 = a * y0 in f10 + (p6) fma.s1 f10=f6,f8,f0 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (4) + // e1 = e0 * e0 in f11 + (p6) fma.s1 f11=f9,f9,f0 + nop.i 0 +} { .mfi + nop.m 0 + // Step (5) + // q1 = q0 + e0 * q0 in f10 + (p6) fma.s1 f10=f9,f10,f10 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (6) + // y1 = y0 + e0 * y0 in f8 + (p6) fma.s1 f8=f9,f8,f8 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (7) + // q2 = q1 + e1 * q1 in f9 + (p6) fma.s1 f9=f11,f10,f10 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (8) + // y2 = y1 + e1 * y1 in f8 + (p6) fma.s1 f8=f11,f8,f8 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (9) + // r2 = a - b * q2 in f10 + (p6) fnma.s1 f10=f7,f9,f6 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (10) + // q3 = q2 + r2 * y2 in f8 + (p6) fma.s1 f8=f10,f8,f9 + nop.i 0;; +} { .mfb + nop.m 0 + // Step (11) + // q = trunc (q3) + fcvt.fx.trunc.s1 f8=f8 + nop.b 0;; +} { .mmi + // quotient will be in r8 (if b != 0) + getf.sig r8=f8 + nop.m 0 + nop.i 0;; +} + + // 64-BIT SIGNED INTEGER DIVIDE ENDS HERE + +{ .mmb + nop.m 0 + nop.m 0 + br.ret.sptk b0;; +} + +.endp __divdi3 diff --git a/lib/libc/ia64/gen/__divsf3.S b/lib/libc/ia64/gen/__divsf3.S new file mode 100644 index 0000000..fe7bcb4 --- /dev/null +++ b/lib/libc/ia64/gen/__divsf3.S @@ -0,0 +1,116 @@ +// +// Copyright (c) 2000, Intel Corporation +// All rights reserved. +// +// Contributed 2/15/2000 by Marius Cornea, John Harrison, Cristina Iordache, +// Ted Kubaska, Bob Norin, and Shane Story of the Computational Software Lab, +// Intel Corporation. +// +// WARRANTY DISCLAIMER +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS +// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY +// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING +// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// +// Intel Corporation is the author of this code, and requests that all +// problem reports or change requests be submitted to it directly at +// http://developer.intel.com/opensource. +// + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +ENTRY(__divsf3, 0) +{ .mfi + // a is in f8 + // b is in f9 + + // general registers used: r31, r32, r33, r34 + // predicate registers used: p6 + // floating-point registers used: f6, f7, f8 + + nop.m 0 + // load a, the first argument, in f6 + mov f6=f8 + nop.i 0;; +} { .mfi + nop.m 0 + // load b, the second argument, in f7 + mov f7=f9 + nop.i 0;; +} { .mfi + + // BEGIN SINGLE PRECISION LATENCY-OPTIMIZED DIVIDE ALGORITHM + + nop.m 0 + // Step (1) + // y0 = 1 / b in f8 + frcpa.s0 f8,p6=f6,f7 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (2) + // q0 = a * y0 in f6 + (p6) fma.s1 f6=f6,f8,f0 + nop.i 0 +} { .mfi + nop.m 0 + // Step (3) + // e0 = 1 - b * y0 in f7 + (p6) fnma.s1 f7=f7,f8,f1 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (4) + // q1 = q0 + e0 * q0 in f6 + (p6) fma.s1 f6=f7,f6,f6 + nop.i 0 +} { .mfi + nop.m 0 + // Step (5) + // e1 = e0 * e0 in f7 + (p6) fma.s1 f7=f7,f7,f0 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (6) + // q2 = q1 + e1 * q1 in f6 + (p6) fma.s1 f6=f7,f6,f6 + nop.i 0 +} { .mfi + nop.m 0 + // Step (7) + // e2 = e1 * e1 in f7 + (p6) fma.s1 f7=f7,f7,f0 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (8) + // q3 = q2 + e2 * q2 in f6 + (p6) fma.d.s1 f6=f7,f6,f6 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (9) + // q3' = q3 in f8 + (p6) fma.s.s0 f8=f6,f1,f0 + nop.i 0;; + + // END SINGLE PRECISION LATENCY-OPTIMIZED DIVIDE ALGORITHM + +} { .mmb + nop.m 0 + nop.m 0 + // return + br.ret.sptk b0;; +} + +END(__divsf3) diff --git a/lib/libc/ia64/gen/__divsi3.S b/lib/libc/ia64/gen/__divsi3.S new file mode 100644 index 0000000..4c82e32 --- /dev/null +++ b/lib/libc/ia64/gen/__divsi3.S @@ -0,0 +1,125 @@ +.file "__divsi3.s" + +// +// Copyright (c) 2000, Intel Corporation +// All rights reserved. +// +// Contributed 2/15/2000 by Marius Cornea, John Harrison, Cristina Iordache, +// Ted Kubaska, Bob Norin, and Shane Story of the Computational Software Lab, +// Intel Corporation. +// +// WARRANTY DISCLAIMER +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS +// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY +// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING +// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// +// Intel Corporation is the author of this code, and requests that all +// problem reports or change requests be submitted to it directly at +// http://developer.intel.com/opensource. +// + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +.section .text + +// 32-bit signed integer divide + +.proc __divsi3# +.align 32 +.global __divsi3# +.align 32 + +__divsi3: + +{ .mii + alloc r31=ar.pfs,2,0,0,0 + nop.i 0 + nop.i 0;; +} { .mii + nop.m 0 + + // 32-BIT SIGNED INTEGER DIVIDE BEGINS HERE + + // general register used: + // r32 - 32-bit signed integer dividend + // r33 - 32-bit signed integer divisor + // r8 - 32-bit signed integer result + // r2 - scratch register + // floating-point registers used: f6, f7, f8, f9 + // predicate registers used: p6 + + sxt4 r32=r32 + sxt4 r33=r33;; +} { .mmb + setf.sig f6=r32 + setf.sig f7=r33 + nop.b 0;; +} { .mfi + nop.m 0 + fcvt.xf f6=f6 + nop.i 0 +} { .mfi + nop.m 0 + fcvt.xf f7=f7 + mov r2 = 0x0ffdd;; +} { .mfi + setf.exp f9 = r2 + // (1) y0 + frcpa.s1 f8,p6=f6,f7 + nop.i 0;; +} { .mfi + nop.m 0 + // (2) q0 = a * y0 + (p6) fma.s1 f6=f6,f8,f0 + nop.i 0 +} { .mfi + nop.m 0 + // (3) e0 = 1 - b * y0 + (p6) fnma.s1 f7=f7,f8,f1 + nop.i 0;; +} { .mfi + nop.m 0 + // (4) q1 = q0 + e0 * q0 + (p6) fma.s1 f6=f7,f6,f6 + nop.i 0 +} { .mfi + nop.m 0 + // (5) e1 = e0 * e0 + 2^-34 + (p6) fma.s1 f7=f7,f7,f9 + nop.i 0;; +} { .mfi + nop.m 0 + // (6) q2 = q1 + e1 * q1 + (p6) fma.s1 f8=f7,f6,f6 + nop.i 0;; +} { .mfi + nop.m 0 + // (7) q = trunc(q2) + fcvt.fx.trunc.s1 f8=f8 + nop.i 0;; +} { .mmi + // quotient will be in the least significant 32 bits of r8 (if b != 0) + getf.sig r8=f8 + nop.m 0 + nop.i 0;; +} + + // 32-BIT SIGNED INTEGER DIVIDE ENDS HERE + +{ .mmb + nop.m 0 + nop.m 0 + br.ret.sptk b0;; +} + +.endp __divsi3 diff --git a/lib/libc/ia64/gen/__moddi3.S b/lib/libc/ia64/gen/__moddi3.S new file mode 100644 index 0000000..e15f964 --- /dev/null +++ b/lib/libc/ia64/gen/__moddi3.S @@ -0,0 +1,160 @@ +.file "__moddi3.s" + +// +// Copyright (c) 2000, Intel Corporation +// All rights reserved. +// +// Contributed 2/15/2000 by Marius Cornea, John Harrison, Cristina Iordache, +// Ted Kubaska, Bob Norin, and Shane Story of the Computational Software Lab, +// Intel Corporation. +// +// WARRANTY DISCLAIMER +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS +// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY +// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING +// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// +// Intel Corporation is the author of this code, and requests that all +// problem reports or change requests be submitted to it directly at +// http://developer.intel.com/opensource. +// + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +.section .text + +// 64-bit signed integer remainder + +.proc __moddi3# +.align 32 +.global __moddi3# +.align 32 + +__moddi3: + +{ .mii + alloc r31=ar.pfs,3,0,0,0 + nop.i 0 + nop.i 0 +} { .mmb + + // 64-BIT SIGNED INTEGER REMAINDER BEGINS HERE + + // general register used: + // r32 - 64-bit signed integer dividend + // r33 - 64-bit signed integer divisor + // r8 - 64-bit signed integer result + // r2 - scratch register + // floating-point registers used: f6, f7, f8, f9, f10, f11, f12 + // predicate registers used: p6 + + setf.sig f12=r32 // holds an in integer form + setf.sig f7=r33 + nop.b 0 +} { .mlx + nop.m 0 + //movl r2=0x8000000000000000;; + movl r2=0xffffffffffffffff;; +} { .mfi + // get the 2's complement of b + sub r33=r0,r33 + fcvt.xf f6=f12 + nop.i 0 +} { .mfi + nop.m 0 + fcvt.xf f7=f7 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (1) + // y0 = 1 / b in f8 + frcpa.s1 f8,p6=f6,f7 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (2) + // q0 = a * y0 in f10 + (p6) fma.s1 f10=f6,f8,f0 + nop.i 0 +} { .mfi + nop.m 0 + // Step (3) + // e0 = 1 - b * y0 in f9 + (p6) fnma.s1 f9=f7,f8,f1 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (4) + // q1 = q0 + e0 * q0 in f10 + (p6) fma.s1 f10=f9,f10,f10 + nop.i 0 +} { .mfi + nop.m 0 + // Step (5) + // e1 = e0 * e0 in f11 + (p6) fma.s1 f11=f9,f9,f0 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (6) + // y1 = y0 + e0 * y0 in f8 + (p6) fma.s1 f8=f9,f8,f8 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (7) + // q2 = q1 + e1 * q1 in f9 + (p6) fma.s1 f9=f11,f10,f10 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (8) + // y2 = y1 + e1 * y1 in f8 + (p6) fma.s1 f8=f11,f8,f8 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (9) + // r2 = a - b * q2 in f10 + (p6) fnma.s1 f10=f7,f9,f6 + nop.i 0;; +} { .mfi + setf.sig f7=r33 + // Step (10) + // q3 = q2 + r2 * y2 in f8 + (p6) fma.s1 f8=f10,f8,f9 + nop.i 0;; +} { .mfi + nop.m 0 + // (11) q = trunc(q3) + fcvt.fx.trunc.s1 f8=f8 + nop.i 0;; +} { .mfi + nop.m 0 + // (12) r = a + (-b) * q + xma.l f8=f8,f7,f12 + nop.i 0;; +} { .mib + getf.sig r8=f8 + nop.i 0 + nop.b 0 +} + + // 64-BIT SIGNED INTEGER REMAINDER ENDS HERE + +{ .mib + nop.m 0 + nop.i 0 + br.ret.sptk b0;; +} + +.endp __moddi3 diff --git a/lib/libc/ia64/gen/__modsi3.S b/lib/libc/ia64/gen/__modsi3.S new file mode 100644 index 0000000..1939493 --- /dev/null +++ b/lib/libc/ia64/gen/__modsi3.S @@ -0,0 +1,132 @@ +.file "__modsi3.s" + +// +// Copyright (c) 2000, Intel Corporation +// All rights reserved. +// +// Contributed 2/15/2000 by Marius Cornea, John Harrison, Cristina Iordache, +// Ted Kubaska, Bob Norin, and Shane Story of the Computational Software Lab, +// Intel Corporation. +// +// WARRANTY DISCLAIMER +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS +// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY +// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING +// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// +// Intel Corporation is the author of this code, and requests that all +// problem reports or change requests be submitted to it directly at +// http://developer.intel.com/opensource. +// + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +.section .text + +// 32-bit signed integer remainder + +.proc __modsi3# +.align 32 +.global __modsi3# +.align 32 + +__modsi3: + +{ .mii + alloc r31=ar.pfs,2,0,0,0 + nop.i 0 + nop.i 0;; +} { .mii + nop.m 0 + + // 32-BIT SIGNED INTEGER REMAINDER BEGINS HERE + + // general register used: + // r32 - 32-bit signed integer dividend + // r33 - 32-bit signed integer divisor + // r8 - 32-bit signed integer result + // r2 - scratch register + // floating-point registers used: f6, f7, f8, f9, f10, f11 + // predicate registers used: p6 + + sxt4 r32=r32 + sxt4 r33=r33;; +} { .mmb + setf.sig f11=r32 + setf.sig f7=r33 + nop.b 0;; +} { .mfi + // get 2's complement of b + sub r33=r0,r33 + fcvt.xf f6=f11 + nop.i 0 +} { .mfi + nop.m 0 + fcvt.xf f7=f7 + mov r2 = 0x0ffdd;; +} { .mfi + setf.exp f9 = r2 + // (1) y0 + frcpa.s1 f8,p6=f6,f7 + nop.i 0;; +} { .mfi + nop.m 0 + // (2) q0 = a * y0 + (p6) fma.s1 f10=f6,f8,f0 + nop.i 0 +} { .mfi + nop.m 0 + // (3) e0 = 1 - b * y0 + (p6) fnma.s1 f8=f7,f8,f1 + nop.i 0;; +} { .mfi + // 2's complement of b + setf.sig f7=r33 + // (4) q1 = q0 + e0 * q0 + (p6) fma.s1 f10=f8,f10,f10 + nop.i 0 +} { .mfi + nop.m 0 + // (5) e1 = e0 * e0 + 2^-34 + (p6) fma.s1 f8=f8,f8,f9 + nop.i 0;; +} { .mfi + nop.m 0 + // (6) q2 = q1 + e1 * q1 + (p6) fma.s1 f8=f8,f10,f10 + nop.i 0;; +} { .mfi + nop.m 0 + // (7) q = trunc(q2) + fcvt.fx.trunc.s1 f8=f8 + nop.i 0;; +} { .mfi + nop.m 0 + // (8) r = a + (-b) * q + xma.l f8=f8,f7,f11 + nop.i 0;; +} { .mmi + // remainder will be in the least significant 32 bits of r8 (if b != 0) + getf.sig r8=f8 + nop.m 0 + nop.i 0;; +} + + // 32-BIT SIGNED INTEGER REMAINDER ENDS HERE + +{ .mmb + nop.m 0 + nop.m 0 + br.ret.sptk b0;; +} + +.endp __modsi3 diff --git a/lib/libc/ia64/gen/__udivdi3.S b/lib/libc/ia64/gen/__udivdi3.S new file mode 100644 index 0000000..1233e8a --- /dev/null +++ b/lib/libc/ia64/gen/__udivdi3.S @@ -0,0 +1,144 @@ +.file "__udivdi3.s" + +// +// Copyright (c) 2000, Intel Corporation +// All rights reserved. +// +// Contributed 2/15/2000 by Marius Cornea, John Harrison, Cristina Iordache, +// Ted Kubaska, Bob Norin, and Shane Story of the Computational Software Lab, +// Intel Corporation. +// +// WARRANTY DISCLAIMER +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS +// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY +// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING +// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// +// Intel Corporation is the author of this code, and requests that all +// problem reports or change requests be submitted to it directly at +// http://developer.intel.com/opensource. +// + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +.section .text +.proc __udivdi3# +.align 32 +.global __udivdi3# +.align 32 + +// 64-bit unsigned integer divide + +__udivdi3: + +{ .mii + alloc r31=ar.pfs,2,0,0,0 + nop.i 0 + nop.i 0;; +} + +{ .mmi + + // 64-BIT UNSIGNED INTEGER DIVIDE BEGINS HERE + + setf.sig f8=r32 + setf.sig f9=r33 + nop.i 0;; +} { .mfb + nop.m 0 + fma.s1 f6=f8,f1,f0 + nop.b 0 +} { .mfb + nop.m 0 + fma.s1 f7=f9,f1,f0 + nop.b 0;; +} { .mfi + nop.m 0 + // Step (1) + // y0 = 1 / b in f8 + frcpa.s1 f8,p6=f6,f7 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (2) + // e0 = 1 - b * y0 in f9 + (p6) fnma.s1 f9=f7,f8,f1 + nop.i 0 +} { .mfi + nop.m 0 + // Step (3) + // q0 = a * y0 in f10 + (p6) fma.s1 f10=f6,f8,f0 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (4) + // e1 = e0 * e0 in f11 + (p6) fma.s1 f11=f9,f9,f0 + nop.i 0 +} { .mfi + nop.m 0 + // Step (5) + // q1 = q0 + e0 * q0 in f10 + (p6) fma.s1 f10=f9,f10,f10 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (6) + // y1 = y0 + e0 * y0 in f8 + (p6) fma.s1 f8=f9,f8,f8 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (7) + // q2 = q1 + e1 * q1 in f9 + (p6) fma.s1 f9=f11,f10,f10 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (8) + // y2 = y1 + e1 * y1 in f8 + (p6) fma.s1 f8=f11,f8,f8 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (9) + // r2 = a - b * q2 in f10 + (p6) fnma.s1 f10=f7,f9,f6 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (10) + // q3 = q2 + r2 * y2 in f8 + (p6) fma.s1 f8=f10,f8,f9 + nop.i 0;; +} { .mfb + nop.m 0 + // (11) q = trunc(q3) + fcvt.fxu.trunc.s1 f8=f8 + nop.b 0;; +} { .mmi + // quotient will be in r8 (if b != 0) + getf.sig r8=f8 + nop.m 0 + nop.i 0;; +} + + // 64-BIT UNSIGNED INTEGER DIVIDE ENDS HERE + +{ .mmb + nop.m 0 + nop.m 0 + br.ret.sptk b0;; +} + +.endp __udivdi3 diff --git a/lib/libc/ia64/gen/__udivsi3.S b/lib/libc/ia64/gen/__udivsi3.S new file mode 100644 index 0000000..25959b8 --- /dev/null +++ b/lib/libc/ia64/gen/__udivsi3.S @@ -0,0 +1,125 @@ +.file "__udivsi3.s" + +// +// Copyright (c) 2000, Intel Corporation +// All rights reserved. +// +// Contributed 2/15/2000 by Marius Cornea, John Harrison, Cristina Iordache, +// Ted Kubaska, Bob Norin, and Shane Story of the Computational Software Lab, +// Intel Corporation. +// +// WARRANTY DISCLAIMER +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS +// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY +// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING +// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// +// Intel Corporation is the author of this code, and requests that all +// problem reports or change requests be submitted to it directly at +// http://developer.intel.com/opensource. +// + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +.section .text + +// 32-bit unsigned integer divide + +.proc __udivsi3# +.align 32 +.global __udivsi3# +.align 32 + +__udivsi3: + +{ .mii + alloc r31=ar.pfs,2,0,0,0 + nop.i 0 + nop.i 0;; +} { .mii + nop.m 0 + + // 32-BIT UNSIGNED INTEGER DIVIDE BEGINS HERE + + // general register used: + // r32 - 32-bit unsigned integer dividend + // r33 - 32-bit unsigned integer divisor + // r8 - 32-bit unsigned integer result + // r2 - scratch register + // floating-point registers used: f6, f7, f8, f9 + // predicate registers used: p6 + + zxt4 r32=r32 + zxt4 r33=r33;; +} { .mmb + setf.sig f6=r32 + setf.sig f7=r33 + nop.b 0;; +} { .mfi + nop.m 0 + fcvt.xf f6=f6 + nop.i 0 +} { .mfi + nop.m 0 + fcvt.xf f7=f7 + mov r2 = 0x0ffdd;; +} { .mfi + setf.exp f9 = r2 + // (1) y0 + frcpa.s1 f8,p6=f6,f7 + nop.i 0;; +} { .mfi + nop.m 0 + // (2) q0 = a * y0 + (p6) fma.s1 f6=f6,f8,f0 + nop.i 0 +} { .mfi + nop.m 0 + // (3) e0 = 1 - b * y0 + (p6) fnma.s1 f7=f7,f8,f1 + nop.i 0;; +} { .mfi + nop.m 0 + // (4) q1 = q0 + e0 * q0 + (p6) fma.s1 f6=f7,f6,f6 + nop.i 0 +} { .mfi + nop.m 0 + // (5) e1 = e0 * e0 + 2^-34 + (p6) fma.s1 f7=f7,f7,f9 + nop.i 0;; +} { .mfi + nop.m 0 + // (6) q2 = q1 + e1 * q1 + (p6) fma.s1 f8=f7,f6,f6 + nop.i 0;; +} { .mfi + nop.m 0 + // (7) q = trunc(q2) + fcvt.fxu.trunc.s1 f8=f8 + nop.i 0;; +} { .mmi + // quotient will be in the least significant 32 bits of r8 (if b != 0) + getf.sig r8=f8 + nop.m 0 + nop.i 0;; +} + + // 32-BIT UNSIGNED INTEGER DIVIDE ENDS HERE + +{ .mmb + nop.m 0 + nop.m 0 + br.ret.sptk b0;; +} + +.endp __udivsi3 diff --git a/lib/libc/ia64/gen/__umoddi3.S b/lib/libc/ia64/gen/__umoddi3.S new file mode 100644 index 0000000..509c62b --- /dev/null +++ b/lib/libc/ia64/gen/__umoddi3.S @@ -0,0 +1,156 @@ +.file "__umoddi3.s" + +// +// Copyright (c) 2000, Intel Corporation +// All rights reserved. +// +// Contributed 2/15/2000 by Marius Cornea, John Harrison, Cristina Iordache, +// Ted Kubaska, Bob Norin, and Shane Story of the Computational Software Lab, +// Intel Corporation. +// +// WARRANTY DISCLAIMER +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS +// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY +// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING +// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// +// Intel Corporation is the author of this code, and requests that all +// problem reports or change requests be submitted to it directly at +// http://developer.intel.com/opensource. +// + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +.section .text + + // 64-bit unsigned integer remainder + +.proc __umoddi3# +.align 32 +.global __umoddi3# +.align 32 + +__umoddi3: + +{ .mii + alloc r31=ar.pfs,3,0,0,0 + nop.i 0 + nop.i 0 +} { .mmb + + // 64-BIT UNSIGNED INTEGER REMAINDER BEGINS HERE + + // general register used: + // r32 - 64-bit unsigned integer dividend + // r33 - 64-bit unsigned integer divisor + // r8 - 64-bit unsigned integer result + // floating-point registers used: f6, f7, f8, f9, f10, f11, f12 + // predicate registers used: p6 + + setf.sig f12=r32 // holds an in integer form + setf.sig f7=r33 + nop.b 0;; +} { .mfi + // get 2's complement of b + sub r33=r0,r33 + fcvt.xuf.s1 f6=f12 + nop.i 0 +} { .mfi + nop.m 0 + fcvt.xuf.s1 f7=f7 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (1) + // y0 = 1 / b in f8 + frcpa.s1 f8,p6=f6,f7 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (2) + // q0 = a * y0 in f10 + (p6) fma.s1 f10=f6,f8,f0 + nop.i 0 +} { .mfi + nop.m 0 + // Step (3) + // e0 = 1 - b * y0 in f9 + (p6) fnma.s1 f9=f7,f8,f1 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (4) + // q1 = q0 + e0 * q0 in f10 + (p6) fma.s1 f10=f9,f10,f10 + nop.i 0 +} { .mfi + nop.m 0 + // Step (5) + // e1 = e0 * e0 in f11 + (p6) fma.s1 f11=f9,f9,f0 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (6) + // y1 = y0 + e0 * y0 in f8 + (p6) fma.s1 f8=f9,f8,f8 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (7) + // q2 = q1 + e1 * q1 in f9 + (p6) fma.s1 f9=f11,f10,f10 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (8) + // y2 = y1 + e1 * y1 in f8 + (p6) fma.s1 f8=f11,f8,f8 + nop.i 0;; +} { .mfi + nop.m 0 + // Step (9) + // r2 = a - b * q2 in f10 + (p6) fnma.s1 f10=f7,f9,f6 + nop.i 0;; +} { .mfi + // f7=-b + setf.sig f7=r33 + // Step (10) + // q3 = q2 + r2 * y2 in f8 + (p6) fma.s1 f8=f10,f8,f9 + nop.i 0;; +} { .mfi + nop.m 0 + // (11) q = trunc(q3) + fcvt.fxu.trunc.s1 f8=f8 + nop.i 0;; +} { .mfi + nop.m 0 + // (12) r = a + (-b) * q + xma.l f8=f8,f7,f12 + nop.i 0;; +} { .mib + getf.sig r8=f8 + nop.i 0 + nop.b 0 +} + + // 64-BIT UNSIGNED INTEGER REMAINDER ENDS HERE + +{ .mib + nop.m 0 + nop.i 0 + br.ret.sptk b0;; +} + +.endp __umoddi3 diff --git a/lib/libc/ia64/gen/__umodsi3.S b/lib/libc/ia64/gen/__umodsi3.S new file mode 100644 index 0000000..697db2e --- /dev/null +++ b/lib/libc/ia64/gen/__umodsi3.S @@ -0,0 +1,132 @@ +.file "__umodsi3.s" + +// +// Copyright (c) 2000, Intel Corporation +// All rights reserved. +// +// Contributed 2/15/2000 by Marius Cornea, John Harrison, Cristina Iordache, +// Ted Kubaska, Bob Norin, and Shane Story of the Computational Software Lab, +// Intel Corporation. +// +// WARRANTY DISCLAIMER +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS +// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY +// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING +// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// +// Intel Corporation is the author of this code, and requests that all +// problem reports or change requests be submitted to it directly at +// http://developer.intel.com/opensource. +// + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +.section .text + +// 32-bit unsigned integer remainder + +.proc __umodsi3# +.align 32 +.global __umodsi3# +.align 32 + +__umodsi3: + +{ .mii + alloc r31=ar.pfs,2,0,0,0 + nop.i 0 + nop.i 0;; +} { .mii + nop.m 0 + + // 32-BIT UNSIGNED INTEGER REMAINDER BEGINS HERE + + // general register used: + // r32 - 32-bit unsigned integer dividend + // r33 - 32-bit unsigned integer divisor + // r8 - 32-bit unsigned integer result + // r2 - scratch register + // floating-point registers used: f6, f7, f8, f9, f10, f11 + // predicate registers used: p6 + + zxt4 r32=r32 + zxt4 r33=r33;; +} { .mmb + setf.sig f11=r32 + setf.sig f7=r33 + nop.b 0;; +} { .mfi + nop.m 0 + fcvt.xf f6=f11 + nop.i 0 +} { .mfi + // get 2's complement of b + sub r33=r0,r33 + fcvt.xf f7=f7 + mov r2 = 0x0ffdd;; +} { .mfi + setf.exp f9 = r2 + // (1) y0 + frcpa.s1 f8,p6=f6,f7 + nop.i 0;; +} { .mfi + nop.m 0 + // (2) q0 = a * y0 + (p6) fma.s1 f10=f6,f8,f0 + nop.i 0 +} { .mfi + nop.m 0 + // (3) e0 = 1 - b * y0 + (p6) fnma.s1 f8=f7,f8,f1 + nop.i 0;; +} { .mfi + nop.m 0 + // (4) q1 = q0 + e0 * q0 + (p6) fma.s1 f10=f8,f10,f10 + nop.i 0 +} { .mfi + // get 2's complement of b + setf.sig f7=r33 + // (5) e1 = e0 * e0 + 2^-34 + (p6) fma.s1 f8=f8,f8,f9 + nop.i 0;; +} { .mfi + nop.m 0 + // (6) q2 = q1 + e1 * q1 + (p6) fma.s1 f8=f8,f10,f10 + nop.i 0;; +} { .mfi + nop.m 0 + // (7) q = trunc(q2) + fcvt.fxu.trunc.s1 f8=f8 + nop.i 0;; +} { .mfi + nop.m 0 + // (8) r = a + (-b) * q + xma.l f8=f8,f7,f11 + nop.i 0;; +} { .mmi + // remainder will be in the least significant 32 bits of r8 (if b != 0) + getf.sig r8=f8 + nop.m 0 + nop.i 0;; +} + + // 32-BIT UNSIGNED INTEGER REMAINDER ENDS HERE + +{ .mmb + nop.m 0 + nop.m 0 + br.ret.sptk b0;; +} + +.endp __umodsi3 diff --git a/lib/libc/ia64/gen/_mcount.S b/lib/libc/ia64/gen/_mcount.S new file mode 100644 index 0000000..d9e9b76 --- /dev/null +++ b/lib/libc/ia64/gen/_mcount.S @@ -0,0 +1,75 @@ +/* + * Copyright (c) 2004 Marcel Moolenaar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + + .text + +/* + * Important registers: + * r8 structure return address + * r15 static link (nested routines) + * rp our return address + * in0 caller's ar.pfs + * in1 caller's gp + * in2 caller's rp + * in3 GOT entry + * ar.pfs our pfs + */ +ENTRY_NOPROFILE(_mcount, 4) + alloc loc0 = ar.pfs, 4, 4, 2, 0 + mov loc1 = r8 + mov loc2 = rp + mov loc3 = r15 + ;; + mov out0 = in2 + mov out1 = rp + br.call.sptk rp = __mcount + ;; +1: + mov gp = in1 + mov r14 = ip + mov b7 = loc2 + ;; + add r14 = 2f - 1b, r14 + mov ar.pfs = loc0 + mov rp = in2 + ;; + mov r15 = loc3 + mov b7 = r14 + mov b6 = loc2 + mov r8 = loc1 + mov r14 = in0 + br.ret.sptk b7 + ;; +2: + mov ar.pfs = r14 + br.sptk b6 + ;; +END(_mcount) + +WEAK_ALIAS(mcount, _mcount) diff --git a/lib/libc/ia64/gen/_set_tp.c b/lib/libc/ia64/gen/_set_tp.c new file mode 100644 index 0000000..901e901 --- /dev/null +++ b/lib/libc/ia64/gen/_set_tp.c @@ -0,0 +1,34 @@ +/*- + * Copyright (c) 2004 Doug Rabson + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +void +_set_tp(void *tpval) +{ + + __asm __volatile("mov r13 = %0" :: "r"(tpval)); +} diff --git a/lib/libc/ia64/gen/_setjmp.S b/lib/libc/ia64/gen/_setjmp.S new file mode 100644 index 0000000..3966e83 --- /dev/null +++ b/lib/libc/ia64/gen/_setjmp.S @@ -0,0 +1,310 @@ +// +// Copyright (c) 1999, 2000 +// Intel Corporation. +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions +// are met: +// +// 1. Redistributions of source code must retain the above copyright +// notice, this list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in the +// documentation and/or other materials provided with the distribution. +// +// 3. All advertising materials mentioning features or use of this software +// must display the following acknowledgement: +// +// This product includes software developed by Intel Corporation and +// its contributors. +// +// 4. Neither the name of Intel Corporation or its contributors may be +// used to endorse or promote products derived from this software +// without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY INTEL CORPORATION AND CONTRIBUTORS ``AS IS'' +// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +// ARE DISCLAIMED. IN NO EVENT SHALL INTEL CORPORATION OR CONTRIBUTORS BE +// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF +// THE POSSIBILITY OF SUCH DAMAGE. +// +// + +// +// Module Name: +// +// setjmp.s +// +// Abstract: +// +// Contains an implementation of setjmp and longjmp for the +// IA-64 architecture. + + .file "setjmp.s" + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +#define LOCORE +#include <machine/setjmp.h> + +// int _setjmp(struct jmp_buffer *) +// +// Setup a non-local goto. +// +// Description: +// +// SetJump stores the current register set in the area pointed to +// by "save". It returns zero. Subsequent calls to "LongJump" will +// restore the registers and return non-zero to the same location. +// +// On entry, r32 contains the pointer to the jmp_buffer +// + +ENTRY(_setjmp, 1) + add r10 = J_PREDS, r32 // skip Unats & pfs save area + add r11 = J_BSP, r32 + // + // save immediate context + // + mov r2 = ar.bsp // save backing store pointer + mov r3 = pr // save predicates + flushrs + ;; + // + // save user Unat register + // + mov r16 = ar.lc // save loop count register + mov r14 = ar.unat // save user Unat register + + st8 [r10] = r3, J_LC-J_PREDS + st8 [r11] = r2, J_R4-J_BSP + ;; + st8 [r10] = r16, J_R5-J_LC + st8 [r32] = r14, J_NATS // Note: Unat at the + // beginning of the save area + mov r15 = ar.pfs + ;; + // + // save preserved general registers & NaT's + // + .mem.offset 0,0 + st8.spill [r11] = r4, J_R6-J_R4 + .mem.offset 8,0 + st8.spill [r10] = r5, J_R7-J_R5 + ;; + .mem.offset 16,0 + st8.spill [r11] = r6, J_SP-J_R6 + .mem.offset 24,0 + st8.spill [r10] = r7, J_F3-J_R7 + ;; + st8.spill [r11] = sp, J_F2-J_SP + mov r16 = ar.rsc + ;; + // + // save spilled Unat and pfs registers + // + mov r2 = ar.unat // save Unat register after spill + mov ar.rsc = r0 + ;; + st8 [r32] = r2, J_PFS-J_NATS // save unat for spilled regs + mov r17 = ar.rnat + ;; + st8 [r32] = r15, J_RNAT-J_PFS // save pfs + mov ar.rsc = r16 + // + // save floating registers + // + stf.spill [r11] = f2, J_F4-J_F2 + stf.spill [r10] = f3, J_F5-J_F3 + ;; + stf.spill [r11] = f4, J_F16-J_F4 + stf.spill [r10] = f5, J_F17-J_F5 + ;; + stf.spill [r11] = f16, J_F18-J_F16 + stf.spill [r10] = f17, J_F19-J_F17 + ;; + stf.spill [r11] = f18, J_F20-J_F18 + stf.spill [r10] = f19, J_F21-J_F19 + ;; + stf.spill [r11] = f20, J_F22-J_F20 + stf.spill [r10] = f21, J_F23-J_F21 + ;; + stf.spill [r11] = f22, J_F24-J_F22 + stf.spill [r10] = f23, J_F25-J_F23 + ;; + stf.spill [r11] = f24, J_F26-J_F24 + stf.spill [r10] = f25, J_F27-J_F25 + ;; + stf.spill [r11] = f26, J_F28-J_F26 + stf.spill [r10] = f27, J_F29-J_F27 + ;; + stf.spill [r11] = f28, J_F30-J_F28 + stf.spill [r10] = f29, J_F31-J_F29 + ;; + stf.spill [r11] = f30, J_FPSR-J_F30 + stf.spill [r10] = f31, J_B0-J_F31 // size of f31 + fpsr + ;; + st8 [r32] = r17 + // + // save FPSR register & branch registers + // + mov r2 = ar.fpsr // save fpsr register + mov r3 = b0 + ;; + st8 [r11] = r2, J_B1-J_FPSR + st8 [r10] = r3, J_B2-J_B0 + mov r2 = b1 + mov r3 = b2 + ;; + st8 [r11] = r2, J_B3-J_B1 + st8 [r10] = r3, J_B4-J_B2 + mov r2 = b3 + mov r3 = b4 + ;; + st8 [r11] = r2, J_B5-J_B3 + st8 [r10] = r3 + mov r2 = b5 + ;; + st8 [r11] = r2 + ;; + // + // return + // + mov r8 = r0 // return 0 from setjmp + mov ar.unat = r14 // restore unat + br.ret.sptk b0 + +END(_setjmp) + + +// +// void _longjmp(struct jmp_buffer *, int val) +// +// Perform a non-local goto. +// +// Description: +// +// LongJump initializes the register set to the values saved by a +// previous 'SetJump' and jumps to the return location saved by that +// 'SetJump'. This has the effect of unwinding the stack and returning +// for a second time to the 'SetJump'. +// + + WEAK_ALIAS(_longjmp,___longjmp) +ENTRY(___longjmp, 2) + mov r14 = ar.rsc // get user RSC conf + mov r8 = r33 // return value + add r10 = J_PFS, r32 // get address of pfs + ;; + mov ar.rsc = r0 + add r11 = J_NATS, r32 + add r17 = J_RNAT, r32 + ;; + ld8 r15 = [r10], J_BSP-J_PFS // get pfs + ld8 r2 = [r11], J_LC-J_NATS // get unat for spilled regs + mov r31 = r32 + ;; + loadrs + mov ar.unat = r2 + cmp.eq p6,p0=0,r8 // Return value 0? + ;; + ld8 r16 = [r10], J_PREDS-J_BSP // get backing store pointer + ld8 r17 = [r17] // ar.rnat + mov ar.pfs = r15 + ;; + mov ar.bspstore = r16 +(p6) add r8 = 1, r0 + ;; + mov ar.rnat = r17 + mov ar.rsc = r14 // restore RSC conf + + ld8 r3 = [r11], J_R4-J_LC // get lc register + ld8 r2 = [r10], J_R5-J_PREDS // get predicates + ;; + mov pr = r2, -1 + mov ar.lc = r3 + // + // restore preserved general registers & NaT's + // + ld8.fill r4 = [r11], J_R6-J_R4 + ;; + ld8.fill r5 = [r10], J_R7-J_R5 + ld8.fill r6 = [r11], J_SP-J_R6 + ;; + ld8.fill r7 = [r10], J_F2-J_R7 + ld8.fill sp = [r11], J_F3-J_SP + ;; + // + // restore floating registers + // + ldf.fill f2 = [r10], J_F4-J_F2 + ldf.fill f3 = [r11], J_F5-J_F3 + ;; + ldf.fill f4 = [r10], J_F16-J_F4 + ldf.fill f5 = [r11], J_F17-J_F5 + ;; + ldf.fill f16 = [r10], J_F18-J_F16 + ldf.fill f17 = [r11], J_F19-J_F17 + ;; + ldf.fill f18 = [r10], J_F20-J_F18 + ldf.fill f19 = [r11], J_F21-J_F19 + ;; + ldf.fill f20 = [r10], J_F22-J_F20 + ldf.fill f21 = [r11], J_F23-J_F21 + ;; + ldf.fill f22 = [r10], J_F24-J_F22 + ldf.fill f23 = [r11], J_F25-J_F23 + ;; + ldf.fill f24 = [r10], J_F26-J_F24 + ldf.fill f25 = [r11], J_F27-J_F25 + ;; + ldf.fill f26 = [r10], J_F28-J_F26 + ldf.fill f27 = [r11], J_F29-J_F27 + ;; + ldf.fill f28 = [r10], J_F30-J_F28 + ldf.fill f29 = [r11], J_F31-J_F29 + ;; + ldf.fill f30 = [r10], J_FPSR-J_F30 + ldf.fill f31 = [r11], J_B0-J_F31 ;; + + // + // restore branch registers and fpsr + // + ld8 r16 = [r10], J_B1-J_FPSR // get fpsr + ld8 r17 = [r11], J_B2-J_B0 // get return pointer + ;; + mov ar.fpsr = r16 + mov b0 = r17 + ld8 r2 = [r10], J_B3-J_B1 + ld8 r3 = [r11], J_B4-J_B2 + ;; + mov b1 = r2 + mov b2 = r3 + ld8 r2 = [r10], J_B5-J_B3 + ld8 r3 = [r11] + ;; + mov b3 = r2 + mov b4 = r3 + ld8 r2 = [r10] + ld8 r21 = [r31] // get user unat + ;; + mov b5 = r2 + mov ar.unat = r21 + + // + // invalidate ALAT + // + invala ;; + + br.ret.sptk b0 + +END(___longjmp) diff --git a/lib/libc/ia64/gen/fabs.S b/lib/libc/ia64/gen/fabs.S new file mode 100644 index 0000000..036d492 --- /dev/null +++ b/lib/libc/ia64/gen/fabs.S @@ -0,0 +1,33 @@ +/*- + * Copyright (c) 2000 Doug Rabson + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +ENTRY(fabs, 1) + fabs fret0=farg0 + br.ret.sptk.few rp +END(fabs) diff --git a/lib/libc/ia64/gen/flt_rounds.c b/lib/libc/ia64/gen/flt_rounds.c new file mode 100644 index 0000000..d650965 --- /dev/null +++ b/lib/libc/ia64/gen/flt_rounds.c @@ -0,0 +1,25 @@ +/* + * Written by J.T. Conklin, Apr 10, 1995 + * Public domain. + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <float.h> + +static const int map[] = { + 1, /* round to nearest */ + 3, /* round to zero */ + 2, /* round to negative infinity */ + 0 /* round to positive infinity */ +}; + +int +__flt_rounds(void) +{ + int x; + + __asm("mov %0=ar.fpsr" : "=r" (x)); + return (map[(x >> 10) & 0x03]); +} diff --git a/lib/libc/ia64/gen/fpgetmask.c b/lib/libc/ia64/gen/fpgetmask.c new file mode 100644 index 0000000..ac166e2 --- /dev/null +++ b/lib/libc/ia64/gen/fpgetmask.c @@ -0,0 +1,40 @@ +/*- + * Copyright (c) 2001 Doug Rabson + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <sys/types.h> +#include <ieeefp.h> + +fp_except_t +fpgetmask(void) +{ + u_int64_t fpsr; + + __asm __volatile("mov %0=ar.fpsr" : "=r" (fpsr)); + return (~fpsr & 0x3d); +} diff --git a/lib/libc/ia64/gen/fpgetround.c b/lib/libc/ia64/gen/fpgetround.c new file mode 100644 index 0000000..6f5e8cc --- /dev/null +++ b/lib/libc/ia64/gen/fpgetround.c @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2003 Marcel Moolenaar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#include <sys/types.h> +#include <ieeefp.h> + +fp_rnd_t +fpgetround(void) +{ + uint64_t fpsr; + + __asm __volatile("mov %0=ar.fpsr" : "=r"(fpsr)); + return ((fp_rnd_t)((fpsr >> 10) & 3)); +} diff --git a/lib/libc/ia64/gen/fpsetmask.c b/lib/libc/ia64/gen/fpsetmask.c new file mode 100644 index 0000000..d959dc6 --- /dev/null +++ b/lib/libc/ia64/gen/fpsetmask.c @@ -0,0 +1,44 @@ +/*- + * Copyright (c) 2001 Doug Rabson + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <sys/types.h> +#include <ieeefp.h> + +fp_except_t +fpsetmask(fp_except_t mask) +{ + u_int64_t fpsr; + u_int64_t oldmask; + + __asm __volatile("mov %0=ar.fpsr" : "=r" (fpsr)); + oldmask = ~fpsr & 0x3d; + fpsr = (fpsr & ~0x3d) | (~mask & 0x3d); + __asm __volatile("mov ar.fpsr=%0" :: "r" (fpsr)); + return (oldmask); +} diff --git a/lib/libc/ia64/gen/fpsetround.c b/lib/libc/ia64/gen/fpsetround.c new file mode 100644 index 0000000..db2eef1 --- /dev/null +++ b/lib/libc/ia64/gen/fpsetround.c @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2003 Marcel Moolenaar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#include <sys/types.h> +#include <ieeefp.h> + +fp_rnd_t +fpsetround(fp_rnd_t rnd) +{ + uint64_t fpsr; + fp_rnd_t prev; + + __asm __volatile("mov %0=ar.fpsr" : "=r"(fpsr)); + prev = (fp_rnd_t)((fpsr >> 10) & 3); + fpsr = (fpsr & ~0xC00ULL) | ((unsigned int)rnd << 10); + __asm __volatile("mov ar.fpsr=%0" :: "r"(fpsr)); + return (prev); +} diff --git a/lib/libc/ia64/gen/infinity.c b/lib/libc/ia64/gen/infinity.c new file mode 100644 index 0000000..1ae92a8 --- /dev/null +++ b/lib/libc/ia64/gen/infinity.c @@ -0,0 +1,48 @@ +/* $NetBSD: infinity.c,v 1.1 1995/02/10 17:50:23 cgd Exp $ */ + +/* + * Copyright (c) 1994, 1995 Carnegie-Mellon University. + * All rights reserved. + * + * Author: Chris G. Demetriou + * + * Permission to use, copy, modify and distribute this software and + * its documentation is hereby granted, provided that both the copyright + * notice and this permission notice appear in all copies of the + * software, derivative works or modified versions, and any portions + * thereof, and that both notices appear in supporting documentation. + * + * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" + * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND + * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * + * Carnegie Mellon requests users of this software to return to + * + * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU + * School of Computer Science + * Carnegie Mellon University + * Pittsburgh PA 15213-3890 + * + * any improvements or extensions that they make and grant Carnegie the + * rights to redistribute these changes. + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <sys/endian.h> +#include <math.h> + +/* bytes for +Infinity on an ia64 (IEEE double format) */ +#if _BYTE_ORDER == _LITTLE_ENDIAN +const union __infinity_un __infinity = { { 0, 0, 0, 0, 0, 0, 0xf0, 0x7f } }; +#else /* _BIG_ENDIAN */ +const union __infinity_un __infinity = { { 0x7f, 0xf0, 0, 0, 0, 0, 0, 0 } }; +#endif + +/* bytes for NaN */ +#if _BYTE_ORDER == _LITTLE_ENDIAN +const union __nan_un __nan = { { 0, 0, 0xc0, 0xff } }; +#else /* _BIG_ENDIAN */ +const union __nan_un __nan = { { 0xff, 0xc0, 0, 0 } }; +#endif diff --git a/lib/libc/ia64/gen/makecontext.c b/lib/libc/ia64/gen/makecontext.c new file mode 100644 index 0000000..bee47f1 --- /dev/null +++ b/lib/libc/ia64/gen/makecontext.c @@ -0,0 +1,123 @@ +/* + * Copyright (c) 2003 Marcel Moolenaar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <sys/types.h> +#include <sys/ucontext.h> +#include <machine/fpu.h> +#include <stdarg.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +struct fdesc { + uint64_t ip; + uint64_t gp; +}; + +typedef void (*func_t)(uint64_t, uint64_t, uint64_t, uint64_t, uint64_t, + uint64_t, uint64_t, uint64_t); + +static __inline uint64_t * +spill(uint64_t *bsp, uint64_t arg) +{ + *bsp++ = arg; + if (((intptr_t)bsp & 0x1ff) == 0x1f8) + *bsp++ = 0; + return (bsp); +} + +static void +ctx_wrapper(ucontext_t *ucp, func_t func, uint64_t *args) +{ + + (*func)(args[0], args[1], args[2], args[3], args[4], args[5], args[6], + args[7]); + if (ucp->uc_link == NULL) + exit(0); + setcontext((const ucontext_t *)ucp->uc_link); + /* should never get here */ + abort(); + /* NOTREACHED */ +} + +__weak_reference(__makecontext, makecontext); + +void +__makecontext(ucontext_t *ucp, void (*func)(void), int argc, ...) +{ + uint64_t *args, *bsp; + va_list ap; + int i; + + /* + * Drop the ball completely if something's not right. We only + * support general registers as arguments and not more than 8 + * of them. Things get hairy if we need to support FP registers + * (alignment issues) or more than 8 arguments (stack based). + */ + if (argc < 0 || argc > 8 || ucp == NULL || + ucp->uc_stack.ss_sp == NULL || (ucp->uc_stack.ss_size & 15) || + ((intptr_t)ucp->uc_stack.ss_sp & 15) || + ucp->uc_stack.ss_size < MINSIGSTKSZ) + abort(); + + /* + * Copy the arguments of function 'func' onto the (memory) stack. + * Always take up space for 8 arguments. + */ + va_start(ap, argc); + args = (uint64_t*)(ucp->uc_stack.ss_sp + ucp->uc_stack.ss_size) - 8; + i = 0; + while (i < argc) + args[i++] = va_arg(ap, uint64_t); + while (i < 8) + args[i++] = 0; + va_end(ap); + + /* + * Push (spill) the arguments of the context wrapper onto the register + * stack. They get loaded by the RSE on a context switch. + */ + bsp = (uint64_t*)ucp->uc_stack.ss_sp; + bsp = spill(bsp, (intptr_t)ucp); + bsp = spill(bsp, (intptr_t)func); + bsp = spill(bsp, (intptr_t)args); + + /* + * Setup the MD portion of the context. + */ + memset(&ucp->uc_mcontext, 0, sizeof(ucp->uc_mcontext)); + ucp->uc_mcontext.mc_special.sp = (intptr_t)args - 16; + ucp->uc_mcontext.mc_special.bspstore = (intptr_t)bsp; + ucp->uc_mcontext.mc_special.pfs = (3 << 7) | 3; + ucp->uc_mcontext.mc_special.rsc = 0xf; + ucp->uc_mcontext.mc_special.rp = ((struct fdesc*)ctx_wrapper)->ip; + ucp->uc_mcontext.mc_special.gp = ((struct fdesc*)ctx_wrapper)->gp; + ucp->uc_mcontext.mc_special.fpsr = IA64_FPSR_DEFAULT; +} diff --git a/lib/libc/ia64/gen/modf.c b/lib/libc/ia64/gen/modf.c new file mode 100644 index 0000000..def3aad --- /dev/null +++ b/lib/libc/ia64/gen/modf.c @@ -0,0 +1,106 @@ +/* $NetBSD: modf.c,v 1.1 1995/02/10 17:50:25 cgd Exp $ */ + +/* + * Copyright (c) 1994, 1995 Carnegie-Mellon University. + * All rights reserved. + * + * Author: Chris G. Demetriou + * + * Permission to use, copy, modify and distribute this software and + * its documentation is hereby granted, provided that both the copyright + * notice and this permission notice appear in all copies of the + * software, derivative works or modified versions, and any portions + * thereof, and that both notices appear in supporting documentation. + * + * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" + * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND + * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * + * Carnegie Mellon requests users of this software to return to + * + * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU + * School of Computer Science + * Carnegie Mellon University + * Pittsburgh PA 15213-3890 + * + * any improvements or extensions that they make and grant Carnegie the + * rights to redistribute these changes. + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <sys/types.h> +#include <machine/ieee.h> +#include <math.h> + +/* + * double modf(double val, double *iptr) + * returns: f and i such that |f| < 1.0, (f + i) = val, and + * sign(f) == sign(i) == sign(val). + * + * Beware signedness when doing subtraction, and also operand size! + */ +double +modf(val, iptr) + double val, *iptr; +{ + union doub { + double v; + struct ieee_double s; + } u, v; + u_int64_t frac; + + /* + * If input is Inf or NaN, return it and leave i alone. + */ + u.v = val; + if (u.s.dbl_exp == DBL_EXP_INFNAN) + return (u.v); + + /* + * If input can't have a fractional part, return + * (appropriately signed) zero, and make i be the input. + */ + if ((int)u.s.dbl_exp - DBL_EXP_BIAS > DBL_FRACBITS - 1) { + *iptr = u.v; + v.v = 0.0; + v.s.dbl_sign = u.s.dbl_sign; + return (v.v); + } + + /* + * If |input| < 1.0, return it, and set i to the appropriately + * signed zero. + */ + if (u.s.dbl_exp < DBL_EXP_BIAS) { + v.v = 0.0; + v.s.dbl_sign = u.s.dbl_sign; + *iptr = v.v; + return (u.v); + } + + /* + * There can be a fractional part of the input. + * If you look at the math involved for a few seconds, it's + * plain to see that the integral part is the input, with the + * low (DBL_FRACBITS - (exponent - DBL_EXP_BIAS)) bits zeroed, + * the the fractional part is the part with the rest of the + * bits zeroed. Just zeroing the high bits to get the + * fractional part would yield a fraction in need of + * normalization. Therefore, we take the easy way out, and + * just use subtraction to get the fractional part. + */ + v.v = u.v; + /* Zero the low bits of the fraction, the sleazy way. */ + frac = ((u_int64_t)v.s.dbl_frach << 32) + v.s.dbl_fracl; + frac >>= DBL_FRACBITS - (u.s.dbl_exp - DBL_EXP_BIAS); + frac <<= DBL_FRACBITS - (u.s.dbl_exp - DBL_EXP_BIAS); + v.s.dbl_fracl = frac & 0xffffffff; + v.s.dbl_frach = frac >> 32; + *iptr = v.v; + + u.v -= v.v; + u.s.dbl_sign = v.s.dbl_sign; + return (u.v); +} diff --git a/lib/libc/ia64/gen/setjmp.S b/lib/libc/ia64/gen/setjmp.S new file mode 100644 index 0000000..a2b56d6 --- /dev/null +++ b/lib/libc/ia64/gen/setjmp.S @@ -0,0 +1,82 @@ +/* $NetBSD: setjmp.S,v 1.3 1997/12/05 02:06:27 thorpej Exp $ */ + +/* + * Copyright (c) 1994, 1995 Carnegie-Mellon University. + * All rights reserved. + * + * Author: Chris G. Demetriou + * + * Permission to use, copy, modify and distribute this software and + * its documentation is hereby granted, provided that both the copyright + * notice and this permission notice appear in all copies of the + * software, derivative works or modified versions, and any portions + * thereof, and that both notices appear in supporting documentation. + * + * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" + * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND + * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * + * Carnegie Mellon requests users of this software to return to + * + * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU + * School of Computer Science + * Carnegie Mellon University + * Pittsburgh PA 15213-3890 + * + * any improvements or extensions that they make and grant Carnegie the + * rights to redistribute these changes. + */ + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +#define LOCORE +#include <machine/setjmp.h> + +/* + * C library -- setjmp, longjmp + * + * longjmp(a,v) + * will generate a "return(v)" from + * the last call to + * setjmp(a) + * by restoring registers from the stack, + * and the previous signal state. + */ + +ENTRY(setjmp, 1) + alloc loc0=ar.pfs,1,2,3,0 + mov loc1=rp + ;; + mov out0=1 // how = SIG_BLOCK + mov out1=0 // set = NULL + add out2=J_SIGSET,in0 // oset = &jb[J_SIGSET] + br.call.sptk.few rp=__sys_sigprocmask + ;; + mov rp=loc1 + mov r14=loc0 + ;; + alloc r15=ar.pfs,1,0,0,0 // drop register frame + ;; + mov ar.pfs=r14 // restore ar.pfs + br.sptk.many _setjmp // finish saving state +END(setjmp) + + WEAK_ALIAS(longjmp,__longjmp) +ENTRY(__longjmp, 2) + alloc loc0=ar.pfs,2,2,3,0 + mov loc1=rp + ;; + mov out0=3 // how = SIG_SETMASK + add out1=J_SIGSET,in0 // set = &jb[J_SIGSET] + mov out2=0 // oset = NULL + br.call.sptk.few rp=__sys_sigprocmask + ;; + mov rp=loc1 + mov r14=loc0 + ;; + alloc r15=ar.pfs,2,0,0,0 // drop register frame + ;; + mov ar.pfs=r14 // restore ar.pfs + br.sptk.many _longjmp // finish restoring state +END(__longjmp) diff --git a/lib/libc/ia64/gen/signalcontext.c b/lib/libc/ia64/gen/signalcontext.c new file mode 100644 index 0000000..b47daf3 --- /dev/null +++ b/lib/libc/ia64/gen/signalcontext.c @@ -0,0 +1,123 @@ +/* + * Copyright (c) 2003 Marcel Moolenaar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <sys/types.h> +#include <sys/ucontext.h> +#include <machine/fpu.h> +#include <signal.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <strings.h> + +struct fdesc { + uint64_t ip; + uint64_t gp; +}; + +typedef void (*handler_t)(uint64_t, uint64_t, uint64_t); + +static __inline uint64_t * +spill(uint64_t *bsp, uint64_t arg) +{ + *bsp++ = arg; + if (((intptr_t)bsp & 0x1ff) == 0x1f8) + *bsp++ = 0; + return (bsp); +} + +static void +ctx_wrapper(ucontext_t *ucp, handler_t func, uint64_t *args) +{ + + (*func)(args[0], args[1], args[2]); + if (ucp->uc_link == NULL) + exit(0); + setcontext((const ucontext_t *)ucp->uc_link); + /* should never get here */ + abort(); + /* NOTREACHED */ +} + +__weak_reference(__signalcontext, signalcontext); + +int +__signalcontext(ucontext_t *ucp, int sig, __sighandler_t *func) +{ + uint64_t *args, *bsp; + siginfo_t *sig_si; + ucontext_t *sig_uc; + uint64_t sp; + + /* Bail out if we don't have a valid ucontext pointer. */ + if (ucp == NULL) + abort(); + + /* + * Build a signal frame and copy the arguments of signal handler + * 'func' onto the (memory) stack. We only need 3 arguments, but + * we create room for 4 so that we are 16-byte aligned. + */ + sp = (ucp->uc_mcontext.mc_special.sp - sizeof(ucontext_t)) & ~15UL; + sig_uc = (ucontext_t*)sp; + bcopy(ucp, sig_uc, sizeof(*sig_uc)); + sp = (sp - sizeof(siginfo_t)) & ~15UL; + sig_si = (siginfo_t*)sp; + bzero(sig_si, sizeof(*sig_si)); + sig_si->si_signo = sig; + sp -= 4 * sizeof(uint64_t); + args = (uint64_t*)sp; + args[0] = sig; + args[1] = (intptr_t)sig_si; + args[2] = (intptr_t)sig_uc; + + /* + * Push (spill) the arguments of the context wrapper onto the register + * stack. They get loaded by the RSE on a context switch. + */ + bsp = (uint64_t*)ucp->uc_mcontext.mc_special.bspstore; + bsp = spill(bsp, (intptr_t)ucp); + bsp = spill(bsp, (intptr_t)func); + bsp = spill(bsp, (intptr_t)args); + + /* + * Setup the ucontext of the signal handler. + */ + memset(&ucp->uc_mcontext, 0, sizeof(ucp->uc_mcontext)); + ucp->uc_link = sig_uc; + sigdelset(&ucp->uc_sigmask, sig); + ucp->uc_mcontext.mc_special.sp = (intptr_t)args - 16; + ucp->uc_mcontext.mc_special.bspstore = (intptr_t)bsp; + ucp->uc_mcontext.mc_special.pfs = (3 << 7) | 3; + ucp->uc_mcontext.mc_special.rsc = 0xf; + ucp->uc_mcontext.mc_special.rp = ((struct fdesc*)ctx_wrapper)->ip; + ucp->uc_mcontext.mc_special.gp = ((struct fdesc*)ctx_wrapper)->gp; + ucp->uc_mcontext.mc_special.fpsr = IA64_FPSR_DEFAULT; + return (0); +} diff --git a/lib/libc/ia64/gen/sigsetjmp.S b/lib/libc/ia64/gen/sigsetjmp.S new file mode 100644 index 0000000..9f02a26 --- /dev/null +++ b/lib/libc/ia64/gen/sigsetjmp.S @@ -0,0 +1,66 @@ +/* $NetBSD: sigsetjmp.S,v 1.2 1996/10/17 03:08:07 cgd Exp $ */ + +/* + * Copyright (c) 1994, 1995 Carnegie-Mellon University. + * All rights reserved. + * + * Author: Chris G. Demetriou + * + * Permission to use, copy, modify and distribute this software and + * its documentation is hereby granted, provided that both the copyright + * notice and this permission notice appear in all copies of the + * software, derivative works or modified versions, and any portions + * thereof, and that both notices appear in supporting documentation. + * + * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" + * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND + * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * + * Carnegie Mellon requests users of this software to return to + * + * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU + * School of Computer Science + * Carnegie Mellon University + * Pittsburgh PA 15213-3890 + * + * any improvements or extensions that they make and grant Carnegie the + * rights to redistribute these changes. + */ + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +#define LOCORE +#include <machine/setjmp.h> + +/* + * C library -- sigsetjmp, siglongjmp + * + * siglongjmp(a,v) + * will generate a "return(v)" from + * the last call to + * sigsetjmp(a, mask) + * by restoring registers from the stack. + * If `mask' is non-zero, the previous signal + * state will be restored. + */ + +ENTRY(sigsetjmp, 2) + add r14=J_SIGMASK,in0 // place to save mask + cmp.ne p6,p7=0,in1 // save signal state? + ;; + st8 [r14]=in1 // save mask value +(p6) br.cond.dptk.many setjmp +(p7) br.cond.dpnt.many _setjmp +END(sigsetjmp) + + WEAK_ALIAS(siglongjmp,__siglongjmp) +ENTRY(__siglongjmp, 2) + add r14=J_SIGMASK,in0 // address of mask value + ;; + ld8 r14=[r14] + ;; + cmp.ne p6,p7=0,r14 // did we save signals? +(p6) br.cond.dptk.many longjmp +(p7) br.cond.dpnt.many _longjmp +END(__siglongjmp) diff --git a/lib/libc/ia64/gen/unwind.c b/lib/libc/ia64/gen/unwind.c new file mode 100644 index 0000000..7afd0ef --- /dev/null +++ b/lib/libc/ia64/gen/unwind.c @@ -0,0 +1,129 @@ +/* + * Copyright (c) 2002 Marcel Moolenaar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#include <sys/types.h> + +#include <assert.h> +#include <dlfcn.h> +#include <stdlib.h> + +#include <machine/elf.h> + +#ifndef PT_IA_64_UNWIND +#define PT_IA_64_UNWIND 0x70000001 +#endif + +#define SANITY 0 + +struct ia64_unwind_entry +{ + Elf64_Addr start; + Elf64_Addr end; + Elf64_Addr descr; +}; + +struct ia64_unwind_entry * +_Unwind_FindTableEntry(const void *pc, unsigned long *pseg, unsigned long *pgp) +{ + Dl_info info; + Elf_Dyn *dyn; + Elf_Ehdr *ehdr; + Elf_Phdr *phdr; + char *p, *p_top; + struct ia64_unwind_entry *unw, *res; + register unsigned long gp __asm__("gp"); /* XXX assumes gcc */ + unsigned long reloc, vaddr; + size_t l, m, r; + + if (!dladdr(pc, &info)) + return NULL; + + ehdr = (Elf_Ehdr*)info.dli_fbase; + +#if SANITY + assert(IS_ELF(*ehdr)); + assert(ehdr->e_ident[EI_CLASS] == ELFCLASS64); + assert(ehdr->e_ident[EI_DATA] == ELFDATA2LSB); + assert(ehdr->e_machine == EM_IA_64); +#endif + + reloc = (ehdr->e_type == ET_DYN) ? (uintptr_t)info.dli_fbase : 0; + *pgp = gp; + *pseg = 0UL; + res = NULL; + + p = (char*)info.dli_fbase + ehdr->e_phoff; + p_top = p + ehdr->e_phnum * ehdr->e_phentsize; + while (p < p_top) { + phdr = (Elf_Phdr*)p; + vaddr = phdr->p_vaddr + reloc; + + switch (phdr->p_type) { + case PT_DYNAMIC: + dyn = (Elf_Dyn*)vaddr; + while (dyn->d_tag != DT_NULL) { + if (dyn->d_tag == DT_PLTGOT) { + *pgp = dyn->d_un.d_ptr + reloc; + break; + } + dyn++; + } + break; + case PT_LOAD: + if (pc >= (void*)vaddr && + pc < (void*)(vaddr + phdr->p_memsz)) + *pseg = vaddr; + break; + case PT_IA_64_UNWIND: +#if SANITY + assert(*pseg != 0UL); + assert(res == NULL); +#endif + unw = (struct ia64_unwind_entry*)vaddr; + l = 0; + r = phdr->p_memsz / sizeof(struct ia64_unwind_entry); + while (l < r) { + m = (l + r) >> 1; + res = unw + m; + if (pc < (void*)(res->start + *pseg)) + r = m; + else if (pc >= (void*)(res->end + *pseg)) + l = m + 1; + else + break; /* found */ + } + if (l >= r) + res = NULL; + break; + } + + p += ehdr->e_phentsize; + } + + return res; +} diff --git a/lib/libc/ia64/string/Makefile.inc b/lib/libc/ia64/string/Makefile.inc new file mode 100644 index 0000000..7bbcc8d --- /dev/null +++ b/lib/libc/ia64/string/Makefile.inc @@ -0,0 +1,3 @@ +# $FreeBSD$ + +MDSRCS+= bcopy.S bzero.S ffs.S memcpy.S memmove.S diff --git a/lib/libc/ia64/string/bcopy.S b/lib/libc/ia64/string/bcopy.S new file mode 100644 index 0000000..34aac19 --- /dev/null +++ b/lib/libc/ia64/string/bcopy.S @@ -0,0 +1,95 @@ +/*- + * Copyright (c) 2000 Doug Rabson + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +/* + * Not the fastest bcopy in the world. + */ +ENTRY(bcopy, 3) + + cmp.le p6,p0=in2,r0 // bail if len <= 0 +(p6) br.ret.spnt.few rp + + sub r14=in1,in0 ;; // check for overlap + cmp.ltu p6,p0=r14,in2 // dst-src < len +(p6) br.cond.spnt.few 5f + + extr.u r14=in0,0,3 // src & 7 + extr.u r15=in1,0,3 ;; // dst & 7 + cmp.eq p6,p0=r14,r15 // different alignment? +(p6) br.cond.spnt.few 2f // branch if same alignment + +1: ld1 r14=[in0],1 ;; // copy bytewise + st1 [in1]=r14,1 + add in2=-1,in2 ;; // len-- + cmp.ne p6,p0=r0,in2 +(p6) br.cond.dptk.few 1b // loop + br.ret.sptk.few rp // done + +2: cmp.eq p6,p0=r14,r0 // aligned? +(p6) br.cond.sptk.few 4f + +3: ld1 r14=[in0],1 ;; // copy bytewise + st1 [in1]=r14,1 + extr.u r15=in0,0,3 // src & 7 + add in2=-1,in2 ;; // len-- + cmp.eq p6,p0=r0,in2 // done? + cmp.eq p7,p0=r0,r15 ;; // aligned now? +(p6) br.ret.spnt.few rp // return if done +(p7) br.cond.spnt.few 4f // go to main copy + br.cond.sptk.few 3b // more bytes to copy + + // At this point, in2 is non-zero + +4: mov r14=8 ;; + cmp.ltu p6,p0=in2,r14 ;; // len < 8? +(p6) br.cond.spnt.few 1b // byte copy the end + ld8 r15=[in0],8 ;; // copy word + st8 [in1]=r15,8 + add in2=-8,in2 ;; // len -= 8 + cmp.ne p6,p0=r0,in2 // done? +(p6) br.cond.spnt.few 4b // again + + br.ret.sptk.few rp // return + + // Don't bother optimising overlap case + +5: add in0=in0,in2 + add in1=in1,in2 ;; + add in0=-1,in0 + add in1=-1,in1 ;; + +6: ld1 r14=[in0],-1 ;; + st1 [in1]=r14,-1 + add in2=-1,in2 ;; + cmp.ne p6,p0=r0,in2 +(p6) br.cond.spnt.few 6b + + br.ret.sptk.few rp + +END(bcopy) diff --git a/lib/libc/ia64/string/bzero.S b/lib/libc/ia64/string/bzero.S new file mode 100644 index 0000000..0963c36 --- /dev/null +++ b/lib/libc/ia64/string/bzero.S @@ -0,0 +1,81 @@ +/*- + * Copyright (c) 2000 Doug Rabson + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +ENTRY(bzero, 2) + + cmp.le p6,p0=in1,r0 // bail if len <= 0 +(p6) br.ret.spnt.few rp + ;; + mov r14=ar.lc // save ar.lc + + cmp.ltu p6,p0=17,in1 // check for small +(p6) br.dptk.few 3f + +1: add r15=-1,in1 ;; + mov ar.lc=r15 ;; +2: st1 [in0]=r0,1 // zero one byte + br.cloop.sptk.few 2b // loop + + ;; + mov ar.lc=r14 // done + br.ret.sptk.few rp + + // Zero up to 8byte alignment + +3: tbit.nz p6,p0=in0,0 ;; +(p6) st1 [in0]=r0,1 +(p6) add in1=-1,in1 ;; + + tbit.nz p6,p0=in0,1 ;; +(p6) st2 [in0]=r0,2 +(p6) add in1=-2,in1 ;; + + tbit.nz p6,p0=in0,2 ;; +(p6) st4 [in0]=r0,4 +(p6) add in1=-4,in1 + + ;; + shr.u r15=in1,3 // word count + extr.u in1=in1,0,3 ;; // trailing bytes + cmp.eq p6,p0=r15,r0 // check for zero + cmp.ne p7,p0=in1,r0 +(p6) br.dpnt.few 1b // zero last bytes + + add r15=-1,r15 ;; + mov ar.lc=r15 ;; +4: st8 [in0]=r0,8 + br.cloop.sptk.few 4b + +(p7) br.dpnt.few 1b // zero last bytes + + ;; + mov ar.lc=r14 // done + br.ret.sptk.few rp + +END(bzero) diff --git a/lib/libc/ia64/string/ffs.S b/lib/libc/ia64/string/ffs.S new file mode 100644 index 0000000..d99d765 --- /dev/null +++ b/lib/libc/ia64/string/ffs.S @@ -0,0 +1,99 @@ +/* $NetBSD: ffs.S,v 1.3 1996/10/17 03:08:13 cgd Exp $ */ + +/* + * Copyright (c) 1995 Christopher G. Demetriou + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Christopher G. Demetriou + * for the NetBSD Project. + * 4. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +ENTRY(ffs, 1) + sxt4 r14=in0 ;; + cmp.eq p6,p0=r14,r0 +(p6) br.dpnt.few Lallzero + + /* + * Initialize return value (ret0), and set up r15 so that it + * contains the mask with only the lowest bit set. + */ + sub r15=r0,r14 + mov ret0=1 ;; + and r15=r14,r15 ;; + + extr.u r16=r15,0,8 ;; + cmp.ne p6,p0=r0,r16 +(p6) br.dptk.few Ldo8 + + /* + * If lower 16 bits empty, add 16 to result and use upper 16. + */ + extr.u r16=r15,0,16 ;; + cmp.ne p6,p0=r0,r16 +(p6) br.dptk.few Ldo16 + extr.u r15=r15,16,16 + add ret0=16,ret0 ;; + +Ldo16: + /* + * If lower 8 bits empty, add 8 to result and use upper 8. + */ + extr.u r16=r15,0,8 ;; + cmp.ne p6,p0=r0,r16 +(p6) br.dptk.few Ldo8 + extr.u r15=r15,8,24 + add ret0=8,ret0 ;; + +Ldo8: + and r16=0x0f,r15 /* lower 4 of 8 empty? */ + and r17=0x33,r15 /* lower 2 of each 4 empty? */ + and r18=0x55,r15 ;; /* lower 1 of each 2 empty? */ + cmp.ne p6,p0=r16,r0 + cmp.ne p7,p0=r17,r0 + cmp.ne p8,p0=r18,r0 + + /* If lower 4 bits empty, add 4 to result. */ +(p6) br.dptk.few Ldo4 + add ret0=4,ret0 ;; + +Ldo4: /* If lower 2 bits of each 4 empty, add 2 to result. */ +(p7) br.dptk.few Ldo2 + add ret0=2,ret0 ;; + +Ldo2: /* If lower bit of each 2 empty, add 1 to result. */ +(p8) br.dptk.few Ldone + add ret0=1,ret0 + +Ldone: + br.ret.sptk.few rp + +Lallzero: + mov ret0=0 + br.ret.sptk.few rp +END(ffs) diff --git a/lib/libc/ia64/string/memcpy.S b/lib/libc/ia64/string/memcpy.S new file mode 100644 index 0000000..d7557c1 --- /dev/null +++ b/lib/libc/ia64/string/memcpy.S @@ -0,0 +1,36 @@ +/*- + * Copyright (c) 2000 Doug Rabson + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +ENTRY(memcpy,3) + mov r8 = in0 + mov in0 = in1 + ;; + mov in1 = r8 + br.sptk.few bcopy +END(memcpy) diff --git a/lib/libc/ia64/string/memmove.S b/lib/libc/ia64/string/memmove.S new file mode 100644 index 0000000..19fa8af --- /dev/null +++ b/lib/libc/ia64/string/memmove.S @@ -0,0 +1,36 @@ +/*- + * Copyright (c) 2000 Doug Rabson + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +ENTRY(memmove,3) + mov r8 = in0 + mov in0 = in1 + ;; + mov in1 = r8 + br.sptk.few bcopy +END(memmove) diff --git a/lib/libc/ia64/sys/Makefile.inc b/lib/libc/ia64/sys/Makefile.inc new file mode 100644 index 0000000..3876d3a --- /dev/null +++ b/lib/libc/ia64/sys/Makefile.inc @@ -0,0 +1,12 @@ +# $FreeBSD$ + +MDASM+= Ovfork.S brk.S cerror.S exect.S fork.S getcontext.S pipe.S ptrace.S \ + sbrk.S setlogin.S sigreturn.S swapcontext.S + +# Don't generate default code for these syscalls: +NOASM= break.o exit.o getlogin.o openbsd_poll.o sstk.o vfork.o yield.o + +PSEUDO= _getlogin.o _exit.o +.if !defined(WITHOUT_SYSCALL_COMPAT) +PSEUDO+= _pread.o _pwrite.o _lseek.o _mmap.o _ftruncate.o _truncate.o +.endif diff --git a/lib/libc/ia64/sys/Ovfork.S b/lib/libc/ia64/sys/Ovfork.S new file mode 100644 index 0000000..6eb6958 --- /dev/null +++ b/lib/libc/ia64/sys/Ovfork.S @@ -0,0 +1,37 @@ +/*- + * Copyright (c) 2000 Doug Rabson + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +#include "SYS.h" + +SYSCALL(vfork) + cmp.ne p7,p0=ret1,r0 /* ret1!=0 for child */ + ;; +(p7) mov ret0=r0 + br.ret.sptk.few rp +END(__sys_vfork) diff --git a/lib/libc/ia64/sys/brk.S b/lib/libc/ia64/sys/brk.S new file mode 100644 index 0000000..fee1728 --- /dev/null +++ b/lib/libc/ia64/sys/brk.S @@ -0,0 +1,57 @@ +/* $NetBSD: brk.S,v 1.4 1996/10/17 03:08:15 cgd Exp $ */ + +/* + * Copyright (c) 1994, 1995 Carnegie-Mellon University. + * All rights reserved. + * + * Author: Chris G. Demetriou + * + * Permission to use, copy, modify and distribute this software and + * its documentation is hereby granted, provided that both the copyright + * notice and this permission notice appear in all copies of the + * software, derivative works or modified versions, and any portions + * thereof, and that both notices appear in supporting documentation. + * + * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" + * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND + * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * + * Carnegie Mellon requests users of this software to return to + * + * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU + * School of Computer Science + * Carnegie Mellon University + * Pittsburgh PA 15213-3890 + * + * any improvements or extensions that they make and grant Carnegie the + * rights to redistribute these changes. + */ + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +#include "SYS.h" + + .globl _end +IMPORT(curbrk, 8) + + .data +EXPORT(minbrk) + .quad _end + + .text +ENTRY(brk, 1) + add r14=@ltoff(minbrk),gp ;; + ld8 r14=[r14] ;; + ld8 r14=[r14] ;; + cmp.ltu p6,p0=r32,r14 ;; +(p6) mov r32=r14 ;; + st8 [sp]=r32 + CALLSYS_ERROR(break) + ld8 r15=[sp] + add r14=@ltoff(curbrk),gp ;; + ld8 r14=[r14] ;; + st8 [r14]=r15 + mov ret0=0 + br.ret.sptk.few rp +END(brk) diff --git a/lib/libc/ia64/sys/cerror.S b/lib/libc/ia64/sys/cerror.S new file mode 100644 index 0000000..ca0b0c7 --- /dev/null +++ b/lib/libc/ia64/sys/cerror.S @@ -0,0 +1,46 @@ +/*- + * Copyright (c) 2000 Doug Rabson + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + + +ENTRY(.cerror, 0) + alloc loc0=ar.pfs,0,3,1,0 + ;; + mov loc1=rp + mov loc2=ret0 + mov out0=ret0 + ;; + br.call.sptk.few rp=__error + st4 [ret0]=loc2 + ;; + mov ret0=-1 + mov ar.pfs=loc0 + mov rp=loc1 + ;; + br.ret.sptk.few rp +END(.cerror) diff --git a/lib/libc/ia64/sys/exect.S b/lib/libc/ia64/sys/exect.S new file mode 100644 index 0000000..817d3b1 --- /dev/null +++ b/lib/libc/ia64/sys/exect.S @@ -0,0 +1,38 @@ +/* $NetBSD: exect.S,v 1.2 1996/10/17 03:08:18 cgd Exp $ */ + +/* + * Copyright (c) 1994, 1995 Carnegie-Mellon University. + * All rights reserved. + * + * Author: Chris G. Demetriou + * + * Permission to use, copy, modify and distribute this software and + * its documentation is hereby granted, provided that both the copyright + * notice and this permission notice appear in all copies of the + * software, derivative works or modified versions, and any portions + * thereof, and that both notices appear in supporting documentation. + * + * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" + * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND + * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * + * Carnegie Mellon requests users of this software to return to + * + * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU + * School of Computer Science + * Carnegie Mellon University + * Pittsburgh PA 15213-3890 + * + * any improvements or extensions that they make and grant Carnegie the + * rights to redistribute these changes. + */ + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +#include "SYS.h" + +ENTRY(exect, 3) + CALLSYS_ERROR(execve) + br.ret.sptk.few rp +END(exect) diff --git a/lib/libc/ia64/sys/fork.S b/lib/libc/ia64/sys/fork.S new file mode 100644 index 0000000..5b09f77 --- /dev/null +++ b/lib/libc/ia64/sys/fork.S @@ -0,0 +1,37 @@ +/*- + * Copyright (c) 2000 Doug Rabson + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +#include "SYS.h" + +SYSCALL(fork) + cmp.ne p7,p0=ret1,r0 /* ret1!=0 for child */ + ;; +(p7) mov ret0=r0 + br.ret.sptk.few rp +END(__sys_fork) diff --git a/lib/libc/ia64/sys/getcontext.S b/lib/libc/ia64/sys/getcontext.S new file mode 100644 index 0000000..0ec6f92 --- /dev/null +++ b/lib/libc/ia64/sys/getcontext.S @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2003 Marcel Moolenaar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +#include "SYS.h" + +ENTRY(__sys_getcontext,2) + WEAK_ALIAS(getcontext, __sys_getcontext) + WEAK_ALIAS(_getcontext, __sys_getcontext) + flushrs + ;; + CALLSYS_ERROR(getcontext) + br.ret.sptk.few rp +END(__sys_getcontext) diff --git a/lib/libc/ia64/sys/pipe.S b/lib/libc/ia64/sys/pipe.S new file mode 100644 index 0000000..a6413df --- /dev/null +++ b/lib/libc/ia64/sys/pipe.S @@ -0,0 +1,47 @@ +/* $NetBSD: pipe.S,v 1.1 1995/02/10 17:50:35 cgd Exp $ */ + +/* + * Copyright (c) 1994, 1995 Carnegie-Mellon University. + * All rights reserved. + * + * Author: Chris G. Demetriou + * + * Permission to use, copy, modify and distribute this software and + * its documentation is hereby granted, provided that both the copyright + * notice and this permission notice appear in all copies of the + * software, derivative works or modified versions, and any portions + * thereof, and that both notices appear in supporting documentation. + * + * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" + * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND + * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * + * Carnegie Mellon requests users of this software to return to + * + * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU + * School of Computer Science + * Carnegie Mellon University + * Pittsburgh PA 15213-3890 + * + * any improvements or extensions that they make and grant Carnegie the + * rights to redistribute these changes. + */ + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +#include "SYS.h" + +ENTRY(__sys_pipe, 1) + WEAK_ALIAS(pipe, __sys_pipe) + WEAK_ALIAS(_pipe, __sys_pipe) + st8 [sp]=r32 + CALLSYS_ERROR(pipe) + ld8 r14=[sp] + ;; + st4 [r14]=ret0,4 + ;; + st4 [r14]=ret1 + mov ret0=0 + br.ret.sptk.few rp +END(__sys_pipe) diff --git a/lib/libc/ia64/sys/ptrace.S b/lib/libc/ia64/sys/ptrace.S new file mode 100644 index 0000000..b6d3abd --- /dev/null +++ b/lib/libc/ia64/sys/ptrace.S @@ -0,0 +1,41 @@ +/* $NetBSD: ptrace.S,v 1.4 1996/11/08 00:51:24 cgd Exp $ */ + +/* + * Copyright (c) 1994, 1995 Carnegie-Mellon University. + * All rights reserved. + * + * Author: Chris G. Demetriou + * + * Permission to use, copy, modify and distribute this software and + * its documentation is hereby granted, provided that both the copyright + * notice and this permission notice appear in all copies of the + * software, derivative works or modified versions, and any portions + * thereof, and that both notices appear in supporting documentation. + * + * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" + * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND + * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * + * Carnegie Mellon requests users of this software to return to + * + * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU + * School of Computer Science + * Carnegie Mellon University + * Pittsburgh PA 15213-3890 + * + * any improvements or extensions that they make and grant Carnegie the + * rights to redistribute these changes. + */ + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +#include "SYS.h" + +ENTRY(ptrace, 4) + add r14=@ltoff(errno),gp ;; + ld8 r14=[r14] ;; + st4 [r14]=r0 + CALLSYS_ERROR(ptrace) + br.ret.sptk.few rp +END(ptrace) diff --git a/lib/libc/ia64/sys/sbrk.S b/lib/libc/ia64/sys/sbrk.S new file mode 100644 index 0000000..98b5ce9 --- /dev/null +++ b/lib/libc/ia64/sys/sbrk.S @@ -0,0 +1,63 @@ +/* $NetBSD: sbrk.S,v 1.4 1996/10/17 03:08:20 cgd Exp $ */ + +/* + * Copyright (c) 1994, 1995 Carnegie-Mellon University. + * All rights reserved. + * + * Author: Chris G. Demetriou + * + * Permission to use, copy, modify and distribute this software and + * its documentation is hereby granted, provided that both the copyright + * notice and this permission notice appear in all copies of the + * software, derivative works or modified versions, and any portions + * thereof, and that both notices appear in supporting documentation. + * + * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" + * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND + * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * + * Carnegie Mellon requests users of this software to return to + * + * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU + * School of Computer Science + * Carnegie Mellon University + * Pittsburgh PA 15213-3890 + * + * any improvements or extensions that they make and grant Carnegie the + * rights to redistribute these changes. + */ + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +#include "SYS.h" + + .globl _end + + .data +EXPORT(curbrk) + .quad _end + + .text +ENTRY(sbrk, 1) + add r14 = @ltoff(curbrk), gp + ;; + ld8 r14 = [r14] + cmp.eq p6, p0 = r32, r0 + ;; + ld8 ret0 = [r14] +(p6) br.ret.sptk.few rp + ;; + add r32 = ret0, r32 + ;; + st8 [sp] = r32 + CALLSYS_ERROR(break) + ld8 r15 = [sp] + add r14 = @ltoff(curbrk), gp + ;; + ld8 r14 = [r14] + ;; + ld8 ret0 = [r14] + st8 [r14] = r15 + br.ret.sptk.few rp +END(sbrk) diff --git a/lib/libc/ia64/sys/setlogin.S b/lib/libc/ia64/sys/setlogin.S new file mode 100644 index 0000000..1d29a40 --- /dev/null +++ b/lib/libc/ia64/sys/setlogin.S @@ -0,0 +1,42 @@ +/* $NetBSD: setlogin.S,v 1.1 1995/02/10 17:50:39 cgd Exp $ */ + +/* + * Copyright (c) 1994, 1995 Carnegie-Mellon University. + * All rights reserved. + * + * Author: Chris G. Demetriou + * + * Permission to use, copy, modify and distribute this software and + * its documentation is hereby granted, provided that both the copyright + * notice and this permission notice appear in all copies of the + * software, derivative works or modified versions, and any portions + * thereof, and that both notices appear in supporting documentation. + * + * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" + * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND + * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * + * Carnegie Mellon requests users of this software to return to + * + * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU + * School of Computer Science + * Carnegie Mellon University + * Pittsburgh PA 15213-3890 + * + * any improvements or extensions that they make and grant Carnegie the + * rights to redistribute these changes. + */ + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +#include "SYS.h" + +IMPORT(_logname_valid, 4) /* in getlogin() */ + +SYSCALL(setlogin) + add r14=@ltoff(_logname_valid),gp ;; + ld8 r14=[r14] ;; + st4 [r14]=r0 /* clear it */ + br.ret.sptk.few rp +END(__sys_setlogin) diff --git a/lib/libc/ia64/sys/sigreturn.S b/lib/libc/ia64/sys/sigreturn.S new file mode 100644 index 0000000..2c7a710 --- /dev/null +++ b/lib/libc/ia64/sys/sigreturn.S @@ -0,0 +1,41 @@ +/* $NetBSD: sigreturn.S,v 1.1 1995/02/10 17:50:42 cgd Exp $ */ + +/* + * Copyright (c) 1994, 1995 Carnegie-Mellon University. + * All rights reserved. + * + * Author: Chris G. Demetriou + * + * Permission to use, copy, modify and distribute this software and + * its documentation is hereby granted, provided that both the copyright + * notice and this permission notice appear in all copies of the + * software, derivative works or modified versions, and any portions + * thereof, and that both notices appear in supporting documentation. + * + * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" + * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND + * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * + * Carnegie Mellon requests users of this software to return to + * + * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU + * School of Computer Science + * Carnegie Mellon University + * Pittsburgh PA 15213-3890 + * + * any improvements or extensions that they make and grant Carnegie the + * rights to redistribute these changes. + */ + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +#include "SYS.h" + +/* + * We must preserve the state of the registers as the user has set them up. + * However, that doesn't involve any special work on the ia64. + * (XXX PROFILING) + */ + +RSYSCALL(sigreturn) diff --git a/lib/libc/ia64/sys/swapcontext.S b/lib/libc/ia64/sys/swapcontext.S new file mode 100644 index 0000000..210189f --- /dev/null +++ b/lib/libc/ia64/sys/swapcontext.S @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2003 Marcel Moolenaar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +#include "SYS.h" + +ENTRY(__sys_swapcontext,2) + WEAK_ALIAS(swapcontext, __sys_swapcontext) + WEAK_ALIAS(_swapcontext, __sys_swapcontext) + flushrs + ;; + CALLSYS_ERROR(swapcontext) + br.ret.sptk.few rp +END(__sys_swapcontext) |
