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-rw-r--r--lib/clang/libllvmselectiondag/Makefile27
1 files changed, 20 insertions, 7 deletions
diff --git a/lib/clang/libllvmselectiondag/Makefile b/lib/clang/libllvmselectiondag/Makefile
index ad9e5dc..6c508c1 100644
--- a/lib/clang/libllvmselectiondag/Makefile
+++ b/lib/clang/libllvmselectiondag/Makefile
@@ -3,13 +3,26 @@
LIB= llvmselectiondag
SRCDIR= lib/CodeGen/SelectionDAG
-SRCS= CallingConvLower.cpp DAGCombiner.cpp FastISel.cpp \
- FunctionLoweringInfo.cpp InstrEmitter.cpp LegalizeDAG.cpp \
- LegalizeFloatTypes.cpp LegalizeIntegerTypes.cpp LegalizeTypes.cpp \
- LegalizeTypesGeneric.cpp LegalizeVectorOps.cpp LegalizeVectorTypes.cpp \
- ScheduleDAGFast.cpp ScheduleDAGList.cpp ScheduleDAGRRList.cpp \
- ScheduleDAGSDNodes.cpp SelectionDAG.cpp SelectionDAGBuilder.cpp \
- SelectionDAGISel.cpp SelectionDAGPrinter.cpp TargetLowering.cpp \
+SRCS= DAGCombiner.cpp \
+ FastISel.cpp \
+ FunctionLoweringInfo.cpp \
+ InstrEmitter.cpp \
+ LegalizeDAG.cpp \
+ LegalizeFloatTypes.cpp \
+ LegalizeIntegerTypes.cpp \
+ LegalizeTypes.cpp \
+ LegalizeTypesGeneric.cpp \
+ LegalizeVectorOps.cpp \
+ LegalizeVectorTypes.cpp \
+ ScheduleDAGFast.cpp \
+ ScheduleDAGList.cpp \
+ ScheduleDAGRRList.cpp \
+ ScheduleDAGSDNodes.cpp \
+ SelectionDAG.cpp \
+ SelectionDAGBuilder.cpp \
+ SelectionDAGISel.cpp \
+ SelectionDAGPrinter.cpp \
+ TargetLowering.cpp \
TargetSelectionDAGInfo.cpp
TGHDRS= Intrinsics
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