diff options
Diffstat (limited to 'lib/Target/MSP430')
35 files changed, 239 insertions, 147 deletions
diff --git a/lib/Target/MSP430/CMakeLists.txt b/lib/Target/MSP430/CMakeLists.txt index 0952b76..a8f9b52 100644 --- a/lib/Target/MSP430/CMakeLists.txt +++ b/lib/Target/MSP430/CMakeLists.txt @@ -1,11 +1,11 @@ set(LLVM_TARGET_DEFINITIONS MSP430.td) -llvm_tablegen(MSP430GenRegisterInfo.inc -gen-register-info) -llvm_tablegen(MSP430GenInstrInfo.inc -gen-instr-info) -llvm_tablegen(MSP430GenAsmWriter.inc -gen-asm-writer) -llvm_tablegen(MSP430GenDAGISel.inc -gen-dag-isel) -llvm_tablegen(MSP430GenCallingConv.inc -gen-callingconv) -llvm_tablegen(MSP430GenSubtargetInfo.inc -gen-subtarget) +tablegen(LLVM MSP430GenRegisterInfo.inc -gen-register-info) +tablegen(LLVM MSP430GenInstrInfo.inc -gen-instr-info) +tablegen(LLVM MSP430GenAsmWriter.inc -gen-asm-writer) +tablegen(LLVM MSP430GenDAGISel.inc -gen-dag-isel) +tablegen(LLVM MSP430GenCallingConv.inc -gen-callingconv) +tablegen(LLVM MSP430GenSubtargetInfo.inc -gen-subtarget) add_public_tablegen_target(MSP430CommonTableGen) add_llvm_target(MSP430CodeGen @@ -14,6 +14,7 @@ add_llvm_target(MSP430CodeGen MSP430ISelLowering.cpp MSP430InstrInfo.cpp MSP430FrameLowering.cpp + MSP430MachineFunctionInfo.cpp MSP430RegisterInfo.cpp MSP430Subtarget.cpp MSP430TargetMachine.cpp @@ -22,19 +23,6 @@ add_llvm_target(MSP430CodeGen MSP430MCInstLower.cpp ) -add_llvm_library_dependencies(LLVMMSP430CodeGen - LLVMAsmPrinter - LLVMCodeGen - LLVMCore - LLVMMC - LLVMMSP430AsmPrinter - LLVMMSP430Desc - LLVMMSP430Info - LLVMSelectionDAG - LLVMSupport - LLVMTarget - ) - add_subdirectory(InstPrinter) add_subdirectory(TargetInfo) add_subdirectory(MCTargetDesc) diff --git a/lib/Target/MSP430/InstPrinter/CMakeLists.txt b/lib/Target/MSP430/InstPrinter/CMakeLists.txt index ce39d95..64ac994 100644 --- a/lib/Target/MSP430/InstPrinter/CMakeLists.txt +++ b/lib/Target/MSP430/InstPrinter/CMakeLists.txt @@ -4,9 +4,4 @@ add_llvm_library(LLVMMSP430AsmPrinter MSP430InstPrinter.cpp ) -add_llvm_library_dependencies(LLVMMSP430AsmPrinter - LLVMMC - LLVMSupport - ) - add_dependencies(LLVMMSP430AsmPrinter MSP430CommonTableGen) diff --git a/lib/Target/MSP430/InstPrinter/LLVMBuild.txt b/lib/Target/MSP430/InstPrinter/LLVMBuild.txt new file mode 100644 index 0000000..37b8c25 --- /dev/null +++ b/lib/Target/MSP430/InstPrinter/LLVMBuild.txt @@ -0,0 +1,23 @@ +;===- ./lib/Target/MSP430/InstPrinter/LLVMBuild.txt ------------*- Conf -*--===; +; +; The LLVM Compiler Infrastructure +; +; This file is distributed under the University of Illinois Open Source +; License. See LICENSE.TXT for details. +; +;===------------------------------------------------------------------------===; +; +; This is an LLVMBuild description file for the components in this subdirectory. +; +; For more information on the LLVMBuild system, please see: +; +; http://llvm.org/docs/LLVMBuild.html +; +;===------------------------------------------------------------------------===; + +[component_0] +type = Library +name = MSP430AsmPrinter +parent = MSP430 +required_libraries = MC Support +add_to_library_groups = MSP430 diff --git a/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp b/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp index 5d6c6ad..0930c45 100644 --- a/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp +++ b/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp @@ -92,7 +92,6 @@ void MSP430InstPrinter::printCCOperand(const MCInst *MI, unsigned OpNo, switch (CC) { default: llvm_unreachable("Unsupported CC code"); - break; case MSP430CC::COND_E: O << "eq"; break; diff --git a/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h b/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h index a1984a8..d32eb3a 100644 --- a/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h +++ b/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h @@ -1,4 +1,4 @@ -//===-- MSP430InstPrinter.h - Convert MSP430 MCInst to assembly syntax ----===// +//= MSP430InstPrinter.h - Convert MSP430 MCInst to assembly syntax -*- C++ -*-// // // The LLVM Compiler Infrastructure // @@ -21,8 +21,9 @@ namespace llvm { class MSP430InstPrinter : public MCInstPrinter { public: - MSP430InstPrinter(const MCAsmInfo &MAI) - : MCInstPrinter(MAI) {} + MSP430InstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII, + const MCRegisterInfo &MRI) + : MCInstPrinter(MAI, MII, MRI) {} virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot); diff --git a/lib/Target/MSP430/LLVMBuild.txt b/lib/Target/MSP430/LLVMBuild.txt new file mode 100644 index 0000000..51d9702 --- /dev/null +++ b/lib/Target/MSP430/LLVMBuild.txt @@ -0,0 +1,32 @@ +;===- ./lib/Target/MSP430/LLVMBuild.txt ------------------------*- Conf -*--===; +; +; The LLVM Compiler Infrastructure +; +; This file is distributed under the University of Illinois Open Source +; License. See LICENSE.TXT for details. +; +;===------------------------------------------------------------------------===; +; +; This is an LLVMBuild description file for the components in this subdirectory. +; +; For more information on the LLVMBuild system, please see: +; +; http://llvm.org/docs/LLVMBuild.html +; +;===------------------------------------------------------------------------===; + +[common] +subdirectories = InstPrinter MCTargetDesc TargetInfo + +[component_0] +type = TargetGroup +name = MSP430 +parent = Target +has_asmprinter = 1 + +[component_1] +type = Library +name = MSP430CodeGen +parent = MSP430 +required_libraries = AsmPrinter CodeGen Core MC MSP430AsmPrinter MSP430Desc MSP430Info SelectionDAG Support Target +add_to_library_groups = MSP430 diff --git a/lib/Target/MSP430/MCTargetDesc/CMakeLists.txt b/lib/Target/MSP430/MCTargetDesc/CMakeLists.txt index 04bd03e..adc95c5 100644 --- a/lib/Target/MSP430/MCTargetDesc/CMakeLists.txt +++ b/lib/Target/MSP430/MCTargetDesc/CMakeLists.txt @@ -3,10 +3,4 @@ add_llvm_library(LLVMMSP430Desc MSP430MCAsmInfo.cpp ) -add_llvm_library_dependencies(LLVMMSP430Desc - LLVMMC - LLVMMSP430AsmPrinter - LLVMMSP430Info - ) - add_dependencies(LLVMMSP430Desc MSP430CommonTableGen) diff --git a/lib/Target/MSP430/MCTargetDesc/LLVMBuild.txt b/lib/Target/MSP430/MCTargetDesc/LLVMBuild.txt new file mode 100644 index 0000000..3319d936 --- /dev/null +++ b/lib/Target/MSP430/MCTargetDesc/LLVMBuild.txt @@ -0,0 +1,23 @@ +;===- ./lib/Target/MSP430/MCTargetDesc/LLVMBuild.txt -----------*- Conf -*--===; +; +; The LLVM Compiler Infrastructure +; +; This file is distributed under the University of Illinois Open Source +; License. See LICENSE.TXT for details. +; +;===------------------------------------------------------------------------===; +; +; This is an LLVMBuild description file for the components in this subdirectory. +; +; For more information on the LLVMBuild system, please see: +; +; http://llvm.org/docs/LLVMBuild.html +; +;===------------------------------------------------------------------------===; + +[component_0] +type = Library +name = MSP430Desc +parent = MSP430 +required_libraries = MC MSP430AsmPrinter MSP430Info Support Target +add_to_library_groups = MSP430 diff --git a/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp b/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp index ad7d380..2e328cb 100644 --- a/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp +++ b/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp @@ -12,8 +12,11 @@ //===----------------------------------------------------------------------===// #include "MSP430MCAsmInfo.h" +#include "llvm/ADT/StringRef.h" using namespace llvm; +void MSP430MCAsmInfo::anchor() { } + MSP430MCAsmInfo::MSP430MCAsmInfo(const Target &T, StringRef TT) { PointerSize = 2; diff --git a/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h b/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h index f3138a2..e5c2fc2 100644 --- a/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h +++ b/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h @@ -1,4 +1,4 @@ -//=====-- MSP430MCAsmInfo.h - MSP430 asm properties -----------*- C++ -*--====// +//===-- MSP430MCAsmInfo.h - MSP430 asm properties --------------*- C++ -*--===// // // The LLVM Compiler Infrastructure // @@ -14,13 +14,15 @@ #ifndef MSP430TARGETASMINFO_H #define MSP430TARGETASMINFO_H -#include "llvm/ADT/StringRef.h" #include "llvm/MC/MCAsmInfo.h" namespace llvm { + class StringRef; class Target; - struct MSP430MCAsmInfo : public MCAsmInfo { + class MSP430MCAsmInfo : public MCAsmInfo { + virtual void anchor(); + public: explicit MSP430MCAsmInfo(const Target &T, StringRef TT); }; diff --git a/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp b/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp index fda70b8..c455f6b 100644 --- a/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp +++ b/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp @@ -1,4 +1,4 @@ -//===-- MSP430MCTargetDesc.cpp - MSP430 Target Descriptions -----*- C++ -*-===// +//===-- MSP430MCTargetDesc.cpp - MSP430 Target Descriptions ---------------===// // // The LLVM Compiler Infrastructure // @@ -51,18 +51,21 @@ static MCSubtargetInfo *createMSP430MCSubtargetInfo(StringRef TT, StringRef CPU, } static MCCodeGenInfo *createMSP430MCCodeGenInfo(StringRef TT, Reloc::Model RM, - CodeModel::Model CM) { + CodeModel::Model CM, + CodeGenOpt::Level OL) { MCCodeGenInfo *X = new MCCodeGenInfo(); - X->InitMCCodeGenInfo(RM, CM); + X->InitMCCodeGenInfo(RM, CM, OL); return X; } static MCInstPrinter *createMSP430MCInstPrinter(const Target &T, unsigned SyntaxVariant, const MCAsmInfo &MAI, + const MCInstrInfo &MII, + const MCRegisterInfo &MRI, const MCSubtargetInfo &STI) { if (SyntaxVariant == 0) - return new MSP430InstPrinter(MAI); + return new MSP430InstPrinter(MAI, MII, MRI); return 0; } diff --git a/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.h b/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.h index 35f2590..7f3505c 100644 --- a/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.h +++ b/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.h @@ -15,9 +15,7 @@ #define MSP430MCTARGETDESC_H namespace llvm { -class MCSubtargetInfo; class Target; -class StringRef; extern Target TheMSP430Target; diff --git a/lib/Target/MSP430/MSP430.td b/lib/Target/MSP430/MSP430.td index 5cc5e6e..c6796b3 100644 --- a/lib/Target/MSP430/MSP430.td +++ b/lib/Target/MSP430/MSP430.td @@ -1,4 +1,4 @@ -//===- MSP430.td - Describe the MSP430 Target Machine ---------*- tblgen -*-==// +//===-- MSP430.td - Describe the MSP430 Target Machine -----*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/lib/Target/MSP430/MSP430AsmPrinter.cpp b/lib/Target/MSP430/MSP430AsmPrinter.cpp index 8836549..1d1094b 100644 --- a/lib/Target/MSP430/MSP430AsmPrinter.cpp +++ b/lib/Target/MSP430/MSP430AsmPrinter.cpp @@ -65,7 +65,7 @@ void MSP430AsmPrinter::printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O, const char *Modifier) { const MachineOperand &MO = MI->getOperand(OpNum); switch (MO.getType()) { - default: assert(0 && "Not implemented yet!"); + default: llvm_unreachable("Not implemented yet!"); case MachineOperand::MO_Register: O << MSP430InstPrinter::getRegisterName(MO.getReg()); return; diff --git a/lib/Target/MSP430/MSP430BranchSelector.cpp b/lib/Target/MSP430/MSP430BranchSelector.cpp index bd64443..bdeb0c5 100644 --- a/lib/Target/MSP430/MSP430BranchSelector.cpp +++ b/lib/Target/MSP430/MSP430BranchSelector.cpp @@ -1,4 +1,4 @@ -//===-- MSP430BranchSelector.cpp - Emit long conditional branches--*- C++ -*-=// +//===-- MSP430BranchSelector.cpp - Emit long conditional branches ---------===// // // The LLVM Compiler Infrastructure // diff --git a/lib/Target/MSP430/MSP430FrameLowering.cpp b/lib/Target/MSP430/MSP430FrameLowering.cpp index c99f4ab..61d7f2b 100644 --- a/lib/Target/MSP430/MSP430FrameLowering.cpp +++ b/lib/Target/MSP430/MSP430FrameLowering.cpp @@ -1,4 +1,4 @@ -//======-- MSP430FrameLowering.cpp - MSP430 Frame Information -------=========// +//===-- MSP430FrameLowering.cpp - MSP430 Frame Information ----------------===// // // The LLVM Compiler Infrastructure // @@ -29,7 +29,7 @@ using namespace llvm; bool MSP430FrameLowering::hasFP(const MachineFunction &MF) const { const MachineFrameInfo *MFI = MF.getFrameInfo(); - return (DisableFramePointerElim(MF) || + return (MF.getTarget().Options.DisableFramePointerElim(MF) || MF.getFrameInfo()->hasVarSizedObjects() || MFI->isFrameAddressTaken()); } @@ -140,7 +140,7 @@ void MSP430FrameLowering::emitEpilogue(MachineFunction &MF, while (MBBI != MBB.begin()) { MachineBasicBlock::iterator PI = prior(MBBI); unsigned Opc = PI->getOpcode(); - if (Opc != MSP430::POP16r && !PI->getDesc().isTerminator()) + if (Opc != MSP430::POP16r && !PI->isTerminator()) break; --MBBI; } diff --git a/lib/Target/MSP430/MSP430ISelLowering.cpp b/lib/Target/MSP430/MSP430ISelLowering.cpp index dc37431..071a2f7 100644 --- a/lib/Target/MSP430/MSP430ISelLowering.cpp +++ b/lib/Target/MSP430/MSP430ISelLowering.cpp @@ -29,7 +29,6 @@ #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineRegisterInfo.h" -#include "llvm/CodeGen/PseudoSourceValue.h" #include "llvm/CodeGen/SelectionDAGISel.h" #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" #include "llvm/CodeGen/ValueTypes.h" @@ -37,7 +36,6 @@ #include "llvm/Support/Debug.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/raw_ostream.h" -#include "llvm/ADT/VectorExtras.h" using namespace llvm; typedef enum { @@ -80,7 +78,6 @@ MSP430TargetLowering::MSP430TargetLowering(MSP430TargetMachine &tm) : setStackPointerRegisterToSaveRestore(MSP430::SPW); setBooleanContents(ZeroOrOneBooleanContent); setBooleanVectorContents(ZeroOrOneBooleanContent); // FIXME: Is this correct? - setSchedulingPreference(Sched::Latency); // We have post-incremented loads / stores. setIndexedLoadAction(ISD::POST_INC, MVT::i8, Legal); @@ -124,8 +121,12 @@ MSP430TargetLowering::MSP430TargetLowering(MSP430TargetMachine &tm) : setOperationAction(ISD::CTTZ, MVT::i8, Expand); setOperationAction(ISD::CTTZ, MVT::i16, Expand); + setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i8, Expand); + setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i16, Expand); setOperationAction(ISD::CTLZ, MVT::i8, Expand); setOperationAction(ISD::CTLZ, MVT::i16, Expand); + setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i8, Expand); + setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i16, Expand); setOperationAction(ISD::CTPOP, MVT::i8, Expand); setOperationAction(ISD::CTPOP, MVT::i16, Expand); @@ -193,7 +194,6 @@ SDValue MSP430TargetLowering::LowerOperation(SDValue Op, case ISD::FRAMEADDR: return LowerFRAMEADDR(Op, DAG); default: llvm_unreachable("unimplemented operand"); - return SDValue(); } } @@ -259,19 +259,16 @@ MSP430TargetLowering::LowerFormalArguments(SDValue Chain, case CallingConv::Fast: return LowerCCCArguments(Chain, CallConv, isVarArg, Ins, dl, DAG, InVals); case CallingConv::MSP430_INTR: - if (Ins.empty()) - return Chain; - else { + if (Ins.empty()) + return Chain; report_fatal_error("ISRs cannot have arguments"); - return SDValue(); - } } } SDValue MSP430TargetLowering::LowerCall(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, - bool &isTailCall, + bool doesNotRet, bool &isTailCall, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, @@ -289,7 +286,6 @@ MSP430TargetLowering::LowerCall(SDValue Chain, SDValue Callee, Outs, OutVals, Ins, dl, DAG, InVals); case CallingConv::MSP430_INTR: report_fatal_error("ISRs cannot be called directly"); - return SDValue(); } } @@ -372,7 +368,7 @@ MSP430TargetLowering::LowerCCCArguments(SDValue Chain, SDValue FIN = DAG.getFrameIndex(FI, MVT::i16); InVals.push_back(DAG.getLoad(VA.getLocVT(), dl, Chain, FIN, MachinePointerInfo::getFixedStack(FI), - false, false, 0)); + false, false, false, 0)); } } @@ -390,10 +386,8 @@ MSP430TargetLowering::LowerReturn(SDValue Chain, SmallVector<CCValAssign, 16> RVLocs; // ISRs cannot return any value. - if (CallConv == CallingConv::MSP430_INTR && !Outs.empty()) { + if (CallConv == CallingConv::MSP430_INTR && !Outs.empty()) report_fatal_error("ISRs cannot return any value"); - return SDValue(); - } // CCState - Info about the registers and stack slot. CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), @@ -599,8 +593,7 @@ SDValue MSP430TargetLowering::LowerShifts(SDValue Op, // Expand non-constant shifts to loops: if (!isa<ConstantSDNode>(N->getOperand(1))) switch (Opc) { - default: - assert(0 && "Invalid shift opcode!"); + default: llvm_unreachable("Invalid shift opcode!"); case ISD::SHL: return DAG.getNode(MSP430ISD::SHL, dl, VT, N->getOperand(0), N->getOperand(1)); @@ -651,7 +644,7 @@ SDValue MSP430TargetLowering::LowerExternalSymbol(SDValue Op, const char *Sym = cast<ExternalSymbolSDNode>(Op)->getSymbol(); SDValue Result = DAG.getTargetExternalSymbol(Sym, getPointerTy()); - return DAG.getNode(MSP430ISD::Wrapper, dl, getPointerTy(), Result);; + return DAG.getNode(MSP430ISD::Wrapper, dl, getPointerTy(), Result); } SDValue MSP430TargetLowering::LowerBlockAddress(SDValue Op, @@ -660,7 +653,7 @@ SDValue MSP430TargetLowering::LowerBlockAddress(SDValue Op, const BlockAddress *BA = cast<BlockAddressSDNode>(Op)->getBlockAddress(); SDValue Result = DAG.getBlockAddress(BA, getPointerTy(), /*isTarget=*/true); - return DAG.getNode(MSP430ISD::Wrapper, dl, getPointerTy(), Result);; + return DAG.getNode(MSP430ISD::Wrapper, dl, getPointerTy(), Result); } static SDValue EmitCMP(SDValue &LHS, SDValue &RHS, SDValue &TargetCC, @@ -908,13 +901,13 @@ SDValue MSP430TargetLowering::LowerRETURNADDR(SDValue Op, return DAG.getLoad(getPointerTy(), dl, DAG.getEntryNode(), DAG.getNode(ISD::ADD, dl, getPointerTy(), FrameAddr, Offset), - MachinePointerInfo(), false, false, 0); + MachinePointerInfo(), false, false, false, 0); } // Just load the return address. SDValue RetAddrFI = getReturnAddressFrameIndex(DAG); return DAG.getLoad(getPointerTy(), dl, DAG.getEntryNode(), - RetAddrFI, MachinePointerInfo(), false, false, 0); + RetAddrFI, MachinePointerInfo(), false, false, false, 0); } SDValue MSP430TargetLowering::LowerFRAMEADDR(SDValue Op, @@ -930,7 +923,7 @@ SDValue MSP430TargetLowering::LowerFRAMEADDR(SDValue Op, while (Depth--) FrameAddr = DAG.getLoad(VT, dl, DAG.getEntryNode(), FrameAddr, MachinePointerInfo(), - false, false, 0); + false, false, false, 0); return FrameAddr; } @@ -1028,8 +1021,7 @@ MSP430TargetLowering::EmitShiftInstr(MachineInstr *MI, unsigned Opc; const TargetRegisterClass * RC; switch (MI->getOpcode()) { - default: - assert(0 && "Invalid shift opcode!"); + default: llvm_unreachable("Invalid shift opcode!"); case MSP430::Shl8: Opc = MSP430::SHL8r1; RC = MSP430::GR8RegisterClass; diff --git a/lib/Target/MSP430/MSP430ISelLowering.h b/lib/Target/MSP430/MSP430ISelLowering.h index 237f604..e372f00 100644 --- a/lib/Target/MSP430/MSP430ISelLowering.h +++ b/lib/Target/MSP430/MSP430ISelLowering.h @@ -1,4 +1,4 @@ -//==-- MSP430ISelLowering.h - MSP430 DAG Lowering Interface ------*- C++ -*-==// +//===-- MSP430ISelLowering.h - MSP430 DAG Lowering Interface ----*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -152,8 +152,8 @@ namespace llvm { DebugLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const; virtual SDValue - LowerCall(SDValue Chain, SDValue Callee, - CallingConv::ID CallConv, bool isVarArg, bool &isTailCall, + LowerCall(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, + bool isVarArg, bool doesNotRet, bool &isTailCall, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, diff --git a/lib/Target/MSP430/MSP430InstrFormats.td b/lib/Target/MSP430/MSP430InstrFormats.td index 73aef1f..a9e87da 100644 --- a/lib/Target/MSP430/MSP430InstrFormats.td +++ b/lib/Target/MSP430/MSP430InstrFormats.td @@ -1,4 +1,4 @@ -//===- MSP430InstrFormats.td - MSP430 Instruction Formats-----*- tblgen -*-===// +//===-- MSP430InstrFormats.td - MSP430 Instruction Formats -*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/lib/Target/MSP430/MSP430InstrInfo.cpp b/lib/Target/MSP430/MSP430InstrInfo.cpp index ffd4318..c03ba47 100644 --- a/lib/Target/MSP430/MSP430InstrInfo.cpp +++ b/lib/Target/MSP430/MSP430InstrInfo.cpp @@ -1,4 +1,4 @@ -//===- MSP430InstrInfo.cpp - MSP430 Instruction Information ---------------===// +//===-- MSP430InstrInfo.cpp - MSP430 Instruction Information --------------===// // // The LLVM Compiler Infrastructure // @@ -11,15 +11,14 @@ // //===----------------------------------------------------------------------===// -#include "MSP430.h" #include "MSP430InstrInfo.h" +#include "MSP430.h" #include "MSP430MachineFunctionInfo.h" #include "MSP430TargetMachine.h" #include "llvm/Function.h" #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineRegisterInfo.h" -#include "llvm/CodeGen/PseudoSourceValue.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/TargetRegistry.h" @@ -43,8 +42,7 @@ void MSP430InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, MachineFrameInfo &MFI = *MF.getFrameInfo(); MachineMemOperand *MMO = - MF.getMachineMemOperand( - MachinePointerInfo(PseudoSourceValue::getFixedStack(FrameIdx)), + MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FrameIdx), MachineMemOperand::MOStore, MFI.getObjectSize(FrameIdx), MFI.getObjectAlignment(FrameIdx)); @@ -72,8 +70,7 @@ void MSP430InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, MachineFrameInfo &MFI = *MF.getFrameInfo(); MachineMemOperand *MMO = - MF.getMachineMemOperand( - MachinePointerInfo(PseudoSourceValue::getFixedStack(FrameIdx)), + MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FrameIdx), MachineMemOperand::MOLoad, MFI.getObjectSize(FrameIdx), MFI.getObjectAlignment(FrameIdx)); @@ -133,9 +130,7 @@ ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const { MSP430CC::CondCodes CC = static_cast<MSP430CC::CondCodes>(Cond[0].getImm()); switch (CC) { - default: - assert(0 && "Invalid branch condition!"); - break; + default: llvm_unreachable("Invalid branch condition!"); case MSP430CC::COND_E: CC = MSP430CC::COND_NE; break; @@ -161,13 +156,12 @@ ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const { } bool MSP430InstrInfo::isUnpredicatedTerminator(const MachineInstr *MI) const { - const MCInstrDesc &MCID = MI->getDesc(); - if (!MCID.isTerminator()) return false; + if (!MI->isTerminator()) return false; // Conditional branch is a special case. - if (MCID.isBranch() && !MCID.isBarrier()) + if (MI->isBranch() && !MI->isBarrier()) return true; - if (!MCID.isPredicable()) + if (!MI->isPredicable()) return true; return !isPredicated(MI); } @@ -192,7 +186,7 @@ bool MSP430InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, // A terminator that isn't a branch can't easily be handled // by this analysis. - if (!I->getDesc().isBranch()) + if (!I->isBranch()) return true; // Cannot handle indirect branches. @@ -301,8 +295,7 @@ unsigned MSP430InstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const { switch (Desc.TSFlags & MSP430II::SizeMask) { default: switch (Desc.getOpcode()) { - default: - assert(0 && "Unknown instruction size!"); + default: llvm_unreachable("Unknown instruction size!"); case TargetOpcode::PROLOG_LABEL: case TargetOpcode::EH_LABEL: case TargetOpcode::IMPLICIT_DEF: @@ -318,8 +311,7 @@ unsigned MSP430InstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const { } case MSP430II::SizeSpecial: switch (MI->getOpcode()) { - default: - assert(0 && "Unknown instruction size!"); + default: llvm_unreachable("Unknown instruction size!"); case MSP430::SAR8r1c: case MSP430::SAR16r1c: return 4; @@ -331,6 +323,4 @@ unsigned MSP430InstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const { case MSP430II::Size6Bytes: return 6; } - - return 6; } diff --git a/lib/Target/MSP430/MSP430InstrInfo.h b/lib/Target/MSP430/MSP430InstrInfo.h index 90013f5..04f339b 100644 --- a/lib/Target/MSP430/MSP430InstrInfo.h +++ b/lib/Target/MSP430/MSP430InstrInfo.h @@ -1,4 +1,4 @@ -//===- MSP430InstrInfo.h - MSP430 Instruction Information -------*- C++ -*-===// +//===-- MSP430InstrInfo.h - MSP430 Instruction Information ------*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -14,8 +14,8 @@ #ifndef LLVM_TARGET_MSP430INSTRINFO_H #define LLVM_TARGET_MSP430INSTRINFO_H -#include "llvm/Target/TargetInstrInfo.h" #include "MSP430RegisterInfo.h" +#include "llvm/Target/TargetInstrInfo.h" #define GET_INSTRINFO_HEADER #include "MSP430GenInstrInfo.inc" diff --git a/lib/Target/MSP430/MSP430InstrInfo.td b/lib/Target/MSP430/MSP430InstrInfo.td index 59cb598..4348dd5 100644 --- a/lib/Target/MSP430/MSP430InstrInfo.td +++ b/lib/Target/MSP430/MSP430InstrInfo.td @@ -1,4 +1,4 @@ -//===- MSP430InstrInfo.td - MSP430 Instruction defs -----------*- tblgen-*-===// +//===-- MSP430InstrInfo.td - MSP430 Instruction defs -------*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/lib/Target/MSP430/MSP430MCInstLower.cpp b/lib/Target/MSP430/MSP430MCInstLower.cpp index d1d9a11..b1773fb 100644 --- a/lib/Target/MSP430/MSP430MCInstLower.cpp +++ b/lib/Target/MSP430/MSP430MCInstLower.cpp @@ -1,4 +1,4 @@ -//===-- MSP430MCInstLower.cpp - Convert MSP430 MachineInstr to an MCInst---===// +//===-- MSP430MCInstLower.cpp - Convert MSP430 MachineInstr to an MCInst --===// // // The LLVM Compiler Infrastructure // @@ -39,7 +39,7 @@ GetGlobalAddressSymbol(const MachineOperand &MO) const { MCSymbol *MSP430MCInstLower:: GetExternalSymbolSymbol(const MachineOperand &MO) const { switch (MO.getTargetFlags()) { - default: assert(0 && "Unknown target flag on GV operand"); + default: llvm_unreachable("Unknown target flag on GV operand"); case 0: break; } @@ -81,7 +81,7 @@ GetConstantPoolIndexSymbol(const MachineOperand &MO) const { MCSymbol *MSP430MCInstLower:: GetBlockAddressSymbol(const MachineOperand &MO) const { switch (MO.getTargetFlags()) { - default: assert(0 && "Unknown target flag on GV operand"); + default: llvm_unreachable("Unknown target flag on GV operand"); case 0: break; } @@ -116,7 +116,7 @@ void MSP430MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { switch (MO.getType()) { default: MI->dump(); - assert(0 && "unknown operand type"); + llvm_unreachable("unknown operand type"); case MachineOperand::MO_Register: // Ignore all implicit register operands. if (MO.isImplicit()) continue; @@ -143,6 +143,9 @@ void MSP430MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { break; case MachineOperand::MO_BlockAddress: MCOp = LowerSymbolOperand(MO, GetBlockAddressSymbol(MO)); + break; + case MachineOperand::MO_RegisterMask: + continue; } OutMI.addOperand(MCOp); diff --git a/lib/Target/MSP430/MSP430MCInstLower.h b/lib/Target/MSP430/MSP430MCInstLower.h index e937696..24151e2 100644 --- a/lib/Target/MSP430/MSP430MCInstLower.h +++ b/lib/Target/MSP430/MSP430MCInstLower.h @@ -1,4 +1,4 @@ -//===-- MSP430MCInstLower.h - Lower MachineInstr to MCInst ----------------===// +//===-- MSP430MCInstLower.h - Lower MachineInstr to MCInst ------*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -14,7 +14,6 @@ namespace llvm { class AsmPrinter; - class MCAsmInfo; class MCContext; class MCInst; class MCOperand; diff --git a/lib/Target/MSP430/MSP430MachineFunctionInfo.cpp b/lib/Target/MSP430/MSP430MachineFunctionInfo.cpp new file mode 100644 index 0000000..0f75399 --- /dev/null +++ b/lib/Target/MSP430/MSP430MachineFunctionInfo.cpp @@ -0,0 +1,14 @@ +//===-- MSP430MachineFuctionInfo.cpp - MSP430 machine function info -------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "MSP430MachineFunctionInfo.h" + +using namespace llvm; + +void MSP430MachineFunctionInfo::anchor() { } diff --git a/lib/Target/MSP430/MSP430MachineFunctionInfo.h b/lib/Target/MSP430/MSP430MachineFunctionInfo.h index 383fd2e..632d6de 100644 --- a/lib/Target/MSP430/MSP430MachineFunctionInfo.h +++ b/lib/Target/MSP430/MSP430MachineFunctionInfo.h @@ -21,6 +21,8 @@ namespace llvm { /// MSP430MachineFunctionInfo - This class is derived from MachineFunction and /// contains private MSP430 target-specific information for each MachineFunction. class MSP430MachineFunctionInfo : public MachineFunctionInfo { + virtual void anchor(); + /// CalleeSavedFrameSize - Size of the callee-saved register portion of the /// stack frame in bytes. unsigned CalleeSavedFrameSize; diff --git a/lib/Target/MSP430/MSP430RegisterInfo.cpp b/lib/Target/MSP430/MSP430RegisterInfo.cpp index 9049c4b..51ec71a 100644 --- a/lib/Target/MSP430/MSP430RegisterInfo.cpp +++ b/lib/Target/MSP430/MSP430RegisterInfo.cpp @@ -1,4 +1,4 @@ -//===- MSP430RegisterInfo.cpp - MSP430 Register Information ---------------===// +//===-- MSP430RegisterInfo.cpp - MSP430 Register Information --------------===// // // The LLVM Compiler Infrastructure // @@ -13,9 +13,9 @@ #define DEBUG_TYPE "msp430-reg-info" +#include "MSP430RegisterInfo.h" #include "MSP430.h" #include "MSP430MachineFunctionInfo.h" -#include "MSP430RegisterInfo.h" #include "MSP430TargetMachine.h" #include "llvm/Function.h" #include "llvm/CodeGen/MachineFrameInfo.h" @@ -38,27 +38,27 @@ MSP430RegisterInfo::MSP430RegisterInfo(MSP430TargetMachine &tm, StackAlign = TM.getFrameLowering()->getStackAlignment(); } -const unsigned* +const uint16_t* MSP430RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { const TargetFrameLowering *TFI = MF->getTarget().getFrameLowering(); const Function* F = MF->getFunction(); - static const unsigned CalleeSavedRegs[] = { + static const uint16_t CalleeSavedRegs[] = { MSP430::FPW, MSP430::R5W, MSP430::R6W, MSP430::R7W, MSP430::R8W, MSP430::R9W, MSP430::R10W, MSP430::R11W, 0 }; - static const unsigned CalleeSavedRegsFP[] = { + static const uint16_t CalleeSavedRegsFP[] = { MSP430::R5W, MSP430::R6W, MSP430::R7W, MSP430::R8W, MSP430::R9W, MSP430::R10W, MSP430::R11W, 0 }; - static const unsigned CalleeSavedRegsIntr[] = { + static const uint16_t CalleeSavedRegsIntr[] = { MSP430::FPW, MSP430::R5W, MSP430::R6W, MSP430::R7W, MSP430::R8W, MSP430::R9W, MSP430::R10W, MSP430::R11W, MSP430::R12W, MSP430::R13W, MSP430::R14W, MSP430::R15W, 0 }; - static const unsigned CalleeSavedRegsIntrFP[] = { + static const uint16_t CalleeSavedRegsIntrFP[] = { MSP430::R5W, MSP430::R6W, MSP430::R7W, MSP430::R8W, MSP430::R9W, MSP430::R10W, MSP430::R11W, MSP430::R12W, MSP430::R13W, MSP430::R14W, MSP430::R15W, diff --git a/lib/Target/MSP430/MSP430RegisterInfo.h b/lib/Target/MSP430/MSP430RegisterInfo.h index 10a3d53..82ee499 100644 --- a/lib/Target/MSP430/MSP430RegisterInfo.h +++ b/lib/Target/MSP430/MSP430RegisterInfo.h @@ -1,4 +1,4 @@ -//===- MSP430RegisterInfo.h - MSP430 Register Information Impl --*- C++ -*-===// +//===-- MSP430RegisterInfo.h - MSP430 Register Information Impl -*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -36,18 +36,11 @@ public: MSP430RegisterInfo(MSP430TargetMachine &tm, const TargetInstrInfo &tii); /// Code Generation virtual methods... - const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const; + const uint16_t *getCalleeSavedRegs(const MachineFunction *MF = 0) const; BitVector getReservedRegs(const MachineFunction &MF) const; const TargetRegisterClass* getPointerRegClass(unsigned Kind = 0) const; - const TargetRegisterClass * - getMatchingSuperRegClass(const TargetRegisterClass *A, - const TargetRegisterClass *B, unsigned Idx) const { - // No sub-classes makes this really easy. - return A; - } - void eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const; diff --git a/lib/Target/MSP430/MSP430RegisterInfo.td b/lib/Target/MSP430/MSP430RegisterInfo.td index d1c2e3f..3f2eb8c 100644 --- a/lib/Target/MSP430/MSP430RegisterInfo.td +++ b/lib/Target/MSP430/MSP430RegisterInfo.td @@ -1,4 +1,4 @@ -//===- MSP430RegisterInfo.td - MSP430 Register defs ----------*- tblgen -*-===// +//===-- MSP430RegisterInfo.td - MSP430 Register defs -------*- tablegen -*-===// // // The LLVM Compiler Infrastructure // diff --git a/lib/Target/MSP430/MSP430Subtarget.cpp b/lib/Target/MSP430/MSP430Subtarget.cpp index 3ee14d9..edeaf34 100644 --- a/lib/Target/MSP430/MSP430Subtarget.cpp +++ b/lib/Target/MSP430/MSP430Subtarget.cpp @@ -1,4 +1,4 @@ -//===- MSP430Subtarget.cpp - MSP430 Subtarget Information ---------*- C++ -*-=// +//===-- MSP430Subtarget.cpp - MSP430 Subtarget Information ----------------===// // // The LLVM Compiler Infrastructure // @@ -21,6 +21,8 @@ using namespace llvm; +void MSP430Subtarget::anchor() { } + MSP430Subtarget::MSP430Subtarget(const std::string &TT, const std::string &CPU, const std::string &FS) : diff --git a/lib/Target/MSP430/MSP430Subtarget.h b/lib/Target/MSP430/MSP430Subtarget.h index 1ce5f11..4d8792e 100644 --- a/lib/Target/MSP430/MSP430Subtarget.h +++ b/lib/Target/MSP430/MSP430Subtarget.h @@ -1,4 +1,4 @@ -//====-- MSP430Subtarget.h - Define Subtarget for the MSP430 ---*- C++ -*--===// +//===-- MSP430Subtarget.h - Define Subtarget for the MSP430 ----*- C++ -*--===// // // The LLVM Compiler Infrastructure // @@ -15,16 +15,16 @@ #define LLVM_TARGET_MSP430_SUBTARGET_H #include "llvm/Target/TargetSubtargetInfo.h" +#include <string> #define GET_SUBTARGETINFO_HEADER #include "MSP430GenSubtargetInfo.inc" -#include <string> - namespace llvm { class StringRef; class MSP430Subtarget : public MSP430GenSubtargetInfo { + virtual void anchor(); bool ExtendedInsts; public: /// This constructor initializes the data members to match that diff --git a/lib/Target/MSP430/MSP430TargetMachine.cpp b/lib/Target/MSP430/MSP430TargetMachine.cpp index 4dd8933..9f2eda1 100644 --- a/lib/Target/MSP430/MSP430TargetMachine.cpp +++ b/lib/Target/MSP430/MSP430TargetMachine.cpp @@ -11,8 +11,8 @@ // //===----------------------------------------------------------------------===// -#include "MSP430.h" #include "MSP430TargetMachine.h" +#include "MSP430.h" #include "llvm/PassManager.h" #include "llvm/CodeGen/Passes.h" #include "llvm/MC/MCAsmInfo.h" @@ -28,24 +28,43 @@ MSP430TargetMachine::MSP430TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, - Reloc::Model RM, CodeModel::Model CM) - : LLVMTargetMachine(T, TT, CPU, FS, RM, CM), + const TargetOptions &Options, + Reloc::Model RM, CodeModel::Model CM, + CodeGenOpt::Level OL) + : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), Subtarget(TT, CPU, FS), // FIXME: Check TargetData string. DataLayout("e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"), InstrInfo(*this), TLInfo(*this), TSInfo(*this), FrameLowering(Subtarget) { } +namespace { +/// MSP430 Code Generator Pass Configuration Options. +class MSP430PassConfig : public TargetPassConfig { +public: + MSP430PassConfig(MSP430TargetMachine *TM, PassManagerBase &PM) + : TargetPassConfig(TM, PM) {} + + MSP430TargetMachine &getMSP430TargetMachine() const { + return getTM<MSP430TargetMachine>(); + } + + virtual bool addInstSelector(); + virtual bool addPreEmitPass(); +}; +} // namespace + +TargetPassConfig *MSP430TargetMachine::createPassConfig(PassManagerBase &PM) { + return new MSP430PassConfig(this, PM); +} -bool MSP430TargetMachine::addInstSelector(PassManagerBase &PM, - CodeGenOpt::Level OptLevel) { +bool MSP430PassConfig::addInstSelector() { // Install an instruction selector. - PM.add(createMSP430ISelDag(*this, OptLevel)); + PM.add(createMSP430ISelDag(getMSP430TargetMachine(), getOptLevel())); return false; } -bool MSP430TargetMachine::addPreEmitPass(PassManagerBase &PM, - CodeGenOpt::Level OptLevel) { +bool MSP430PassConfig::addPreEmitPass() { // Must run branch selection immediately preceding the asm printer. PM.add(createMSP430BranchSelectionPass()); return false; diff --git a/lib/Target/MSP430/MSP430TargetMachine.h b/lib/Target/MSP430/MSP430TargetMachine.h index eb483dc..f54146b 100644 --- a/lib/Target/MSP430/MSP430TargetMachine.h +++ b/lib/Target/MSP430/MSP430TargetMachine.h @@ -1,4 +1,4 @@ -//==-- MSP430TargetMachine.h - Define TargetMachine for MSP430 ---*- C++ -*-==// +//===-- MSP430TargetMachine.h - Define TargetMachine for MSP430 -*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -39,8 +39,9 @@ class MSP430TargetMachine : public LLVMTargetMachine { public: MSP430TargetMachine(const Target &T, StringRef TT, - StringRef CPU, StringRef FS, - Reloc::Model RM, CodeModel::Model CM); + StringRef CPU, StringRef FS, const TargetOptions &Options, + Reloc::Model RM, CodeModel::Model CM, + CodeGenOpt::Level OL); virtual const TargetFrameLowering *getFrameLowering() const { return &FrameLowering; @@ -61,8 +62,7 @@ public: return &TSInfo; } - virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel); - virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel); + virtual TargetPassConfig *createPassConfig(PassManagerBase &PM); }; // MSP430TargetMachine. } // end namespace llvm diff --git a/lib/Target/MSP430/TargetInfo/CMakeLists.txt b/lib/Target/MSP430/TargetInfo/CMakeLists.txt index 1526946..f6b40ea 100644 --- a/lib/Target/MSP430/TargetInfo/CMakeLists.txt +++ b/lib/Target/MSP430/TargetInfo/CMakeLists.txt @@ -4,10 +4,4 @@ add_llvm_library(LLVMMSP430Info MSP430TargetInfo.cpp ) -add_llvm_library_dependencies(LLVMMSP430Info - LLVMMC - LLVMSupport - LLVMTarget - ) - add_dependencies(LLVMMSP430Info MSP430CommonTableGen) diff --git a/lib/Target/MSP430/TargetInfo/LLVMBuild.txt b/lib/Target/MSP430/TargetInfo/LLVMBuild.txt new file mode 100644 index 0000000..deafc2d --- /dev/null +++ b/lib/Target/MSP430/TargetInfo/LLVMBuild.txt @@ -0,0 +1,23 @@ +;===- ./lib/Target/MSP430/TargetInfo/LLVMBuild.txt -------------*- Conf -*--===; +; +; The LLVM Compiler Infrastructure +; +; This file is distributed under the University of Illinois Open Source +; License. See LICENSE.TXT for details. +; +;===------------------------------------------------------------------------===; +; +; This is an LLVMBuild description file for the components in this subdirectory. +; +; For more information on the LLVMBuild system, please see: +; +; http://llvm.org/docs/LLVMBuild.html +; +;===------------------------------------------------------------------------===; + +[component_0] +type = Library +name = MSP430Info +parent = MSP430 +required_libraries = MC Support Target +add_to_library_groups = MSP430 |
