diff options
Diffstat (limited to 'lib/Target/MSP430/MSP430ISelDAGToDAG.cpp')
-rw-r--r-- | lib/Target/MSP430/MSP430ISelDAGToDAG.cpp | 67 |
1 files changed, 33 insertions, 34 deletions
diff --git a/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp b/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp index 4d40769..4eec757 100644 --- a/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp +++ b/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp @@ -146,12 +146,12 @@ namespace { private: DenseMap<SDNode*, SDNode*> RMWStores; void PreprocessForRMW(); - SDNode *Select(SDValue Op); - SDNode *SelectIndexedLoad(SDValue Op); - SDNode *SelectIndexedBinOp(SDValue Op, SDValue N1, SDValue N2, + SDNode *Select(SDNode *N); + SDNode *SelectIndexedLoad(SDNode *Op); + SDNode *SelectIndexedBinOp(SDNode *Op, SDValue N1, SDValue N2, unsigned Opc8, unsigned Opc16); - bool SelectAddr(SDValue Op, SDValue Addr, SDValue &Base, SDValue &Disp); + bool SelectAddr(SDNode *Op, SDValue Addr, SDValue &Base, SDValue &Disp); #ifndef NDEBUG unsigned Indent; @@ -283,7 +283,7 @@ bool MSP430DAGToDAGISel::MatchAddress(SDValue N, MSP430ISelAddressMode &AM) { /// SelectAddr - returns true if it is able pattern match an addressing mode. /// It returns the operands which make up the maximal addressing mode it can /// match by reference. -bool MSP430DAGToDAGISel::SelectAddr(SDValue Op, SDValue N, +bool MSP430DAGToDAGISel::SelectAddr(SDNode *Op, SDValue N, SDValue &Base, SDValue &Disp) { MSP430ISelAddressMode AM; @@ -326,7 +326,7 @@ SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode, switch (ConstraintCode) { default: return true; case 'm': // memory - if (!SelectAddr(Op, Op, Op0, Op1)) + if (!SelectAddr(Op.getNode(), Op, Op0, Op1)) return true; break; } @@ -627,8 +627,8 @@ static bool isValidIndexedLoad(const LoadSDNode *LD) { return true; } -SDNode *MSP430DAGToDAGISel::SelectIndexedLoad(SDValue Op) { - LoadSDNode *LD = cast<LoadSDNode>(Op); +SDNode *MSP430DAGToDAGISel::SelectIndexedLoad(SDNode *N) { + LoadSDNode *LD = cast<LoadSDNode>(N); if (!isValidIndexedLoad(LD)) return NULL; @@ -646,17 +646,17 @@ SDNode *MSP430DAGToDAGISel::SelectIndexedLoad(SDValue Op) { return NULL; } - return CurDAG->getMachineNode(Opcode, Op.getDebugLoc(), + return CurDAG->getMachineNode(Opcode, N->getDebugLoc(), VT, MVT::i16, MVT::Other, LD->getBasePtr(), LD->getChain()); } -SDNode *MSP430DAGToDAGISel::SelectIndexedBinOp(SDValue Op, +SDNode *MSP430DAGToDAGISel::SelectIndexedBinOp(SDNode *Op, SDValue N1, SDValue N2, unsigned Opc8, unsigned Opc16) { if (N1.getOpcode() == ISD::LOAD && N1.hasOneUse() && - IsLegalAndProfitableToFold(N1.getNode(), Op.getNode(), Op.getNode())) { + IsLegalAndProfitableToFold(N1.getNode(), Op, Op)) { LoadSDNode *LD = cast<LoadSDNode>(N1); if (!isValidIndexedLoad(LD)) return NULL; @@ -667,7 +667,7 @@ SDNode *MSP430DAGToDAGISel::SelectIndexedBinOp(SDValue Op, MemRefs0[0] = cast<MemSDNode>(N1)->getMemOperand(); SDValue Ops0[] = { N2, LD->getBasePtr(), LD->getChain() }; SDNode *ResNode = - CurDAG->SelectNodeTo(Op.getNode(), Opc, + CurDAG->SelectNodeTo(Op, Opc, VT, MVT::i16, MVT::Other, Ops0, 3); cast<MachineSDNode>(ResNode)->setMemRefs(MemRefs0, MemRefs0 + 1); @@ -707,9 +707,8 @@ void MSP430DAGToDAGISel::InstructionSelect() { RMWStores.clear(); } -SDNode *MSP430DAGToDAGISel::Select(SDValue Op) { - SDNode *Node = Op.getNode(); - DebugLoc dl = Op.getDebugLoc(); +SDNode *MSP430DAGToDAGISel::Select(SDNode *Node) { + DebugLoc dl = Node->getDebugLoc(); // Dump information about the Node being selected DEBUG(errs().indent(Indent) << "Selecting: "); @@ -730,7 +729,7 @@ SDNode *MSP430DAGToDAGISel::Select(SDValue Op) { switch (Node->getOpcode()) { default: break; case ISD::FrameIndex: { - assert(Op.getValueType() == MVT::i16); + assert(Node->getValueType(0) == MVT::i16); int FI = cast<FrameIndexSDNode>(Node)->getIndex(); SDValue TFI = CurDAG->getTargetFrameIndex(FI, MVT::i16); if (Node->hasOneUse()) @@ -740,18 +739,18 @@ SDNode *MSP430DAGToDAGISel::Select(SDValue Op) { TFI, CurDAG->getTargetConstant(0, MVT::i16)); } case ISD::LOAD: - if (SDNode *ResNode = SelectIndexedLoad(Op)) + if (SDNode *ResNode = SelectIndexedLoad(Node)) return ResNode; // Other cases are autogenerated. break; case ISD::ADD: if (SDNode *ResNode = - SelectIndexedBinOp(Op, - Op.getOperand(0), Op.getOperand(1), + SelectIndexedBinOp(Node, + Node->getOperand(0), Node->getOperand(1), MSP430::ADD8rm_POST, MSP430::ADD16rm_POST)) return ResNode; else if (SDNode *ResNode = - SelectIndexedBinOp(Op, Op.getOperand(1), Op.getOperand(0), + SelectIndexedBinOp(Node, Node->getOperand(1), Node->getOperand(0), MSP430::ADD8rm_POST, MSP430::ADD16rm_POST)) return ResNode; @@ -759,8 +758,8 @@ SDNode *MSP430DAGToDAGISel::Select(SDValue Op) { break; case ISD::SUB: if (SDNode *ResNode = - SelectIndexedBinOp(Op, - Op.getOperand(0), Op.getOperand(1), + SelectIndexedBinOp(Node, + Node->getOperand(0), Node->getOperand(1), MSP430::SUB8rm_POST, MSP430::SUB16rm_POST)) return ResNode; @@ -768,12 +767,12 @@ SDNode *MSP430DAGToDAGISel::Select(SDValue Op) { break; case ISD::AND: if (SDNode *ResNode = - SelectIndexedBinOp(Op, - Op.getOperand(0), Op.getOperand(1), + SelectIndexedBinOp(Node, + Node->getOperand(0), Node->getOperand(1), MSP430::AND8rm_POST, MSP430::AND16rm_POST)) return ResNode; else if (SDNode *ResNode = - SelectIndexedBinOp(Op, Op.getOperand(1), Op.getOperand(0), + SelectIndexedBinOp(Node, Node->getOperand(1), Node->getOperand(0), MSP430::AND8rm_POST, MSP430::AND16rm_POST)) return ResNode; @@ -781,12 +780,12 @@ SDNode *MSP430DAGToDAGISel::Select(SDValue Op) { break; case ISD::OR: if (SDNode *ResNode = - SelectIndexedBinOp(Op, - Op.getOperand(0), Op.getOperand(1), + SelectIndexedBinOp(Node, + Node->getOperand(0), Node->getOperand(1), MSP430::OR8rm_POST, MSP430::OR16rm_POST)) return ResNode; else if (SDNode *ResNode = - SelectIndexedBinOp(Op, Op.getOperand(1), Op.getOperand(0), + SelectIndexedBinOp(Node, Node->getOperand(1), Node->getOperand(0), MSP430::OR8rm_POST, MSP430::OR16rm_POST)) return ResNode; @@ -794,12 +793,12 @@ SDNode *MSP430DAGToDAGISel::Select(SDValue Op) { break; case ISD::XOR: if (SDNode *ResNode = - SelectIndexedBinOp(Op, - Op.getOperand(0), Op.getOperand(1), + SelectIndexedBinOp(Node, + Node->getOperand(0), Node->getOperand(1), MSP430::XOR8rm_POST, MSP430::XOR16rm_POST)) return ResNode; else if (SDNode *ResNode = - SelectIndexedBinOp(Op, Op.getOperand(1), Op.getOperand(0), + SelectIndexedBinOp(Node, Node->getOperand(1), Node->getOperand(0), MSP430::XOR8rm_POST, MSP430::XOR16rm_POST)) return ResNode; @@ -808,11 +807,11 @@ SDNode *MSP430DAGToDAGISel::Select(SDValue Op) { } // Select the default instruction - SDNode *ResNode = SelectCode(Op); + SDNode *ResNode = SelectCode(Node); DEBUG(errs() << std::string(Indent-2, ' ') << "=> "); - if (ResNode == NULL || ResNode == Op.getNode()) - DEBUG(Op.getNode()->dump(CurDAG)); + if (ResNode == NULL || ResNode == Node) + DEBUG(Node->dump(CurDAG)); else DEBUG(ResNode->dump(CurDAG)); DEBUG(errs() << "\n"); |