diff options
Diffstat (limited to 'lib/Target/CellSPU/SPUOperands.td')
| -rw-r--r-- | lib/Target/CellSPU/SPUOperands.td | 18 |
1 files changed, 11 insertions, 7 deletions
diff --git a/lib/Target/CellSPU/SPUOperands.td b/lib/Target/CellSPU/SPUOperands.td index e1a0358..96cde51 100644 --- a/lib/Target/CellSPU/SPUOperands.td +++ b/lib/Target/CellSPU/SPUOperands.td @@ -143,7 +143,7 @@ def immU16 : PatLeaf<(imm), [{ def imm18 : PatLeaf<(imm), [{ // imm18 predicate: True if the immediate fits into an 18-bit unsigned field. int Value = (int) N->getZExtValue(); - return ((Value & ((1 << 19) - 1)) == Value); + return isUInt<18>(Value); }]>; def lo16 : PatLeaf<(imm), [{ @@ -203,7 +203,7 @@ def FPimm_sext16 : SDNodeXForm<fpimm, [{ def FPimm_u18 : SDNodeXForm<fpimm, [{ float fval = N->getValueAPF().convertToFloat(); - return getI32Imm(FloatToBits(fval) & ((1 << 19) - 1)); + return getI32Imm(FloatToBits(fval) & ((1 << 18) - 1)); }]>; def fpimmSExt16 : PatLeaf<(fpimm), [{ @@ -225,7 +225,7 @@ def hi16_f32 : PatLeaf<(fpimm), [{ def fpimm18 : PatLeaf<(fpimm), [{ if (N->getValueType(0) == MVT::f32) { uint32_t Value = FloatToBits(N->getValueAPF().convertToFloat()); - return ((Value & ((1 << 19) - 1)) == Value); + return isUInt<18>(Value); } return false; @@ -654,7 +654,11 @@ def memrr : Operand<iPTR> { // A-form : abs (256K LSA offset) // D-form(2): [r+I7] (7-bit signed offset + reg) -def dform_addr : ComplexPattern<iPTR, 2, "SelectDFormAddr", [], []>; -def xform_addr : ComplexPattern<iPTR, 2, "SelectXFormAddr", [], []>; -def aform_addr : ComplexPattern<iPTR, 2, "SelectAFormAddr", [], []>; -def dform2_addr : ComplexPattern<iPTR, 2, "SelectDForm2Addr", [], []>; +def dform_addr : ComplexPattern<iPTR, 2, "SelectDFormAddr", + [], [SDNPWantRoot]>; +def xform_addr : ComplexPattern<iPTR, 2, "SelectXFormAddr", + [], [SDNPWantRoot]>; +def aform_addr : ComplexPattern<iPTR, 2, "SelectAFormAddr", + [], [SDNPWantRoot]>; +def dform2_addr : ComplexPattern<iPTR, 2, "SelectDForm2Addr", + [], [SDNPWantRoot]>; |
