diff options
Diffstat (limited to 'lib/CodeGen')
40 files changed, 2162 insertions, 3803 deletions
diff --git a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp index 876f628..f4d8864 100644 --- a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp +++ b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp @@ -16,6 +16,7 @@ #include "llvm/DerivedTypes.h" #include "llvm/Constants.h" #include "llvm/Module.h" +#include "llvm/CodeGen/DwarfWriter.h" #include "llvm/CodeGen/GCMetadataPrinter.h" #include "llvm/CodeGen/MachineConstantPool.h" #include "llvm/CodeGen/MachineFrameInfo.h" @@ -23,18 +24,19 @@ #include "llvm/CodeGen/MachineJumpTableInfo.h" #include "llvm/CodeGen/MachineLoopInfo.h" #include "llvm/CodeGen/MachineModuleInfo.h" -#include "llvm/CodeGen/DwarfWriter.h" #include "llvm/Analysis/DebugInfo.h" #include "llvm/MC/MCContext.h" +#include "llvm/MC/MCExpr.h" #include "llvm/MC/MCInst.h" #include "llvm/MC/MCSection.h" #include "llvm/MC/MCStreamer.h" #include "llvm/MC/MCSymbol.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/Format.h" #include "llvm/Support/FormattedStream.h" -#include "llvm/Support/Mangler.h" #include "llvm/MC/MCAsmInfo.h" +#include "llvm/Target/Mangler.h" #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetLowering.h" @@ -43,7 +45,6 @@ #include "llvm/Target/TargetRegisterInfo.h" #include "llvm/ADT/SmallPtrSet.h" #include "llvm/ADT/SmallString.h" -#include "llvm/ADT/StringExtras.h" #include <cerrno> using namespace llvm; @@ -51,6 +52,15 @@ static cl::opt<cl::boolOrDefault> AsmVerbose("asm-verbose", cl::desc("Add comments to directives."), cl::init(cl::BOU_UNSET)); +static bool getVerboseAsm(bool VDef) { + switch (AsmVerbose) { + default: + case cl::BOU_UNSET: return VDef; + case cl::BOU_TRUE: return true; + case cl::BOU_FALSE: return false; + } +} + char AsmPrinter::ID = 0; AsmPrinter::AsmPrinter(formatted_raw_ostream &o, TargetMachine &tm, const MCAsmInfo *T, bool VDef) @@ -59,16 +69,13 @@ AsmPrinter::AsmPrinter(formatted_raw_ostream &o, TargetMachine &tm, OutContext(*new MCContext()), // FIXME: Pass instprinter to streamer. - OutStreamer(*createAsmStreamer(OutContext, O, *T, 0)), + OutStreamer(*createAsmStreamer(OutContext, O, *T, + TM.getTargetData()->isLittleEndian(), + getVerboseAsm(VDef), 0)), - LastMI(0), LastFn(0), Counter(~0U), - PrevDLT(0, 0, ~0U, ~0U) { + LastMI(0), LastFn(0), Counter(~0U), PrevDLT(NULL) { DW = 0; MMI = 0; - switch (AsmVerbose) { - case cl::BOU_UNSET: VerboseAsm = VDef; break; - case cl::BOU_TRUE: VerboseAsm = true; break; - case cl::BOU_FALSE: VerboseAsm = false; break; - } + VerboseAsm = getVerboseAsm(VDef); } AsmPrinter::~AsmPrinter() { @@ -103,22 +110,15 @@ bool AsmPrinter::doInitialization(Module &M) { const_cast<TargetLoweringObjectFile&>(getObjFileLowering()) .Initialize(OutContext, TM); - Mang = new Mangler(M, MAI->getGlobalPrefix(), MAI->getPrivateGlobalPrefix(), - MAI->getLinkerPrivateGlobalPrefix()); - - if (MAI->doesAllowQuotesInName()) - Mang->setUseQuotes(true); - - if (MAI->doesAllowNameToStartWithDigit()) - Mang->setSymbolsCanStartWithDigit(true); + Mang = new Mangler(*MAI); // Allow the target to emit any magic that it wants at the start of the file. EmitStartOfAsmFile(M); if (MAI->hasSingleParameterDotFile()) { - /* Very minimal debug info. It is ignored if we emit actual - debug info. If we don't, this at least helps the user find where - a function came from. */ + // Very minimal debug info. It is ignored if we emit actual + // debug info. If we don't, this at least helps the user find where + // a function came from. O << "\t.file\t\"" << M.getModuleIdentifier() << "\"\n"; } @@ -144,11 +144,148 @@ bool AsmPrinter::doInitialization(Module &M) { return false; } +/// EmitGlobalVariable - Emit the specified global variable to the .s file. +void AsmPrinter::EmitGlobalVariable(const GlobalVariable *GV) { + if (!GV->hasInitializer()) // External globals require no code. + return; + + // Check to see if this is a special global used by LLVM, if so, emit it. + if (EmitSpecialLLVMGlobal(GV)) + return; + + MCSymbol *GVSym = GetGlobalValueSymbol(GV); + printVisibility(GVSym, GV->getVisibility()); + + if (MAI->hasDotTypeDotSizeDirective()) { + O << "\t.type\t" << *GVSym; + if (MAI->getCommentString()[0] != '@') + O << ",@object\n"; + else + O << ",%object\n"; + } + + SectionKind GVKind = TargetLoweringObjectFile::getKindForGlobal(GV, TM); + + const TargetData *TD = TM.getTargetData(); + unsigned Size = TD->getTypeAllocSize(GV->getType()->getElementType()); + unsigned AlignLog = TD->getPreferredAlignmentLog(GV); + + // Handle common and BSS local symbols (.lcomm). + if (GVKind.isCommon() || GVKind.isBSSLocal()) { + if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it. + + if (VerboseAsm) { + WriteAsOperand(OutStreamer.GetCommentOS(), GV, + /*PrintType=*/false, GV->getParent()); + OutStreamer.GetCommentOS() << '\n'; + } + + // Handle common symbols. + if (GVKind.isCommon()) { + // .comm _foo, 42, 4 + OutStreamer.EmitCommonSymbol(GVSym, Size, 1 << AlignLog); + return; + } + + // Handle local BSS symbols. + if (MAI->hasMachoZeroFillDirective()) { + const MCSection *TheSection = + getObjFileLowering().SectionForGlobal(GV, GVKind, Mang, TM); + // .zerofill __DATA, __bss, _foo, 400, 5 + OutStreamer.EmitZerofill(TheSection, GVSym, Size, 1 << AlignLog); + return; + } + + if (MAI->hasLCOMMDirective()) { + // .lcomm _foo, 42 + OutStreamer.EmitLocalCommonSymbol(GVSym, Size); + return; + } + + // .local _foo + OutStreamer.EmitSymbolAttribute(GVSym, MCSA_Local); + // .comm _foo, 42, 4 + OutStreamer.EmitCommonSymbol(GVSym, Size, 1 << AlignLog); + return; + } + + const MCSection *TheSection = + getObjFileLowering().SectionForGlobal(GV, GVKind, Mang, TM); + + // Handle the zerofill directive on darwin, which is a special form of BSS + // emission. + if (GVKind.isBSSExtern() && MAI->hasMachoZeroFillDirective()) { + // .globl _foo + OutStreamer.EmitSymbolAttribute(GVSym, MCSA_Global); + // .zerofill __DATA, __common, _foo, 400, 5 + OutStreamer.EmitZerofill(TheSection, GVSym, Size, 1 << AlignLog); + return; + } + + OutStreamer.SwitchSection(TheSection); + + // TODO: Factor into an 'emit linkage' thing that is shared with function + // bodies. + switch (GV->getLinkage()) { + case GlobalValue::CommonLinkage: + case GlobalValue::LinkOnceAnyLinkage: + case GlobalValue::LinkOnceODRLinkage: + case GlobalValue::WeakAnyLinkage: + case GlobalValue::WeakODRLinkage: + case GlobalValue::LinkerPrivateLinkage: + if (MAI->getWeakDefDirective() != 0) { + // .globl _foo + OutStreamer.EmitSymbolAttribute(GVSym, MCSA_Global); + // .weak_definition _foo + OutStreamer.EmitSymbolAttribute(GVSym, MCSA_WeakDefinition); + } else if (const char *LinkOnce = MAI->getLinkOnceDirective()) { + // .globl _foo + OutStreamer.EmitSymbolAttribute(GVSym, MCSA_Global); + // .linkonce same_size + O << LinkOnce; + } else { + // .weak _foo + OutStreamer.EmitSymbolAttribute(GVSym, MCSA_Weak); + } + break; + case GlobalValue::DLLExportLinkage: + case GlobalValue::AppendingLinkage: + // FIXME: appending linkage variables should go into a section of + // their name or something. For now, just emit them as external. + case GlobalValue::ExternalLinkage: + // If external or appending, declare as a global symbol. + // .globl _foo + OutStreamer.EmitSymbolAttribute(GVSym, MCSA_Global); + break; + case GlobalValue::PrivateLinkage: + case GlobalValue::InternalLinkage: + break; + default: + llvm_unreachable("Unknown linkage type!"); + } + + EmitAlignment(AlignLog, GV); + if (VerboseAsm) { + WriteAsOperand(OutStreamer.GetCommentOS(), GV, + /*PrintType=*/false, GV->getParent()); + OutStreamer.GetCommentOS() << '\n'; + } + OutStreamer.EmitLabel(GVSym); + + EmitGlobalConstant(GV->getInitializer()); + + if (MAI->hasDotTypeDotSizeDirective()) + O << "\t.size\t" << *GVSym << ", " << Size << '\n'; + + OutStreamer.AddBlankLine(); +} + + bool AsmPrinter::doFinalization(Module &M) { // Emit global variables. for (Module::const_global_iterator I = M.global_begin(), E = M.global_end(); I != E; ++I) - PrintGlobalVariable(I); + EmitGlobalVariable(I); // Emit final debug information. if (MAI->doesSupportDebugInformation() || MAI->doesSupportExceptionHandling()) @@ -164,35 +301,37 @@ bool AsmPrinter::doFinalization(Module &M) { // Print out module-level global variables here. for (Module::const_global_iterator I = M.global_begin(), E = M.global_end(); I != E; ++I) { - if (I->hasExternalWeakLinkage()) - O << MAI->getWeakRefDirective() << Mang->getMangledName(I) << '\n'; + if (!I->hasExternalWeakLinkage()) continue; + OutStreamer.EmitSymbolAttribute(GetGlobalValueSymbol(I), + MCSA_WeakReference); } for (Module::const_iterator I = M.begin(), E = M.end(); I != E; ++I) { - if (I->hasExternalWeakLinkage()) - O << MAI->getWeakRefDirective() << Mang->getMangledName(I) << '\n'; + if (!I->hasExternalWeakLinkage()) continue; + OutStreamer.EmitSymbolAttribute(GetGlobalValueSymbol(I), + MCSA_WeakReference); } } if (MAI->getSetDirective()) { - O << '\n'; + OutStreamer.AddBlankLine(); for (Module::const_alias_iterator I = M.alias_begin(), E = M.alias_end(); I != E; ++I) { - std::string Name = Mang->getMangledName(I); + MCSymbol *Name = GetGlobalValueSymbol(I); const GlobalValue *GV = cast<GlobalValue>(I->getAliasedGlobal()); - std::string Target = Mang->getMangledName(GV); + MCSymbol *Target = GetGlobalValueSymbol(GV); if (I->hasExternalLinkage() || !MAI->getWeakRefDirective()) - O << "\t.globl\t" << Name << '\n'; + OutStreamer.EmitSymbolAttribute(Name, MCSA_Global); else if (I->hasWeakLinkage()) - O << MAI->getWeakRefDirective() << Name << '\n'; - else if (!I->hasLocalLinkage()) - llvm_unreachable("Invalid alias linkage"); + OutStreamer.EmitSymbolAttribute(Name, MCSA_WeakReference); + else + assert(I->hasLocalLinkage() && "Invalid alias linkage"); printVisibility(Name, I->getVisibility()); - O << MAI->getSetDirective() << ' ' << Name << ", " << Target << '\n'; + O << MAI->getSetDirective() << ' ' << *Name << ", " << *Target << '\n'; } } @@ -206,9 +345,8 @@ bool AsmPrinter::doFinalization(Module &M) { // to be executable. Some targets have a directive to declare this. Function *InitTrampolineIntrinsic = M.getFunction("llvm.init.trampoline"); if (!InitTrampolineIntrinsic || InitTrampolineIntrinsic->use_empty()) - if (MAI->getNonexecutableStackDirective()) - O << MAI->getNonexecutableStackDirective() << '\n'; - + if (MCSection *S = MAI->getNonexecutableStackSection(OutContext)) + OutStreamer.SwitchSection(S); // Allow the target to emit any magic that it wants at the end of the file, // after everything else has gone out. @@ -222,8 +360,8 @@ bool AsmPrinter::doFinalization(Module &M) { } void AsmPrinter::SetupMachineFunction(MachineFunction &MF) { - // What's my mangled name? - CurrentFnName = Mang->getMangledName(MF.getFunction()); + // Get the function symbol. + CurrentFnSym = GetGlobalValueSymbol(MF.getFunction()); IncrementFunctionNumber(); if (VerboseAsm) @@ -307,19 +445,20 @@ void AsmPrinter::EmitConstantPool(MachineConstantPool *MCP) { // Emit inter-object padding for alignment. unsigned AlignMask = CPE.getAlignment() - 1; unsigned NewOffset = (Offset + AlignMask) & ~AlignMask; - EmitZeros(NewOffset - Offset); + OutStreamer.EmitFill(NewOffset - Offset, 0/*fillval*/, 0/*addrspace*/); const Type *Ty = CPE.getType(); Offset = NewOffset + TM.getTargetData()->getTypeAllocSize(Ty); - O << MAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_' - << CPI << ':'; + // Emit the label with a comment on it. if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() << " constant "; - WriteTypeSymbolic(O, CPE.getType(), MF->getFunction()->getParent()); + OutStreamer.GetCommentOS() << "constant pool "; + WriteTypeSymbolic(OutStreamer.GetCommentOS(), CPE.getType(), + MF->getFunction()->getParent()); + OutStreamer.GetCommentOS() << '\n'; } - O << '\n'; + OutStreamer.EmitLabel(GetCPISymbol(CPI)); + if (CPE.isMachineConstantPoolEntry()) EmitMachineConstantPoolValue(CPE.Val.MachineCPVal); else @@ -381,14 +520,11 @@ void AsmPrinter::EmitJumpTableInfo(MachineJumpTableInfo *MJTI, // before each jump table. The first label is never referenced, but tells // the assembler and linker the extents of the jump table object. The // second label is actually referenced by the code. - if (JTInDiffSection && MAI->getLinkerPrivateGlobalPrefix()[0]) { - O << MAI->getLinkerPrivateGlobalPrefix() - << "JTI" << getFunctionNumber() << '_' << i << ":\n"; - } - - O << MAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber() - << '_' << i << ":\n"; - + if (JTInDiffSection && MAI->getLinkerPrivateGlobalPrefix()[0]) + OutStreamer.EmitLabel(GetJTISymbol(i, true)); + + OutStreamer.EmitLabel(GetJTISymbol(i)); + for (unsigned ii = 0, ee = JTBBs.size(); ii != ee; ++ii) { printPICJumpTableEntry(MJTI, JTBBs[ii], i); O << '\n'; @@ -418,17 +554,16 @@ void AsmPrinter::printPICJumpTableEntry(const MachineJumpTableInfo *MJTI, // If we're emitting non-PIC code, then emit the entries as direct // references to the target basic blocks. if (!isPIC) { - GetMBBSymbol(MBB->getNumber())->print(O, MAI); + O << *GetMBBSymbol(MBB->getNumber()); } else if (MAI->getSetDirective()) { O << MAI->getPrivateGlobalPrefix() << getFunctionNumber() << '_' << uid << "_set_" << MBB->getNumber(); } else { - GetMBBSymbol(MBB->getNumber())->print(O, MAI); + O << *GetMBBSymbol(MBB->getNumber()); // If the arch uses custom Jump Table directives, don't calc relative to - // JT + // JT. if (!HadJTEntryDirective) - O << '-' << MAI->getPrivateGlobalPrefix() << "JTI" - << getFunctionNumber() << '_' << uid; + O << '-' << *GetJTISymbol(uid); } } @@ -438,7 +573,7 @@ void AsmPrinter::printPICJumpTableEntry(const MachineJumpTableInfo *MJTI, /// do nothing and return false. bool AsmPrinter::EmitSpecialLLVMGlobal(const GlobalVariable *GV) { if (GV->getName() == "llvm.used") { - if (MAI->getUsedDirective() != 0) // No need to emit this at all. + if (MAI->hasNoDeadStrip()) // No need to emit this at all. EmitLLVMUsedList(GV->getInitializer()); return true; } @@ -458,6 +593,13 @@ bool AsmPrinter::EmitSpecialLLVMGlobal(const GlobalVariable *GV) { OutStreamer.SwitchSection(getObjFileLowering().getStaticCtorSection()); EmitAlignment(Align, 0); EmitXXStructorList(GV->getInitializer()); + + if (TM.getRelocationModel() == Reloc::Static && + MAI->hasStaticCtorDtorReferenceInStaticMode()) { + StringRef Sym(".constructors_used"); + OutStreamer.EmitSymbolAttribute(OutContext.GetOrCreateSymbol(Sym), + MCSA_Reference); + } return true; } @@ -465,6 +607,13 @@ bool AsmPrinter::EmitSpecialLLVMGlobal(const GlobalVariable *GV) { OutStreamer.SwitchSection(getObjFileLowering().getStaticDtorSection()); EmitAlignment(Align, 0); EmitXXStructorList(GV->getInitializer()); + + if (TM.getRelocationModel() == Reloc::Static && + MAI->hasStaticCtorDtorReferenceInStaticMode()) { + StringRef Sym(".destructors_used"); + OutStreamer.EmitSymbolAttribute(OutContext.GetOrCreateSymbol(Sym), + MCSA_Reference); + } return true; } @@ -475,8 +624,6 @@ bool AsmPrinter::EmitSpecialLLVMGlobal(const GlobalVariable *GV) { /// global in the specified llvm.used list for which emitUsedDirectiveFor /// is true, as being used with this directive. void AsmPrinter::EmitLLVMUsedList(Constant *List) { - const char *Directive = MAI->getUsedDirective(); - // Should be an array of 'i8*'. ConstantArray *InitList = dyn_cast<ConstantArray>(List); if (InitList == 0) return; @@ -484,11 +631,9 @@ void AsmPrinter::EmitLLVMUsedList(Constant *List) { for (unsigned i = 0, e = InitList->getNumOperands(); i != e; ++i) { const GlobalValue *GV = dyn_cast<GlobalValue>(InitList->getOperand(i)->stripPointerCasts()); - if (GV && getObjFileLowering().shouldEmitUsedDirectiveFor(GV, Mang)) { - O << Directive; - EmitConstantValueOnly(InitList->getOperand(i)); - O << '\n'; - } + if (GV && getObjFileLowering().shouldEmitUsedDirectiveFor(GV, Mang)) + OutStreamer.EmitSymbolAttribute(GetGlobalValueSymbol(GV), + MCSA_NoDeadStrip); } } @@ -510,189 +655,35 @@ void AsmPrinter::EmitXXStructorList(Constant *List) { } } - -//===----------------------------------------------------------------------===// -/// LEB 128 number encoding. - -/// PrintULEB128 - Print a series of hexadecimal values (separated by commas) -/// representing an unsigned leb128 value. -void AsmPrinter::PrintULEB128(unsigned Value) const { - char Buffer[20]; - do { - unsigned char Byte = static_cast<unsigned char>(Value & 0x7f); - Value >>= 7; - if (Value) Byte |= 0x80; - O << "0x" << utohex_buffer(Byte, Buffer+20); - if (Value) O << ", "; - } while (Value); -} - -/// PrintSLEB128 - Print a series of hexadecimal values (separated by commas) -/// representing a signed leb128 value. -void AsmPrinter::PrintSLEB128(int Value) const { - int Sign = Value >> (8 * sizeof(Value) - 1); - bool IsMore; - char Buffer[20]; - - do { - unsigned char Byte = static_cast<unsigned char>(Value & 0x7f); - Value >>= 7; - IsMore = Value != Sign || ((Byte ^ Sign) & 0x40) != 0; - if (IsMore) Byte |= 0x80; - O << "0x" << utohex_buffer(Byte, Buffer+20); - if (IsMore) O << ", "; - } while (IsMore); -} - //===--------------------------------------------------------------------===// // Emission and print routines // -/// PrintHex - Print a value as a hexadecimal value. -/// -void AsmPrinter::PrintHex(int Value) const { - char Buffer[20]; - O << "0x" << utohex_buffer(static_cast<unsigned>(Value), Buffer+20); -} - -/// EOL - Print a newline character to asm stream. If a comment is present -/// then it will be printed first. Comments should not contain '\n'. -void AsmPrinter::EOL() const { - O << '\n'; -} - -void AsmPrinter::EOL(const std::string &Comment) const { - if (VerboseAsm && !Comment.empty()) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() - << ' ' - << Comment; - } - O << '\n'; -} - -void AsmPrinter::EOL(const char* Comment) const { - if (VerboseAsm && *Comment) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() - << ' ' - << Comment; - } - O << '\n'; -} - -static const char *DecodeDWARFEncoding(unsigned Encoding) { - switch (Encoding) { - case dwarf::DW_EH_PE_absptr: - return "absptr"; - case dwarf::DW_EH_PE_omit: - return "omit"; - case dwarf::DW_EH_PE_pcrel: - return "pcrel"; - case dwarf::DW_EH_PE_udata4: - return "udata4"; - case dwarf::DW_EH_PE_udata8: - return "udata8"; - case dwarf::DW_EH_PE_sdata4: - return "sdata4"; - case dwarf::DW_EH_PE_sdata8: - return "sdata8"; - case dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_udata4: - return "pcrel udata4"; - case dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata4: - return "pcrel sdata4"; - case dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_udata8: - return "pcrel udata8"; - case dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata8: - return "pcrel sdata8"; - case dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel |dwarf::DW_EH_PE_udata4: - return "indirect pcrel udata4"; - case dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel |dwarf::DW_EH_PE_sdata4: - return "indirect pcrel sdata4"; - case dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel |dwarf::DW_EH_PE_udata8: - return "indirect pcrel udata8"; - case dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel |dwarf::DW_EH_PE_sdata8: - return "indirect pcrel sdata8"; - } - - return 0; -} - -void AsmPrinter::EOL(const char *Comment, unsigned Encoding) const { - if (VerboseAsm && *Comment) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() - << ' ' - << Comment; - - if (const char *EncStr = DecodeDWARFEncoding(Encoding)) - O << " (" << EncStr << ')'; - } - O << '\n'; -} - -/// EmitULEB128Bytes - Emit an assembler byte data directive to compose an -/// unsigned leb128 value. -void AsmPrinter::EmitULEB128Bytes(unsigned Value) const { - if (MAI->hasLEB128()) { - O << "\t.uleb128\t" - << Value; - } else { - O << MAI->getData8bitsDirective(); - PrintULEB128(Value); - } -} - -/// EmitSLEB128Bytes - print an assembler byte data directive to compose a -/// signed leb128 value. -void AsmPrinter::EmitSLEB128Bytes(int Value) const { - if (MAI->hasLEB128()) { - O << "\t.sleb128\t" - << Value; - } else { - O << MAI->getData8bitsDirective(); - PrintSLEB128(Value); - } -} - /// EmitInt8 - Emit a byte directive and value. /// void AsmPrinter::EmitInt8(int Value) const { - O << MAI->getData8bitsDirective(); - PrintHex(Value & 0xFF); + OutStreamer.EmitIntValue(Value, 1, 0/*addrspace*/); } /// EmitInt16 - Emit a short directive and value. /// void AsmPrinter::EmitInt16(int Value) const { - O << MAI->getData16bitsDirective(); - PrintHex(Value & 0xFFFF); + OutStreamer.EmitIntValue(Value, 2, 0/*addrspace*/); } /// EmitInt32 - Emit a long directive and value. /// void AsmPrinter::EmitInt32(int Value) const { - O << MAI->getData32bitsDirective(); - PrintHex(Value); + OutStreamer.EmitIntValue(Value, 4, 0/*addrspace*/); } /// EmitInt64 - Emit a long long directive and value. /// void AsmPrinter::EmitInt64(uint64_t Value) const { - if (MAI->getData64bitsDirective()) { - O << MAI->getData64bitsDirective(); - PrintHex(Value); - } else { - if (TM.getTargetData()->isBigEndian()) { - EmitInt32(unsigned(Value >> 32)); O << '\n'; - EmitInt32(unsigned(Value)); - } else { - EmitInt32(unsigned(Value)); O << '\n'; - EmitInt32(unsigned(Value >> 32)); - } - } + OutStreamer.EmitIntValue(Value, 8, 0/*addrspace*/); } + /// toOctal - Convert the low order bits of X into an octal digit. /// static inline char toOctal(int X) { @@ -725,31 +716,8 @@ static void printStringChar(formatted_raw_ostream &O, unsigned char C) { } } -/// EmitString - Emit a string with quotes and a null terminator. -/// Special characters are emitted properly. -/// \literal (Eg. '\t') \endliteral -void AsmPrinter::EmitString(const StringRef String) const { - EmitString(String.data(), String.size()); -} - -void AsmPrinter::EmitString(const char *String, unsigned Size) const { - const char* AscizDirective = MAI->getAscizDirective(); - if (AscizDirective) - O << AscizDirective; - else - O << MAI->getAsciiDirective(); - O << '\"'; - for (unsigned i = 0; i < Size; ++i) - printStringChar(O, String[i]); - if (AscizDirective) - O << '\"'; - else - O << "\\0\""; -} - - /// EmitFile - Emit a .file directive. -void AsmPrinter::EmitFile(unsigned Number, const std::string &Name) const { +void AsmPrinter::EmitFile(unsigned Number, StringRef Name) const { O << "\t.file\t" << Number << " \""; for (unsigned i = 0, N = Name.size(); i < N; ++i) printStringChar(O, Name[i]); @@ -788,52 +756,26 @@ void AsmPrinter::EmitAlignment(unsigned NumBits, const GlobalValue *GV, OutStreamer.EmitValueToAlignment(1 << NumBits, FillValue, 1, 0); } -/// EmitZeros - Emit a block of zeros. +/// LowerConstant - Lower the specified LLVM Constant to an MCExpr. /// -void AsmPrinter::EmitZeros(uint64_t NumZeros, unsigned AddrSpace) const { - if (NumZeros) { - if (MAI->getZeroDirective()) { - O << MAI->getZeroDirective() << NumZeros; - if (MAI->getZeroDirectiveSuffix()) - O << MAI->getZeroDirectiveSuffix(); - O << '\n'; - } else { - for (; NumZeros; --NumZeros) - O << MAI->getData8bitsDirective(AddrSpace) << "0\n"; - } - } -} - -// Print out the specified constant, without a storage class. Only the -// constants valid in constant expressions can occur here. -void AsmPrinter::EmitConstantValueOnly(const Constant *CV) { - if (CV->isNullValue() || isa<UndefValue>(CV)) { - O << '0'; - return; - } - - if (const ConstantInt *CI = dyn_cast<ConstantInt>(CV)) { - O << CI->getZExtValue(); - return; - } +static const MCExpr *LowerConstant(const Constant *CV, AsmPrinter &AP) { + MCContext &Ctx = AP.OutContext; - if (const GlobalValue *GV = dyn_cast<GlobalValue>(CV)) { - // This is a constant address for a global variable or function. Use the - // name of the variable or function as the address value. - O << Mang->getMangledName(GV); - return; - } + if (CV->isNullValue() || isa<UndefValue>(CV)) + return MCConstantExpr::Create(0, Ctx); + + if (const ConstantInt *CI = dyn_cast<ConstantInt>(CV)) + return MCConstantExpr::Create(CI->getZExtValue(), Ctx); - if (const BlockAddress *BA = dyn_cast<BlockAddress>(CV)) { - GetBlockAddressSymbol(BA)->print(O, MAI); - return; - } + if (const GlobalValue *GV = dyn_cast<GlobalValue>(CV)) + return MCSymbolRefExpr::Create(AP.GetGlobalValueSymbol(GV), Ctx); + if (const BlockAddress *BA = dyn_cast<BlockAddress>(CV)) + return MCSymbolRefExpr::Create(AP.GetBlockAddressSymbol(BA), Ctx); const ConstantExpr *CE = dyn_cast<ConstantExpr>(CV); if (CE == 0) { - llvm_unreachable("Unknown constant value!"); - O << '0'; - return; + llvm_unreachable("Unknown constant value to lower!"); + return MCConstantExpr::Create(0, Ctx); } switch (CE->getOpcode()) { @@ -845,406 +787,214 @@ void AsmPrinter::EmitConstantValueOnly(const Constant *CV) { case Instruction::SIToFP: case Instruction::FPToUI: case Instruction::FPToSI: - default: - llvm_unreachable("FIXME: Don't support this constant cast expr"); + default: llvm_unreachable("FIXME: Don't support this constant cast expr"); case Instruction::GetElementPtr: { - // generate a symbolic expression for the byte address - const TargetData *TD = TM.getTargetData(); - const Constant *ptrVal = CE->getOperand(0); - SmallVector<Value*, 8> idxVec(CE->op_begin()+1, CE->op_end()); - int64_t Offset = TD->getIndexedOffset(ptrVal->getType(), &idxVec[0], - idxVec.size()); + const TargetData &TD = *AP.TM.getTargetData(); + // Generate a symbolic expression for the byte address + const Constant *PtrVal = CE->getOperand(0); + SmallVector<Value*, 8> IdxVec(CE->op_begin()+1, CE->op_end()); + int64_t Offset = TD.getIndexedOffset(PtrVal->getType(), &IdxVec[0], + IdxVec.size()); + + const MCExpr *Base = LowerConstant(CE->getOperand(0), AP); if (Offset == 0) - return EmitConstantValueOnly(ptrVal); + return Base; // Truncate/sext the offset to the pointer size. - if (TD->getPointerSizeInBits() != 64) { - int SExtAmount = 64-TD->getPointerSizeInBits(); + if (TD.getPointerSizeInBits() != 64) { + int SExtAmount = 64-TD.getPointerSizeInBits(); Offset = (Offset << SExtAmount) >> SExtAmount; } - if (Offset) - O << '('; - EmitConstantValueOnly(ptrVal); - if (Offset > 0) - O << ") + " << Offset; - else - O << ") - " << -Offset; - return; + return MCBinaryExpr::CreateAdd(Base, MCConstantExpr::Create(Offset, Ctx), + Ctx); } + + case Instruction::Trunc: + // We emit the value and depend on the assembler to truncate the generated + // expression properly. This is important for differences between + // blockaddress labels. Since the two labels are in the same function, it + // is reasonable to treat their delta as a 32-bit value. + // FALL THROUGH. case Instruction::BitCast: - return EmitConstantValueOnly(CE->getOperand(0)); + return LowerConstant(CE->getOperand(0), AP); case Instruction::IntToPtr: { + const TargetData &TD = *AP.TM.getTargetData(); // Handle casts to pointers by changing them into casts to the appropriate // integer type. This promotes constant folding and simplifies this code. - const TargetData *TD = TM.getTargetData(); Constant *Op = CE->getOperand(0); - Op = ConstantExpr::getIntegerCast(Op, TD->getIntPtrType(CV->getContext()), + Op = ConstantExpr::getIntegerCast(Op, TD.getIntPtrType(CV->getContext()), false/*ZExt*/); - return EmitConstantValueOnly(Op); + return LowerConstant(Op, AP); } case Instruction::PtrToInt: { + const TargetData &TD = *AP.TM.getTargetData(); // Support only foldable casts to/from pointers that can be eliminated by // changing the pointer to the appropriately sized integer type. Constant *Op = CE->getOperand(0); const Type *Ty = CE->getType(); - const TargetData *TD = TM.getTargetData(); + + const MCExpr *OpExpr = LowerConstant(Op, AP); // We can emit the pointer value into this slot if the slot is an - // integer slot greater or equal to the size of the pointer. - if (TD->getTypeAllocSize(Ty) == TD->getTypeAllocSize(Op->getType())) - return EmitConstantValueOnly(Op); - - O << "(("; - EmitConstantValueOnly(Op); - APInt ptrMask = - APInt::getAllOnesValue(TD->getTypeAllocSizeInBits(Op->getType())); - - SmallString<40> S; - ptrMask.toStringUnsigned(S); - O << ") & " << S.str() << ')'; - return; + // integer slot equal to the size of the pointer. + if (TD.getTypeAllocSize(Ty) == TD.getTypeAllocSize(Op->getType())) + return OpExpr; + + // Otherwise the pointer is smaller than the resultant integer, mask off + // the high bits so we are sure to get a proper truncation if the input is + // a constant expr. + unsigned InBits = TD.getTypeAllocSizeInBits(Op->getType()); + const MCExpr *MaskExpr = MCConstantExpr::Create(~0ULL >> (64-InBits), Ctx); + return MCBinaryExpr::CreateAnd(OpExpr, MaskExpr, Ctx); } - case Instruction::Trunc: - // We emit the value and depend on the assembler to truncate the generated - // expression properly. This is important for differences between - // blockaddress labels. Since the two labels are in the same function, it - // is reasonable to treat their delta as a 32-bit value. - return EmitConstantValueOnly(CE->getOperand(0)); - case Instruction::Add: case Instruction::Sub: case Instruction::And: case Instruction::Or: - case Instruction::Xor: - O << '('; - EmitConstantValueOnly(CE->getOperand(0)); - O << ')'; + case Instruction::Xor: { + const MCExpr *LHS = LowerConstant(CE->getOperand(0), AP); + const MCExpr *RHS = LowerConstant(CE->getOperand(1), AP); switch (CE->getOpcode()) { - case Instruction::Add: - O << " + "; - break; - case Instruction::Sub: - O << " - "; - break; - case Instruction::And: - O << " & "; - break; - case Instruction::Or: - O << " | "; - break; - case Instruction::Xor: - O << " ^ "; - break; - default: - break; + default: llvm_unreachable("Unknown binary operator constant cast expr"); + case Instruction::Add: return MCBinaryExpr::CreateAdd(LHS, RHS, Ctx); + case Instruction::Sub: return MCBinaryExpr::CreateSub(LHS, RHS, Ctx); + case Instruction::And: return MCBinaryExpr::CreateAnd(LHS, RHS, Ctx); + case Instruction::Or: return MCBinaryExpr::CreateOr (LHS, RHS, Ctx); + case Instruction::Xor: return MCBinaryExpr::CreateXor(LHS, RHS, Ctx); } - O << '('; - EmitConstantValueOnly(CE->getOperand(1)); - O << ')'; - break; } -} - -/// printAsCString - Print the specified array as a C compatible string, only if -/// the predicate isString is true. -/// -static void printAsCString(formatted_raw_ostream &O, const ConstantArray *CVA, - unsigned LastElt) { - assert(CVA->isString() && "Array is not string compatible!"); - - O << '\"'; - for (unsigned i = 0; i != LastElt; ++i) { - unsigned char C = - (unsigned char)cast<ConstantInt>(CVA->getOperand(i))->getZExtValue(); - printStringChar(O, C); } - O << '\"'; } -/// EmitString - Emit a zero-byte-terminated string constant. -/// -void AsmPrinter::EmitString(const ConstantArray *CVA) const { - unsigned NumElts = CVA->getNumOperands(); - if (MAI->getAscizDirective() && NumElts && - cast<ConstantInt>(CVA->getOperand(NumElts-1))->getZExtValue() == 0) { - O << MAI->getAscizDirective(); - printAsCString(O, CVA, NumElts-1); - } else { - O << MAI->getAsciiDirective(); - printAsCString(O, CVA, NumElts); +static void EmitGlobalConstantArray(const ConstantArray *CA, unsigned AddrSpace, + AsmPrinter &AP) { + if (AddrSpace != 0 || !CA->isString()) { + // Not a string. Print the values in successive locations + for (unsigned i = 0, e = CA->getNumOperands(); i != e; ++i) + AP.EmitGlobalConstant(CA->getOperand(i), AddrSpace); + return; } - O << '\n'; -} + + // Otherwise, it can be emitted as .ascii. + SmallVector<char, 128> TmpVec; + TmpVec.reserve(CA->getNumOperands()); + for (unsigned i = 0, e = CA->getNumOperands(); i != e; ++i) + TmpVec.push_back(cast<ConstantInt>(CA->getOperand(i))->getZExtValue()); -void AsmPrinter::EmitGlobalConstantArray(const ConstantArray *CVA, - unsigned AddrSpace) { - if (CVA->isString()) { - EmitString(CVA); - } else { // Not a string. Print the values in successive locations - for (unsigned i = 0, e = CVA->getNumOperands(); i != e; ++i) - EmitGlobalConstant(CVA->getOperand(i), AddrSpace); - } + AP.OutStreamer.EmitBytes(StringRef(TmpVec.data(), TmpVec.size()), AddrSpace); } -void AsmPrinter::EmitGlobalConstantVector(const ConstantVector *CP) { - const VectorType *PTy = CP->getType(); - - for (unsigned I = 0, E = PTy->getNumElements(); I < E; ++I) - EmitGlobalConstant(CP->getOperand(I)); +static void EmitGlobalConstantVector(const ConstantVector *CV, + unsigned AddrSpace, AsmPrinter &AP) { + for (unsigned i = 0, e = CV->getType()->getNumElements(); i != e; ++i) + AP.EmitGlobalConstant(CV->getOperand(i), AddrSpace); } -void AsmPrinter::EmitGlobalConstantStruct(const ConstantStruct *CVS, - unsigned AddrSpace) { +static void EmitGlobalConstantStruct(const ConstantStruct *CS, + unsigned AddrSpace, AsmPrinter &AP) { // Print the fields in successive locations. Pad to align if needed! - const TargetData *TD = TM.getTargetData(); - unsigned Size = TD->getTypeAllocSize(CVS->getType()); - const StructLayout *cvsLayout = TD->getStructLayout(CVS->getType()); - uint64_t sizeSoFar = 0; - for (unsigned i = 0, e = CVS->getNumOperands(); i != e; ++i) { - const Constant* field = CVS->getOperand(i); + const TargetData *TD = AP.TM.getTargetData(); + unsigned Size = TD->getTypeAllocSize(CS->getType()); + const StructLayout *Layout = TD->getStructLayout(CS->getType()); + uint64_t SizeSoFar = 0; + for (unsigned i = 0, e = CS->getNumOperands(); i != e; ++i) { + const Constant *Field = CS->getOperand(i); // Check if padding is needed and insert one or more 0s. - uint64_t fieldSize = TD->getTypeAllocSize(field->getType()); - uint64_t padSize = ((i == e-1 ? Size : cvsLayout->getElementOffset(i+1)) - - cvsLayout->getElementOffset(i)) - fieldSize; - sizeSoFar += fieldSize + padSize; + uint64_t FieldSize = TD->getTypeAllocSize(Field->getType()); + uint64_t PadSize = ((i == e-1 ? Size : Layout->getElementOffset(i+1)) + - Layout->getElementOffset(i)) - FieldSize; + SizeSoFar += FieldSize + PadSize; // Now print the actual field value. - EmitGlobalConstant(field, AddrSpace); + AP.EmitGlobalConstant(Field, AddrSpace); // Insert padding - this may include padding to increase the size of the // current field up to the ABI size (if the struct is not packed) as well // as padding to ensure that the next field starts at the right offset. - EmitZeros(padSize, AddrSpace); + AP.OutStreamer.EmitZeros(PadSize, AddrSpace); } - assert(sizeSoFar == cvsLayout->getSizeInBytes() && + assert(SizeSoFar == Layout->getSizeInBytes() && "Layout of constant struct may be incorrect!"); } -void AsmPrinter::EmitGlobalConstantFP(const ConstantFP *CFP, - unsigned AddrSpace) { +static void EmitGlobalConstantFP(const ConstantFP *CFP, unsigned AddrSpace, + AsmPrinter &AP) { // FP Constants are printed as integer constants to avoid losing - // precision... - LLVMContext &Context = CFP->getContext(); - const TargetData *TD = TM.getTargetData(); + // precision. if (CFP->getType()->isDoubleTy()) { - double Val = CFP->getValueAPF().convertToDouble(); // for comment only - uint64_t i = CFP->getValueAPF().bitcastToAPInt().getZExtValue(); - if (MAI->getData64bitsDirective(AddrSpace)) { - O << MAI->getData64bitsDirective(AddrSpace) << i; - if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() << " double " << Val; - } - O << '\n'; - } else if (TD->isBigEndian()) { - O << MAI->getData32bitsDirective(AddrSpace) << unsigned(i >> 32); - if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() - << " most significant word of double " << Val; - } - O << '\n'; - O << MAI->getData32bitsDirective(AddrSpace) << unsigned(i); - if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() - << " least significant word of double " << Val; - } - O << '\n'; - } else { - O << MAI->getData32bitsDirective(AddrSpace) << unsigned(i); - if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() - << " least significant word of double " << Val; - } - O << '\n'; - O << MAI->getData32bitsDirective(AddrSpace) << unsigned(i >> 32); - if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() - << " most significant word of double " << Val; - } - O << '\n'; + if (AP.VerboseAsm) { + double Val = CFP->getValueAPF().convertToDouble(); + AP.OutStreamer.GetCommentOS() << "double " << Val << '\n'; } + + uint64_t Val = CFP->getValueAPF().bitcastToAPInt().getZExtValue(); + AP.OutStreamer.EmitIntValue(Val, 8, AddrSpace); return; } if (CFP->getType()->isFloatTy()) { - float Val = CFP->getValueAPF().convertToFloat(); // for comment only - O << MAI->getData32bitsDirective(AddrSpace) - << CFP->getValueAPF().bitcastToAPInt().getZExtValue(); - if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() << " float " << Val; + if (AP.VerboseAsm) { + float Val = CFP->getValueAPF().convertToFloat(); + AP.OutStreamer.GetCommentOS() << "float " << Val << '\n'; } - O << '\n'; + uint64_t Val = CFP->getValueAPF().bitcastToAPInt().getZExtValue(); + AP.OutStreamer.EmitIntValue(Val, 4, AddrSpace); return; } if (CFP->getType()->isX86_FP80Ty()) { // all long double variants are printed as hex // api needed to prevent premature destruction - APInt api = CFP->getValueAPF().bitcastToAPInt(); - const uint64_t *p = api.getRawData(); - // Convert to double so we can print the approximate val as a comment. - APFloat DoubleVal = CFP->getValueAPF(); - bool ignored; - DoubleVal.convert(APFloat::IEEEdouble, APFloat::rmNearestTiesToEven, - &ignored); - if (TD->isBigEndian()) { - O << MAI->getData16bitsDirective(AddrSpace) << uint16_t(p[1]); - if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() - << " most significant halfword of x86_fp80 ~" - << DoubleVal.convertToDouble(); - } - O << '\n'; - O << MAI->getData16bitsDirective(AddrSpace) << uint16_t(p[0] >> 48); - if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() << " next halfword"; - } - O << '\n'; - O << MAI->getData16bitsDirective(AddrSpace) << uint16_t(p[0] >> 32); - if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() << " next halfword"; - } - O << '\n'; - O << MAI->getData16bitsDirective(AddrSpace) << uint16_t(p[0] >> 16); - if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() << " next halfword"; - } - O << '\n'; - O << MAI->getData16bitsDirective(AddrSpace) << uint16_t(p[0]); - if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() - << " least significant halfword"; - } - O << '\n'; - } else { - O << MAI->getData16bitsDirective(AddrSpace) << uint16_t(p[0]); - if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() - << " least significant halfword of x86_fp80 ~" - << DoubleVal.convertToDouble(); - } - O << '\n'; - O << MAI->getData16bitsDirective(AddrSpace) << uint16_t(p[0] >> 16); - if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() - << " next halfword"; - } - O << '\n'; - O << MAI->getData16bitsDirective(AddrSpace) << uint16_t(p[0] >> 32); - if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() - << " next halfword"; - } - O << '\n'; - O << MAI->getData16bitsDirective(AddrSpace) << uint16_t(p[0] >> 48); - if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() - << " next halfword"; - } - O << '\n'; - O << MAI->getData16bitsDirective(AddrSpace) << uint16_t(p[1]); - if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() - << " most significant halfword"; - } - O << '\n'; + APInt API = CFP->getValueAPF().bitcastToAPInt(); + const uint64_t *p = API.getRawData(); + if (AP.VerboseAsm) { + // Convert to double so we can print the approximate val as a comment. + APFloat DoubleVal = CFP->getValueAPF(); + bool ignored; + DoubleVal.convert(APFloat::IEEEdouble, APFloat::rmNearestTiesToEven, + &ignored); + AP.OutStreamer.GetCommentOS() << "x86_fp80 ~= " + << DoubleVal.convertToDouble() << '\n'; } - EmitZeros(TD->getTypeAllocSize(Type::getX86_FP80Ty(Context)) - - TD->getTypeStoreSize(Type::getX86_FP80Ty(Context)), AddrSpace); + + if (AP.TM.getTargetData()->isBigEndian()) { + AP.OutStreamer.EmitIntValue(p[1], 2, AddrSpace); + AP.OutStreamer.EmitIntValue(p[0], 8, AddrSpace); + } else { + AP.OutStreamer.EmitIntValue(p[0], 8, AddrSpace); + AP.OutStreamer.EmitIntValue(p[1], 2, AddrSpace); + } + + // Emit the tail padding for the long double. + const TargetData &TD = *AP.TM.getTargetData(); + AP.OutStreamer.EmitZeros(TD.getTypeAllocSize(CFP->getType()) - + TD.getTypeStoreSize(CFP->getType()), AddrSpace); return; } - if (CFP->getType()->isPPC_FP128Ty()) { - // all long double variants are printed as hex - // api needed to prevent premature destruction - APInt api = CFP->getValueAPF().bitcastToAPInt(); - const uint64_t *p = api.getRawData(); - if (TD->isBigEndian()) { - O << MAI->getData32bitsDirective(AddrSpace) << uint32_t(p[0] >> 32); - if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() - << " most significant word of ppc_fp128"; - } - O << '\n'; - O << MAI->getData32bitsDirective(AddrSpace) << uint32_t(p[0]); - if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() - << " next word"; - } - O << '\n'; - O << MAI->getData32bitsDirective(AddrSpace) << uint32_t(p[1] >> 32); - if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() - << " next word"; - } - O << '\n'; - O << MAI->getData32bitsDirective(AddrSpace) << uint32_t(p[1]); - if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() - << " least significant word"; - } - O << '\n'; - } else { - O << MAI->getData32bitsDirective(AddrSpace) << uint32_t(p[1]); - if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() - << " least significant word of ppc_fp128"; - } - O << '\n'; - O << MAI->getData32bitsDirective(AddrSpace) << uint32_t(p[1] >> 32); - if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() - << " next word"; - } - O << '\n'; - O << MAI->getData32bitsDirective(AddrSpace) << uint32_t(p[0]); - if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() - << " next word"; - } - O << '\n'; - O << MAI->getData32bitsDirective(AddrSpace) << uint32_t(p[0] >> 32); - if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() - << " most significant word"; - } - O << '\n'; - } - return; - } else llvm_unreachable("Floating point constant type not handled"); + assert(CFP->getType()->isPPC_FP128Ty() && + "Floating point constant type not handled"); + // All long double variants are printed as hex api needed to prevent + // premature destruction. + APInt API = CFP->getValueAPF().bitcastToAPInt(); + const uint64_t *p = API.getRawData(); + if (AP.TM.getTargetData()->isBigEndian()) { + AP.OutStreamer.EmitIntValue(p[0], 8, AddrSpace); + AP.OutStreamer.EmitIntValue(p[1], 8, AddrSpace); + } else { + AP.OutStreamer.EmitIntValue(p[1], 8, AddrSpace); + AP.OutStreamer.EmitIntValue(p[0], 8, AddrSpace); + } } -void AsmPrinter::EmitGlobalConstantLargeInt(const ConstantInt *CI, - unsigned AddrSpace) { - const TargetData *TD = TM.getTargetData(); +static void EmitGlobalConstantLargeInt(const ConstantInt *CI, + unsigned AddrSpace, AsmPrinter &AP) { + const TargetData *TD = AP.TM.getTargetData(); unsigned BitWidth = CI->getBitWidth(); assert((BitWidth & 63) == 0 && "only support multiples of 64-bits"); @@ -1253,100 +1003,58 @@ void AsmPrinter::EmitGlobalConstantLargeInt(const ConstantInt *CI, // quantities at a time. const uint64_t *RawData = CI->getValue().getRawData(); for (unsigned i = 0, e = BitWidth / 64; i != e; ++i) { - uint64_t Val; - if (TD->isBigEndian()) - Val = RawData[e - i - 1]; - else - Val = RawData[i]; - - if (MAI->getData64bitsDirective(AddrSpace)) { - O << MAI->getData64bitsDirective(AddrSpace) << Val << '\n'; - continue; - } - - // Emit two 32-bit chunks, order depends on endianness. - unsigned FirstChunk = unsigned(Val), SecondChunk = unsigned(Val >> 32); - const char *FirstName = " least", *SecondName = " most"; - if (TD->isBigEndian()) { - std::swap(FirstChunk, SecondChunk); - std::swap(FirstName, SecondName); - } - - O << MAI->getData32bitsDirective(AddrSpace) << FirstChunk; - if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() - << FirstName << " significant half of i64 " << Val; - } - O << '\n'; - - O << MAI->getData32bitsDirective(AddrSpace) << SecondChunk; - if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() - << SecondName << " significant half of i64 " << Val; - } - O << '\n'; + uint64_t Val = TD->isBigEndian() ? RawData[e - i - 1] : RawData[i]; + AP.OutStreamer.EmitIntValue(Val, 8, AddrSpace); } } /// EmitGlobalConstant - Print a general LLVM constant to the .s file. void AsmPrinter::EmitGlobalConstant(const Constant *CV, unsigned AddrSpace) { - const TargetData *TD = TM.getTargetData(); - const Type *type = CV->getType(); - unsigned Size = TD->getTypeAllocSize(type); - - if (CV->isNullValue() || isa<UndefValue>(CV)) { - EmitZeros(Size, AddrSpace); - return; - } - - if (const ConstantArray *CVA = dyn_cast<ConstantArray>(CV)) { - EmitGlobalConstantArray(CVA , AddrSpace); - return; - } - - if (const ConstantStruct *CVS = dyn_cast<ConstantStruct>(CV)) { - EmitGlobalConstantStruct(CVS, AddrSpace); - return; + if (isa<ConstantAggregateZero>(CV) || isa<UndefValue>(CV)) { + uint64_t Size = TM.getTargetData()->getTypeAllocSize(CV->getType()); + return OutStreamer.EmitZeros(Size, AddrSpace); } - if (const ConstantFP *CFP = dyn_cast<ConstantFP>(CV)) { - EmitGlobalConstantFP(CFP, AddrSpace); - return; - } - if (const ConstantInt *CI = dyn_cast<ConstantInt>(CV)) { - // If we can directly emit an 8-byte constant, do it. - if (Size == 8) - if (const char *Data64Dir = MAI->getData64bitsDirective(AddrSpace)) { - O << Data64Dir << CI->getZExtValue() << '\n'; - return; - } - - // Small integers are handled below; large integers are handled here. - if (Size > 4) { - EmitGlobalConstantLargeInt(CI, AddrSpace); + unsigned Size = TM.getTargetData()->getTypeAllocSize(CV->getType()); + switch (Size) { + case 1: + case 2: + case 4: + case 8: + if (VerboseAsm) + OutStreamer.GetCommentOS() << format("0x%llx\n", CI->getZExtValue()); + OutStreamer.EmitIntValue(CI->getZExtValue(), Size, AddrSpace); + return; + default: + EmitGlobalConstantLargeInt(CI, AddrSpace, *this); return; } } - if (const ConstantVector *CP = dyn_cast<ConstantVector>(CV)) { - EmitGlobalConstantVector(CP); - return; - } + if (const ConstantArray *CVA = dyn_cast<ConstantArray>(CV)) + return EmitGlobalConstantArray(CVA, AddrSpace, *this); + + if (const ConstantStruct *CVS = dyn_cast<ConstantStruct>(CV)) + return EmitGlobalConstantStruct(CVS, AddrSpace, *this); - printDataDirective(type, AddrSpace); - EmitConstantValueOnly(CV); - if (VerboseAsm) { - if (const ConstantInt *CI = dyn_cast<ConstantInt>(CV)) { - SmallString<40> S; - CI->getValue().toStringUnsigned(S, 16); - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() << " 0x" << S.str(); - } + if (const ConstantFP *CFP = dyn_cast<ConstantFP>(CV)) + return EmitGlobalConstantFP(CFP, AddrSpace, *this); + + if (const ConstantVector *V = dyn_cast<ConstantVector>(CV)) + return EmitGlobalConstantVector(V, AddrSpace, *this); + + if (isa<ConstantPointerNull>(CV)) { + unsigned Size = TM.getTargetData()->getTypeAllocSize(CV->getType()); + OutStreamer.EmitIntValue(0, Size, AddrSpace); + return; } - O << '\n'; + + // Otherwise, it must be a ConstantExpr. Lower it to an MCExpr, then emit it + // thread the streamer with EmitValue. + OutStreamer.EmitValue(LowerConstant(CV, *this), + TM.getTargetData()->getTypeAllocSize(CV->getType()), + AddrSpace); } void AsmPrinter::EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) { @@ -1397,22 +1105,21 @@ void AsmPrinter::processDebugLoc(const MachineInstr *MI, DebugLoc DL = MI->getDebugLoc(); if (DL.isUnknown()) return; - DebugLocTuple CurDLT = MF->getDebugLocTuple(DL); - if (CurDLT.Scope == 0) + DILocation CurDLT = MF->getDILocation(DL); + if (CurDLT.getScope().isNull()) return; - if (BeforePrintingInsn) { - if (CurDLT != PrevDLT) { - unsigned L = DW->RecordSourceLine(CurDLT.Line, CurDLT.Col, - CurDLT.Scope); - printLabel(L); - O << '\n'; - DW->BeginScope(MI, L); - PrevDLT = CurDLT; - } - } else { + if (!BeforePrintingInsn) { // After printing instruction DW->EndScope(MI); + } else if (CurDLT.getNode() != PrevDLT) { + unsigned L = DW->RecordSourceLine(CurDLT.getLineNumber(), + CurDLT.getColumnNumber(), + CurDLT.getScope().getNode()); + printLabel(L); + O << '\n'; + DW->BeginScope(MI, L); + PrevDLT = CurDLT.getNode(); } } @@ -1587,9 +1294,8 @@ void AsmPrinter::printInlineAsm(const MachineInstr *MI) const { unsigned OpFlags = MI->getOperand(OpNo).getImm(); ++OpNo; // Skip over the ID number. - if (Modifier[0]=='l') // labels are target independent - GetMBBSymbol(MI->getOperand(OpNo).getMBB() - ->getNumber())->print(O, MAI); + if (Modifier[0] == 'l') // labels are target independent + O << *GetMBBSymbol(MI->getOperand(OpNo).getMBB()->getNumber()); else { AsmPrinter *AP = const_cast<AsmPrinter*>(this); if ((OpFlags & 7) == 4) { @@ -1604,8 +1310,7 @@ void AsmPrinter::printInlineAsm(const MachineInstr *MI) const { if (Error) { std::string msg; raw_string_ostream Msg(msg); - Msg << "Invalid operand found in inline asm: '" - << AsmStr << "'\n"; + Msg << "Invalid operand found in inline asm: '" << AsmStr << "'\n"; MI->print(Msg); llvm_report_error(Msg.str()); } @@ -1694,10 +1399,121 @@ MCSymbol *AsmPrinter::GetMBBSymbol(unsigned MBBID) const { SmallString<60> Name; raw_svector_ostream(Name) << MAI->getPrivateGlobalPrefix() << "BB" << getFunctionNumber() << '_' << MBBID; - return OutContext.GetOrCreateSymbol(Name.str()); } +/// GetCPISymbol - Return the symbol for the specified constant pool entry. +MCSymbol *AsmPrinter::GetCPISymbol(unsigned CPID) const { + SmallString<60> Name; + raw_svector_ostream(Name) << MAI->getPrivateGlobalPrefix() << "CPI" + << getFunctionNumber() << '_' << CPID; + return OutContext.GetOrCreateSymbol(Name.str()); +} + +/// GetJTISymbol - Return the symbol for the specified jump table entry. +MCSymbol *AsmPrinter::GetJTISymbol(unsigned JTID, bool isLinkerPrivate) const { + const char *Prefix = isLinkerPrivate ? MAI->getLinkerPrivateGlobalPrefix() : + MAI->getPrivateGlobalPrefix(); + SmallString<60> Name; + raw_svector_ostream(Name) << Prefix << "JTI" << getFunctionNumber() << '_' + << JTID; + return OutContext.GetOrCreateSymbol(Name.str()); +} + +/// GetGlobalValueSymbol - Return the MCSymbol for the specified global +/// value. +MCSymbol *AsmPrinter::GetGlobalValueSymbol(const GlobalValue *GV) const { + SmallString<60> NameStr; + Mang->getNameWithPrefix(NameStr, GV, false); + return OutContext.GetOrCreateSymbol(NameStr.str()); +} + +/// GetSymbolWithGlobalValueBase - Return the MCSymbol for a symbol with +/// global value name as its base, with the specified suffix, and where the +/// symbol is forced to have private linkage if ForcePrivate is true. +MCSymbol *AsmPrinter::GetSymbolWithGlobalValueBase(const GlobalValue *GV, + StringRef Suffix, + bool ForcePrivate) const { + SmallString<60> NameStr; + Mang->getNameWithPrefix(NameStr, GV, ForcePrivate); + NameStr.append(Suffix.begin(), Suffix.end()); + return OutContext.GetOrCreateSymbol(NameStr.str()); +} + +/// GetExternalSymbolSymbol - Return the MCSymbol for the specified +/// ExternalSymbol. +MCSymbol *AsmPrinter::GetExternalSymbolSymbol(StringRef Sym) const { + SmallString<60> NameStr; + Mang->getNameWithPrefix(NameStr, Sym); + return OutContext.GetOrCreateSymbol(NameStr.str()); +} + + + +/// PrintParentLoopComment - Print comments about parent loops of this one. +static void PrintParentLoopComment(raw_ostream &OS, const MachineLoop *Loop, + unsigned FunctionNumber) { + if (Loop == 0) return; + PrintParentLoopComment(OS, Loop->getParentLoop(), FunctionNumber); + OS.indent(Loop->getLoopDepth()*2) + << "Parent Loop BB" << FunctionNumber << "_" + << Loop->getHeader()->getNumber() + << " Depth=" << Loop->getLoopDepth() << '\n'; +} + + +/// PrintChildLoopComment - Print comments about child loops within +/// the loop for this basic block, with nesting. +static void PrintChildLoopComment(raw_ostream &OS, const MachineLoop *Loop, + unsigned FunctionNumber) { + // Add child loop information + for (MachineLoop::iterator CL = Loop->begin(), E = Loop->end();CL != E; ++CL){ + OS.indent((*CL)->getLoopDepth()*2) + << "Child Loop BB" << FunctionNumber << "_" + << (*CL)->getHeader()->getNumber() << " Depth " << (*CL)->getLoopDepth() + << '\n'; + PrintChildLoopComment(OS, *CL, FunctionNumber); + } +} + +/// EmitComments - Pretty-print comments for basic blocks. +static void PrintBasicBlockLoopComments(const MachineBasicBlock &MBB, + const MachineLoopInfo *LI, + const AsmPrinter &AP) { + // Add loop depth information + const MachineLoop *Loop = LI->getLoopFor(&MBB); + if (Loop == 0) return; + + MachineBasicBlock *Header = Loop->getHeader(); + assert(Header && "No header for loop"); + + // If this block is not a loop header, just print out what is the loop header + // and return. + if (Header != &MBB) { + AP.OutStreamer.AddComment(" in Loop: Header=BB" + + Twine(AP.getFunctionNumber())+"_" + + Twine(Loop->getHeader()->getNumber())+ + " Depth="+Twine(Loop->getLoopDepth())); + return; + } + + // Otherwise, it is a loop header. Print out information about child and + // parent loops. + raw_ostream &OS = AP.OutStreamer.GetCommentOS(); + + PrintParentLoopComment(OS, Loop->getParentLoop(), AP.getFunctionNumber()); + + OS << "=>"; + OS.indent(Loop->getLoopDepth()*2-2); + + OS << "This "; + if (Loop->empty()) + OS << "Inner "; + OS << "Loop Header: Depth=" + Twine(Loop->getLoopDepth()) << '\n'; + + PrintChildLoopComment(OS, Loop, AP.getFunctionNumber()); +} + /// EmitBasicBlockStart - This method prints the label for the specified /// MachineBasicBlock, an alignment (if present) and a comment describing @@ -1713,38 +1529,33 @@ void AsmPrinter::EmitBasicBlockStart(const MachineBasicBlock *MBB) const { // forward references to labels without knowing what their numbers // will be. if (MBB->hasAddressTaken()) { - GetBlockAddressSymbol(MBB->getBasicBlock()->getParent(), - MBB->getBasicBlock())->print(O, MAI); - O << ':'; - if (VerboseAsm) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() << " Address Taken"; - } - O << '\n'; + const BasicBlock *BB = MBB->getBasicBlock(); + if (VerboseAsm) + OutStreamer.AddComment("Address Taken"); + OutStreamer.EmitLabel(GetBlockAddressSymbol(BB->getParent(), BB)); } // Print the main label for the block. if (MBB->pred_empty() || MBB->isOnlyReachableByFallthrough()) { - if (VerboseAsm) + if (VerboseAsm) { + // NOTE: Want this comment at start of line. O << MAI->getCommentString() << " BB#" << MBB->getNumber() << ':'; + if (const BasicBlock *BB = MBB->getBasicBlock()) + if (BB->hasName()) + OutStreamer.AddComment("%" + BB->getName()); + + PrintBasicBlockLoopComments(*MBB, LI, *this); + OutStreamer.AddBlankLine(); + } } else { - GetMBBSymbol(MBB->getNumber())->print(O, MAI); - O << ':'; - if (!VerboseAsm) - O << '\n'; - } - - // Print some comments to accompany the label. - if (VerboseAsm) { - if (const BasicBlock *BB = MBB->getBasicBlock()) - if (BB->hasName()) { - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() << ' '; - WriteAsOperand(O, BB, /*PrintType=*/false); - } + if (VerboseAsm) { + if (const BasicBlock *BB = MBB->getBasicBlock()) + if (BB->hasName()) + OutStreamer.AddComment("%" + BB->getName()); + PrintBasicBlockLoopComments(*MBB, LI, *this); + } - EmitComments(*MBB); - O << '\n'; + OutStreamer.EmitLabel(GetMBBSymbol(MBB->getNumber())); } } @@ -1756,10 +1567,9 @@ void AsmPrinter::printPICJumpTableSetLabel(unsigned uid, return; O << MAI->getSetDirective() << ' ' << MAI->getPrivateGlobalPrefix() - << getFunctionNumber() << '_' << uid << "_set_" << MBB->getNumber() << ','; - GetMBBSymbol(MBB->getNumber())->print(O, MAI); - O << '-' << MAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber() - << '_' << uid << '\n'; + << getFunctionNumber() << '_' << uid << "_set_" << MBB->getNumber() << ',' + << *GetMBBSymbol(MBB->getNumber()) + << '-' << *GetJTISymbol(uid) << '\n'; } void AsmPrinter::printPICJumpTableSetLabel(unsigned uid, unsigned uid2, @@ -1769,64 +1579,27 @@ void AsmPrinter::printPICJumpTableSetLabel(unsigned uid, unsigned uid2, O << MAI->getSetDirective() << ' ' << MAI->getPrivateGlobalPrefix() << getFunctionNumber() << '_' << uid << '_' << uid2 - << "_set_" << MBB->getNumber() << ','; - GetMBBSymbol(MBB->getNumber())->print(O, MAI); - O << '-' << MAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber() + << "_set_" << MBB->getNumber() << ',' + << *GetMBBSymbol(MBB->getNumber()) + << '-' << MAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber() << '_' << uid << '_' << uid2 << '\n'; } -/// printDataDirective - This method prints the asm directive for the -/// specified type. -void AsmPrinter::printDataDirective(const Type *type, unsigned AddrSpace) { - const TargetData *TD = TM.getTargetData(); - switch (type->getTypeID()) { - case Type::FloatTyID: case Type::DoubleTyID: - case Type::X86_FP80TyID: case Type::FP128TyID: case Type::PPC_FP128TyID: - assert(0 && "Should have already output floating point constant."); - default: - assert(0 && "Can't handle printing this type of thing"); - case Type::IntegerTyID: { - unsigned BitWidth = cast<IntegerType>(type)->getBitWidth(); - if (BitWidth <= 8) - O << MAI->getData8bitsDirective(AddrSpace); - else if (BitWidth <= 16) - O << MAI->getData16bitsDirective(AddrSpace); - else if (BitWidth <= 32) - O << MAI->getData32bitsDirective(AddrSpace); - else if (BitWidth <= 64) { - assert(MAI->getData64bitsDirective(AddrSpace) && - "Target cannot handle 64-bit constant exprs!"); - O << MAI->getData64bitsDirective(AddrSpace); - } else { - llvm_unreachable("Target cannot handle given data directive width!"); - } +void AsmPrinter::printVisibility(MCSymbol *Sym, unsigned Visibility) const { + MCSymbolAttr Attr = MCSA_Invalid; + + switch (Visibility) { + default: break; + case GlobalValue::HiddenVisibility: + Attr = MAI->getHiddenVisibilityAttr(); break; - } - case Type::PointerTyID: - if (TD->getPointerSize() == 8) { - assert(MAI->getData64bitsDirective(AddrSpace) && - "Target cannot handle 64-bit pointer exprs!"); - O << MAI->getData64bitsDirective(AddrSpace); - } else if (TD->getPointerSize() == 2) { - O << MAI->getData16bitsDirective(AddrSpace); - } else if (TD->getPointerSize() == 1) { - O << MAI->getData8bitsDirective(AddrSpace); - } else { - O << MAI->getData32bitsDirective(AddrSpace); - } + case GlobalValue::ProtectedVisibility: + Attr = MAI->getProtectedVisibilityAttr(); break; } -} -void AsmPrinter::printVisibility(const std::string& Name, - unsigned Visibility) const { - if (Visibility == GlobalValue::HiddenVisibility) { - if (const char *Directive = MAI->getHiddenDirective()) - O << Directive << Name << '\n'; - } else if (Visibility == GlobalValue::ProtectedVisibility) { - if (const char *Directive = MAI->getProtectedDirective()) - O << Directive << Name << '\n'; - } + if (Attr != MCSA_Invalid) + OutStreamer.EmitSymbolAttribute(Sym, Attr); } void AsmPrinter::printOffset(int64_t Offset) const { @@ -1856,8 +1629,8 @@ GCMetadataPrinter *AsmPrinter::GetOrCreateGCPrinter(GCStrategy *S) { return GMP; } - errs() << "no GCMetadataPrinter registered for GC: " << Name << "\n"; - llvm_unreachable(0); + llvm_report_error("no GCMetadataPrinter registered for GC: " + Twine(Name)); + return 0; } /// EmitComments - Pretty-print comments for instructions @@ -1868,20 +1641,20 @@ void AsmPrinter::EmitComments(const MachineInstr &MI) const { bool Newline = false; if (!MI.getDebugLoc().isUnknown()) { - DebugLocTuple DLT = MF->getDebugLocTuple(MI.getDebugLoc()); + DILocation DLT = MF->getDILocation(MI.getDebugLoc()); // Print source line info. O.PadToColumn(MAI->getCommentColumn()); O << MAI->getCommentString() << ' '; - DIScope Scope(DLT.Scope); + DIScope Scope = DLT.getScope(); // Omit the directory, because it's likely to be long and uninteresting. if (!Scope.isNull()) O << Scope.getFilename(); else O << "<unknown>"; - O << ':' << DLT.Line; - if (DLT.Col != 0) - O << ':' << DLT.Col; + O << ':' << DLT.getLineNumber(); + if (DLT.getColumnNumber() != 0) + O << ':' << DLT.getColumnNumber(); Newline = true; } @@ -1943,80 +1716,3 @@ void AsmPrinter::EmitComments(const MachineInstr &MI) const { } } -/// PrintChildLoopComment - Print comments about child loops within -/// the loop for this basic block, with nesting. -/// -static void PrintChildLoopComment(formatted_raw_ostream &O, - const MachineLoop *loop, - const MCAsmInfo *MAI, - int FunctionNumber) { - // Add child loop information - for(MachineLoop::iterator cl = loop->begin(), - clend = loop->end(); - cl != clend; - ++cl) { - MachineBasicBlock *Header = (*cl)->getHeader(); - assert(Header && "No header for loop"); - - O << '\n'; - O.PadToColumn(MAI->getCommentColumn()); - - O << MAI->getCommentString(); - O.indent(((*cl)->getLoopDepth()-1)*2) - << " Child Loop BB" << FunctionNumber << "_" - << Header->getNumber() << " Depth " << (*cl)->getLoopDepth(); - - PrintChildLoopComment(O, *cl, MAI, FunctionNumber); - } -} - -/// EmitComments - Pretty-print comments for basic blocks -void AsmPrinter::EmitComments(const MachineBasicBlock &MBB) const { - if (VerboseAsm) { - // Add loop depth information - const MachineLoop *loop = LI->getLoopFor(&MBB); - - if (loop) { - // Print a newline after bb# annotation. - O << "\n"; - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() << " Loop Depth " << loop->getLoopDepth() - << '\n'; - - O.PadToColumn(MAI->getCommentColumn()); - - MachineBasicBlock *Header = loop->getHeader(); - assert(Header && "No header for loop"); - - if (Header == &MBB) { - O << MAI->getCommentString() << " Loop Header"; - PrintChildLoopComment(O, loop, MAI, getFunctionNumber()); - } - else { - O << MAI->getCommentString() << " Loop Header is BB" - << getFunctionNumber() << "_" << loop->getHeader()->getNumber(); - } - - if (loop->empty()) { - O << '\n'; - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString() << " Inner Loop"; - } - - // Add parent loop information - for (const MachineLoop *CurLoop = loop->getParentLoop(); - CurLoop; - CurLoop = CurLoop->getParentLoop()) { - MachineBasicBlock *Header = CurLoop->getHeader(); - assert(Header && "No header for loop"); - - O << '\n'; - O.PadToColumn(MAI->getCommentColumn()); - O << MAI->getCommentString(); - O.indent((CurLoop->getLoopDepth()-1)*2) - << " Inside Loop BB" << getFunctionNumber() << "_" - << Header->getNumber() << " Depth " << CurLoop->getLoopDepth(); - } - } - } -} diff --git a/lib/CodeGen/AsmPrinter/DIE.cpp b/lib/CodeGen/AsmPrinter/DIE.cpp index b85e11a..349e0ac 100644 --- a/lib/CodeGen/AsmPrinter/DIE.cpp +++ b/lib/CodeGen/AsmPrinter/DIE.cpp @@ -13,12 +13,16 @@ #include "DIE.h" #include "DwarfPrinter.h" +#include "llvm/ADT/Twine.h" #include "llvm/CodeGen/AsmPrinter.h" #include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCStreamer.h" +#include "llvm/MC/MCSymbol.h" #include "llvm/Target/TargetData.h" #include "llvm/Support/Debug.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/Format.h" +#include "llvm/Support/FormattedStream.h" using namespace llvm; //===----------------------------------------------------------------------===// @@ -49,31 +53,33 @@ void DIEAbbrev::Profile(FoldingSetNodeID &ID) const { /// Emit - Print the abbreviation using the specified asm printer. /// -void DIEAbbrev::Emit(const AsmPrinter *Asm) const { +void DIEAbbrev::Emit(const DwarfPrinter *DP) const { // Emit its Dwarf tag type. - Asm->EmitULEB128Bytes(Tag); - Asm->EOL(dwarf::TagString(Tag)); + // FIXME: Doing work even in non-asm-verbose runs. + DP->EmitULEB128(Tag, dwarf::TagString(Tag)); // Emit whether it has children DIEs. - Asm->EmitULEB128Bytes(ChildrenFlag); - Asm->EOL(dwarf::ChildrenString(ChildrenFlag)); + // FIXME: Doing work even in non-asm-verbose runs. + DP->EmitULEB128(ChildrenFlag, dwarf::ChildrenString(ChildrenFlag)); // For each attribute description. for (unsigned i = 0, N = Data.size(); i < N; ++i) { const DIEAbbrevData &AttrData = Data[i]; // Emit attribute type. - Asm->EmitULEB128Bytes(AttrData.getAttribute()); - Asm->EOL(dwarf::AttributeString(AttrData.getAttribute())); + // FIXME: Doing work even in non-asm-verbose runs. + DP->EmitULEB128(AttrData.getAttribute(), + dwarf::AttributeString(AttrData.getAttribute())); // Emit form type. - Asm->EmitULEB128Bytes(AttrData.getForm()); - Asm->EOL(dwarf::FormEncodingString(AttrData.getForm())); + // FIXME: Doing work even in non-asm-verbose runs. + DP->EmitULEB128(AttrData.getForm(), + dwarf::FormEncodingString(AttrData.getForm())); } // Mark end of abbreviation. - Asm->EmitULEB128Bytes(0); Asm->EOL("EOM(1)"); - Asm->EmitULEB128Bytes(0); Asm->EOL("EOM(2)"); + DP->EmitULEB128(0, "EOM(1)"); + DP->EmitULEB128(0, "EOM(2)"); } #ifndef NDEBUG @@ -182,22 +188,24 @@ void DIEValue::dump() { /// EmitValue - Emit integer of appropriate size. /// -void DIEInteger::EmitValue(Dwarf *D, unsigned Form) const { +void DIEInteger::EmitValue(DwarfPrinter *D, unsigned Form) const { const AsmPrinter *Asm = D->getAsm(); + unsigned Size = ~0U; switch (Form) { case dwarf::DW_FORM_flag: // Fall thru case dwarf::DW_FORM_ref1: // Fall thru - case dwarf::DW_FORM_data1: Asm->EmitInt8(Integer); break; + case dwarf::DW_FORM_data1: Size = 1; break; case dwarf::DW_FORM_ref2: // Fall thru - case dwarf::DW_FORM_data2: Asm->EmitInt16(Integer); break; + case dwarf::DW_FORM_data2: Size = 2; break; case dwarf::DW_FORM_ref4: // Fall thru - case dwarf::DW_FORM_data4: Asm->EmitInt32(Integer); break; + case dwarf::DW_FORM_data4: Size = 4; break; case dwarf::DW_FORM_ref8: // Fall thru - case dwarf::DW_FORM_data8: Asm->EmitInt64(Integer); break; - case dwarf::DW_FORM_udata: Asm->EmitULEB128Bytes(Integer); break; - case dwarf::DW_FORM_sdata: Asm->EmitSLEB128Bytes(Integer); break; + case dwarf::DW_FORM_data8: Size = 8; break; + case dwarf::DW_FORM_udata: D->EmitULEB128(Integer); return; + case dwarf::DW_FORM_sdata: D->EmitSLEB128(Integer, ""); return; default: llvm_unreachable("DIE Value form not supported yet"); } + Asm->OutStreamer.EmitIntValue(Integer, Size, 0/*addrspace*/); } /// SizeOf - Determine size of integer value in bytes. @@ -233,8 +241,10 @@ void DIEInteger::print(raw_ostream &O) { /// EmitValue - Emit string value. /// -void DIEString::EmitValue(Dwarf *D, unsigned Form) const { - D->getAsm()->EmitString(Str); +void DIEString::EmitValue(DwarfPrinter *D, unsigned Form) const { + D->getAsm()->OutStreamer.EmitBytes(Str, /*addrspace*/0); + // Emit nul terminator. + D->getAsm()->OutStreamer.EmitIntValue(0, 1, /*addrspace*/0); } #ifndef NDEBUG @@ -249,7 +259,7 @@ void DIEString::print(raw_ostream &O) { /// EmitValue - Emit label value. /// -void DIEDwarfLabel::EmitValue(Dwarf *D, unsigned Form) const { +void DIEDwarfLabel::EmitValue(DwarfPrinter *D, unsigned Form) const { bool IsSmall = Form == dwarf::DW_FORM_data4; D->EmitReference(Label, false, IsSmall); } @@ -274,9 +284,9 @@ void DIEDwarfLabel::print(raw_ostream &O) { /// EmitValue - Emit label value. /// -void DIEObjectLabel::EmitValue(Dwarf *D, unsigned Form) const { +void DIEObjectLabel::EmitValue(DwarfPrinter *D, unsigned Form) const { bool IsSmall = Form == dwarf::DW_FORM_data4; - D->EmitReference(Label, false, IsSmall); + D->EmitReference(Sym, false, IsSmall); } /// SizeOf - Determine size of label value in bytes. @@ -288,7 +298,7 @@ unsigned DIEObjectLabel::SizeOf(const TargetData *TD, unsigned Form) const { #ifndef NDEBUG void DIEObjectLabel::print(raw_ostream &O) { - O << "Obj: " << Label; + O << "Obj: " << Sym->getName(); } #endif @@ -298,7 +308,7 @@ void DIEObjectLabel::print(raw_ostream &O) { /// EmitValue - Emit delta value. /// -void DIESectionOffset::EmitValue(Dwarf *D, unsigned Form) const { +void DIESectionOffset::EmitValue(DwarfPrinter *D, unsigned Form) const { bool IsSmall = Form == dwarf::DW_FORM_data4; D->EmitSectionOffset(Label.getTag(), Section.getTag(), Label.getNumber(), Section.getNumber(), @@ -328,7 +338,7 @@ void DIESectionOffset::print(raw_ostream &O) { /// EmitValue - Emit delta value. /// -void DIEDelta::EmitValue(Dwarf *D, unsigned Form) const { +void DIEDelta::EmitValue(DwarfPrinter *D, unsigned Form) const { bool IsSmall = Form == dwarf::DW_FORM_data4; D->EmitDifference(LabelHi, LabelLo, IsSmall); } @@ -355,7 +365,7 @@ void DIEDelta::print(raw_ostream &O) { /// EmitValue - Emit debug information entry offset. /// -void DIEEntry::EmitValue(Dwarf *D, unsigned Form) const { +void DIEEntry::EmitValue(DwarfPrinter *D, unsigned Form) const { D->getAsm()->EmitInt32(Entry->getOffset()); } @@ -383,19 +393,19 @@ unsigned DIEBlock::ComputeSize(const TargetData *TD) { /// EmitValue - Emit block data. /// -void DIEBlock::EmitValue(Dwarf *D, unsigned Form) const { +void DIEBlock::EmitValue(DwarfPrinter *D, unsigned Form) const { const AsmPrinter *Asm = D->getAsm(); switch (Form) { case dwarf::DW_FORM_block1: Asm->EmitInt8(Size); break; case dwarf::DW_FORM_block2: Asm->EmitInt16(Size); break; case dwarf::DW_FORM_block4: Asm->EmitInt32(Size); break; - case dwarf::DW_FORM_block: Asm->EmitULEB128Bytes(Size); break; + case dwarf::DW_FORM_block: D->EmitULEB128(Size); break; default: llvm_unreachable("Improper form for block"); break; } const SmallVector<DIEAbbrevData, 8> &AbbrevData = Abbrev.getData(); for (unsigned i = 0, N = Values.size(); i < N; ++i) { - Asm->EOL(); + Asm->O << '\n'; Values[i]->EmitValue(D, AbbrevData[i].getForm()); } } diff --git a/lib/CodeGen/AsmPrinter/DIE.h b/lib/CodeGen/AsmPrinter/DIE.h index a6dc9b6..af90289 100644 --- a/lib/CodeGen/AsmPrinter/DIE.h +++ b/lib/CodeGen/AsmPrinter/DIE.h @@ -23,8 +23,9 @@ namespace llvm { class AsmPrinter; - class Dwarf; + class DwarfPrinter; class TargetData; + class MCSymbol; //===--------------------------------------------------------------------===// /// DIEAbbrevData - Dwarf abbreviation data, describes the one attribute of a @@ -100,7 +101,7 @@ namespace llvm { /// Emit - Print the abbreviation using the specified asm printer. /// - void Emit(const AsmPrinter *Asm) const; + void Emit(const DwarfPrinter *DP) const; #ifndef NDEBUG void print(raw_ostream &O); @@ -221,7 +222,7 @@ namespace llvm { /// EmitValue - Emit value via the Dwarf writer. /// - virtual void EmitValue(Dwarf *D, unsigned Form) const = 0; + virtual void EmitValue(DwarfPrinter *D, unsigned Form) const = 0; /// SizeOf - Return the size of a value in bytes. /// @@ -261,7 +262,7 @@ namespace llvm { /// EmitValue - Emit integer of appropriate size. /// - virtual void EmitValue(Dwarf *D, unsigned Form) const; + virtual void EmitValue(DwarfPrinter *D, unsigned Form) const; /// SizeOf - Determine size of integer value in bytes. /// @@ -287,7 +288,7 @@ namespace llvm { /// EmitValue - Emit string value. /// - virtual void EmitValue(Dwarf *D, unsigned Form) const; + virtual void EmitValue(DwarfPrinter *D, unsigned Form) const; /// SizeOf - Determine size of string value in bytes. /// @@ -314,7 +315,7 @@ namespace llvm { /// EmitValue - Emit label value. /// - virtual void EmitValue(Dwarf *D, unsigned Form) const; + virtual void EmitValue(DwarfPrinter *D, unsigned Form) const; /// SizeOf - Determine size of label value in bytes. /// @@ -333,14 +334,14 @@ namespace llvm { /// DIEObjectLabel - A label to an object in code or data. // class DIEObjectLabel : public DIEValue { - const std::string Label; + const MCSymbol *Sym; public: - explicit DIEObjectLabel(const std::string &L) - : DIEValue(isAsIsLabel), Label(L) {} + explicit DIEObjectLabel(const MCSymbol *S) + : DIEValue(isAsIsLabel), Sym(S) {} /// EmitValue - Emit label value. /// - virtual void EmitValue(Dwarf *D, unsigned Form) const; + virtual void EmitValue(DwarfPrinter *D, unsigned Form) const; /// SizeOf - Determine size of label value in bytes. /// @@ -373,7 +374,7 @@ namespace llvm { /// EmitValue - Emit section offset. /// - virtual void EmitValue(Dwarf *D, unsigned Form) const; + virtual void EmitValue(DwarfPrinter *D, unsigned Form) const; /// SizeOf - Determine size of section offset value in bytes. /// @@ -402,7 +403,7 @@ namespace llvm { /// EmitValue - Emit delta value. /// - virtual void EmitValue(Dwarf *D, unsigned Form) const; + virtual void EmitValue(DwarfPrinter *D, unsigned Form) const; /// SizeOf - Determine size of delta value in bytes. /// @@ -431,7 +432,7 @@ namespace llvm { /// EmitValue - Emit debug information entry offset. /// - virtual void EmitValue(Dwarf *D, unsigned Form) const; + virtual void EmitValue(DwarfPrinter *D, unsigned Form) const; /// SizeOf - Determine size of debug information entry in bytes. /// @@ -473,7 +474,7 @@ namespace llvm { /// EmitValue - Emit block data. /// - virtual void EmitValue(Dwarf *D, unsigned Form) const; + virtual void EmitValue(DwarfPrinter *D, unsigned Form) const; /// SizeOf - Determine size of block data in bytes. /// diff --git a/lib/CodeGen/AsmPrinter/DwarfDebug.cpp b/lib/CodeGen/AsmPrinter/DwarfDebug.cpp index 15f37ae..513987f 100644 --- a/lib/CodeGen/AsmPrinter/DwarfDebug.cpp +++ b/lib/CodeGen/AsmPrinter/DwarfDebug.cpp @@ -18,6 +18,7 @@ #include "llvm/MC/MCSection.h" #include "llvm/MC/MCStreamer.h" #include "llvm/MC/MCAsmInfo.h" +#include "llvm/Target/Mangler.h" #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetFrameInfo.h" #include "llvm/Target/TargetLoweringObjectFile.h" @@ -25,7 +26,7 @@ #include "llvm/ADT/StringExtras.h" #include "llvm/Support/Debug.h" #include "llvm/Support/ErrorHandling.h" -#include "llvm/Support/Mangler.h" +#include "llvm/Support/FormattedStream.h" #include "llvm/Support/Timer.h" #include "llvm/System/Path.h" using namespace llvm; @@ -56,12 +57,12 @@ class CompileUnit { /// GVToDieMap - Tracks the mapping of unit level debug informaton /// variables to debug information entries. /// FIXME : Rename GVToDieMap -> NodeToDieMap - ValueMap<MDNode *, DIE *> GVToDieMap; + DenseMap<MDNode *, DIE *> GVToDieMap; /// GVToDIEEntryMap - Tracks the mapping of unit level debug informaton /// descriptors to debug information entries using a DIEEntry proxy. /// FIXME : Rename - ValueMap<MDNode *, DIEEntry *> GVToDIEEntryMap; + DenseMap<MDNode *, DIEEntry *> GVToDIEEntryMap; /// Globals - A map of globally visible named entities for this unit. /// @@ -108,7 +109,7 @@ public: /// getDIEEntry - Returns the debug information entry for the speciefied /// debug variable. DIEEntry *getDIEEntry(MDNode *N) { - ValueMap<MDNode *, DIEEntry *>::iterator I = GVToDIEEntryMap.find(N); + DenseMap<MDNode *, DIEEntry *>::iterator I = GVToDIEEntryMap.find(N); if (I == GVToDIEEntryMap.end()) return NULL; return I->second; @@ -165,7 +166,7 @@ public: class DbgScope { DbgScope *Parent; // Parent to this scope. DIDescriptor Desc; // Debug info descriptor for scope. - WeakVH InlinedAtLocation; // Location at which scope is inlined. + MDNode * InlinedAtLocation; // Location at which scope is inlined. bool AbstractScope; // Abstract Scope unsigned StartLabelID; // Label ID of the beginning of scope. unsigned EndLabelID; // Label ID of the end of scope. @@ -274,7 +275,7 @@ DbgScope::~DbgScope() { } // end llvm namespace DwarfDebug::DwarfDebug(raw_ostream &OS, AsmPrinter *A, const MCAsmInfo *T) - : Dwarf(OS, A, T, "dbg"), ModuleCU(0), + : DwarfPrinter(OS, A, T, "dbg"), ModuleCU(0), AbbreviationsSet(InitAbbreviationsSetSize), Abbreviations(), DIEValues(), StringPool(), SectionSourceLines(), didInitial(false), shouldEmit(false), @@ -343,7 +344,7 @@ void DwarfDebug::addSInt(DIE *Die, unsigned Attribute, /// addString - Add a string attribute data and value. DIEString only /// keeps string reference. void DwarfDebug::addString(DIE *Die, unsigned Attribute, unsigned Form, - const StringRef String) { + StringRef String) { DIEValue *Value = new DIEString(String); DIEValues.push_back(Value); Die->addValue(Attribute, Form, Value); @@ -361,8 +362,8 @@ void DwarfDebug::addLabel(DIE *Die, unsigned Attribute, unsigned Form, /// addObjectLabel - Add an non-Dwarf label attribute data and value. /// void DwarfDebug::addObjectLabel(DIE *Die, unsigned Attribute, unsigned Form, - const std::string &Label) { - DIEValue *Value = new DIEObjectLabel(Label); + const MCSymbol *Sym) { + DIEValue *Value = new DIEObjectLabel(Sym); DIEValues.push_back(Value); Die->addValue(Attribute, Form, Value); } @@ -1162,7 +1163,8 @@ DIE *DwarfDebug::createSubprogramDIE(const DISubprogram &SP, bool MakeDecl) { addUInt(Block, 0, dwarf::DW_FORM_data1, dwarf::DW_OP_constu); addUInt(Block, 0, dwarf::DW_FORM_data1, SP.getVirtualIndex()); addBlock(SPDie, dwarf::DW_AT_vtable_elem_location, 0, Block); - ContainingTypeMap.insert(std::make_pair(SPDie, WeakVH(SP.getContainingType().getNode()))); + ContainingTypeMap.insert(std::make_pair(SPDie, + SP.getContainingType().getNode())); } if (MakeDecl || !SP.isDefinition()) { @@ -1379,7 +1381,7 @@ DIE *DwarfDebug::constructInlinedScopeDIE(DbgScope *Scope) { InlinedSubprogramDIEs.insert(OriginDIE); // Track the start label for this inlined function. - ValueMap<MDNode *, SmallVector<InlineInfoLabels, 4> >::iterator + DenseMap<MDNode *, SmallVector<InlineInfoLabels, 4> >::iterator I = InlineInfo.find(InlinedSP.getNode()); if (I == InlineInfo.end()) { @@ -1665,14 +1667,14 @@ void DwarfDebug::constructGlobalVariableDIE(MDNode *N) { DIEBlock *Block = new DIEBlock(); addUInt(Block, 0, dwarf::DW_FORM_data1, dwarf::DW_OP_addr); addObjectLabel(Block, 0, dwarf::DW_FORM_udata, - Asm->Mang->getMangledName(DI_GV.getGlobal())); + Asm->GetGlobalValueSymbol(DI_GV.getGlobal())); addBlock(VariableSpecDIE, dwarf::DW_AT_location, 0, Block); ModuleCU->addDie(VariableSpecDIE); } else { DIEBlock *Block = new DIEBlock(); addUInt(Block, 0, dwarf::DW_FORM_data1, dwarf::DW_OP_addr); addObjectLabel(Block, 0, dwarf::DW_FORM_udata, - Asm->Mang->getMangledName(DI_GV.getGlobal())); + Asm->GetGlobalValueSymbol(DI_GV.getGlobal())); addBlock(VariableDie, dwarf::DW_AT_location, 0, Block); } addToContextOwner(VariableDie, GVContext); @@ -1770,13 +1772,15 @@ void DwarfDebug::beginModule(Module *M, MachineModuleInfo *mmi) { for (unsigned i = 1, e = getNumSourceIds()+1; i != e; ++i) { // Remember source id starts at 1. std::pair<unsigned, unsigned> Id = getSourceDirectoryAndFileIds(i); + // FIXME: don't use sys::path for this! This should not depend on the + // host. sys::Path FullPath(getSourceDirectoryName(Id.first)); bool AppendOk = FullPath.appendComponent(getSourceFileName(Id.second)); assert(AppendOk && "Could not append filename to directory!"); AppendOk = false; Asm->EmitFile(i, FullPath.str()); - Asm->EOL(); + Asm->O << '\n'; } } @@ -1808,7 +1812,7 @@ void DwarfDebug::endModule() { TE = TopLevelDIEsVector.end(); TI != TE; ++TI) ModuleCU->getCUDie()->addChild(*TI); - for (DenseMap<DIE *, WeakVH>::iterator CI = ContainingTypeMap.begin(), + for (DenseMap<DIE *, MDNode *>::iterator CI = ContainingTypeMap.begin(), CE = ContainingTypeMap.end(); CI != CE; ++CI) { DIE *SPDie = CI->first; MDNode *N = dyn_cast_or_null<MDNode>(CI->second); @@ -1906,8 +1910,7 @@ void DwarfDebug::collectVariableInfo() { MachineModuleInfo::VariableDbgInfoMapTy &VMap = MMI->getVariableDbgInfo(); for (MachineModuleInfo::VariableDbgInfoMapTy::iterator VI = VMap.begin(), VE = VMap.end(); VI != VE; ++VI) { - MetadataBase *MB = VI->first; - MDNode *Var = dyn_cast_or_null<MDNode>(MB); + MDNode *Var = VI->first; if (!Var) continue; DIVariable DV (Var); std::pair< unsigned, MDNode *> VP = VI->second; @@ -2000,13 +2003,14 @@ bool DwarfDebug::extractScopeInformation(MachineFunction *MF) { MIIndexMap[MInsn] = MIIndex++; DebugLoc DL = MInsn->getDebugLoc(); if (DL.isUnknown()) continue; - DebugLocTuple DLT = MF->getDebugLocTuple(DL); - if (!DLT.Scope) continue; + DILocation DLT = MF->getDILocation(DL); + DIScope DLTScope = DLT.getScope(); + if (DLTScope.isNull()) continue; // There is no need to create another DIE for compile unit. For all // other scopes, create one DbgScope now. This will be translated // into a scope DIE at the end. - if (DIDescriptor(DLT.Scope).isCompileUnit()) continue; - createDbgScope(DLT.Scope, DLT.InlinedAtLoc); + if (DLTScope.isCompileUnit()) continue; + createDbgScope(DLTScope.getNode(), DLT.getOrigLocation().getNode()); } } @@ -2019,13 +2023,15 @@ bool DwarfDebug::extractScopeInformation(MachineFunction *MF) { const MachineInstr *MInsn = II; DebugLoc DL = MInsn->getDebugLoc(); if (DL.isUnknown()) continue; - DebugLocTuple DLT = MF->getDebugLocTuple(DL); - if (!DLT.Scope) continue; + DILocation DLT = MF->getDILocation(DL); + DIScope DLTScope = DLT.getScope(); + if (DLTScope.isNull()) continue; // There is no need to create another DIE for compile unit. For all // other scopes, create one DbgScope now. This will be translated // into a scope DIE at the end. - if (DIDescriptor(DLT.Scope).isCompileUnit()) continue; - DbgScope *Scope = getUpdatedDbgScope(DLT.Scope, MInsn, DLT.InlinedAtLoc); + if (DLTScope.isCompileUnit()) continue; + DbgScope *Scope = getUpdatedDbgScope(DLTScope.getNode(), MInsn, + DLT.getOrigLocation().getNode()); Scope->setLastInsn(MInsn); } } @@ -2038,10 +2044,18 @@ bool DwarfDebug::extractScopeInformation(MachineFunction *MF) { // Each scope has first instruction and last instruction to mark beginning // and end of a scope respectively. Create an inverse map that list scopes // starts (and ends) with an instruction. One instruction may start (or end) - // multiple scopes. - for (ValueMap<MDNode *, DbgScope *>::iterator DI = DbgScopeMap.begin(), - DE = DbgScopeMap.end(); DI != DE; ++DI) { - DbgScope *S = DI->second; + // multiple scopes. Ignore scopes that are not reachable. + SmallVector<DbgScope *, 4> WorkList; + WorkList.push_back(CurrentFnDbgScope); + while (!WorkList.empty()) { + DbgScope *S = WorkList.back(); WorkList.pop_back(); + + SmallVector<DbgScope *, 4> &Children = S->getScopes(); + if (!Children.empty()) + for (SmallVector<DbgScope *, 4>::iterator SI = Children.begin(), + SE = Children.end(); SI != SE; ++SI) + WorkList.push_back(*SI); + if (S->isAbstractScope()) continue; const MachineInstr *MI = S->getFirstInsn(); @@ -2090,13 +2104,16 @@ void DwarfDebug::beginFunction(MachineFunction *MF) { // function. DebugLoc FDL = MF->getDefaultDebugLoc(); if (!FDL.isUnknown()) { - DebugLocTuple DLT = MF->getDebugLocTuple(FDL); + DILocation DLT = MF->getDILocation(FDL); unsigned LabelID = 0; - DISubprogram SP = getDISubprogram(DLT.Scope); + DISubprogram SP = getDISubprogram(DLT.getScope().getNode()); if (!SP.isNull()) - LabelID = recordSourceLine(SP.getLineNumber(), 0, DLT.Scope); + LabelID = recordSourceLine(SP.getLineNumber(), 0, + DLT.getScope().getNode()); else - LabelID = recordSourceLine(DLT.Line, DLT.Col, DLT.Scope); + LabelID = recordSourceLine(DLT.getLineNumber(), + DLT.getColumnNumber(), + DLT.getScope().getNode()); Asm->printLabel(LabelID); O << '\n'; } @@ -2142,14 +2159,12 @@ void DwarfDebug::endFunction(MachineFunction *MF) { } // Clear debug info - if (CurrentFnDbgScope) { - CurrentFnDbgScope = NULL; - DbgScopeMap.clear(); - DbgScopeBeginMap.clear(); - DbgScopeEndMap.clear(); - ConcreteScopes.clear(); - AbstractScopesList.clear(); - } + CurrentFnDbgScope = NULL; + DbgScopeMap.clear(); + DbgScopeBeginMap.clear(); + DbgScopeEndMap.clear(); + ConcreteScopes.clear(); + AbstractScopesList.clear(); Lines.clear(); if (TimePassesIsEnabled) @@ -2332,19 +2347,15 @@ void DwarfDebug::emitDIE(DIE *Die) { unsigned AbbrevNumber = Die->getAbbrevNumber(); const DIEAbbrev *Abbrev = Abbreviations[AbbrevNumber - 1]; - Asm->EOL(); + Asm->O << '\n'; // Emit the code (index) for the abbreviation. - Asm->EmitULEB128Bytes(AbbrevNumber); - - if (Asm->isVerbose()) - Asm->EOL(std::string("Abbrev [" + - utostr(AbbrevNumber) + - "] 0x" + utohexstr(Die->getOffset()) + - ":0x" + utohexstr(Die->getSize()) + " " + - dwarf::TagString(Abbrev->getTag()))); - else - Asm->EOL(); + if (Asm->VerboseAsm) + Asm->OutStreamer.AddComment("Abbrev [" + Twine(AbbrevNumber) + "] 0x" + + Twine::utohexstr(Die->getOffset()) + ":0x" + + Twine::utohexstr(Die->getSize()) + " " + + dwarf::TagString(Abbrev->getTag())); + EmitULEB128(AbbrevNumber); SmallVector<DIEValue*, 32> &Values = Die->getValues(); const SmallVector<DIEAbbrevData, 8> &AbbrevData = Abbrev->getData(); @@ -2372,7 +2383,7 @@ void DwarfDebug::emitDIE(DIE *Die) { break; } - Asm->EOL(dwarf::AttributeString(Attr)); + EOL(dwarf::AttributeString(Attr)); } // Emit the DIE children if any. @@ -2382,7 +2393,7 @@ void DwarfDebug::emitDIE(DIE *Die) { for (unsigned j = 0, M = Children.size(); j < M; ++j) emitDIE(Children[j]); - Asm->EmitInt8(0); Asm->EOL("End Of Children Mark"); + Asm->EmitInt8(0); EOL("End Of Children Mark"); } } @@ -2404,21 +2415,20 @@ void DwarfDebug::emitDebugInfo() { sizeof(int8_t) + // Pointer Size (in bytes) sizeof(int32_t); // FIXME - extra pad for gdb bug. - Asm->EmitInt32(ContentSize); Asm->EOL("Length of Compilation Unit Info"); - Asm->EmitInt16(dwarf::DWARF_VERSION); Asm->EOL("DWARF version number"); + Asm->EmitInt32(ContentSize); EOL("Length of Compilation Unit Info"); + Asm->EmitInt16(dwarf::DWARF_VERSION); EOL("DWARF version number"); EmitSectionOffset("abbrev_begin", "section_abbrev", 0, 0, true, false); - Asm->EOL("Offset Into Abbrev. Section"); - Asm->EmitInt8(TD->getPointerSize()); Asm->EOL("Address Size (in bytes)"); + EOL("Offset Into Abbrev. Section"); + Asm->EmitInt8(TD->getPointerSize()); EOL("Address Size (in bytes)"); emitDIE(Die); // FIXME - extra padding for gdb bug. - Asm->EmitInt8(0); Asm->EOL("Extra Pad For GDB"); - Asm->EmitInt8(0); Asm->EOL("Extra Pad For GDB"); - Asm->EmitInt8(0); Asm->EOL("Extra Pad For GDB"); - Asm->EmitInt8(0); Asm->EOL("Extra Pad For GDB"); + Asm->EmitInt8(0); EOL("Extra Pad For GDB"); + Asm->EmitInt8(0); EOL("Extra Pad For GDB"); + Asm->EmitInt8(0); EOL("Extra Pad For GDB"); + Asm->EmitInt8(0); EOL("Extra Pad For GDB"); EmitLabel("info_end", ModuleCU->getID()); - - Asm->EOL(); + Asm->O << '\n'; } /// emitAbbreviations - Emit the abbreviation section. @@ -2438,20 +2448,18 @@ void DwarfDebug::emitAbbreviations() const { const DIEAbbrev *Abbrev = Abbreviations[i]; // Emit the abbrevations code (base 1 index.) - Asm->EmitULEB128Bytes(Abbrev->getNumber()); - Asm->EOL("Abbreviation Code"); + EmitULEB128(Abbrev->getNumber(), "Abbreviation Code"); // Emit the abbreviations data. - Abbrev->Emit(Asm); - - Asm->EOL(); + Abbrev->Emit(this); + Asm->O << '\n'; } // Mark end of abbreviations. - Asm->EmitULEB128Bytes(0); Asm->EOL("EOM(3)"); + EmitULEB128(0, "EOM(3)"); EmitLabel("abbrev_end", 0); - Asm->EOL(); + Asm->O << '\n'; } } @@ -2460,15 +2468,15 @@ void DwarfDebug::emitAbbreviations() const { /// void DwarfDebug::emitEndOfLineMatrix(unsigned SectionEnd) { // Define last address of section. - Asm->EmitInt8(0); Asm->EOL("Extended Op"); - Asm->EmitInt8(TD->getPointerSize() + 1); Asm->EOL("Op size"); - Asm->EmitInt8(dwarf::DW_LNE_set_address); Asm->EOL("DW_LNE_set_address"); - EmitReference("section_end", SectionEnd); Asm->EOL("Section end label"); + Asm->EmitInt8(0); EOL("Extended Op"); + Asm->EmitInt8(TD->getPointerSize() + 1); EOL("Op size"); + Asm->EmitInt8(dwarf::DW_LNE_set_address); EOL("DW_LNE_set_address"); + EmitReference("section_end", SectionEnd); EOL("Section end label"); // Mark end of matrix. - Asm->EmitInt8(0); Asm->EOL("DW_LNE_end_sequence"); - Asm->EmitULEB128Bytes(1); Asm->EOL(); - Asm->EmitInt8(1); Asm->EOL(); + Asm->EmitInt8(0); EOL("DW_LNE_end_sequence"); + Asm->EmitInt8(1); + Asm->EmitInt8(1); } /// emitDebugLines - Emit source line information. @@ -2490,59 +2498,55 @@ void DwarfDebug::emitDebugLines() { // Construct the section header. EmitDifference("line_end", 0, "line_begin", 0, true); - Asm->EOL("Length of Source Line Info"); + EOL("Length of Source Line Info"); EmitLabel("line_begin", 0); - Asm->EmitInt16(dwarf::DWARF_VERSION); Asm->EOL("DWARF version number"); + Asm->EmitInt16(dwarf::DWARF_VERSION); EOL("DWARF version number"); EmitDifference("line_prolog_end", 0, "line_prolog_begin", 0, true); - Asm->EOL("Prolog Length"); + EOL("Prolog Length"); EmitLabel("line_prolog_begin", 0); - Asm->EmitInt8(1); Asm->EOL("Minimum Instruction Length"); - - Asm->EmitInt8(1); Asm->EOL("Default is_stmt_start flag"); - - Asm->EmitInt8(MinLineDelta); Asm->EOL("Line Base Value (Special Opcodes)"); - - Asm->EmitInt8(MaxLineDelta); Asm->EOL("Line Range Value (Special Opcodes)"); - - Asm->EmitInt8(-MinLineDelta); Asm->EOL("Special Opcode Base"); + Asm->EmitInt8(1); EOL("Minimum Instruction Length"); + Asm->EmitInt8(1); EOL("Default is_stmt_start flag"); + Asm->EmitInt8(MinLineDelta); EOL("Line Base Value (Special Opcodes)"); + Asm->EmitInt8(MaxLineDelta); EOL("Line Range Value (Special Opcodes)"); + Asm->EmitInt8(-MinLineDelta); EOL("Special Opcode Base"); // Line number standard opcode encodings argument count - Asm->EmitInt8(0); Asm->EOL("DW_LNS_copy arg count"); - Asm->EmitInt8(1); Asm->EOL("DW_LNS_advance_pc arg count"); - Asm->EmitInt8(1); Asm->EOL("DW_LNS_advance_line arg count"); - Asm->EmitInt8(1); Asm->EOL("DW_LNS_set_file arg count"); - Asm->EmitInt8(1); Asm->EOL("DW_LNS_set_column arg count"); - Asm->EmitInt8(0); Asm->EOL("DW_LNS_negate_stmt arg count"); - Asm->EmitInt8(0); Asm->EOL("DW_LNS_set_basic_block arg count"); - Asm->EmitInt8(0); Asm->EOL("DW_LNS_const_add_pc arg count"); - Asm->EmitInt8(1); Asm->EOL("DW_LNS_fixed_advance_pc arg count"); + Asm->EmitInt8(0); EOL("DW_LNS_copy arg count"); + Asm->EmitInt8(1); EOL("DW_LNS_advance_pc arg count"); + Asm->EmitInt8(1); EOL("DW_LNS_advance_line arg count"); + Asm->EmitInt8(1); EOL("DW_LNS_set_file arg count"); + Asm->EmitInt8(1); EOL("DW_LNS_set_column arg count"); + Asm->EmitInt8(0); EOL("DW_LNS_negate_stmt arg count"); + Asm->EmitInt8(0); EOL("DW_LNS_set_basic_block arg count"); + Asm->EmitInt8(0); EOL("DW_LNS_const_add_pc arg count"); + Asm->EmitInt8(1); EOL("DW_LNS_fixed_advance_pc arg count"); // Emit directories. for (unsigned DI = 1, DE = getNumSourceDirectories()+1; DI != DE; ++DI) { - Asm->EmitString(getSourceDirectoryName(DI)); - Asm->EOL("Directory"); + const std::string &Dir = getSourceDirectoryName(DI); + if (Asm->VerboseAsm) Asm->OutStreamer.AddComment("Directory"); + Asm->OutStreamer.EmitBytes(StringRef(Dir.c_str(), Dir.size()+1), 0); } - Asm->EmitInt8(0); Asm->EOL("End of directories"); + Asm->EmitInt8(0); EOL("End of directories"); // Emit files. for (unsigned SI = 1, SE = getNumSourceIds()+1; SI != SE; ++SI) { // Remember source id starts at 1. std::pair<unsigned, unsigned> Id = getSourceDirectoryAndFileIds(SI); - Asm->EmitString(getSourceFileName(Id.second)); - Asm->EOL("Source"); - Asm->EmitULEB128Bytes(Id.first); - Asm->EOL("Directory #"); - Asm->EmitULEB128Bytes(0); - Asm->EOL("Mod date"); - Asm->EmitULEB128Bytes(0); - Asm->EOL("File size"); + const std::string &FN = getSourceFileName(Id.second); + if (Asm->VerboseAsm) Asm->OutStreamer.AddComment("Source"); + Asm->OutStreamer.EmitBytes(StringRef(FN.c_str(), FN.size()+1), 0); + + EmitULEB128(Id.first, "Directory #"); + EmitULEB128(0, "Mod date"); + EmitULEB128(0, "File size"); } - Asm->EmitInt8(0); Asm->EOL("End of files"); + Asm->EmitInt8(0); EOL("End of files"); EmitLabel("line_prolog_end", 0); @@ -2558,7 +2562,7 @@ void DwarfDebug::emitDebugLines() { O << '\t' << MAI->getCommentString() << " Section" << S->getName() << '\n'; }*/ - Asm->EOL(); + Asm->O << '\n'; // Dwarf assumes we start with first line of first source file. unsigned Source = 1; @@ -2573,7 +2577,7 @@ void DwarfDebug::emitDebugLines() { if (LineInfo.getLine() == 0) continue; if (!Asm->isVerbose()) - Asm->EOL(); + Asm->O << '\n'; else { std::pair<unsigned, unsigned> SourceID = getSourceDirectoryAndFileIds(LineInfo.getSourceID()); @@ -2584,16 +2588,16 @@ void DwarfDebug::emitDebugLines() { } // Define the line address. - Asm->EmitInt8(0); Asm->EOL("Extended Op"); - Asm->EmitInt8(TD->getPointerSize() + 1); Asm->EOL("Op size"); - Asm->EmitInt8(dwarf::DW_LNE_set_address); Asm->EOL("DW_LNE_set_address"); - EmitReference("label", LabelID); Asm->EOL("Location label"); + Asm->EmitInt8(0); EOL("Extended Op"); + Asm->EmitInt8(TD->getPointerSize() + 1); EOL("Op size"); + Asm->EmitInt8(dwarf::DW_LNE_set_address); EOL("DW_LNE_set_address"); + EmitReference("label", LabelID); EOL("Location label"); // If change of source, then switch to the new source. if (Source != LineInfo.getSourceID()) { Source = LineInfo.getSourceID(); - Asm->EmitInt8(dwarf::DW_LNS_set_file); Asm->EOL("DW_LNS_set_file"); - Asm->EmitULEB128Bytes(Source); Asm->EOL("New Source"); + Asm->EmitInt8(dwarf::DW_LNS_set_file); EOL("DW_LNS_set_file"); + EmitULEB128(Source, "New Source"); } // If change of line. @@ -2608,17 +2612,17 @@ void DwarfDebug::emitDebugLines() { // If delta is small enough and in range... if (Delta >= 0 && Delta < (MaxLineDelta - 1)) { // ... then use fast opcode. - Asm->EmitInt8(Delta - MinLineDelta); Asm->EOL("Line Delta"); + Asm->EmitInt8(Delta - MinLineDelta); EOL("Line Delta"); } else { // ... otherwise use long hand. Asm->EmitInt8(dwarf::DW_LNS_advance_line); - Asm->EOL("DW_LNS_advance_line"); - Asm->EmitSLEB128Bytes(Offset); Asm->EOL("Line Offset"); - Asm->EmitInt8(dwarf::DW_LNS_copy); Asm->EOL("DW_LNS_copy"); + EOL("DW_LNS_advance_line"); + EmitSLEB128(Offset, "Line Offset"); + Asm->EmitInt8(dwarf::DW_LNS_copy); EOL("DW_LNS_copy"); } } else { // Copy the previous row (different address or source) - Asm->EmitInt8(dwarf::DW_LNS_copy); Asm->EOL("DW_LNS_copy"); + Asm->EmitInt8(dwarf::DW_LNS_copy); EOL("DW_LNS_copy"); } } @@ -2632,7 +2636,7 @@ void DwarfDebug::emitDebugLines() { emitEndOfLineMatrix(1); EmitLabel("line_end", 0); - Asm->EOL(); + Asm->O << '\n'; } /// emitCommonDebugFrame - Emit common frame info into a debug frame section. @@ -2653,21 +2657,19 @@ void DwarfDebug::emitCommonDebugFrame() { EmitLabel("debug_frame_common", 0); EmitDifference("debug_frame_common_end", 0, "debug_frame_common_begin", 0, true); - Asm->EOL("Length of Common Information Entry"); + EOL("Length of Common Information Entry"); EmitLabel("debug_frame_common_begin", 0); Asm->EmitInt32((int)dwarf::DW_CIE_ID); - Asm->EOL("CIE Identifier Tag"); + EOL("CIE Identifier Tag"); Asm->EmitInt8(dwarf::DW_CIE_VERSION); - Asm->EOL("CIE Version"); - Asm->EmitString(""); - Asm->EOL("CIE Augmentation"); - Asm->EmitULEB128Bytes(1); - Asm->EOL("CIE Code Alignment Factor"); - Asm->EmitSLEB128Bytes(stackGrowth); - Asm->EOL("CIE Data Alignment Factor"); + EOL("CIE Version"); + Asm->OutStreamer.EmitIntValue(0, 1, /*addrspace*/0); // nul terminator. + EOL("CIE Augmentation"); + EmitULEB128(1, "CIE Code Alignment Factor"); + EmitSLEB128(stackGrowth, "CIE Data Alignment Factor"); Asm->EmitInt8(RI->getDwarfRegNum(RI->getRARegister(), false)); - Asm->EOL("CIE RA Column"); + EOL("CIE RA Column"); std::vector<MachineMove> Moves; RI->getInitialFrameState(Moves); @@ -2676,8 +2678,7 @@ void DwarfDebug::emitCommonDebugFrame() { Asm->EmitAlignment(2, 0, 0, false); EmitLabel("debug_frame_common_end", 0); - - Asm->EOL(); + Asm->O << '\n'; } /// emitFunctionDebugFrame - Emit per function frame info into a debug frame @@ -2693,27 +2694,26 @@ DwarfDebug::emitFunctionDebugFrame(const FunctionDebugFrameInfo&DebugFrameInfo){ EmitDifference("debug_frame_end", DebugFrameInfo.Number, "debug_frame_begin", DebugFrameInfo.Number, true); - Asm->EOL("Length of Frame Information Entry"); + EOL("Length of Frame Information Entry"); EmitLabel("debug_frame_begin", DebugFrameInfo.Number); EmitSectionOffset("debug_frame_common", "section_debug_frame", 0, 0, true, false); - Asm->EOL("FDE CIE offset"); + EOL("FDE CIE offset"); EmitReference("func_begin", DebugFrameInfo.Number); - Asm->EOL("FDE initial location"); + EOL("FDE initial location"); EmitDifference("func_end", DebugFrameInfo.Number, "func_begin", DebugFrameInfo.Number); - Asm->EOL("FDE address range"); + EOL("FDE address range"); EmitFrameMoves("func_begin", DebugFrameInfo.Number, DebugFrameInfo.Moves, false); Asm->EmitAlignment(2, 0, 0, false); EmitLabel("debug_frame_end", DebugFrameInfo.Number); - - Asm->EOL(); + Asm->O << '\n'; } /// emitDebugPubNames - Emit visible names into a debug pubnames section. @@ -2725,19 +2725,19 @@ void DwarfDebug::emitDebugPubNames() { EmitDifference("pubnames_end", ModuleCU->getID(), "pubnames_begin", ModuleCU->getID(), true); - Asm->EOL("Length of Public Names Info"); + EOL("Length of Public Names Info"); EmitLabel("pubnames_begin", ModuleCU->getID()); - Asm->EmitInt16(dwarf::DWARF_VERSION); Asm->EOL("DWARF Version"); + Asm->EmitInt16(dwarf::DWARF_VERSION); EOL("DWARF Version"); EmitSectionOffset("info_begin", "section_info", ModuleCU->getID(), 0, true, false); - Asm->EOL("Offset of Compilation Unit Info"); + EOL("Offset of Compilation Unit Info"); EmitDifference("info_end", ModuleCU->getID(), "info_begin", ModuleCU->getID(), true); - Asm->EOL("Compilation Unit Length"); + EOL("Compilation Unit Length"); const StringMap<DIE*> &Globals = ModuleCU->getGlobals(); for (StringMap<DIE*>::const_iterator @@ -2745,14 +2745,16 @@ void DwarfDebug::emitDebugPubNames() { const char *Name = GI->getKeyData(); DIE * Entity = GI->second; - Asm->EmitInt32(Entity->getOffset()); Asm->EOL("DIE offset"); - Asm->EmitString(Name, strlen(Name)); Asm->EOL("External Name"); + Asm->EmitInt32(Entity->getOffset()); EOL("DIE offset"); + + if (Asm->VerboseAsm) + Asm->OutStreamer.AddComment("External Name"); + Asm->OutStreamer.EmitBytes(StringRef(Name, strlen(Name)+1), 0); } - Asm->EmitInt32(0); Asm->EOL("End Mark"); + Asm->EmitInt32(0); EOL("End Mark"); EmitLabel("pubnames_end", ModuleCU->getID()); - - Asm->EOL(); + Asm->O << '\n'; } void DwarfDebug::emitDebugPubTypes() { @@ -2761,19 +2763,19 @@ void DwarfDebug::emitDebugPubTypes() { Asm->getObjFileLowering().getDwarfPubTypesSection()); EmitDifference("pubtypes_end", ModuleCU->getID(), "pubtypes_begin", ModuleCU->getID(), true); - Asm->EOL("Length of Public Types Info"); + EOL("Length of Public Types Info"); EmitLabel("pubtypes_begin", ModuleCU->getID()); - Asm->EmitInt16(dwarf::DWARF_VERSION); Asm->EOL("DWARF Version"); + Asm->EmitInt16(dwarf::DWARF_VERSION); EOL("DWARF Version"); EmitSectionOffset("info_begin", "section_info", ModuleCU->getID(), 0, true, false); - Asm->EOL("Offset of Compilation ModuleCU Info"); + EOL("Offset of Compilation ModuleCU Info"); EmitDifference("info_end", ModuleCU->getID(), "info_begin", ModuleCU->getID(), true); - Asm->EOL("Compilation ModuleCU Length"); + EOL("Compilation ModuleCU Length"); const StringMap<DIE*> &Globals = ModuleCU->getGlobalTypes(); for (StringMap<DIE*>::const_iterator @@ -2781,14 +2783,15 @@ void DwarfDebug::emitDebugPubTypes() { const char *Name = GI->getKeyData(); DIE * Entity = GI->second; - Asm->EmitInt32(Entity->getOffset()); Asm->EOL("DIE offset"); - Asm->EmitString(Name, strlen(Name)); Asm->EOL("External Name"); + Asm->EmitInt32(Entity->getOffset()); EOL("DIE offset"); + + if (Asm->VerboseAsm) Asm->OutStreamer.AddComment("External Name"); + Asm->OutStreamer.EmitBytes(StringRef(Name, strlen(Name)), 0); } - Asm->EmitInt32(0); Asm->EOL("End Mark"); + Asm->EmitInt32(0); EOL("End Mark"); EmitLabel("pubtypes_end", ModuleCU->getID()); - - Asm->EOL(); + Asm->O << '\n'; } /// emitDebugStr - Emit visible names into a debug str section. @@ -2808,10 +2811,10 @@ void DwarfDebug::emitDebugStr() { // Emit the string itself. const std::string &String = StringPool[StringID]; - Asm->EmitString(String); Asm->EOL(); + Asm->OutStreamer.EmitBytes(StringRef(String.c_str(), String.size()+1), 0); } - Asm->EOL(); + Asm->O << '\n'; } } @@ -2821,7 +2824,6 @@ void DwarfDebug::emitDebugLoc() { // Start the dwarf loc section. Asm->OutStreamer.SwitchSection( Asm->getObjFileLowering().getDwarfLocSection()); - Asm->EOL(); } /// EmitDebugARanges - Emit visible names into a debug aranges section. @@ -2836,29 +2838,27 @@ void DwarfDebug::EmitDebugARanges() { CompileUnit *Unit = GetBaseCompileUnit(); // Don't include size of length - Asm->EmitInt32(0x1c); Asm->EOL("Length of Address Ranges Info"); + Asm->EmitInt32(0x1c); EOL("Length of Address Ranges Info"); - Asm->EmitInt16(dwarf::DWARF_VERSION); Asm->EOL("Dwarf Version"); + Asm->EmitInt16(dwarf::DWARF_VERSION); EOL("Dwarf Version"); EmitReference("info_begin", Unit->getID()); - Asm->EOL("Offset of Compilation Unit Info"); + EOL("Offset of Compilation Unit Info"); - Asm->EmitInt8(TD->getPointerSize()); Asm->EOL("Size of Address"); + Asm->EmitInt8(TD->getPointerSize()); EOL("Size of Address"); - Asm->EmitInt8(0); Asm->EOL("Size of Segment Descriptor"); + Asm->EmitInt8(0); EOL("Size of Segment Descriptor"); - Asm->EmitInt16(0); Asm->EOL("Pad (1)"); - Asm->EmitInt16(0); Asm->EOL("Pad (2)"); + Asm->EmitInt16(0); EOL("Pad (1)"); + Asm->EmitInt16(0); EOL("Pad (2)"); // Range 1 - EmitReference("text_begin", 0); Asm->EOL("Address"); - EmitDifference("text_end", 0, "text_begin", 0, true); Asm->EOL("Length"); + EmitReference("text_begin", 0); EOL("Address"); + EmitDifference("text_end", 0, "text_begin", 0, true); EOL("Length"); - Asm->EmitInt32(0); Asm->EOL("EOM (1)"); - Asm->EmitInt32(0); Asm->EOL("EOM (2)"); + Asm->EmitInt32(0); EOL("EOM (1)"); + Asm->EmitInt32(0); EOL("EOM (2)"); #endif - - Asm->EOL(); } /// emitDebugRanges - Emit visible names into a debug ranges section. @@ -2867,7 +2867,6 @@ void DwarfDebug::emitDebugRanges() { // Start the dwarf ranges section. Asm->OutStreamer.SwitchSection( Asm->getObjFileLowering().getDwarfRangesSection()); - Asm->EOL(); } /// emitDebugMacInfo - Emit visible names into a debug macinfo section. @@ -2877,7 +2876,6 @@ void DwarfDebug::emitDebugMacInfo() { Asm->getObjFileLowering().getDwarfMacroInfoSection()) { // Start the dwarf macinfo section. Asm->OutStreamer.SwitchSection(LineInfo); - Asm->EOL(); } } @@ -2908,53 +2906,54 @@ void DwarfDebug::emitDebugInlineInfo() { Asm->OutStreamer.SwitchSection( Asm->getObjFileLowering().getDwarfDebugInlineSection()); - Asm->EOL(); + EmitDifference("debug_inlined_end", 1, "debug_inlined_begin", 1, true); - Asm->EOL("Length of Debug Inlined Information Entry"); + EOL("Length of Debug Inlined Information Entry"); EmitLabel("debug_inlined_begin", 1); - Asm->EmitInt16(dwarf::DWARF_VERSION); Asm->EOL("Dwarf Version"); - Asm->EmitInt8(TD->getPointerSize()); Asm->EOL("Address Size (in bytes)"); + Asm->EmitInt16(dwarf::DWARF_VERSION); EOL("Dwarf Version"); + Asm->EmitInt8(TD->getPointerSize()); EOL("Address Size (in bytes)"); for (SmallVector<MDNode *, 4>::iterator I = InlinedSPNodes.begin(), E = InlinedSPNodes.end(); I != E; ++I) { MDNode *Node = *I; - ValueMap<MDNode *, SmallVector<InlineInfoLabels, 4> >::iterator II + DenseMap<MDNode *, SmallVector<InlineInfoLabels, 4> >::iterator II = InlineInfo.find(Node); SmallVector<InlineInfoLabels, 4> &Labels = II->second; DISubprogram SP(Node); StringRef LName = SP.getLinkageName(); StringRef Name = SP.getName(); - if (LName.empty()) - Asm->EmitString(Name); - else + if (LName.empty()) { + Asm->OutStreamer.EmitBytes(Name, 0); + Asm->OutStreamer.EmitIntValue(0, 1, 0); // nul terminator. + } else EmitSectionOffset("string", "section_str", - StringPool.idFor(getRealLinkageName(LName)), false, true); + StringPool.idFor(getRealLinkageName(LName)), false, true); - Asm->EOL("MIPS linkage name"); + EOL("MIPS linkage name"); EmitSectionOffset("string", "section_str", StringPool.idFor(Name), false, true); - Asm->EOL("Function name"); - Asm->EmitULEB128Bytes(Labels.size()); Asm->EOL("Inline count"); + EOL("Function name"); + EmitULEB128(Labels.size(), "Inline count"); for (SmallVector<InlineInfoLabels, 4>::iterator LI = Labels.begin(), LE = Labels.end(); LI != LE; ++LI) { DIE *SP = LI->second; - Asm->EmitInt32(SP->getOffset()); Asm->EOL("DIE offset"); + Asm->EmitInt32(SP->getOffset()); EOL("DIE offset"); if (TD->getPointerSize() == sizeof(int32_t)) O << MAI->getData32bitsDirective(); else O << MAI->getData64bitsDirective(); - PrintLabelName("label", LI->first); Asm->EOL("low_pc"); + PrintLabelName("label", LI->first); EOL("low_pc"); } } EmitLabel("debug_inlined_end", 1); - Asm->EOL(); + Asm->O << '\n'; } diff --git a/lib/CodeGen/AsmPrinter/DwarfDebug.h b/lib/CodeGen/AsmPrinter/DwarfDebug.h index 2b8164e..e723621 100644 --- a/lib/CodeGen/AsmPrinter/DwarfDebug.h +++ b/lib/CodeGen/AsmPrinter/DwarfDebug.h @@ -20,7 +20,7 @@ #include "llvm/CodeGen/MachineLocation.h" #include "llvm/Analysis/DebugInfo.h" #include "llvm/Support/raw_ostream.h" -#include "llvm/ADT/ValueMap.h" +#include "llvm/ADT/DenseMap.h" #include "llvm/ADT/FoldingSet.h" #include "llvm/ADT/SmallSet.h" #include "llvm/ADT/StringMap.h" @@ -57,7 +57,7 @@ public: unsigned getLabelID() const { return LabelID; } }; -class DwarfDebug : public Dwarf { +class DwarfDebug : public DwarfPrinter { //===--------------------------------------------------------------------===// // Attributes used to construct specific Dwarf sections. // @@ -136,25 +136,25 @@ class DwarfDebug : public Dwarf { /// DbgScopeMap - Tracks the scopes in the current function. /// - ValueMap<MDNode *, DbgScope *> DbgScopeMap; + DenseMap<MDNode *, DbgScope *> DbgScopeMap; /// ConcreteScopes - Tracks the concrete scopees in the current function. /// These scopes are also included in DbgScopeMap. - ValueMap<MDNode *, DbgScope *> ConcreteScopes; + DenseMap<MDNode *, DbgScope *> ConcreteScopes; /// AbstractScopes - Tracks the abstract scopes a module. These scopes are /// not included DbgScopeMap. - ValueMap<MDNode *, DbgScope *> AbstractScopes; + DenseMap<MDNode *, DbgScope *> AbstractScopes; SmallVector<DbgScope *, 4>AbstractScopesList; /// AbstractVariables - Collection on abstract variables. - ValueMap<MDNode *, DbgVariable *> AbstractVariables; + DenseMap<MDNode *, DbgVariable *> AbstractVariables; /// InliendSubprogramDIEs - Collection of subprgram DIEs that are marked /// (at the end of the module) as DW_AT_inline. SmallPtrSet<DIE *, 4> InlinedSubprogramDIEs; - DenseMap<DIE *, WeakVH> ContainingTypeMap; + DenseMap<DIE *, MDNode *> ContainingTypeMap; /// AbstractSubprogramDIEs - Collection of abstruct subprogram DIEs. SmallPtrSet<DIE *, 4> AbstractSubprogramDIEs; @@ -176,7 +176,7 @@ class DwarfDebug : public Dwarf { /// InlineInfo - Keep track of inlined functions and their location. This /// information is used to populate debug_inlined section. typedef std::pair<unsigned, DIE *> InlineInfoLabels; - ValueMap<MDNode *, SmallVector<InlineInfoLabels, 4> > InlineInfo; + DenseMap<MDNode *, SmallVector<InlineInfoLabels, 4> > InlineInfo; SmallVector<MDNode *, 4> InlinedSPNodes; /// CompileUnitOffsets - A vector of the offsets of the compile units. This is @@ -256,7 +256,7 @@ class DwarfDebug : public Dwarf { /// addObjectLabel - Add an non-Dwarf label attribute data and value. /// void addObjectLabel(DIE *Die, unsigned Attribute, unsigned Form, - const std::string &Label); + const MCSymbol *Sym); /// addSectionOffset - Add a section offset label attribute data and value. /// diff --git a/lib/CodeGen/AsmPrinter/DwarfException.cpp b/lib/CodeGen/AsmPrinter/DwarfException.cpp index d01f300..2ae16c0 100644 --- a/lib/CodeGen/AsmPrinter/DwarfException.cpp +++ b/lib/CodeGen/AsmPrinter/DwarfException.cpp @@ -22,22 +22,23 @@ #include "llvm/MC/MCExpr.h" #include "llvm/MC/MCSection.h" #include "llvm/MC/MCStreamer.h" +#include "llvm/MC/MCSymbol.h" +#include "llvm/Target/Mangler.h" #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetFrameInfo.h" #include "llvm/Target/TargetLoweringObjectFile.h" #include "llvm/Target/TargetOptions.h" #include "llvm/Target/TargetRegisterInfo.h" #include "llvm/Support/Dwarf.h" -#include "llvm/Support/Mangler.h" +#include "llvm/Support/FormattedStream.h" #include "llvm/Support/Timer.h" -#include "llvm/Support/raw_ostream.h" #include "llvm/ADT/SmallString.h" #include "llvm/ADT/StringExtras.h" using namespace llvm; DwarfException::DwarfException(raw_ostream &OS, AsmPrinter *A, const MCAsmInfo *T) - : Dwarf(OS, A, T, "eh"), shouldEmitTable(false), shouldEmitMoves(false), + : DwarfPrinter(OS, A, T, "eh"), shouldEmitTable(false),shouldEmitMoves(false), shouldEmitTableModule(false), shouldEmitMovesModule(false), ExceptionTimer(0) { if (TimePassesIsEnabled) @@ -114,14 +115,14 @@ void DwarfException::EmitCIE(const Function *PersonalityFn, unsigned Index) { // Define the eh frame length. EmitDifference("eh_frame_common_end", Index, "eh_frame_common_begin", Index, true); - Asm->EOL("Length of Common Information Entry"); + EOL("Length of Common Information Entry"); // EH frame header. EmitLabel("eh_frame_common_begin", Index); - Asm->EmitInt32((int)0); - Asm->EOL("CIE Identifier Tag"); - Asm->EmitInt8(dwarf::DW_CIE_VERSION); - Asm->EOL("CIE Version"); + if (Asm->VerboseAsm) Asm->OutStreamer.AddComment("CIE Identifier Tag"); + Asm->OutStreamer.EmitIntValue(0, 4/*size*/, 0/*addrspace*/); + if (Asm->VerboseAsm) Asm->OutStreamer.AddComment("DW_CIE_VERSION"); + Asm->OutStreamer.EmitIntValue(dwarf::DW_CIE_VERSION, 1/*size*/, 0/*addr*/); // The personality presence indicates that language specific information will // show up in the eh frame. Find out how we are supposed to lower the @@ -145,7 +146,7 @@ void DwarfException::EmitCIE(const Function *PersonalityFn, unsigned Index) { unsigned LSDAEncoding = dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata4; unsigned FDEEncoding = dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata4; - char Augmentation[5] = { 0 }; + char Augmentation[6] = { 0 }; unsigned AugmentationSize = 0; char *APtr = Augmentation + 1; @@ -170,22 +171,17 @@ void DwarfException::EmitCIE(const Function *PersonalityFn, unsigned Index) { if (APtr != Augmentation + 1) Augmentation[0] = 'z'; - Asm->EmitString(Augmentation); - Asm->EOL("CIE Augmentation"); + Asm->OutStreamer.EmitBytes(StringRef(Augmentation, strlen(Augmentation)+1),0); + EOL("CIE Augmentation"); // Round out reader. - Asm->EmitULEB128Bytes(1); - Asm->EOL("CIE Code Alignment Factor"); - Asm->EmitSLEB128Bytes(stackGrowth); - Asm->EOL("CIE Data Alignment Factor"); + EmitULEB128(1, "CIE Code Alignment Factor"); + EmitSLEB128(stackGrowth, "CIE Data Alignment Factor"); Asm->EmitInt8(RI->getDwarfRegNum(RI->getRARegister(), true)); - Asm->EOL("CIE Return Address Column"); + EOL("CIE Return Address Column"); - Asm->EmitULEB128Bytes(AugmentationSize); - Asm->EOL("Augmentation Size"); - - Asm->EmitInt8(PerEncoding); - Asm->EOL("Personality", PerEncoding); + EmitULEB128(AugmentationSize, "Augmentation Size"); + EmitEncodingByte(PerEncoding, "Personality"); // If there is a personality, we need to indicate the function's location. if (PersonalityRef) { @@ -193,15 +189,11 @@ void DwarfException::EmitCIE(const Function *PersonalityFn, unsigned Index) { PersonalityRef = CreateLabelDiff(PersonalityRef, "personalityref_addr", Index); - O << MAI->getData32bitsDirective(); - PersonalityRef->print(O, MAI); - Asm->EOL("Personality"); - - Asm->EmitInt8(LSDAEncoding); - Asm->EOL("LSDA Encoding", LSDAEncoding); + O << MAI->getData32bitsDirective() << *PersonalityRef; + EOL("Personality"); - Asm->EmitInt8(FDEEncoding); - Asm->EOL("FDE Encoding", FDEEncoding); + EmitEncodingByte(LSDAEncoding, "LSDA"); + EmitEncodingByte(FDEEncoding, "FDE"); } // Indicate locations of general callee saved registers in frame. @@ -214,8 +206,7 @@ void DwarfException::EmitCIE(const Function *PersonalityFn, unsigned Index) { // holes which confuse readers of eh_frame. Asm->EmitAlignment(TD->getPointerSize() == 4 ? 2 : 3, 0, 0, false); EmitLabel("eh_frame_common_end", Index); - - Asm->EOL(); + Asm->O << '\n'; } /// EmitFDE - Emit the Frame Description Entry (FDE) for the function. @@ -231,16 +222,17 @@ void DwarfException::EmitFDE(const FunctionEHFrameInfo &EHFrameInfo) { // corresponding function is static, this should not be externally visible. if (!TheFunc->hasLocalLinkage()) if (const char *GlobalEHDirective = MAI->getGlobalEHDirective()) - O << GlobalEHDirective << EHFrameInfo.FnName << '\n'; + O << GlobalEHDirective << *EHFrameInfo.FunctionEHSym << '\n'; // If corresponding function is weak definition, this should be too. if (TheFunc->isWeakForLinker() && MAI->getWeakDefDirective()) - O << MAI->getWeakDefDirective() << EHFrameInfo.FnName << '\n'; + O << MAI->getWeakDefDirective() << *EHFrameInfo.FunctionEHSym << '\n'; // If corresponding function is hidden, this should be too. if (TheFunc->hasHiddenVisibility()) - if (const char *HiddenDirective = MAI->getHiddenDirective()) - O << HiddenDirective << EHFrameInfo.FnName << '\n' ; + if (MCSymbolAttr HiddenAttr = MAI->getHiddenVisibilityAttr()) + Asm->OutStreamer.EmitSymbolAttribute(EHFrameInfo.FunctionEHSym, + HiddenAttr); // If there are no calls then you can't unwind. This may mean we can omit the // EH Frame, but some environments do not handle weak absolute symbols. If @@ -250,19 +242,20 @@ void DwarfException::EmitFDE(const FunctionEHFrameInfo &EHFrameInfo) { (!TheFunc->isWeakForLinker() || !MAI->getWeakDefDirective() || MAI->getSupportsWeakOmittedEHFrame())) { - O << EHFrameInfo.FnName << " = 0\n"; + O << *EHFrameInfo.FunctionEHSym << " = 0\n"; // This name has no connection to the function, so it might get // dead-stripped when the function is not, erroneously. Prohibit // dead-stripping unconditionally. - if (const char *UsedDirective = MAI->getUsedDirective()) - O << UsedDirective << EHFrameInfo.FnName << "\n\n"; + if (MAI->hasNoDeadStrip()) + Asm->OutStreamer.EmitSymbolAttribute(EHFrameInfo.FunctionEHSym, + MCSA_NoDeadStrip); } else { - O << EHFrameInfo.FnName << ":\n"; + O << *EHFrameInfo.FunctionEHSym << ":\n"; // EH frame header. EmitDifference("eh_frame_end", EHFrameInfo.Number, "eh_frame_begin", EHFrameInfo.Number, true); - Asm->EOL("Length of Frame Information Entry"); + EOL("Length of Frame Information Entry"); EmitLabel("eh_frame_begin", EHFrameInfo.Number); @@ -270,34 +263,39 @@ void DwarfException::EmitFDE(const FunctionEHFrameInfo &EHFrameInfo) { EHFrameInfo.Number, EHFrameInfo.PersonalityIndex, true, true, false); - Asm->EOL("FDE CIE offset"); + EOL("FDE CIE offset"); EmitReference("eh_func_begin", EHFrameInfo.Number, true, true); - Asm->EOL("FDE initial location"); + EOL("FDE initial location"); EmitDifference("eh_func_end", EHFrameInfo.Number, "eh_func_begin", EHFrameInfo.Number, true); - Asm->EOL("FDE address range"); + EOL("FDE address range"); // If there is a personality and landing pads then point to the language // specific data area in the exception table. if (MMI->getPersonalities()[0] != NULL) { - bool is4Byte = TD->getPointerSize() == sizeof(int32_t); - Asm->EmitULEB128Bytes(is4Byte ? 4 : 8); - Asm->EOL("Augmentation size"); + if (Asm->TM.getLSDAEncoding() != DwarfLSDAEncoding::EightByte) { + EmitULEB128(4, "Augmentation size"); - if (EHFrameInfo.hasLandingPads) - EmitReference("exception", EHFrameInfo.Number, true, false); - else { - if (is4Byte) - Asm->EmitInt32((int)0); + if (EHFrameInfo.hasLandingPads) + EmitReference("exception", EHFrameInfo.Number, true, true); else - Asm->EmitInt64((int)0); + Asm->OutStreamer.EmitIntValue(0, 4/*size*/, 0/*addrspace*/); + } else { + EmitULEB128(TD->getPointerSize(), "Augmentation size"); + + if (EHFrameInfo.hasLandingPads) { + EmitReference("exception", EHFrameInfo.Number, true, false); + } else { + Asm->OutStreamer.EmitIntValue(0, TD->getPointerSize(), + 0/*addrspace*/); + } } - Asm->EOL("Language Specific Data Area"); + + EOL("Language Specific Data Area"); } else { - Asm->EmitULEB128Bytes(0); - Asm->EOL("Augmentation size"); + EmitULEB128(0, "Augmentation size"); } // Indicate locations of function specific callee saved registers in frame. @@ -317,11 +315,11 @@ void DwarfException::EmitFDE(const FunctionEHFrameInfo &EHFrameInfo) { // on unused functions (calling undefined externals) being dead-stripped to // link correctly. Yes, there really is. if (MMI->isUsedFunction(EHFrameInfo.function)) - if (const char *UsedDirective = MAI->getUsedDirective()) - O << UsedDirective << EHFrameInfo.FnName << "\n\n"; + if (MAI->hasNoDeadStrip()) + Asm->OutStreamer.EmitSymbolAttribute(EHFrameInfo.FunctionEHSym, + MCSA_NoDeadStrip); } - - Asm->EOL(); + Asm->O << '\n'; } /// SharedTypeIds - How many leading type ids two landing pads have in common. @@ -765,7 +763,7 @@ void DwarfException::EmitExceptionTable() { for (unsigned i = 0; i != SizeAlign; ++i) { Asm->EmitInt8(0); - Asm->EOL("Padding"); + EOL("Padding"); } EmitLabel("exception", SubprogramCount); @@ -778,23 +776,16 @@ void DwarfException::EmitExceptionTable() { } // Emit the header. - Asm->EmitInt8(dwarf::DW_EH_PE_omit); - Asm->EOL("@LPStart format", dwarf::DW_EH_PE_omit); + EmitEncodingByte(dwarf::DW_EH_PE_omit, "@LPStart"); + EmitEncodingByte(TTypeFormat, "@TType"); - Asm->EmitInt8(TTypeFormat); - Asm->EOL("@TType format", TTypeFormat); - - if (HaveTTData) { - Asm->EmitULEB128Bytes(TyOffset); - Asm->EOL("@TType base offset"); - } + if (HaveTTData) + EmitULEB128(TyOffset, "@TType base offset"); // SjLj Exception handling if (IsSJLJ) { - Asm->EmitInt8(dwarf::DW_EH_PE_udata4); - Asm->EOL("Call site format", dwarf::DW_EH_PE_udata4); - Asm->EmitULEB128Bytes(SizeSites); - Asm->EOL("Call site table length"); + EmitEncodingByte(dwarf::DW_EH_PE_udata4, "Call site"); + EmitULEB128(SizeSites, "Call site table length"); // Emit the landing pad site information. unsigned idx = 0; @@ -804,14 +795,12 @@ void DwarfException::EmitExceptionTable() { // Offset of the landing pad, counted in 16-byte bundles relative to the // @LPStart address. - Asm->EmitULEB128Bytes(idx); - Asm->EOL("Landing pad"); + EmitULEB128(idx, "Landing pad"); // Offset of the first associated action record, relative to the start of // the action table. This value is biased by 1 (1 indicates the start of // the action table), and 0 indicates that there are no actions. - Asm->EmitULEB128Bytes(S.Action); - Asm->EOL("Action"); + EmitULEB128(S.Action, "Action"); } } else { // DWARF Exception handling @@ -836,10 +825,8 @@ void DwarfException::EmitExceptionTable() { // supposed to throw. // Emit the landing pad call site table. - Asm->EmitInt8(dwarf::DW_EH_PE_udata4); - Asm->EOL("Call site format", dwarf::DW_EH_PE_udata4); - Asm->EmitULEB128Bytes(SizeSites); - Asm->EOL("Call site table size"); + EmitEncodingByte(dwarf::DW_EH_PE_udata4, "Call site"); + EmitULEB128(SizeSites, "Call site table size"); for (SmallVectorImpl<CallSiteEntry>::const_iterator I = CallSites.begin(), E = CallSites.end(); I != E; ++I) { @@ -860,7 +847,7 @@ void DwarfException::EmitExceptionTable() { // the start of the procedure fragment. EmitSectionOffset(BeginTag, "eh_func_begin", BeginNumber, SubprogramCount, true, true); - Asm->EOL("Region start"); + EOL("Region start"); if (!S.EndLabel) EmitDifference("eh_func_end", SubprogramCount, BeginTag, BeginNumber, @@ -868,23 +855,22 @@ void DwarfException::EmitExceptionTable() { else EmitDifference("label", S.EndLabel, BeginTag, BeginNumber, true); - Asm->EOL("Region length"); + EOL("Region length"); // Offset of the landing pad, counted in 16-byte bundles relative to the // @LPStart address. if (!S.PadLabel) - Asm->EmitInt32(0); + Asm->OutStreamer.EmitIntValue(0, 4/*size*/, 0/*addrspace*/); else EmitSectionOffset("label", "eh_func_begin", S.PadLabel, SubprogramCount, true, true); - Asm->EOL("Landing pad"); + EOL("Landing pad"); // Offset of the first associated action record, relative to the start of // the action table. This value is biased by 1 (1 indicates the start of // the action table), and 0 indicates that there are no actions. - Asm->EmitULEB128Bytes(S.Action); - Asm->EOL("Action"); + EmitULEB128(S.Action, "Action"); } } @@ -897,17 +883,13 @@ void DwarfException::EmitExceptionTable() { // // Used by the runtime to match the type of the thrown exception to the // type of the catch clauses or the types in the exception specification. - - Asm->EmitSLEB128Bytes(Action.ValueForTypeID); - Asm->EOL("TypeInfo index"); + EmitSLEB128(Action.ValueForTypeID, "TypeInfo index"); // Action Record // // Self-relative signed displacement in bytes of the next action record, // or 0 if there is no next action record. - - Asm->EmitSLEB128Bytes(Action.NextAction); - Asm->EOL("Next action"); + EmitSLEB128(Action.NextAction, "Next action"); } // Emit the Catch TypeInfos. @@ -916,24 +898,19 @@ void DwarfException::EmitExceptionTable() { const GlobalVariable *GV = *I; PrintRelDirective(); - if (GV) { - O << Asm->Mang->getMangledName(GV); - } else { + if (GV) + O << *Asm->GetGlobalValueSymbol(GV); + else O << "0x0"; - } - Asm->EOL("TypeInfo"); + EOL("TypeInfo"); } // Emit the Exception Specifications. for (std::vector<unsigned>::const_iterator I = FilterIds.begin(), E = FilterIds.end(); I < E; ++I) { unsigned TypeID = *I; - Asm->EmitULEB128Bytes(TypeID); - if (TypeID != 0) - Asm->EOL("Exception specification"); - else - Asm->EOL(); + EmitULEB128(TypeID, TypeID != 0 ? "Exception specification" : 0); } Asm->EmitAlignment(2, 0, 0, false); @@ -1008,12 +985,12 @@ void DwarfException::EndFunction() { EmitLabel("eh_func_end", SubprogramCount); EmitExceptionTable(); - std::string FunctionEHName = - Asm->Mang->getMangledName(MF->getFunction(), ".eh", - Asm->MAI->is_EHSymbolPrivate()); + MCSymbol *FunctionEHSym = + Asm->GetSymbolWithGlobalValueBase(MF->getFunction(), ".eh", + Asm->MAI->is_EHSymbolPrivate()); // Save EH frame information - EHFrames.push_back(FunctionEHFrameInfo(FunctionEHName, SubprogramCount, + EHFrames.push_back(FunctionEHFrameInfo(FunctionEHSym, SubprogramCount, MMI->getPersonalityIndex(), MF->getFrameInfo()->hasCalls(), !MMI->getLandingPads().empty(), diff --git a/lib/CodeGen/AsmPrinter/DwarfException.h b/lib/CodeGen/AsmPrinter/DwarfException.h index aa01c5b..3921e91 100644 --- a/lib/CodeGen/AsmPrinter/DwarfException.h +++ b/lib/CodeGen/AsmPrinter/DwarfException.h @@ -32,21 +32,21 @@ class raw_ostream; //===----------------------------------------------------------------------===// /// DwarfException - Emits Dwarf exception handling directives. /// -class DwarfException : public Dwarf { +class DwarfException : public DwarfPrinter { struct FunctionEHFrameInfo { - std::string FnName; + MCSymbol *FunctionEHSym; // L_foo.eh unsigned Number; unsigned PersonalityIndex; bool hasCalls; bool hasLandingPads; std::vector<MachineMove> Moves; - const Function * function; + const Function *function; - FunctionEHFrameInfo(const std::string &FN, unsigned Num, unsigned P, + FunctionEHFrameInfo(MCSymbol *EHSym, unsigned Num, unsigned P, bool hC, bool hL, const std::vector<MachineMove> &M, const Function *f): - FnName(FN), Number(Num), PersonalityIndex(P), + FunctionEHSym(EHSym), Number(Num), PersonalityIndex(P), hasCalls(hC), hasLandingPads(hL), Moves(M), function (f) { } }; diff --git a/lib/CodeGen/AsmPrinter/DwarfPrinter.cpp b/lib/CodeGen/AsmPrinter/DwarfPrinter.cpp index 20b959b..d204bba 100644 --- a/lib/CodeGen/AsmPrinter/DwarfPrinter.cpp +++ b/lib/CodeGen/AsmPrinter/DwarfPrinter.cpp @@ -18,21 +18,22 @@ #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineModuleInfo.h" #include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCStreamer.h" +#include "llvm/MC/MCSymbol.h" #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetFrameInfo.h" #include "llvm/Target/TargetRegisterInfo.h" #include "llvm/Support/Dwarf.h" #include "llvm/Support/ErrorHandling.h" -#include "llvm/ADT/StringExtras.h" using namespace llvm; -Dwarf::Dwarf(raw_ostream &OS, AsmPrinter *A, const MCAsmInfo *T, - const char *flavor) +DwarfPrinter::DwarfPrinter(raw_ostream &OS, AsmPrinter *A, const MCAsmInfo *T, + const char *flavor) : O(OS), Asm(A), MAI(T), TD(Asm->TM.getTargetData()), RI(Asm->TM.getRegisterInfo()), M(NULL), MF(NULL), MMI(NULL), SubprogramCount(0), Flavor(flavor), SetCounter(1) {} -void Dwarf::PrintRelDirective(bool Force32Bit, bool isInSection) const { +void DwarfPrinter::PrintRelDirective(bool Force32Bit, bool isInSection) const { if (isInSection && MAI->getDwarfSectionOffsetDirective()) O << MAI->getDwarfSectionOffsetDirective(); else if (Force32Bit || TD->getPointerSize() == sizeof(int32_t)) @@ -41,14 +42,125 @@ void Dwarf::PrintRelDirective(bool Force32Bit, bool isInSection) const { O << MAI->getData64bitsDirective(); } +/// EOL - Print a newline character to asm stream. If a comment is present +/// then it will be printed first. Comments should not contain '\n'. +void DwarfPrinter::EOL(const Twine &Comment) const { + if (Asm->VerboseAsm && !Comment.isTriviallyEmpty()) { + Asm->O.PadToColumn(MAI->getCommentColumn()); + Asm->O << Asm->MAI->getCommentString() << ' ' << Comment; + } + Asm->O << '\n'; +} + +static const char *DecodeDWARFEncoding(unsigned Encoding) { + switch (Encoding) { + case dwarf::DW_EH_PE_absptr: return "absptr"; + case dwarf::DW_EH_PE_omit: return "omit"; + case dwarf::DW_EH_PE_pcrel: return "pcrel"; + case dwarf::DW_EH_PE_udata4: return "udata4"; + case dwarf::DW_EH_PE_udata8: return "udata8"; + case dwarf::DW_EH_PE_sdata4: return "sdata4"; + case dwarf::DW_EH_PE_sdata8: return "sdata8"; + case dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_udata4: return "pcrel udata4"; + case dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata4: return "pcrel sdata4"; + case dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_udata8: return "pcrel udata8"; + case dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata8: return "pcrel sdata8"; + case dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel |dwarf::DW_EH_PE_udata4: + return "indirect pcrel udata4"; + case dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel |dwarf::DW_EH_PE_sdata4: + return "indirect pcrel sdata4"; + case dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel |dwarf::DW_EH_PE_udata8: + return "indirect pcrel udata8"; + case dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel |dwarf::DW_EH_PE_sdata8: + return "indirect pcrel sdata8"; + } + + return "<unknown encoding>"; +} + +/// EmitEncodingByte - Emit a .byte 42 directive that corresponds to an +/// encoding. If verbose assembly output is enabled, we output comments +/// describing the encoding. Desc is an optional string saying what the +/// encoding is specifying (e.g. "LSDA"). +void DwarfPrinter::EmitEncodingByte(unsigned Val, const char *Desc) { + if (Asm->VerboseAsm) { + if (Desc != 0) + Asm->OutStreamer.AddComment(Twine(Desc)+" Encoding = " + + Twine(DecodeDWARFEncoding(Val))); + else + Asm->OutStreamer.AddComment(Twine("Encoding = ") + + DecodeDWARFEncoding(Val)); + } + + Asm->OutStreamer.EmitIntValue(Val, 1, 0/*addrspace*/); +} + +/// EmitCFAByte - Emit a .byte 42 directive for a DW_CFA_xxx value. +void DwarfPrinter::EmitCFAByte(unsigned Val) { + if (Asm->VerboseAsm) { + if (Val >= dwarf::DW_CFA_offset && Val < dwarf::DW_CFA_offset+64) + Asm->OutStreamer.AddComment("DW_CFA_offset + Reg (" + + Twine(Val-dwarf::DW_CFA_offset) + ")"); + else + Asm->OutStreamer.AddComment(dwarf::CallFrameString(Val)); + } + Asm->OutStreamer.EmitIntValue(Val, 1, 0/*addrspace*/); +} + +/// EmitSLEB128 - emit the specified signed leb128 value. +void DwarfPrinter::EmitSLEB128(int Value, const char *Desc) const { + if (Asm->VerboseAsm && Desc) + Asm->OutStreamer.AddComment(Desc); + + if (MAI->hasLEB128()) { + O << "\t.sleb128\t" << Value; + Asm->OutStreamer.AddBlankLine(); + return; + } + + // If we don't have .sleb128, emit as .bytes. + int Sign = Value >> (8 * sizeof(Value) - 1); + bool IsMore; + + do { + unsigned char Byte = static_cast<unsigned char>(Value & 0x7f); + Value >>= 7; + IsMore = Value != Sign || ((Byte ^ Sign) & 0x40) != 0; + if (IsMore) Byte |= 0x80; + + Asm->OutStreamer.EmitIntValue(Byte, 1, /*addrspace*/0); + } while (IsMore); +} + +/// EmitULEB128 - emit the specified signed leb128 value. +void DwarfPrinter::EmitULEB128(unsigned Value, const char *Desc) const { + if (Asm->VerboseAsm && Desc) + Asm->OutStreamer.AddComment(Desc); + + if (MAI->hasLEB128()) { + O << "\t.uleb128\t" << Value; + Asm->OutStreamer.AddBlankLine(); + return; + } + + // If we don't have .uleb128, emit as .bytes. + do { + unsigned char Byte = static_cast<unsigned char>(Value & 0x7f); + Value >>= 7; + if (Value) Byte |= 0x80; + Asm->OutStreamer.EmitIntValue(Byte, 1, /*addrspace*/0); + } while (Value); +} + + /// PrintLabelName - Print label name in form used by Dwarf writer. /// -void Dwarf::PrintLabelName(const char *Tag, unsigned Number) const { +void DwarfPrinter::PrintLabelName(const char *Tag, unsigned Number) const { O << MAI->getPrivateGlobalPrefix() << Tag; if (Number) O << Number; } -void Dwarf::PrintLabelName(const char *Tag, unsigned Number, - const char *Suffix) const { +void DwarfPrinter::PrintLabelName(const char *Tag, unsigned Number, + const char *Suffix) const { O << MAI->getPrivateGlobalPrefix() << Tag; if (Number) O << Number; O << Suffix; @@ -56,32 +168,39 @@ void Dwarf::PrintLabelName(const char *Tag, unsigned Number, /// EmitLabel - Emit location label for internal use by Dwarf. /// -void Dwarf::EmitLabel(const char *Tag, unsigned Number) const { +void DwarfPrinter::EmitLabel(const char *Tag, unsigned Number) const { PrintLabelName(Tag, Number); O << ":\n"; } /// EmitReference - Emit a reference to a label. /// -void Dwarf::EmitReference(const char *Tag, unsigned Number, - bool IsPCRelative, bool Force32Bit) const { +void DwarfPrinter::EmitReference(const char *Tag, unsigned Number, + bool IsPCRelative, bool Force32Bit) const { PrintRelDirective(Force32Bit); PrintLabelName(Tag, Number); if (IsPCRelative) O << "-" << MAI->getPCSymbol(); } -void Dwarf::EmitReference(const std::string &Name, bool IsPCRelative, - bool Force32Bit) const { +void DwarfPrinter::EmitReference(const std::string &Name, bool IsPCRelative, + bool Force32Bit) const { PrintRelDirective(Force32Bit); O << Name; if (IsPCRelative) O << "-" << MAI->getPCSymbol(); } +void DwarfPrinter::EmitReference(const MCSymbol *Sym, bool IsPCRelative, + bool Force32Bit) const { + PrintRelDirective(Force32Bit); + O << *Sym; + if (IsPCRelative) O << "-" << MAI->getPCSymbol(); +} + /// EmitDifference - Emit the difference between two labels. Some assemblers do /// not behave with absolute expressions with data directives, so there is an /// option (needsSet) to use an intermediary set expression. -void Dwarf::EmitDifference(const char *TagHi, unsigned NumberHi, - const char *TagLo, unsigned NumberLo, - bool IsSmall) { +void DwarfPrinter::EmitDifference(const char *TagHi, unsigned NumberHi, + const char *TagLo, unsigned NumberLo, + bool IsSmall) { if (MAI->needsSet()) { O << "\t.set\t"; PrintLabelName("set", SetCounter, Flavor); @@ -102,10 +221,11 @@ void Dwarf::EmitDifference(const char *TagHi, unsigned NumberHi, } } -void Dwarf::EmitSectionOffset(const char* Label, const char* Section, - unsigned LabelNumber, unsigned SectionNumber, - bool IsSmall, bool isEH, - bool useSet) { +void DwarfPrinter::EmitSectionOffset(const char* Label, const char* Section, + unsigned LabelNumber, + unsigned SectionNumber, + bool IsSmall, bool isEH, + bool useSet) { bool printAbsolute = false; if (isEH) printAbsolute = MAI->isAbsoluteEHSectionOffsets(); @@ -140,8 +260,9 @@ void Dwarf::EmitSectionOffset(const char* Label, const char* Section, /// EmitFrameMoves - Emit frame instructions to describe the layout of the /// frame. -void Dwarf::EmitFrameMoves(const char *BaseLabel, unsigned BaseLabelID, - const std::vector<MachineMove> &Moves, bool isEH) { +void DwarfPrinter::EmitFrameMoves(const char *BaseLabel, unsigned BaseLabelID, + const std::vector<MachineMove> &Moves, + bool isEH) { int stackGrowth = Asm->TM.getFrameInfo()->getStackGrowthDirection() == TargetFrameInfo::StackGrowsUp ? @@ -164,10 +285,9 @@ void Dwarf::EmitFrameMoves(const char *BaseLabel, unsigned BaseLabelID, // Advance row if new location. if (BaseLabel && LabelID && (BaseLabelID != LabelID || !IsLocal)) { - Asm->EmitInt8(dwarf::DW_CFA_advance_loc4); - Asm->EOL("DW_CFA_advance_loc4"); + EmitCFAByte(dwarf::DW_CFA_advance_loc4); EmitDifference("label", LabelID, BaseLabel, BaseLabelID, true); - Asm->EOL(); + Asm->O << '\n'; BaseLabelID = LabelID; BaseLabel = "label"; @@ -178,29 +298,22 @@ void Dwarf::EmitFrameMoves(const char *BaseLabel, unsigned BaseLabelID, if (Dst.isReg() && Dst.getReg() == MachineLocation::VirtualFP) { if (!Src.isReg()) { if (Src.getReg() == MachineLocation::VirtualFP) { - Asm->EmitInt8(dwarf::DW_CFA_def_cfa_offset); - Asm->EOL("DW_CFA_def_cfa_offset"); + EmitCFAByte(dwarf::DW_CFA_def_cfa_offset); } else { - Asm->EmitInt8(dwarf::DW_CFA_def_cfa); - Asm->EOL("DW_CFA_def_cfa"); - Asm->EmitULEB128Bytes(RI->getDwarfRegNum(Src.getReg(), isEH)); - Asm->EOL("Register"); + EmitCFAByte(dwarf::DW_CFA_def_cfa); + EmitULEB128(RI->getDwarfRegNum(Src.getReg(), isEH), "Register"); } int Offset = -Src.getOffset(); - - Asm->EmitULEB128Bytes(Offset); - Asm->EOL("Offset"); + EmitULEB128(Offset, "Offset"); } else { llvm_unreachable("Machine move not supported yet."); } } else if (Src.isReg() && Src.getReg() == MachineLocation::VirtualFP) { if (Dst.isReg()) { - Asm->EmitInt8(dwarf::DW_CFA_def_cfa_register); - Asm->EOL("DW_CFA_def_cfa_register"); - Asm->EmitULEB128Bytes(RI->getDwarfRegNum(Dst.getReg(), isEH)); - Asm->EOL("Register"); + EmitCFAByte(dwarf::DW_CFA_def_cfa_register); + EmitULEB128(RI->getDwarfRegNum(Dst.getReg(), isEH), "Register"); } else { llvm_unreachable("Machine move not supported yet."); } @@ -209,27 +322,16 @@ void Dwarf::EmitFrameMoves(const char *BaseLabel, unsigned BaseLabelID, int Offset = Dst.getOffset() / stackGrowth; if (Offset < 0) { - Asm->EmitInt8(dwarf::DW_CFA_offset_extended_sf); - Asm->EOL("DW_CFA_offset_extended_sf"); - Asm->EmitULEB128Bytes(Reg); - Asm->EOL("Reg"); - Asm->EmitSLEB128Bytes(Offset); - Asm->EOL("Offset"); + EmitCFAByte(dwarf::DW_CFA_offset_extended_sf); + EmitULEB128(Reg, "Reg"); + EmitSLEB128(Offset, "Offset"); } else if (Reg < 64) { - Asm->EmitInt8(dwarf::DW_CFA_offset + Reg); - if (Asm->isVerbose()) - Asm->EOL("DW_CFA_offset + Reg (" + utostr(Reg) + ")"); - else - Asm->EOL(); - Asm->EmitULEB128Bytes(Offset); - Asm->EOL("Offset"); + EmitCFAByte(dwarf::DW_CFA_offset + Reg); + EmitULEB128(Offset, "Offset"); } else { - Asm->EmitInt8(dwarf::DW_CFA_offset_extended); - Asm->EOL("DW_CFA_offset_extended"); - Asm->EmitULEB128Bytes(Reg); - Asm->EOL("Reg"); - Asm->EmitULEB128Bytes(Offset); - Asm->EOL("Offset"); + EmitCFAByte(dwarf::DW_CFA_offset_extended); + EmitULEB128(Reg, "Reg"); + EmitULEB128(Offset, "Offset"); } } } diff --git a/lib/CodeGen/AsmPrinter/DwarfPrinter.h b/lib/CodeGen/AsmPrinter/DwarfPrinter.h index dedd695..86fe2ab 100644 --- a/lib/CodeGen/AsmPrinter/DwarfPrinter.h +++ b/lib/CodeGen/AsmPrinter/DwarfPrinter.h @@ -17,135 +17,149 @@ #include "DwarfLabel.h" #include "llvm/CodeGen/MachineLocation.h" #include "llvm/Support/Compiler.h" -#include "llvm/Support/raw_ostream.h" +#include "llvm/Support/FormattedStream.h" #include <vector> namespace llvm { - class AsmPrinter; - class MachineFunction; - class MachineModuleInfo; - class Module; - class MCAsmInfo; - class TargetData; - class TargetRegisterInfo; - - class Dwarf { - protected: - //===-------------------------------------------------------------==---===// - // Core attributes used by the DWARF printer. - // - - /// O - Stream to .s file. - /// - raw_ostream &O; - - /// Asm - Target of Dwarf emission. - /// - AsmPrinter *Asm; - - /// MAI - Target asm information. - /// - const MCAsmInfo *MAI; - - /// TD - Target data. - /// - const TargetData *TD; - - /// RI - Register Information. - /// - const TargetRegisterInfo *RI; - - /// M - Current module. - /// - Module *M; - - /// MF - Current machine function. - /// - MachineFunction *MF; - - /// MMI - Collected machine module information. - /// - MachineModuleInfo *MMI; - - /// SubprogramCount - The running count of functions being compiled. - /// - unsigned SubprogramCount; - - /// Flavor - A unique string indicating what dwarf producer this is, used to - /// unique labels. - /// - const char * const Flavor; - - /// SetCounter - A unique number for each '.set' directive. - /// - unsigned SetCounter; - - Dwarf(raw_ostream &OS, AsmPrinter *A, const MCAsmInfo *T, - const char *flavor); - public: - //===------------------------------------------------------------------===// - // Accessors. - // - const AsmPrinter *getAsm() const { return Asm; } - MachineModuleInfo *getMMI() const { return MMI; } - const MCAsmInfo *getMCAsmInfo() const { return MAI; } - const TargetData *getTargetData() const { return TD; } - - void PrintRelDirective(bool Force32Bit = false, - bool isInSection = false) const; - - - /// PrintLabelName - Print label name in form used by Dwarf writer. - /// - void PrintLabelName(const DWLabel &Label) const { - PrintLabelName(Label.getTag(), Label.getNumber()); - } - void PrintLabelName(const char *Tag, unsigned Number) const; - void PrintLabelName(const char *Tag, unsigned Number, - const char *Suffix) const; - - /// EmitLabel - Emit location label for internal use by Dwarf. - /// - void EmitLabel(const DWLabel &Label) const { - EmitLabel(Label.getTag(), Label.getNumber()); - } - void EmitLabel(const char *Tag, unsigned Number) const; - - /// EmitReference - Emit a reference to a label. - /// - void EmitReference(const DWLabel &Label, bool IsPCRelative = false, - bool Force32Bit = false) const { - EmitReference(Label.getTag(), Label.getNumber(), - IsPCRelative, Force32Bit); - } - void EmitReference(const char *Tag, unsigned Number, - bool IsPCRelative = false, - bool Force32Bit = false) const; - void EmitReference(const std::string &Name, bool IsPCRelative = false, - bool Force32Bit = false) const; - - /// EmitDifference - Emit the difference between two labels. Some - /// assemblers do not behave with absolute expressions with data directives, - /// so there is an option (needsSet) to use an intermediary set expression. - void EmitDifference(const DWLabel &LabelHi, const DWLabel &LabelLo, - bool IsSmall = false) { - EmitDifference(LabelHi.getTag(), LabelHi.getNumber(), - LabelLo.getTag(), LabelLo.getNumber(), - IsSmall); - } - void EmitDifference(const char *TagHi, unsigned NumberHi, - const char *TagLo, unsigned NumberLo, - bool IsSmall = false); - - void EmitSectionOffset(const char* Label, const char* Section, - unsigned LabelNumber, unsigned SectionNumber, - bool IsSmall = false, bool isEH = false, - bool useSet = true); - - /// EmitFrameMoves - Emit frame instructions to describe the layout of the - /// frame. - void EmitFrameMoves(const char *BaseLabel, unsigned BaseLabelID, - const std::vector<MachineMove> &Moves, bool isEH); +class AsmPrinter; +class MachineFunction; +class MachineModuleInfo; +class Module; +class MCAsmInfo; +class TargetData; +class TargetRegisterInfo; +class MCSymbol; +class Twine; + +class DwarfPrinter { +protected: + //===-------------------------------------------------------------==---===// + // Core attributes used by the DWARF printer. + // + + /// O - Stream to .s file. + raw_ostream &O; + + /// Asm - Target of Dwarf emission. + AsmPrinter *Asm; + + /// MAI - Target asm information. + const MCAsmInfo *MAI; + + /// TD - Target data. + const TargetData *TD; + + /// RI - Register Information. + const TargetRegisterInfo *RI; + + /// M - Current module. + Module *M; + + /// MF - Current machine function. + MachineFunction *MF; + + /// MMI - Collected machine module information. + MachineModuleInfo *MMI; + + /// SubprogramCount - The running count of functions being compiled. + unsigned SubprogramCount; + + /// Flavor - A unique string indicating what dwarf producer this is, used to + /// unique labels. + const char * const Flavor; + + /// SetCounter - A unique number for each '.set' directive. + unsigned SetCounter; + + DwarfPrinter(raw_ostream &OS, AsmPrinter *A, const MCAsmInfo *T, + const char *flavor); +public: + + //===------------------------------------------------------------------===// + // Accessors. + // + const AsmPrinter *getAsm() const { return Asm; } + MachineModuleInfo *getMMI() const { return MMI; } + const MCAsmInfo *getMCAsmInfo() const { return MAI; } + const TargetData *getTargetData() const { return TD; } + + void PrintRelDirective(bool Force32Bit = false, + bool isInSection = false) const; + + /// EOL - Print a newline character to asm stream. If a comment is present + /// then it will be printed first. Comments should not contain '\n'. + void EOL(const Twine &Comment) const; + + /// EmitEncodingByte - Emit a .byte 42 directive that corresponds to an + /// encoding. If verbose assembly output is enabled, we output comments + /// describing the encoding. Desc is a string saying what the encoding is + /// specifying (e.g. "LSDA"). + void EmitEncodingByte(unsigned Val, const char *Desc); + + /// EmitCFAByte - Emit a .byte 42 directive for a DW_CFA_xxx value. + void EmitCFAByte(unsigned Val); + + + /// EmitSLEB128 - emit the specified signed leb128 value. + void EmitSLEB128(int Value, const char *Desc) const; + + /// EmitULEB128 - emit the specified unsigned leb128 value. + void EmitULEB128(unsigned Value, const char *Desc = 0) const; + + + /// PrintLabelName - Print label name in form used by Dwarf writer. + /// + void PrintLabelName(const DWLabel &Label) const { + PrintLabelName(Label.getTag(), Label.getNumber()); + } + void PrintLabelName(const char *Tag, unsigned Number) const; + void PrintLabelName(const char *Tag, unsigned Number, + const char *Suffix) const; + + /// EmitLabel - Emit location label for internal use by Dwarf. + /// + void EmitLabel(const DWLabel &Label) const { + EmitLabel(Label.getTag(), Label.getNumber()); + } + void EmitLabel(const char *Tag, unsigned Number) const; + + /// EmitReference - Emit a reference to a label. + /// + void EmitReference(const DWLabel &Label, bool IsPCRelative = false, + bool Force32Bit = false) const { + EmitReference(Label.getTag(), Label.getNumber(), + IsPCRelative, Force32Bit); + } + void EmitReference(const char *Tag, unsigned Number, + bool IsPCRelative = false, + bool Force32Bit = false) const; + void EmitReference(const std::string &Name, bool IsPCRelative = false, + bool Force32Bit = false) const; + void EmitReference(const MCSymbol *Sym, bool IsPCRelative = false, + bool Force32Bit = false) const; + + /// EmitDifference - Emit the difference between two labels. Some + /// assemblers do not behave with absolute expressions with data directives, + /// so there is an option (needsSet) to use an intermediary set expression. + void EmitDifference(const DWLabel &LabelHi, const DWLabel &LabelLo, + bool IsSmall = false) { + EmitDifference(LabelHi.getTag(), LabelHi.getNumber(), + LabelLo.getTag(), LabelLo.getNumber(), + IsSmall); + } + void EmitDifference(const char *TagHi, unsigned NumberHi, + const char *TagLo, unsigned NumberLo, + bool IsSmall = false); + + void EmitSectionOffset(const char* Label, const char* Section, + unsigned LabelNumber, unsigned SectionNumber, + bool IsSmall = false, bool isEH = false, + bool useSet = true); + + /// EmitFrameMoves - Emit frame instructions to describe the layout of the + /// frame. + void EmitFrameMoves(const char *BaseLabel, unsigned BaseLabelID, + const std::vector<MachineMove> &Moves, bool isEH); }; } // end llvm namespace diff --git a/lib/CodeGen/AsmPrinter/Makefile b/lib/CodeGen/AsmPrinter/Makefile index 8f65d8d..b0071d0 100644 --- a/lib/CodeGen/AsmPrinter/Makefile +++ b/lib/CodeGen/AsmPrinter/Makefile @@ -1,4 +1,4 @@ -##===- lib/CodeGen/SelectionDAG/Makefile -------------------*- Makefile -*-===## +##===- lib/CodeGen/AsmPrinter/Makefile ---------------------*- Makefile -*-===## # # The LLVM Compiler Infrastructure # @@ -6,8 +6,9 @@ # License. See LICENSE.TXT for details. # ##===----------------------------------------------------------------------===## + LEVEL = ../../.. LIBRARYNAME = LLVMAsmPrinter -PARALLEL_DIRS = +CXXFLAGS = -fno-rtti include $(LEVEL)/Makefile.common diff --git a/lib/CodeGen/AsmPrinter/OcamlGCPrinter.cpp b/lib/CodeGen/AsmPrinter/OcamlGCPrinter.cpp index 9286ad5..3531ed6 100644 --- a/lib/CodeGen/AsmPrinter/OcamlGCPrinter.cpp +++ b/lib/CodeGen/AsmPrinter/OcamlGCPrinter.cpp @@ -21,7 +21,7 @@ #include "llvm/Target/TargetLoweringObjectFile.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Support/ErrorHandling.h" -#include "llvm/Support/raw_ostream.h" +#include "llvm/Support/FormattedStream.h" using namespace llvm; namespace { @@ -105,8 +105,7 @@ void OcamlGCMetadataPrinter::finishAssembly(raw_ostream &OS, AsmPrinter &AP, AP.OutStreamer.SwitchSection(AP.getObjFileLowering().getDataSection()); EmitCamlGlobal(getModule(), OS, AP, MAI, "data_end"); - OS << AddressDirective << 0; // FIXME: Why does ocaml emit this?? - AP.EOL(); + OS << AddressDirective << 0 << '\n'; // FIXME: Why does ocaml emit this?? AP.OutStreamer.SwitchSection(AP.getObjFileLowering().getDataSection()); EmitCamlGlobal(getModule(), OS, AP, MAI, "frametable"); @@ -140,14 +139,11 @@ void OcamlGCMetadataPrinter::finishAssembly(raw_ostream &OS, AsmPrinter &AP, } OS << AddressDirective - << MAI.getPrivateGlobalPrefix() << "label" << J->Num; - AP.EOL("call return address"); + << MAI.getPrivateGlobalPrefix() << "label" << J->Num << '\n'; AP.EmitInt16(FrameSize); - AP.EOL("stack frame size"); AP.EmitInt16(LiveCount); - AP.EOL("live root count"); for (GCFunctionInfo::live_iterator K = FI.live_begin(J), KE = FI.live_end(J); K != KE; ++K) { @@ -155,8 +151,7 @@ void OcamlGCMetadataPrinter::finishAssembly(raw_ostream &OS, AsmPrinter &AP, "GC root stack offset is outside of fixed stack frame and out " "of range for ocaml GC!"); - OS << "\t.word\t" << K->StackOffset; - AP.EOL("stack offset"); + AP.EmitInt32(K->StackOffset); } AP.EmitAlignment(AddressAlignLog); diff --git a/lib/CodeGen/CMakeLists.txt b/lib/CodeGen/CMakeLists.txt index 6bc808c..17072d3 100644 --- a/lib/CodeGen/CMakeLists.txt +++ b/lib/CodeGen/CMakeLists.txt @@ -21,7 +21,6 @@ add_llvm_library(LLVMCodeGen LiveStackAnalysis.cpp LiveVariables.cpp LowerSubregs.cpp - MachOCodeEmitter.cpp MachOWriter.cpp MachineBasicBlock.cpp MachineDominators.cpp @@ -38,7 +37,6 @@ add_llvm_library(LLVMCodeGen MachineSSAUpdater.cpp MachineSink.cpp MachineVerifier.cpp - MaxStackAlignment.cpp ObjectCodeEmitter.cpp OcamlGC.cpp OptimizeExts.cpp diff --git a/lib/CodeGen/DwarfEHPrepare.cpp b/lib/CodeGen/DwarfEHPrepare.cpp index 9b516ed..39fc85e 100644 --- a/lib/CodeGen/DwarfEHPrepare.cpp +++ b/lib/CodeGen/DwarfEHPrepare.cpp @@ -21,6 +21,7 @@ #include "llvm/IntrinsicInst.h" #include "llvm/Module.h" #include "llvm/Pass.h" +#include "llvm/MC/MCAsmInfo.h" #include "llvm/Target/TargetLowering.h" #include "llvm/Transforms/Utils/BasicBlockUtils.h" #include "llvm/Transforms/Utils/PromoteMemToReg.h" @@ -114,6 +115,9 @@ FunctionPass *llvm::createDwarfEHPass(const TargetLowering *tli, bool fast) { bool DwarfEHPrepare::NormalizeLandingPads() { bool Changed = false; + const MCAsmInfo *MAI = TLI->getTargetMachine().getMCAsmInfo(); + bool usingSjLjEH = MAI->getExceptionHandlingType() == ExceptionHandling::SjLj; + for (Function::iterator I = F->begin(), E = F->end(); I != E; ++I) { TerminatorInst *TI = I->getTerminator(); if (!isa<InvokeInst>(TI)) @@ -125,9 +129,18 @@ bool DwarfEHPrepare::NormalizeLandingPads() { // Check that only invoke unwind edges end at the landing pad. bool OnlyUnwoundTo = true; + bool SwitchOK = usingSjLjEH; for (pred_iterator PI = pred_begin(LPad), PE = pred_end(LPad); PI != PE; ++PI) { TerminatorInst *PT = (*PI)->getTerminator(); + // The SjLj dispatch block uses a switch instruction. This is effectively + // an unwind edge, so we can disregard it here. There will only ever + // be one dispatch, however, so if there are multiple switches, one + // of them truly is a normal edge, not an unwind edge. + if (SwitchOK && isa<SwitchInst>(PT)) { + SwitchOK = false; + continue; + } if (!isa<InvokeInst>(PT) || LPad == PT->getSuccessor(0)) { OnlyUnwoundTo = false; break; diff --git a/lib/CodeGen/ELFWriter.cpp b/lib/CodeGen/ELFWriter.cpp index 5e5f589..de45e09 100644 --- a/lib/CodeGen/ELFWriter.cpp +++ b/lib/CodeGen/ELFWriter.cpp @@ -45,6 +45,7 @@ #include "llvm/MC/MCContext.h" #include "llvm/MC/MCSectionELF.h" #include "llvm/MC/MCAsmInfo.h" +#include "llvm/Target/Mangler.h" #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetELFWriterInfo.h" #include "llvm/Target/TargetLowering.h" @@ -52,9 +53,8 @@ #include "llvm/Target/TargetMachine.h" #include "llvm/Support/Debug.h" #include "llvm/Support/ErrorHandling.h" -#include "llvm/Support/Mangler.h" #include "llvm/Support/raw_ostream.h" - +#include "llvm/ADT/SmallString.h" using namespace llvm; char ELFWriter::ID = 0; @@ -119,7 +119,7 @@ bool ELFWriter::doInitialization(Module &M) { // Initialize TargetLoweringObjectFile. const_cast<TargetLoweringObjectFile&>(TLOF).Initialize(OutContext, TM); - Mang = new Mangler(M); + Mang = new Mangler(*MAI); // ELF Header // ---------- @@ -703,10 +703,6 @@ bool ELFWriter::doFinalization(Module &M) { I != E; ++I) SymbolList.push_back(ELFSym::getExtSym(*I)); - // Emit non-executable stack note - if (MAI->getNonexecutableStackDirective()) - getNonExecStackSection(); - // Emit a symbol for each section created until now, skip null section for (unsigned i = 1, e = SectionList.size(); i < e; ++i) { ELFSection &ES = *SectionList[i]; @@ -906,9 +902,11 @@ void ELFWriter::EmitStringTable(const std::string &ModuleName) { ELFSym &Sym = *(*I); std::string Name; - if (Sym.isGlobalValue()) - Name.append(Mang->getMangledName(Sym.getGlobalValue())); - else if (Sym.isExternalSym()) + if (Sym.isGlobalValue()) { + SmallString<40> NameStr; + Mang->getNameWithPrefix(NameStr, Sym.getGlobalValue(), false); + Name.append(NameStr.begin(), NameStr.end()); + } else if (Sym.isExternalSym()) Name.append(Sym.getExternalSymbol()); else if (Sym.isFileType()) Name.append(ModuleName); diff --git a/lib/CodeGen/LLVMTargetMachine.cpp b/lib/CodeGen/LLVMTargetMachine.cpp index 2b5fd2c..837e184 100644 --- a/lib/CodeGen/LLVMTargetMachine.cpp +++ b/lib/CodeGen/LLVMTargetMachine.cpp @@ -17,6 +17,7 @@ #include "llvm/Assembly/PrintModulePass.h" #include "llvm/CodeGen/AsmPrinter.h" #include "llvm/CodeGen/Passes.h" +#include "llvm/CodeGen/FileWriters.h" #include "llvm/CodeGen/GCStrategy.h" #include "llvm/CodeGen/MachineFunctionAnalysis.h" #include "llvm/Target/TargetOptions.h" @@ -38,6 +39,8 @@ static cl::opt<bool> DisableBranchFold("disable-branch-fold", cl::Hidden, cl::desc("Disable branch folding")); static cl::opt<bool> DisableTailDuplicate("disable-tail-duplicate", cl::Hidden, cl::desc("Disable tail duplication")); +static cl::opt<bool> DisableEarlyTailDup("disable-early-taildup", cl::Hidden, + cl::desc("Disable pre-register allocation tail duplication")); static cl::opt<bool> DisableCodePlace("disable-code-place", cl::Hidden, cl::desc("Disable code placement")); static cl::opt<bool> DisableSSC("disable-ssc", cl::Hidden, @@ -76,9 +79,6 @@ EnableFastISelOption("fast-isel", cl::Hidden, static cl::opt<bool> EnableSplitGEPGVN("split-gep-gvn", cl::Hidden, cl::desc("Split GEPs and run no-load GVN")); -static cl::opt<bool> PreAllocTailDup("pre-regalloc-taildup", cl::Hidden, - cl::desc("Pre-register allocation tail duplication")); - LLVMTargetMachine::LLVMTargetMachine(const Target &T, const std::string &TargetTriple) : TargetMachine(T) { @@ -115,12 +115,11 @@ LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM, return FileModel::Error; return FileModel::AsmFile; case TargetMachine::ObjectFile: - if (getMachOWriterInfo()) + if (!addObjectFileEmitter(PM, OptLevel, Out)) return FileModel::MachOFile; else if (getELFWriterInfo()) - return FileModel::ElfFile; + return FileModel::ElfFile; } - return FileModel::Error; } @@ -137,6 +136,17 @@ bool LLVMTargetMachine::addAssemblyEmitter(PassManagerBase &PM, return false; } +bool LLVMTargetMachine::addObjectFileEmitter(PassManagerBase &PM, + CodeGenOpt::Level OptLevel, + formatted_raw_ostream &Out) { + MCCodeEmitter *Emitter = getTarget().createCodeEmitter(*this); + if (!Emitter) + return true; + + PM.add(createMachOWriter(Out, *this, getMCAsmInfo(), Emitter)); + return false; +} + /// addPassesToEmitFileFinish - If the passes to emit the specified file had to /// be split up (e.g., to add an object writer pass), this method can be used to /// finish up adding passes to emit the file, if necessary. @@ -340,8 +350,7 @@ bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM, } // Pre-ra tail duplication. - if (OptLevel != CodeGenOpt::None && - !DisableTailDuplicate && PreAllocTailDup) { + if (OptLevel != CodeGenOpt::None && !DisableEarlyTailDup) { PM.add(createTailDuplicatePass(true)); printAndVerify(PM, "After Pre-RegAlloc TailDuplicate", /* allowDoubleDefs= */ true); diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp index e0e2ec8..8746bf9 100644 --- a/lib/CodeGen/LiveIntervalAnalysis.cpp +++ b/lib/CodeGen/LiveIntervalAnalysis.cpp @@ -140,7 +140,10 @@ void LiveIntervals::printInstrs(raw_ostream &OS) const { << ":\t\t# derived from " << mbbi->getName() << "\n"; for (MachineBasicBlock::iterator mii = mbbi->begin(), mie = mbbi->end(); mii != mie; ++mii) { - OS << getInstructionIndex(mii) << '\t' << *mii; + if (mii->getOpcode()==TargetInstrInfo::DEBUG_VALUE) + OS << SlotIndex::getEmptyKey() << '\t' << *mii; + else + OS << getInstructionIndex(mii) << '\t' << *mii; } } } @@ -672,8 +675,6 @@ void LiveIntervals::computeIntervals() { SlotIndex MIIndex = getMBBStartIdx(MBB); DEBUG(dbgs() << MBB->getName() << ":\n"); - MachineBasicBlock::iterator MI = MBB->begin(), miEnd = MBB->end(); - // Create intervals for live-ins to this BB first. for (MachineBasicBlock::const_livein_iterator LI = MBB->livein_begin(), LE = MBB->livein_end(); LI != LE; ++LI) { @@ -689,8 +690,11 @@ void LiveIntervals::computeIntervals() { if (getInstructionFromIndex(MIIndex) == 0) MIIndex = indexes_->getNextNonNullIndex(MIIndex); - for (; MI != miEnd; ++MI) { + for (MachineBasicBlock::iterator MI = MBB->begin(), miEnd = MBB->end(); + MI != miEnd; ++MI) { DEBUG(dbgs() << MIIndex << "\t" << *MI); + if (MI->getOpcode()==TargetInstrInfo::DEBUG_VALUE) + continue; // Handle defs. for (int i = MI->getNumOperands() - 1; i >= 0; --i) { diff --git a/lib/CodeGen/MachO.h b/lib/CodeGen/MachO.h deleted file mode 100644 index f2b40fe..0000000 --- a/lib/CodeGen/MachO.h +++ /dev/null @@ -1,412 +0,0 @@ -//=== MachO.h - Mach-O structures and constants -----------------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file defines MachO . -// -//===----------------------------------------------------------------------===// - -#ifndef MACHO_H -#define MACHO_H - -#include "llvm/CodeGen/BinaryObject.h" -#include <string> -#include <vector> - -namespace llvm { - -class GlobalValue; -class MCAsmInfo; - -/// MachOSym - This struct contains information about each symbol that is -/// added to logical symbol table for the module. This is eventually -/// turned into a real symbol table in the file. -struct MachOSym { - const GlobalValue *GV; // The global value this corresponds to. - std::string GVName; // The mangled name of the global value. - uint32_t n_strx; // index into the string table - uint8_t n_type; // type flag - uint8_t n_sect; // section number or NO_SECT - int16_t n_desc; // see <mach-o/stab.h> - uint64_t n_value; // value for this symbol (or stab offset) - - // Constants for the n_sect field - // see <mach-o/nlist.h> - enum { NO_SECT = 0 }; // symbol is not in any section - - // Constants for the n_type field - // see <mach-o/nlist.h> - enum { N_UNDF = 0x0, // undefined, n_sect == NO_SECT - N_ABS = 0x2, // absolute, n_sect == NO_SECT - N_SECT = 0xe, // defined in section number n_sect - N_PBUD = 0xc, // prebound undefined (defined in a dylib) - N_INDR = 0xa // indirect - }; - // The following bits are OR'd into the types above. For example, a type - // of 0x0f would be an external N_SECT symbol (0x0e | 0x01). - enum { N_EXT = 0x01, // external symbol bit - N_PEXT = 0x10 // private external symbol bit - }; - - // Constants for the n_desc field - // see <mach-o/loader.h> - enum { REFERENCE_FLAG_UNDEFINED_NON_LAZY = 0, - REFERENCE_FLAG_UNDEFINED_LAZY = 1, - REFERENCE_FLAG_DEFINED = 2, - REFERENCE_FLAG_PRIVATE_DEFINED = 3, - REFERENCE_FLAG_PRIVATE_UNDEFINED_NON_LAZY = 4, - REFERENCE_FLAG_PRIVATE_UNDEFINED_LAZY = 5 - }; - enum { N_NO_DEAD_STRIP = 0x0020, // symbol is not to be dead stripped - N_WEAK_REF = 0x0040, // symbol is weak referenced - N_WEAK_DEF = 0x0080 // coalesced symbol is a weak definition - }; - - MachOSym(const GlobalValue *gv, std::string name, uint8_t sect, - const MCAsmInfo *MAI); - - struct SymCmp { - // FIXME: this does not appear to be sorting 'f' after 'F' - bool operator()(const MachOSym &LHS, const MachOSym &RHS) { - return LHS.GVName < RHS.GVName; - } - }; - - - /// PartitionByLocal - Simple boolean predicate that returns true if Sym is - /// a local symbol rather than an external symbol. - - static inline bool PartitionByLocal(const MachOSym &Sym) { - return (Sym.n_type & (MachOSym::N_EXT | MachOSym::N_PEXT)) == 0; - } - - /// PartitionByDefined - Simple boolean predicate that returns true if Sym is - /// defined in this module. - - static inline bool PartitionByDefined(const MachOSym &Sym) { - // FIXME: Do N_ABS or N_INDR count as defined? - return (Sym.n_type & MachOSym::N_SECT) == MachOSym::N_SECT; - } - -}; // end struct MachOSym - -/// MachOHeader - This struct contains the header information about a -/// specific architecture type/subtype pair that is emitted to the file. - -struct MachOHeader { - uint32_t magic; // mach magic number identifier - uint32_t filetype; // type of file - uint32_t ncmds; // number of load commands - uint32_t sizeofcmds; // the size of all the load commands - uint32_t flags; // flags - uint32_t reserved; // 64-bit only - - /// HeaderData - The actual data for the header which we are building - /// up for emission to the file. - std::vector<unsigned char> HeaderData; - - // Constants for the filetype field - // see <mach-o/loader.h> for additional info on the various types - enum { MH_OBJECT = 1, // relocatable object file - MH_EXECUTE = 2, // demand paged executable file - MH_FVMLIB = 3, // fixed VM shared library file - MH_CORE = 4, // core file - MH_PRELOAD = 5, // preloaded executable file - MH_DYLIB = 6, // dynamically bound shared library - MH_DYLINKER = 7, // dynamic link editor - MH_BUNDLE = 8, // dynamically bound bundle file - MH_DYLIB_STUB = 9, // shared library stub for static linking only - MH_DSYM = 10 // companion file wiht only debug sections - }; - - // Constants for the flags field - enum { MH_NOUNDEFS = 1 << 0, - // the object file has no undefined references - MH_INCRLINK = 1 << 1, - // the object file is the output of an incremental link against - // a base file and cannot be link edited again - MH_DYLDLINK = 1 << 2, - // the object file is input for the dynamic linker and cannot be - // statically link edited again. - MH_BINDATLOAD = 1 << 3, - // the object file's undefined references are bound by the - // dynamic linker when loaded. - MH_PREBOUND = 1 << 4, - // the file has its dynamic undefined references prebound - MH_SPLIT_SEGS = 1 << 5, - // the file has its read-only and read-write segments split - // see <mach/shared_memory_server.h> - MH_LAZY_INIT = 1 << 6, - // the shared library init routine is to be run lazily via - // catching memory faults to its writable segments (obsolete) - MH_TWOLEVEL = 1 << 7, - // the image is using two-level namespace bindings - MH_FORCE_FLAT = 1 << 8, - // the executable is forcing all images to use flat namespace - // bindings. - MH_NOMULTIDEFS = 1 << 8, - // this umbrella guarantees no multiple definitions of symbols - // in its sub-images so the two-level namespace hints can - // always be used. - MH_NOFIXPREBINDING = 1 << 10, - // do not have dyld notify the prebidning agent about this - // executable. - MH_PREBINDABLE = 1 << 11, - // the binary is not prebound but can have its prebinding - // redone. only used when MH_PREBOUND is not set. - MH_ALLMODSBOUND = 1 << 12, - // indicates that this binary binds to all two-level namespace - // modules of its dependent libraries. Only used when - // MH_PREBINDABLE and MH_TWOLEVEL are both set. - MH_SUBSECTIONS_VIA_SYMBOLS = 1 << 13, - // safe to divide up the sections into sub-sections via symbols - // for dead code stripping. - MH_CANONICAL = 1 << 14, - // the binary has been canonicalized via the unprebind operation - MH_WEAK_DEFINES = 1 << 15, - // the final linked image contains external weak symbols - MH_BINDS_TO_WEAK = 1 << 16, - // the final linked image uses weak symbols - MH_ALLOW_STACK_EXECUTION = 1 << 17 - // When this bit is set, all stacks in the task will be given - // stack execution privilege. Only used in MH_EXECUTE filetype - }; - - MachOHeader() : magic(0), filetype(0), ncmds(0), sizeofcmds(0), flags(0), - reserved(0) {} - - /// cmdSize - This routine returns the size of the MachOSection as written - /// to disk, depending on whether the destination is a 64 bit Mach-O file. - unsigned cmdSize(bool is64Bit) const { - if (is64Bit) - return 8 * sizeof(uint32_t); - else - return 7 * sizeof(uint32_t); - } - - /// setMagic - This routine sets the appropriate value for the 'magic' - /// field based on pointer size and endianness. - void setMagic(bool isLittleEndian, bool is64Bit) { - if (isLittleEndian) - if (is64Bit) magic = 0xcffaedfe; - else magic = 0xcefaedfe; - else - if (is64Bit) magic = 0xfeedfacf; - else magic = 0xfeedface; - } - -}; // end struct MachOHeader - -/// MachOSegment - This struct contains the necessary information to -/// emit the load commands for each section in the file. -struct MachOSegment { - uint32_t cmd; // LC_SEGMENT or LC_SEGMENT_64 - uint32_t cmdsize; // Total size of this struct and section commands - std::string segname; // segment name - uint64_t vmaddr; // address of this segment - uint64_t vmsize; // size of this segment, may be larger than filesize - uint64_t fileoff; // offset in file - uint64_t filesize; // amount to read from file - uint32_t maxprot; // maximum VM protection - uint32_t initprot; // initial VM protection - uint32_t nsects; // number of sections in this segment - uint32_t flags; // flags - - // The following constants are getting pulled in by one of the - // system headers, which creates a neat clash with the enum. -#if !defined(VM_PROT_NONE) -#define VM_PROT_NONE 0x00 -#endif -#if !defined(VM_PROT_READ) -#define VM_PROT_READ 0x01 -#endif -#if !defined(VM_PROT_WRITE) -#define VM_PROT_WRITE 0x02 -#endif -#if !defined(VM_PROT_EXECUTE) -#define VM_PROT_EXECUTE 0x04 -#endif -#if !defined(VM_PROT_ALL) -#define VM_PROT_ALL 0x07 -#endif - - // Constants for the vm protection fields - // see <mach-o/vm_prot.h> - enum { SEG_VM_PROT_NONE = VM_PROT_NONE, - SEG_VM_PROT_READ = VM_PROT_READ, // read permission - SEG_VM_PROT_WRITE = VM_PROT_WRITE, // write permission - SEG_VM_PROT_EXECUTE = VM_PROT_EXECUTE, - SEG_VM_PROT_ALL = VM_PROT_ALL - }; - - // Constants for the cmd field - // see <mach-o/loader.h> - enum { LC_SEGMENT = 0x01, // segment of this file to be mapped - LC_SEGMENT_64 = 0x19 // 64-bit segment of this file to be mapped - }; - - /// cmdSize - This routine returns the size of the MachOSection as written - /// to disk, depending on whether the destination is a 64 bit Mach-O file. - unsigned cmdSize(bool is64Bit) const { - if (is64Bit) - return 6 * sizeof(uint32_t) + 4 * sizeof(uint64_t) + 16; - else - return 10 * sizeof(uint32_t) + 16; // addresses only 32 bits - } - - MachOSegment(const std::string &seg, bool is64Bit) - : cmd(is64Bit ? LC_SEGMENT_64 : LC_SEGMENT), cmdsize(0), segname(seg), - vmaddr(0), vmsize(0), fileoff(0), filesize(0), maxprot(VM_PROT_ALL), - initprot(VM_PROT_ALL), nsects(0), flags(0) { } -}; - -/// MachOSection - This struct contains information about each section in a -/// particular segment that is emitted to the file. This is eventually -/// turned into the SectionCommand in the load command for a particlar -/// segment. - -struct MachOSection : public BinaryObject { - std::string sectname; // name of this section, - std::string segname; // segment this section goes in - uint64_t addr; // memory address of this section - uint32_t offset; // file offset of this section - uint32_t align; // section alignment (power of 2) - uint32_t reloff; // file offset of relocation entries - uint32_t nreloc; // number of relocation entries - uint32_t flags; // flags (section type and attributes) - uint32_t reserved1; // reserved (for offset or index) - uint32_t reserved2; // reserved (for count or sizeof) - uint32_t reserved3; // reserved (64 bit only) - - /// A unique number for this section, which will be used to match symbols - /// to the correct section. - uint32_t Index; - - /// RelocBuffer - A buffer to hold the mach-o relocations before we write - /// them out at the appropriate location in the file. - std::vector<unsigned char> RelocBuffer; - - // Constants for the section types (low 8 bits of flags field) - // see <mach-o/loader.h> - enum { S_REGULAR = 0, - // regular section - S_ZEROFILL = 1, - // zero fill on demand section - S_CSTRING_LITERALS = 2, - // section with only literal C strings - S_4BYTE_LITERALS = 3, - // section with only 4 byte literals - S_8BYTE_LITERALS = 4, - // section with only 8 byte literals - S_LITERAL_POINTERS = 5, - // section with only pointers to literals - S_NON_LAZY_SYMBOL_POINTERS = 6, - // section with only non-lazy symbol pointers - S_LAZY_SYMBOL_POINTERS = 7, - // section with only lazy symbol pointers - S_SYMBOL_STUBS = 8, - // section with only symbol stubs - // byte size of stub in the reserved2 field - S_MOD_INIT_FUNC_POINTERS = 9, - // section with only function pointers for initialization - S_MOD_TERM_FUNC_POINTERS = 10, - // section with only function pointers for termination - S_COALESCED = 11, - // section contains symbols that are coalesced - S_GB_ZEROFILL = 12, - // zero fill on demand section (that can be larger than 4GB) - S_INTERPOSING = 13, - // section with only pairs of function pointers for interposing - S_16BYTE_LITERALS = 14 - // section with only 16 byte literals - }; - - // Constants for the section flags (high 24 bits of flags field) - // see <mach-o/loader.h> - enum { S_ATTR_PURE_INSTRUCTIONS = 1 << 31, - // section contains only true machine instructions - S_ATTR_NO_TOC = 1 << 30, - // section contains coalesced symbols that are not to be in a - // ranlib table of contents - S_ATTR_STRIP_STATIC_SYMS = 1 << 29, - // ok to strip static symbols in this section in files with the - // MY_DYLDLINK flag - S_ATTR_NO_DEAD_STRIP = 1 << 28, - // no dead stripping - S_ATTR_LIVE_SUPPORT = 1 << 27, - // blocks are live if they reference live blocks - S_ATTR_SELF_MODIFYING_CODE = 1 << 26, - // used with i386 code stubs written on by dyld - S_ATTR_DEBUG = 1 << 25, - // a debug section - S_ATTR_SOME_INSTRUCTIONS = 1 << 10, - // section contains some machine instructions - S_ATTR_EXT_RELOC = 1 << 9, - // section has external relocation entries - S_ATTR_LOC_RELOC = 1 << 8 - // section has local relocation entries - }; - - /// cmdSize - This routine returns the size of the MachOSection as written - /// to disk, depending on whether the destination is a 64 bit Mach-O file. - unsigned cmdSize(bool is64Bit) const { - if (is64Bit) - return 7 * sizeof(uint32_t) + 2 * sizeof(uint64_t) + 32; - else - return 9 * sizeof(uint32_t) + 32; // addresses only 32 bits - } - - MachOSection(const std::string &seg, const std::string §) - : BinaryObject(), sectname(sect), segname(seg), addr(0), offset(0), - align(2), reloff(0), nreloc(0), flags(0), reserved1(0), reserved2(0), - reserved3(0) { } - -}; // end struct MachOSection - -/// MachOSymTab - This struct contains information about the offsets and -/// size of symbol table information. -/// segment. -struct MachODySymTab { - uint32_t cmd; // LC_DYSYMTAB - uint32_t cmdsize; // sizeof(MachODySymTab) - uint32_t ilocalsym; // index to local symbols - uint32_t nlocalsym; // number of local symbols - uint32_t iextdefsym; // index to externally defined symbols - uint32_t nextdefsym; // number of externally defined symbols - uint32_t iundefsym; // index to undefined symbols - uint32_t nundefsym; // number of undefined symbols - uint32_t tocoff; // file offset to table of contents - uint32_t ntoc; // number of entries in table of contents - uint32_t modtaboff; // file offset to module table - uint32_t nmodtab; // number of module table entries - uint32_t extrefsymoff; // offset to referenced symbol table - uint32_t nextrefsyms; // number of referenced symbol table entries - uint32_t indirectsymoff; // file offset to the indirect symbol table - uint32_t nindirectsyms; // number of indirect symbol table entries - uint32_t extreloff; // offset to external relocation entries - uint32_t nextrel; // number of external relocation entries - uint32_t locreloff; // offset to local relocation entries - uint32_t nlocrel; // number of local relocation entries - - // Constants for the cmd field - // see <mach-o/loader.h> - enum { LC_DYSYMTAB = 0x0B // dynamic link-edit symbol table info - }; - - MachODySymTab() : cmd(LC_DYSYMTAB), cmdsize(20 * sizeof(uint32_t)), - ilocalsym(0), nlocalsym(0), iextdefsym(0), nextdefsym(0), - iundefsym(0), nundefsym(0), tocoff(0), ntoc(0), modtaboff(0), - nmodtab(0), extrefsymoff(0), nextrefsyms(0), indirectsymoff(0), - nindirectsyms(0), extreloff(0), nextrel(0), locreloff(0), nlocrel(0) {} - -}; // end struct MachODySymTab - -} // end namespace llvm - -#endif - diff --git a/lib/CodeGen/MachOCodeEmitter.cpp b/lib/CodeGen/MachOCodeEmitter.cpp deleted file mode 100644 index 1318477..0000000 --- a/lib/CodeGen/MachOCodeEmitter.cpp +++ /dev/null @@ -1,193 +0,0 @@ -//===-- MachOEmitter.cpp - Target-independent Mach-O Emitter code --------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// - -#include "MachO.h" -#include "MachOWriter.h" -#include "MachOCodeEmitter.h" -#include "llvm/Constants.h" -#include "llvm/DerivedTypes.h" -#include "llvm/Function.h" -#include "llvm/CodeGen/MachineConstantPool.h" -#include "llvm/CodeGen/MachineFunction.h" -#include "llvm/CodeGen/MachineJumpTableInfo.h" -#include "llvm/CodeGen/MachineRelocation.h" -#include "llvm/MC/MCAsmInfo.h" -#include "llvm/Target/TargetData.h" -#include "llvm/Target/TargetMachine.h" -#include "llvm/Support/ErrorHandling.h" -#include "llvm/Support/Mangler.h" -#include "llvm/Support/OutputBuffer.h" -#include <vector> - -//===----------------------------------------------------------------------===// -// MachOCodeEmitter Implementation -//===----------------------------------------------------------------------===// - -namespace llvm { - -MachOCodeEmitter::MachOCodeEmitter(MachOWriter &mow, MachOSection &mos) : - ObjectCodeEmitter(&mos), MOW(mow), TM(MOW.TM) { - is64Bit = TM.getTargetData()->getPointerSizeInBits() == 64; - isLittleEndian = TM.getTargetData()->isLittleEndian(); - MAI = TM.getMCAsmInfo(); -} - -/// startFunction - This callback is invoked when a new machine function is -/// about to be emitted. - -void MachOCodeEmitter::startFunction(MachineFunction &MF) { - const TargetData *TD = TM.getTargetData(); - const Function *F = MF.getFunction(); - - // Align the output buffer to the appropriate alignment, power of 2. - unsigned FnAlign = F->getAlignment(); - unsigned TDAlign = TD->getPrefTypeAlignment(F->getType()); - unsigned Align = Log2_32(std::max(FnAlign, TDAlign)); - assert(!(Align & (Align-1)) && "Alignment is not a power of two!"); - - // Get the Mach-O Section that this function belongs in. - MachOSection *MOS = MOW.getTextSection(); - - // Upgrade the section alignment if required. - if (MOS->align < Align) MOS->align = Align; - - MOS->emitAlignment(Align); - - // Create symbol for function entry - const GlobalValue *FuncV = MF.getFunction(); - MachOSym FnSym(FuncV, MOW.Mang->getMangledName(FuncV), MOS->Index, MAI); - FnSym.n_value = getCurrentPCOffset(); - - // add it to the symtab. - MOW.SymbolTable.push_back(FnSym); -} - -/// finishFunction - This callback is invoked after the function is completely -/// finished. - -bool MachOCodeEmitter::finishFunction(MachineFunction &MF) { - - // Get the Mach-O Section that this function belongs in. - MachOSection *MOS = MOW.getTextSection(); - - // Emit constant pool to appropriate section(s) - emitConstantPool(MF.getConstantPool()); - - // Emit jump tables to appropriate section - emitJumpTables(MF.getJumpTableInfo()); - - // If we have emitted any relocations to function-specific objects such as - // basic blocks, constant pools entries, or jump tables, record their - // addresses now so that we can rewrite them with the correct addresses - // later. - for (unsigned i = 0, e = Relocations.size(); i != e; ++i) { - MachineRelocation &MR = Relocations[i]; - intptr_t Addr; - - if (MR.isBasicBlock()) { - Addr = getMachineBasicBlockAddress(MR.getBasicBlock()); - MR.setConstantVal(MOS->Index); - MR.setResultPointer((void*)Addr); - } else if (MR.isJumpTableIndex()) { - Addr = getJumpTableEntryAddress(MR.getJumpTableIndex()); - MR.setConstantVal(MOW.getJumpTableSection()->Index); - MR.setResultPointer((void*)Addr); - } else if (MR.isConstantPoolIndex()) { - Addr = getConstantPoolEntryAddress(MR.getConstantPoolIndex()); - MR.setConstantVal(CPSections[MR.getConstantPoolIndex()]); - MR.setResultPointer((void*)Addr); - } else if (MR.isGlobalValue()) { - // FIXME: This should be a set or something that uniques - MOW.PendingGlobals.push_back(MR.getGlobalValue()); - } else { - llvm_unreachable("Unhandled relocation type"); - } - MOS->addRelocation(MR); - } - Relocations.clear(); - - // Clear per-function data structures. - CPLocations.clear(); - CPSections.clear(); - JTLocations.clear(); - MBBLocations.clear(); - - return false; -} - -/// emitConstantPool - For each constant pool entry, figure out which section -/// the constant should live in, allocate space for it, and emit it to the -/// Section data buffer. -void MachOCodeEmitter::emitConstantPool(MachineConstantPool *MCP) { - const std::vector<MachineConstantPoolEntry> &CP = MCP->getConstants(); - if (CP.empty()) return; - - // FIXME: handle PIC codegen - assert(TM.getRelocationModel() != Reloc::PIC_ && - "PIC codegen not yet handled for mach-o jump tables!"); - - // Although there is no strict necessity that I am aware of, we will do what - // gcc for OS X does and put each constant pool entry in a section of constant - // objects of a certain size. That means that float constants go in the - // literal4 section, and double objects go in literal8, etc. - // - // FIXME: revisit this decision if we ever do the "stick everything into one - // "giant object for PIC" optimization. - for (unsigned i = 0, e = CP.size(); i != e; ++i) { - const Type *Ty = CP[i].getType(); - unsigned Size = TM.getTargetData()->getTypeAllocSize(Ty); - - MachOSection *Sec = MOW.getConstSection(CP[i].Val.ConstVal); - OutputBuffer SecDataOut(Sec->getData(), is64Bit, isLittleEndian); - - CPLocations.push_back(Sec->size()); - CPSections.push_back(Sec->Index); - - // Allocate space in the section for the global. - // FIXME: need alignment? - // FIXME: share between here and AddSymbolToSection? - for (unsigned j = 0; j < Size; ++j) - SecDataOut.outbyte(0); - - MachOWriter::InitMem(CP[i].Val.ConstVal, CPLocations[i], - TM.getTargetData(), Sec); - } -} - -/// emitJumpTables - Emit all the jump tables for a given jump table info -/// record to the appropriate section. -void MachOCodeEmitter::emitJumpTables(MachineJumpTableInfo *MJTI) { - const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables(); - if (JT.empty()) return; - - // FIXME: handle PIC codegen - assert(TM.getRelocationModel() != Reloc::PIC_ && - "PIC codegen not yet handled for mach-o jump tables!"); - - MachOSection *Sec = MOW.getJumpTableSection(); - unsigned TextSecIndex = MOW.getTextSection()->Index; - OutputBuffer SecDataOut(Sec->getData(), is64Bit, isLittleEndian); - - for (unsigned i = 0, e = JT.size(); i != e; ++i) { - // For each jump table, record its offset from the start of the section, - // reserve space for the relocations to the MBBs, and add the relocations. - const std::vector<MachineBasicBlock*> &MBBs = JT[i].MBBs; - JTLocations.push_back(Sec->size()); - for (unsigned mi = 0, me = MBBs.size(); mi != me; ++mi) { - MachineRelocation MR(MOW.GetJTRelocation(Sec->size(), MBBs[mi])); - MR.setResultPointer((void *)JTLocations[i]); - MR.setConstantVal(TextSecIndex); - Sec->addRelocation(MR); - SecDataOut.outaddr(0); - } - } -} - -} // end namespace llvm - diff --git a/lib/CodeGen/MachOCodeEmitter.h b/lib/CodeGen/MachOCodeEmitter.h deleted file mode 100644 index 4752446..0000000 --- a/lib/CodeGen/MachOCodeEmitter.h +++ /dev/null @@ -1,69 +0,0 @@ -//===-- MachOEmitter.h - Target-independent Mach-O Emitter class ----------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// - -#ifndef MACHOCODEEMITTER_H -#define MACHOCODEEMITTER_H - -#include "llvm/CodeGen/ObjectCodeEmitter.h" -#include <map> - -namespace llvm { - -class MachOWriter; - -/// MachOCodeEmitter - This class is used by the MachOWriter to emit the code -/// for functions to the Mach-O file. - -class MachOCodeEmitter : public ObjectCodeEmitter { - MachOWriter &MOW; - - /// Target machine description. - TargetMachine &TM; - - /// is64Bit/isLittleEndian - This information is inferred from the target - /// machine directly, indicating what header values and flags to set. - bool is64Bit, isLittleEndian; - - const MCAsmInfo *MAI; - - /// Relocations - These are the relocations that the function needs, as - /// emitted. - std::vector<MachineRelocation> Relocations; - - std::map<uint64_t, uintptr_t> Labels; - -public: - MachOCodeEmitter(MachOWriter &mow, MachOSection &mos); - - virtual void startFunction(MachineFunction &MF); - virtual bool finishFunction(MachineFunction &MF); - - virtual void addRelocation(const MachineRelocation &MR) { - Relocations.push_back(MR); - } - - void emitConstantPool(MachineConstantPool *MCP); - void emitJumpTables(MachineJumpTableInfo *MJTI); - - virtual void emitLabel(uint64_t LabelID) { - Labels[LabelID] = getCurrentPCOffset(); - } - - virtual uintptr_t getLabelAddress(uint64_t Label) const { - return Labels.find(Label)->second; - } - - virtual void setModuleInfo(llvm::MachineModuleInfo* MMI) { } - -}; // end class MachOCodeEmitter - -} // end namespace llvm - -#endif - diff --git a/lib/CodeGen/MachOWriter.cpp b/lib/CodeGen/MachOWriter.cpp index 337eab1..e8bbe21 100644 --- a/lib/CodeGen/MachOWriter.cpp +++ b/lib/CodeGen/MachOWriter.cpp @@ -22,33 +22,31 @@ // //===----------------------------------------------------------------------===// -#include "MachO.h" #include "MachOWriter.h" -#include "MachOCodeEmitter.h" -#include "llvm/Constants.h" -#include "llvm/DerivedTypes.h" -#include "llvm/Module.h" -#include "llvm/PassManager.h" +#include "llvm/Function.h" +#include "llvm/CodeGen/FileWriters.h" +#include "llvm/CodeGen/MachineFunction.h" #include "llvm/MC/MCAsmInfo.h" -#include "llvm/Target/TargetData.h" -#include "llvm/Target/TargetMachine.h" -#include "llvm/Target/TargetMachOWriterInfo.h" -#include "llvm/Support/Debug.h" -#include "llvm/Support/Mangler.h" -#include "llvm/Support/OutputBuffer.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCCodeEmitter.h" +#include "llvm/MC/MCInst.h" +#include "llvm/MC/MCStreamer.h" #include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/FormattedStream.h" #include "llvm/Support/raw_ostream.h" +#include "llvm/Target/Mangler.h" +#include "llvm/Target/TargetData.h" +#include "llvm/Target/TargetLowering.h" +#include "llvm/Target/TargetLoweringObjectFile.h" +using namespace llvm; -namespace llvm { - -/// AddMachOWriter - Concrete function to add the Mach-O writer to the function -/// pass manager. -ObjectCodeEmitter *AddMachOWriter(PassManagerBase &PM, - raw_ostream &O, - TargetMachine &TM) { - MachOWriter *MOW = new MachOWriter(O, TM); - PM.add(MOW); - return MOW->getObjectCodeEmitter(); +namespace llvm { +MachineFunctionPass *createMachOWriter(formatted_raw_ostream &O, + TargetMachine &TM, + const MCAsmInfo *T, + MCCodeEmitter *MCE) { + return new MachOWriter(O, TM, T, MCE); +} } //===----------------------------------------------------------------------===// @@ -57,722 +55,71 @@ ObjectCodeEmitter *AddMachOWriter(PassManagerBase &PM, char MachOWriter::ID = 0; -MachOWriter::MachOWriter(raw_ostream &o, TargetMachine &tm) - : MachineFunctionPass(&ID), O(o), TM(tm) { - is64Bit = TM.getTargetData()->getPointerSizeInBits() == 64; - isLittleEndian = TM.getTargetData()->isLittleEndian(); - - MAI = TM.getMCAsmInfo(); - - // Create the machine code emitter object for this target. - MachOCE = new MachOCodeEmitter(*this, *getTextSection(true)); +MachOWriter::MachOWriter(formatted_raw_ostream &o, TargetMachine &tm, + const MCAsmInfo *T, MCCodeEmitter *MCE) + : MachineFunctionPass(&ID), O(o), TM(tm), MAI(T), MCCE(MCE), + OutContext(*new MCContext()), + OutStreamer(*createMachOStreamer(OutContext, O, MCCE)) { } MachOWriter::~MachOWriter() { - delete MachOCE; + delete &OutStreamer; + delete &OutContext; + delete MCCE; } bool MachOWriter::doInitialization(Module &M) { - // Set the magic value, now that we know the pointer size and endianness - Header.setMagic(isLittleEndian, is64Bit); - - // Set the file type - // FIXME: this only works for object files, we do not support the creation - // of dynamic libraries or executables at this time. - Header.filetype = MachOHeader::MH_OBJECT; + // Initialize TargetLoweringObjectFile. + TM.getTargetLowering()->getObjFileLowering().Initialize(OutContext, TM); - Mang = new Mangler(M); - return false; -} - -bool MachOWriter::runOnMachineFunction(MachineFunction &MF) { return false; } /// doFinalization - Now that the module has been completely processed, emit /// the Mach-O file to 'O'. bool MachOWriter::doFinalization(Module &M) { - // FIXME: we don't handle debug info yet, we should probably do that. - // Okay, the.text section has been completed, build the .data, .bss, and - // "common" sections next. - - for (Module::global_iterator I = M.global_begin(), E = M.global_end(); - I != E; ++I) - EmitGlobal(I); - - // Emit the header and load commands. - EmitHeaderAndLoadCommands(); - - // Emit the various sections and their relocation info. - EmitSections(); - EmitRelocations(); - - // Write the symbol table and the string table to the end of the file. - O.write((char*)&SymT[0], SymT.size()); - O.write((char*)&StrT[0], StrT.size()); - - // We are done with the abstract symbols. - SectionList.clear(); - SymbolTable.clear(); - DynamicSymbolTable.clear(); - - // Release the name mangler object. - delete Mang; Mang = 0; + OutStreamer.Finish(); return false; } -// getConstSection - Get constant section for Constant 'C' -MachOSection *MachOWriter::getConstSection(Constant *C) { - const ConstantArray *CVA = dyn_cast<ConstantArray>(C); - if (CVA && CVA->isCString()) - return getSection("__TEXT", "__cstring", - MachOSection::S_CSTRING_LITERALS); - - const Type *Ty = C->getType(); - if (Ty->isPrimitiveType() || Ty->isInteger()) { - unsigned Size = TM.getTargetData()->getTypeAllocSize(Ty); - switch(Size) { - default: break; // Fall through to __TEXT,__const - case 4: - return getSection("__TEXT", "__literal4", - MachOSection::S_4BYTE_LITERALS); - case 8: - return getSection("__TEXT", "__literal8", - MachOSection::S_8BYTE_LITERALS); - case 16: - return getSection("__TEXT", "__literal16", - MachOSection::S_16BYTE_LITERALS); - } - } - return getSection("__TEXT", "__const"); -} - -// getJumpTableSection - Select the Jump Table section -MachOSection *MachOWriter::getJumpTableSection() { - if (TM.getRelocationModel() == Reloc::PIC_) - return getTextSection(false); - else - return getSection("__TEXT", "__const"); -} - -// getSection - Return the section with the specified name, creating a new -// section if one does not already exist. -MachOSection *MachOWriter::getSection(const std::string &seg, - const std::string §, - unsigned Flags /* = 0 */ ) { - MachOSection *MOS = SectionLookup[seg+sect]; - if (MOS) return MOS; - - MOS = new MachOSection(seg, sect); - SectionList.push_back(MOS); - MOS->Index = SectionList.size(); - MOS->flags = MachOSection::S_REGULAR | Flags; - SectionLookup[seg+sect] = MOS; - return MOS; -} - -// getTextSection - Return text section with different flags for code/data -MachOSection *MachOWriter::getTextSection(bool isCode /* = true */ ) { - if (isCode) - return getSection("__TEXT", "__text", - MachOSection::S_ATTR_PURE_INSTRUCTIONS | - MachOSection::S_ATTR_SOME_INSTRUCTIONS); - else - return getSection("__TEXT", "__text"); -} - -MachOSection *MachOWriter::getBSSSection() { - return getSection("__DATA", "__bss", MachOSection::S_ZEROFILL); -} - -// GetJTRelocation - Get a relocation a new BB relocation based -// on target information. -MachineRelocation MachOWriter::GetJTRelocation(unsigned Offset, - MachineBasicBlock *MBB) const { - return TM.getMachOWriterInfo()->GetJTRelocation(Offset, MBB); -} - -// GetTargetRelocation - Returns the number of relocations. -unsigned MachOWriter::GetTargetRelocation(MachineRelocation &MR, - unsigned FromIdx, unsigned ToAddr, - unsigned ToIndex, OutputBuffer &RelocOut, - OutputBuffer &SecOut, bool Scattered, - bool Extern) { - return TM.getMachOWriterInfo()->GetTargetRelocation(MR, FromIdx, ToAddr, - ToIndex, RelocOut, - SecOut, Scattered, - Extern); -} - -void MachOWriter::AddSymbolToSection(MachOSection *Sec, GlobalVariable *GV) { - const Type *Ty = GV->getType()->getElementType(); - unsigned Size = TM.getTargetData()->getTypeAllocSize(Ty); - unsigned Align = TM.getTargetData()->getPreferredAlignment(GV); - - // Reserve space in the .bss section for this symbol while maintaining the - // desired section alignment, which must be at least as much as required by - // this symbol. - OutputBuffer SecDataOut(Sec->getData(), is64Bit, isLittleEndian); - - if (Align) { - Align = Log2_32(Align); - Sec->align = std::max(unsigned(Sec->align), Align); - - Sec->emitAlignment(Sec->align); - } - // Globals without external linkage apparently do not go in the symbol table. - if (!GV->hasLocalLinkage()) { - MachOSym Sym(GV, Mang->getMangledName(GV), Sec->Index, MAI); - Sym.n_value = Sec->size(); - SymbolTable.push_back(Sym); - } - - // Record the offset of the symbol, and then allocate space for it. - // FIXME: remove when we have unified size + output buffer - - // Now that we know what section the GlovalVariable is going to be emitted - // into, update our mappings. - // FIXME: We may also need to update this when outputting non-GlobalVariable - // GlobalValues such as functions. - - GVSection[GV] = Sec; - GVOffset[GV] = Sec->size(); - - // Allocate space in the section for the global. - for (unsigned i = 0; i < Size; ++i) - SecDataOut.outbyte(0); -} - -void MachOWriter::EmitGlobal(GlobalVariable *GV) { - const Type *Ty = GV->getType()->getElementType(); - unsigned Size = TM.getTargetData()->getTypeAllocSize(Ty); - bool NoInit = !GV->hasInitializer(); - - // If this global has a zero initializer, it is part of the .bss or common - // section. - if (NoInit || GV->getInitializer()->isNullValue()) { - // If this global is part of the common block, add it now. Variables are - // part of the common block if they are zero initialized and allowed to be - // merged with other symbols. - if (NoInit || GV->hasLinkOnceLinkage() || GV->hasWeakLinkage() || - GV->hasCommonLinkage()) { - MachOSym ExtOrCommonSym(GV, Mang->getMangledName(GV), - MachOSym::NO_SECT, MAI); - // For undefined (N_UNDF) external (N_EXT) types, n_value is the size in - // bytes of the symbol. - ExtOrCommonSym.n_value = Size; - SymbolTable.push_back(ExtOrCommonSym); - // Remember that we've seen this symbol - GVOffset[GV] = Size; - return; - } - // Otherwise, this symbol is part of the .bss section. - MachOSection *BSS = getBSSSection(); - AddSymbolToSection(BSS, GV); - return; - } - - // Scalar read-only data goes in a literal section if the scalar is 4, 8, or - // 16 bytes, or a cstring. Other read only data goes into a regular const - // section. Read-write data goes in the data section. - MachOSection *Sec = GV->isConstant() ? getConstSection(GV->getInitializer()) : - getDataSection(); - AddSymbolToSection(Sec, GV); - InitMem(GV->getInitializer(), GVOffset[GV], TM.getTargetData(), Sec); -} - - - -void MachOWriter::EmitHeaderAndLoadCommands() { - // Step #0: Fill in the segment load command size, since we need it to figure - // out the rest of the header fields - - MachOSegment SEG("", is64Bit); - SEG.nsects = SectionList.size(); - SEG.cmdsize = SEG.cmdSize(is64Bit) + - SEG.nsects * SectionList[0]->cmdSize(is64Bit); - - // Step #1: calculate the number of load commands. We always have at least - // one, for the LC_SEGMENT load command, plus two for the normal - // and dynamic symbol tables, if there are any symbols. - Header.ncmds = SymbolTable.empty() ? 1 : 3; - - // Step #2: calculate the size of the load commands - Header.sizeofcmds = SEG.cmdsize; - if (!SymbolTable.empty()) - Header.sizeofcmds += SymTab.cmdsize + DySymTab.cmdsize; - - // Step #3: write the header to the file - // Local alias to shortenify coming code. - std::vector<unsigned char> &FH = Header.HeaderData; - OutputBuffer FHOut(FH, is64Bit, isLittleEndian); - - FHOut.outword(Header.magic); - FHOut.outword(TM.getMachOWriterInfo()->getCPUType()); - FHOut.outword(TM.getMachOWriterInfo()->getCPUSubType()); - FHOut.outword(Header.filetype); - FHOut.outword(Header.ncmds); - FHOut.outword(Header.sizeofcmds); - FHOut.outword(Header.flags); - if (is64Bit) - FHOut.outword(Header.reserved); - - // Step #4: Finish filling in the segment load command and write it out - for (std::vector<MachOSection*>::iterator I = SectionList.begin(), - E = SectionList.end(); I != E; ++I) - SEG.filesize += (*I)->size(); - - SEG.vmsize = SEG.filesize; - SEG.fileoff = Header.cmdSize(is64Bit) + Header.sizeofcmds; - - FHOut.outword(SEG.cmd); - FHOut.outword(SEG.cmdsize); - FHOut.outstring(SEG.segname, 16); - FHOut.outaddr(SEG.vmaddr); - FHOut.outaddr(SEG.vmsize); - FHOut.outaddr(SEG.fileoff); - FHOut.outaddr(SEG.filesize); - FHOut.outword(SEG.maxprot); - FHOut.outword(SEG.initprot); - FHOut.outword(SEG.nsects); - FHOut.outword(SEG.flags); - - // Step #5: Finish filling in the fields of the MachOSections - uint64_t currentAddr = 0; - for (std::vector<MachOSection*>::iterator I = SectionList.begin(), - E = SectionList.end(); I != E; ++I) { - MachOSection *MOS = *I; - MOS->addr = currentAddr; - MOS->offset = currentAddr + SEG.fileoff; - // FIXME: do we need to do something with alignment here? - currentAddr += MOS->size(); - } - - // Step #6: Emit the symbol table to temporary buffers, so that we know the - // size of the string table when we write the next load command. This also - // sorts and assigns indices to each of the symbols, which is necessary for - // emitting relocations to externally-defined objects. - BufferSymbolAndStringTable(); - - // Step #7: Calculate the number of relocations for each section and write out - // the section commands for each section - currentAddr += SEG.fileoff; - for (std::vector<MachOSection*>::iterator I = SectionList.begin(), - E = SectionList.end(); I != E; ++I) { - MachOSection *MOS = *I; - - // Convert the relocations to target-specific relocations, and fill in the - // relocation offset for this section. - CalculateRelocations(*MOS); - MOS->reloff = MOS->nreloc ? currentAddr : 0; - currentAddr += MOS->nreloc * 8; - - // write the finalized section command to the output buffer - FHOut.outstring(MOS->sectname, 16); - FHOut.outstring(MOS->segname, 16); - FHOut.outaddr(MOS->addr); - FHOut.outaddr(MOS->size()); - FHOut.outword(MOS->offset); - FHOut.outword(MOS->align); - FHOut.outword(MOS->reloff); - FHOut.outword(MOS->nreloc); - FHOut.outword(MOS->flags); - FHOut.outword(MOS->reserved1); - FHOut.outword(MOS->reserved2); - if (is64Bit) - FHOut.outword(MOS->reserved3); - } - - // Step #8: Emit LC_SYMTAB/LC_DYSYMTAB load commands - SymTab.symoff = currentAddr; - SymTab.nsyms = SymbolTable.size(); - SymTab.stroff = SymTab.symoff + SymT.size(); - SymTab.strsize = StrT.size(); - FHOut.outword(SymTab.cmd); - FHOut.outword(SymTab.cmdsize); - FHOut.outword(SymTab.symoff); - FHOut.outword(SymTab.nsyms); - FHOut.outword(SymTab.stroff); - FHOut.outword(SymTab.strsize); - - // FIXME: set DySymTab fields appropriately - // We should probably just update these in BufferSymbolAndStringTable since - // thats where we're partitioning up the different kinds of symbols. - FHOut.outword(DySymTab.cmd); - FHOut.outword(DySymTab.cmdsize); - FHOut.outword(DySymTab.ilocalsym); - FHOut.outword(DySymTab.nlocalsym); - FHOut.outword(DySymTab.iextdefsym); - FHOut.outword(DySymTab.nextdefsym); - FHOut.outword(DySymTab.iundefsym); - FHOut.outword(DySymTab.nundefsym); - FHOut.outword(DySymTab.tocoff); - FHOut.outword(DySymTab.ntoc); - FHOut.outword(DySymTab.modtaboff); - FHOut.outword(DySymTab.nmodtab); - FHOut.outword(DySymTab.extrefsymoff); - FHOut.outword(DySymTab.nextrefsyms); - FHOut.outword(DySymTab.indirectsymoff); - FHOut.outword(DySymTab.nindirectsyms); - FHOut.outword(DySymTab.extreloff); - FHOut.outword(DySymTab.nextrel); - FHOut.outword(DySymTab.locreloff); - FHOut.outword(DySymTab.nlocrel); - - O.write((char*)&FH[0], FH.size()); -} - -/// EmitSections - Now that we have constructed the file header and load -/// commands, emit the data for each section to the file. -void MachOWriter::EmitSections() { - for (std::vector<MachOSection*>::iterator I = SectionList.begin(), - E = SectionList.end(); I != E; ++I) - // Emit the contents of each section - if ((*I)->size()) - O.write((char*)&(*I)->getData()[0], (*I)->size()); -} - -/// EmitRelocations - emit relocation data from buffer. -void MachOWriter::EmitRelocations() { - for (std::vector<MachOSection*>::iterator I = SectionList.begin(), - E = SectionList.end(); I != E; ++I) - // Emit the relocation entry data for each section. - if ((*I)->RelocBuffer.size()) - O.write((char*)&(*I)->RelocBuffer[0], (*I)->RelocBuffer.size()); -} - -/// BufferSymbolAndStringTable - Sort the symbols we encountered and assign them -/// each a string table index so that they appear in the correct order in the -/// output file. -void MachOWriter::BufferSymbolAndStringTable() { - // The order of the symbol table is: - // 1. local symbols - // 2. defined external symbols (sorted by name) - // 3. undefined external symbols (sorted by name) - - // Before sorting the symbols, check the PendingGlobals for any undefined - // globals that need to be put in the symbol table. - for (std::vector<GlobalValue*>::iterator I = PendingGlobals.begin(), - E = PendingGlobals.end(); I != E; ++I) { - if (GVOffset[*I] == 0 && GVSection[*I] == 0) { - MachOSym UndfSym(*I, Mang->getMangledName(*I), MachOSym::NO_SECT, MAI); - SymbolTable.push_back(UndfSym); - GVOffset[*I] = -1; - } - } - - // Sort the symbols by name, so that when we partition the symbols by scope - // of definition, we won't have to sort by name within each partition. - std::sort(SymbolTable.begin(), SymbolTable.end(), MachOSym::SymCmp()); - - // Parition the symbol table entries so that all local symbols come before - // all symbols with external linkage. { 1 | 2 3 } - std::partition(SymbolTable.begin(), SymbolTable.end(), - MachOSym::PartitionByLocal); - - // Advance iterator to beginning of external symbols and partition so that - // all external symbols defined in this module come before all external - // symbols defined elsewhere. { 1 | 2 | 3 } - for (std::vector<MachOSym>::iterator I = SymbolTable.begin(), - E = SymbolTable.end(); I != E; ++I) { - if (!MachOSym::PartitionByLocal(*I)) { - std::partition(I, E, MachOSym::PartitionByDefined); - break; - } - } - - // Calculate the starting index for each of the local, extern defined, and - // undefined symbols, as well as the number of each to put in the LC_DYSYMTAB - // load command. - for (std::vector<MachOSym>::iterator I = SymbolTable.begin(), - E = SymbolTable.end(); I != E; ++I) { - if (MachOSym::PartitionByLocal(*I)) { - ++DySymTab.nlocalsym; - ++DySymTab.iextdefsym; - ++DySymTab.iundefsym; - } else if (MachOSym::PartitionByDefined(*I)) { - ++DySymTab.nextdefsym; - ++DySymTab.iundefsym; - } else { - ++DySymTab.nundefsym; - } - } - - // Write out a leading zero byte when emitting string table, for n_strx == 0 - // which means an empty string. - OutputBuffer StrTOut(StrT, is64Bit, isLittleEndian); - StrTOut.outbyte(0); - - // The order of the string table is: - // 1. strings for external symbols - // 2. strings for local symbols - // Since this is the opposite order from the symbol table, which we have just - // sorted, we can walk the symbol table backwards to output the string table. - for (std::vector<MachOSym>::reverse_iterator I = SymbolTable.rbegin(), - E = SymbolTable.rend(); I != E; ++I) { - if (I->GVName == "") { - I->n_strx = 0; - } else { - I->n_strx = StrT.size(); - StrTOut.outstring(I->GVName, I->GVName.length()+1); - } - } - - OutputBuffer SymTOut(SymT, is64Bit, isLittleEndian); - - unsigned index = 0; - for (std::vector<MachOSym>::iterator I = SymbolTable.begin(), - E = SymbolTable.end(); I != E; ++I, ++index) { - // Add the section base address to the section offset in the n_value field - // to calculate the full address. - // FIXME: handle symbols where the n_value field is not the address - GlobalValue *GV = const_cast<GlobalValue*>(I->GV); - if (GV && GVSection[GV]) - I->n_value += GVSection[GV]->addr; - if (GV && (GVOffset[GV] == -1)) - GVOffset[GV] = index; - - // Emit nlist to buffer - SymTOut.outword(I->n_strx); - SymTOut.outbyte(I->n_type); - SymTOut.outbyte(I->n_sect); - SymTOut.outhalf(I->n_desc); - SymTOut.outaddr(I->n_value); - } -} - -/// CalculateRelocations - For each MachineRelocation in the current section, -/// calculate the index of the section containing the object to be relocated, -/// and the offset into that section. From this information, create the -/// appropriate target-specific MachORelocation type and add buffer it to be -/// written out after we are finished writing out sections. -void MachOWriter::CalculateRelocations(MachOSection &MOS) { - std::vector<MachineRelocation> Relocations = MOS.getRelocations(); - for (unsigned i = 0, e = Relocations.size(); i != e; ++i) { - MachineRelocation &MR = Relocations[i]; - unsigned TargetSection = MR.getConstantVal(); - unsigned TargetAddr = 0; - unsigned TargetIndex = 0; - - // This is a scattered relocation entry if it points to a global value with - // a non-zero offset. - bool Scattered = false; - bool Extern = false; - - // Since we may not have seen the GlobalValue we were interested in yet at - // the time we emitted the relocation for it, fix it up now so that it - // points to the offset into the correct section. - if (MR.isGlobalValue()) { - GlobalValue *GV = MR.getGlobalValue(); - MachOSection *MOSPtr = GVSection[GV]; - intptr_t Offset = GVOffset[GV]; - - // If we have never seen the global before, it must be to a symbol - // defined in another module (N_UNDF). - if (!MOSPtr) { - // FIXME: need to append stub suffix - Extern = true; - TargetAddr = 0; - TargetIndex = GVOffset[GV]; - } else { - Scattered = TargetSection != 0; - TargetSection = MOSPtr->Index; - } - MR.setResultPointer((void*)Offset); - } - - // If the symbol is locally defined, pass in the address of the section and - // the section index to the code which will generate the target relocation. - if (!Extern) { - MachOSection &To = *SectionList[TargetSection - 1]; - TargetAddr = To.addr; - TargetIndex = To.Index; - } - - OutputBuffer RelocOut(MOS.RelocBuffer, is64Bit, isLittleEndian); - OutputBuffer SecOut(MOS.getData(), is64Bit, isLittleEndian); - - MOS.nreloc += GetTargetRelocation(MR, MOS.Index, TargetAddr, TargetIndex, - RelocOut, SecOut, Scattered, Extern); - } -} - -// InitMem - Write the value of a Constant to the specified memory location, -// converting it into bytes and relocations. -void MachOWriter::InitMem(const Constant *C, uintptr_t Offset, - const TargetData *TD, MachOSection* mos) { - typedef std::pair<const Constant*, intptr_t> CPair; - std::vector<CPair> WorkList; - uint8_t *Addr = &mos->getData()[0]; - - WorkList.push_back(CPair(C,(intptr_t)Addr + Offset)); - - intptr_t ScatteredOffset = 0; - - while (!WorkList.empty()) { - const Constant *PC = WorkList.back().first; - intptr_t PA = WorkList.back().second; - WorkList.pop_back(); - - if (isa<UndefValue>(PC)) { - continue; - } else if (const ConstantVector *CP = dyn_cast<ConstantVector>(PC)) { - unsigned ElementSize = - TD->getTypeAllocSize(CP->getType()->getElementType()); - for (unsigned i = 0, e = CP->getNumOperands(); i != e; ++i) - WorkList.push_back(CPair(CP->getOperand(i), PA+i*ElementSize)); - } else if (const ConstantExpr *CE = dyn_cast<ConstantExpr>(PC)) { - // - // FIXME: Handle ConstantExpression. See EE::getConstantValue() - // - switch (CE->getOpcode()) { - case Instruction::GetElementPtr: { - SmallVector<Value*, 8> Indices(CE->op_begin()+1, CE->op_end()); - ScatteredOffset = TD->getIndexedOffset(CE->getOperand(0)->getType(), - &Indices[0], Indices.size()); - WorkList.push_back(CPair(CE->getOperand(0), PA)); - break; - } - case Instruction::Add: - default: - dbgs() << "ConstantExpr not handled as global var init: " << *CE <<"\n"; - llvm_unreachable(0); - } - } else if (PC->getType()->isSingleValueType()) { - unsigned char *ptr = (unsigned char *)PA; - switch (PC->getType()->getTypeID()) { - case Type::IntegerTyID: { - unsigned NumBits = cast<IntegerType>(PC->getType())->getBitWidth(); - uint64_t val = cast<ConstantInt>(PC)->getZExtValue(); - if (NumBits <= 8) - ptr[0] = val; - else if (NumBits <= 16) { - if (TD->isBigEndian()) - val = ByteSwap_16(val); - ptr[0] = val; - ptr[1] = val >> 8; - } else if (NumBits <= 32) { - if (TD->isBigEndian()) - val = ByteSwap_32(val); - ptr[0] = val; - ptr[1] = val >> 8; - ptr[2] = val >> 16; - ptr[3] = val >> 24; - } else if (NumBits <= 64) { - if (TD->isBigEndian()) - val = ByteSwap_64(val); - ptr[0] = val; - ptr[1] = val >> 8; - ptr[2] = val >> 16; - ptr[3] = val >> 24; - ptr[4] = val >> 32; - ptr[5] = val >> 40; - ptr[6] = val >> 48; - ptr[7] = val >> 56; - } else { - llvm_unreachable("Not implemented: bit widths > 64"); +bool MachOWriter::runOnMachineFunction(MachineFunction &MF) { + const Function *F = MF.getFunction(); + TargetLoweringObjectFile &TLOF = TM.getTargetLowering()->getObjFileLowering(); + const MCSection *S = TLOF.SectionForGlobal(F, Mang, TM); + OutStreamer.SwitchSection(S); + + for (MachineFunction::const_iterator I = MF.begin(), E = MF.end(); + I != E; ++I) { + // Print a label for the basic block. + for (MachineBasicBlock::const_iterator II = I->begin(), IE = I->end(); + II != IE; ++II) { + const MachineInstr *MI = II; + MCInst OutMI; + OutMI.setOpcode(MI->getOpcode()); + + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { + const MachineOperand &MO = MI->getOperand(i); + MCOperand MCOp; + + switch (MO.getType()) { + default: + MI->dump(); + llvm_unreachable("unknown operand type"); + case MachineOperand::MO_Register: + // Ignore all implicit register operands. + if (MO.isImplicit()) continue; + MCOp = MCOperand::CreateReg(MO.getReg()); + break; + case MachineOperand::MO_Immediate: + MCOp = MCOperand::CreateImm(MO.getImm()); + break; } - break; - } - case Type::FloatTyID: { - uint32_t val = cast<ConstantFP>(PC)->getValueAPF().bitcastToAPInt(). - getZExtValue(); - if (TD->isBigEndian()) - val = ByteSwap_32(val); - ptr[0] = val; - ptr[1] = val >> 8; - ptr[2] = val >> 16; - ptr[3] = val >> 24; - break; - } - case Type::DoubleTyID: { - uint64_t val = cast<ConstantFP>(PC)->getValueAPF().bitcastToAPInt(). - getZExtValue(); - if (TD->isBigEndian()) - val = ByteSwap_64(val); - ptr[0] = val; - ptr[1] = val >> 8; - ptr[2] = val >> 16; - ptr[3] = val >> 24; - ptr[4] = val >> 32; - ptr[5] = val >> 40; - ptr[6] = val >> 48; - ptr[7] = val >> 56; - break; - } - case Type::PointerTyID: - if (isa<ConstantPointerNull>(PC)) - memset(ptr, 0, TD->getPointerSize()); - else if (const GlobalValue* GV = dyn_cast<GlobalValue>(PC)) { - // FIXME: what about function stubs? - mos->addRelocation(MachineRelocation::getGV(PA-(intptr_t)Addr, - MachineRelocation::VANILLA, - const_cast<GlobalValue*>(GV), - ScatteredOffset)); - ScatteredOffset = 0; - } else - llvm_unreachable("Unknown constant pointer type!"); - break; - default: - std::string msg; - raw_string_ostream Msg(msg); - Msg << "ERROR: Constant unimp for type: " << *PC->getType(); - llvm_report_error(Msg.str()); + OutMI.addOperand(MCOp); } - } else if (isa<ConstantAggregateZero>(PC)) { - memset((void*)PA, 0, (size_t)TD->getTypeAllocSize(PC->getType())); - } else if (const ConstantArray *CPA = dyn_cast<ConstantArray>(PC)) { - unsigned ElementSize = - TD->getTypeAllocSize(CPA->getType()->getElementType()); - for (unsigned i = 0, e = CPA->getNumOperands(); i != e; ++i) - WorkList.push_back(CPair(CPA->getOperand(i), PA+i*ElementSize)); - } else if (const ConstantStruct *CPS = dyn_cast<ConstantStruct>(PC)) { - const StructLayout *SL = - TD->getStructLayout(cast<StructType>(CPS->getType())); - for (unsigned i = 0, e = CPS->getNumOperands(); i != e; ++i) - WorkList.push_back(CPair(CPS->getOperand(i), - PA+SL->getElementOffset(i))); - } else { - dbgs() << "Bad Type: " << *PC->getType() << "\n"; - llvm_unreachable("Unknown constant type to initialize memory with!"); + + OutStreamer.EmitInstruction(OutMI); } } -} - -//===----------------------------------------------------------------------===// -// MachOSym Implementation -//===----------------------------------------------------------------------===// -MachOSym::MachOSym(const GlobalValue *gv, std::string name, uint8_t sect, - const MCAsmInfo *MAI) : - GV(gv), n_strx(0), n_type(sect == NO_SECT ? N_UNDF : N_SECT), n_sect(sect), - n_desc(0), n_value(0) { - - // FIXME: This is completely broken, it should use the mangler interface. - switch (GV->getLinkage()) { - default: - llvm_unreachable("Unexpected linkage type!"); - break; - case GlobalValue::WeakAnyLinkage: - case GlobalValue::WeakODRLinkage: - case GlobalValue::LinkOnceAnyLinkage: - case GlobalValue::LinkOnceODRLinkage: - case GlobalValue::CommonLinkage: - assert(!isa<Function>(gv) && "Unexpected linkage type for Function!"); - case GlobalValue::ExternalLinkage: - GVName = MAI->getGlobalPrefix() + name; - n_type |= GV->hasHiddenVisibility() ? N_PEXT : N_EXT; - break; - case GlobalValue::PrivateLinkage: - GVName = MAI->getPrivateGlobalPrefix() + name; - break; - case GlobalValue::LinkerPrivateLinkage: - GVName = MAI->getLinkerPrivateGlobalPrefix() + name; - break; - case GlobalValue::InternalLinkage: - GVName = MAI->getGlobalPrefix() + name; - break; - } + return false; } - -} // end namespace llvm diff --git a/lib/CodeGen/MachOWriter.h b/lib/CodeGen/MachOWriter.h index 9273f38..2e7e67d 100644 --- a/lib/CodeGen/MachOWriter.h +++ b/lib/CodeGen/MachOWriter.h @@ -15,191 +15,73 @@ #define MACHOWRITER_H #include "llvm/CodeGen/MachineFunctionPass.h" -#include <vector> -#include <map> +#include "llvm/Target/TargetMachine.h" namespace llvm { - class Constant; class GlobalVariable; class Mangler; - class MachineBasicBlock; - class MachineRelocation; - class MachOCodeEmitter; - struct MachODySymTab; - struct MachOHeader; - struct MachOSection; - struct MachOSym; - class TargetData; - class TargetMachine; - class MCAsmInfo; - class ObjectCodeEmitter; - class OutputBuffer; - class raw_ostream; - + class MCCodeEmitter; + class MCContext; + class MCStreamer; + /// MachOWriter - This class implements the common target-independent code for /// writing Mach-O files. Targets should derive a class from this to /// parameterize the output format. /// class MachOWriter : public MachineFunctionPass { - friend class MachOCodeEmitter; - public: static char ID; - ObjectCodeEmitter *getObjectCodeEmitter() { - return reinterpret_cast<ObjectCodeEmitter*>(MachOCE); - } - - MachOWriter(raw_ostream &O, TargetMachine &TM); - virtual ~MachOWriter(); - - virtual const char *getPassName() const { - return "Mach-O Writer"; - } - protected: /// Output stream to send the resultant object file to. /// - raw_ostream &O; + formatted_raw_ostream &O; /// Target machine description. /// TargetMachine &TM; - /// Mang - The object used to perform name mangling for this module. + /// Target Asm Printer information. /// - Mangler *Mang; - - /// MachOCE - The MachineCodeEmitter object that we are exposing to emit - /// machine code for functions to the .o file. - MachOCodeEmitter *MachOCE; - - /// is64Bit/isLittleEndian - This information is inferred from the target - /// machine directly, indicating what header values and flags to set. - bool is64Bit, isLittleEndian; - - // Target Asm Info const MCAsmInfo *MAI; - - /// Header - An instance of MachOHeader that we will update while we build - /// the file, and then emit during finalization. - MachOHeader Header; - + + /// MCCE - The MCCodeEmitter object that we are exposing to emit machine + /// code for functions to the .o file. + MCCodeEmitter *MCCE; + + /// OutContext - This is the context for the output file that we are + /// streaming. This owns all of the global MC-related objects for the + /// generated translation unit. + MCContext &OutContext; + + /// OutStreamer - This is the MCStreamer object for the file we are + /// generating. This contains the transient state for the current + /// translation unit that we are generating (such as the current section + /// etc). + MCStreamer &OutStreamer; + + /// Name-mangler for global names. + /// + Mangler *Mang; + /// doInitialization - Emit the file header and all of the global variables /// for the module to the Mach-O file. bool doInitialization(Module &M); - bool runOnMachineFunction(MachineFunction &MF); - /// doFinalization - Now that the module has been completely processed, emit /// the Mach-O file to 'O'. bool doFinalization(Module &M); - private: - - /// SectionList - This is the list of sections that we have emitted to the - /// file. Once the file has been completely built, the segment load command - /// SectionCommands are constructed from this info. - std::vector<MachOSection*> SectionList; - - /// SectionLookup - This is a mapping from section name to SectionList entry - std::map<std::string, MachOSection*> SectionLookup; - - /// GVSection - This is a mapping from a GlobalValue to a MachOSection, - /// to aid in emitting relocations. - std::map<GlobalValue*, MachOSection*> GVSection; - - /// GVOffset - This is a mapping from a GlobalValue to an offset from the - /// start of the section in which the GV resides, to aid in emitting - /// relocations. - std::map<GlobalValue*, intptr_t> GVOffset; - - /// getSection - Return the section with the specified name, creating a new - /// section if one does not already exist. - MachOSection *getSection(const std::string &seg, const std::string §, - unsigned Flags = 0); - - /// getTextSection - Return text section with different flags for code/data - MachOSection *getTextSection(bool isCode = true); - - MachOSection *getDataSection() { - return getSection("__DATA", "__data"); + bool runOnMachineFunction(MachineFunction &MF); + + public: + explicit MachOWriter(formatted_raw_ostream &O, TargetMachine &TM, + const MCAsmInfo *T, MCCodeEmitter *MCE); + + virtual ~MachOWriter(); + + virtual const char *getPassName() const { + return "Mach-O Writer"; } - - MachOSection *getBSSSection(); - MachOSection *getConstSection(Constant *C); - MachOSection *getJumpTableSection(); - - /// MachOSymTab - This struct contains information about the offsets and - /// size of symbol table information. - /// segment. - struct MachOSymTab { - uint32_t cmd; // LC_SYMTAB - uint32_t cmdsize; // sizeof( MachOSymTab ) - uint32_t symoff; // symbol table offset - uint32_t nsyms; // number of symbol table entries - uint32_t stroff; // string table offset - uint32_t strsize; // string table size in bytes - - // Constants for the cmd field - // see <mach-o/loader.h> - enum { LC_SYMTAB = 0x02 // link-edit stab symbol table info - }; - - MachOSymTab() : cmd(LC_SYMTAB), cmdsize(6 * sizeof(uint32_t)), symoff(0), - nsyms(0), stroff(0), strsize(0) { } - }; - - /// SymTab - The "stab" style symbol table information - MachOSymTab SymTab; - /// DySymTab - symbol table info for the dynamic link editor - MachODySymTab DySymTab; - - protected: - - /// SymbolTable - This is the list of symbols we have emitted to the file. - /// This actually gets rearranged before emission to the file (to put the - /// local symbols first in the list). - std::vector<MachOSym> SymbolTable; - - /// SymT - A buffer to hold the symbol table before we write it out at the - /// appropriate location in the file. - std::vector<unsigned char> SymT; - - /// StrT - A buffer to hold the string table before we write it out at the - /// appropriate location in the file. - std::vector<unsigned char> StrT; - - /// PendingSyms - This is a list of externally defined symbols that we have - /// been asked to emit, but have not seen a reference to. When a reference - /// is seen, the symbol will move from this list to the SymbolTable. - std::vector<GlobalValue*> PendingGlobals; - - /// DynamicSymbolTable - This is just a vector of indices into - /// SymbolTable to aid in emitting the DYSYMTAB load command. - std::vector<unsigned> DynamicSymbolTable; - - static void InitMem(const Constant *C, uintptr_t Offset, - const TargetData *TD, MachOSection* mos); - - private: - void AddSymbolToSection(MachOSection *MOS, GlobalVariable *GV); - void EmitGlobal(GlobalVariable *GV); - void EmitHeaderAndLoadCommands(); - void EmitSections(); - void EmitRelocations(); - void BufferSymbolAndStringTable(); - void CalculateRelocations(MachOSection &MOS); - - // GetJTRelocation - Get a relocation a new BB relocation based - // on target information. - MachineRelocation GetJTRelocation(unsigned Offset, - MachineBasicBlock *MBB) const; - - /// GetTargetRelocation - Returns the number of relocations. - unsigned GetTargetRelocation(MachineRelocation &MR, unsigned FromIdx, - unsigned ToAddr, unsigned ToIndex, - OutputBuffer &RelocOut, OutputBuffer &SecOut, - bool Scattered, bool Extern); }; } diff --git a/lib/CodeGen/MachineBasicBlock.cpp b/lib/CodeGen/MachineBasicBlock.cpp index e2ce642..9215bd5 100644 --- a/lib/CodeGen/MachineBasicBlock.cpp +++ b/lib/CodeGen/MachineBasicBlock.cpp @@ -378,7 +378,7 @@ bool MachineBasicBlock::canFallThrough() { MachineBasicBlock *TBB = 0, *FBB = 0; SmallVector<MachineOperand, 4> Cond; const TargetInstrInfo *TII = getParent()->getTarget().getInstrInfo(); - if (TII->AnalyzeBranch(*this, TBB, FBB, Cond, true)) { + if (TII->AnalyzeBranch(*this, TBB, FBB, Cond)) { // If we couldn't analyze the branch, examine the last instruction. // If the block doesn't end in a known control barrier, assume fallthrough // is possible. The isPredicable check is needed because this code can be @@ -524,7 +524,26 @@ bool MachineBasicBlock::CorrectExtraCFGEdges(MachineBasicBlock *DestA, return MadeChange; } +/// findDebugLoc - find the next valid DebugLoc starting at MBBI, skipping +/// any DEBUG_VALUE instructions. Return UnknownLoc if there is none. +DebugLoc +MachineBasicBlock::findDebugLoc(MachineBasicBlock::iterator &MBBI) { + DebugLoc DL; + MachineBasicBlock::iterator E = end(); + if (MBBI != E) { + // Skip debug declarations, we don't want a DebugLoc from them. + MachineBasicBlock::iterator MBBI2 = MBBI; + while (MBBI2 != E && + MBBI2->getOpcode()==TargetInstrInfo::DEBUG_VALUE) + MBBI2++; + if (MBBI2 != E) + DL = MBBI2->getDebugLoc(); + } + return DL; +} + void llvm::WriteAsOperand(raw_ostream &OS, const MachineBasicBlock *MBB, bool t) { OS << "BB#" << MBB->getNumber(); } + diff --git a/lib/CodeGen/MachineFunction.cpp b/lib/CodeGen/MachineFunction.cpp index ae9451c..1e3e314 100644 --- a/lib/CodeGen/MachineFunction.cpp +++ b/lib/CodeGen/MachineFunction.cpp @@ -26,6 +26,7 @@ #include "llvm/CodeGen/MachineJumpTableInfo.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/Passes.h" +#include "llvm/Analysis/DebugInfo.h" #include "llvm/Support/Debug.h" #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetLowering.h" @@ -426,12 +427,12 @@ unsigned MachineFunction::addLiveIn(unsigned PReg, return VReg; } -/// getDebugLocTuple - Get the DebugLocTuple for a given DebugLoc object. -DebugLocTuple MachineFunction::getDebugLocTuple(DebugLoc DL) const { +/// getDILocation - Get the DILocation for a given DebugLoc object. +DILocation MachineFunction::getDILocation(DebugLoc DL) const { unsigned Idx = DL.getIndex(); assert(Idx < DebugLocInfo.DebugLocations.size() && "Invalid index into debug locations!"); - return DebugLocInfo.DebugLocations[Idx]; + return DILocation(DebugLocInfo.DebugLocations[Idx]); } //===----------------------------------------------------------------------===// diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp index cf3e3e1..ef2fcee 100644 --- a/lib/CodeGen/MachineInstr.cpp +++ b/lib/CodeGen/MachineInstr.cpp @@ -1162,6 +1162,13 @@ void MachineInstr::print(raw_ostream &OS, const TargetMachine *TM) const { if (FirstOp) FirstOp = false; else OS << ","; OS << " "; + if (i < getDesc().NumOperands) { + const TargetOperandInfo &TOI = getDesc().OpInfo[i]; + if (TOI.isPredicate()) + OS << "pred:"; + if (TOI.isOptionalDef()) + OS << "opt:"; + } MO.print(OS, TM); } @@ -1189,17 +1196,17 @@ void MachineInstr::print(raw_ostream &OS, const TargetMachine *TM) const { // TODO: print InlinedAtLoc information - DebugLocTuple DLT = MF->getDebugLocTuple(debugLoc); - DIScope Scope(DLT.Scope); + DILocation DLT = MF->getDILocation(debugLoc); + DIScope Scope = DLT.getScope(); OS << " dbg:"; // Omit the directory, since it's usually long and uninteresting. if (!Scope.isNull()) OS << Scope.getFilename(); else OS << "<unknown>"; - OS << ':' << DLT.Line; - if (DLT.Col != 0) - OS << ':' << DLT.Col; + OS << ':' << DLT.getLineNumber(); + if (DLT.getColumnNumber() != 0) + OS << ':' << DLT.getColumnNumber(); } OS << "\n"; diff --git a/lib/CodeGen/Makefile b/lib/CodeGen/Makefile index 4ab3e3c..8c0204c 100644 --- a/lib/CodeGen/Makefile +++ b/lib/CodeGen/Makefile @@ -11,6 +11,7 @@ LEVEL = ../.. LIBRARYNAME = LLVMCodeGen PARALLEL_DIRS = SelectionDAG AsmPrinter BUILD_ARCHIVE = 1 +CXXFLAGS = -fno-rtti include $(LEVEL)/Makefile.common diff --git a/lib/CodeGen/MaxStackAlignment.cpp b/lib/CodeGen/MaxStackAlignment.cpp deleted file mode 100644 index d327cfa..0000000 --- a/lib/CodeGen/MaxStackAlignment.cpp +++ /dev/null @@ -1,70 +0,0 @@ -//===-- MaxStackAlignment.cpp - Compute the required stack alignment -- ---===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This pass looks for vector register usage and aligned local objects to -// calculate the maximum required alignment for a function. This is used by -// targets which support it to determine if dynamic stack realignment is -// necessary. -// -//===----------------------------------------------------------------------===// - -#include "llvm/CodeGen/MachineFunction.h" -#include "llvm/CodeGen/MachineFrameInfo.h" -#include "llvm/CodeGen/MachineRegisterInfo.h" -#include "llvm/CodeGen/Passes.h" - -using namespace llvm; - -namespace { - struct MaximalStackAlignmentCalculator : public MachineFunctionPass { - static char ID; - MaximalStackAlignmentCalculator() : MachineFunctionPass(&ID) {} - - virtual bool runOnMachineFunction(MachineFunction &MF) { - MachineFrameInfo *FFI = MF.getFrameInfo(); - MachineRegisterInfo &RI = MF.getRegInfo(); - - // Calculate max stack alignment of all already allocated stack objects. - FFI->calculateMaxStackAlignment(); - unsigned MaxAlign = FFI->getMaxAlignment(); - - // Be over-conservative: scan over all vreg defs and find whether vector - // registers are used. If yes, there is probability that vector registers - // will be spilled and thus the stack needs to be aligned properly. - // FIXME: It would be better to only do this if a spill actually - // happens rather than conseratively aligning the stack regardless. - for (unsigned RegNum = TargetRegisterInfo::FirstVirtualRegister; - RegNum < RI.getLastVirtReg(); ++RegNum) - MaxAlign = std::max(MaxAlign, RI.getRegClass(RegNum)->getAlignment()); - - if (FFI->getMaxAlignment() == MaxAlign) - return false; - - FFI->setMaxAlignment(MaxAlign); - return true; - } - - virtual const char *getPassName() const { - return "Stack Alignment Requirements Auto-Detector"; - } - - virtual void getAnalysisUsage(AnalysisUsage &AU) const { - AU.setPreservesCFG(); - MachineFunctionPass::getAnalysisUsage(AU); - } - }; - - char MaximalStackAlignmentCalculator::ID = 0; -} - -FunctionPass* -llvm::createMaxStackAlignmentCalculatorPass() { - return new MaximalStackAlignmentCalculator(); -} - diff --git a/lib/CodeGen/OptimizeExts.cpp b/lib/CodeGen/OptimizeExts.cpp index 625ff89..096f9d4 100644 --- a/lib/CodeGen/OptimizeExts.cpp +++ b/lib/CodeGen/OptimizeExts.cpp @@ -143,11 +143,23 @@ bool OptimizeExts::OptimizeInstr(MachineInstr *MI, MachineBasicBlock *MBB, // Now replace all uses. if (!Uses.empty()) { + SmallPtrSet<MachineBasicBlock*, 4> PHIBBs; + // Look for PHI uses of the extended result, we don't want to extend the + // liveness of a PHI input. It breaks all kinds of assumptions down + // stream. A PHI use is expected to be the kill of its source values. + UI = MRI->use_begin(DstReg); + for (MachineRegisterInfo::use_iterator UE = MRI->use_end(); UI != UE; + ++UI) + if (UI->getOpcode() == TargetInstrInfo::PHI) + PHIBBs.insert(UI->getParent()); + const TargetRegisterClass *RC = MRI->getRegClass(SrcReg); for (unsigned i = 0, e = Uses.size(); i != e; ++i) { MachineOperand *UseMO = Uses[i]; MachineInstr *UseMI = UseMO->getParent(); MachineBasicBlock *UseMBB = UseMI->getParent(); + if (PHIBBs.count(UseMBB)) + continue; unsigned NewVR = MRI->createVirtualRegister(RC); BuildMI(*UseMBB, UseMI, UseMI->getDebugLoc(), TII->get(TargetInstrInfo::EXTRACT_SUBREG), NewVR) diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 549527c..8883064 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -1088,6 +1088,26 @@ SDValue DAGCombiner::visitADD(SDNode *N) { if (Result.getNode()) return Result; } + // fold (add x, shl(0 - y, n)) -> sub(x, shl(y, n)) + if (N1.getOpcode() == ISD::SHL && + N1.getOperand(0).getOpcode() == ISD::SUB) + if (ConstantSDNode *C = + dyn_cast<ConstantSDNode>(N1.getOperand(0).getOperand(0))) + if (C->getAPIntValue() == 0) + return DAG.getNode(ISD::SUB, N->getDebugLoc(), VT, N0, + DAG.getNode(ISD::SHL, N->getDebugLoc(), VT, + N1.getOperand(0).getOperand(1), + N1.getOperand(1))); + if (N0.getOpcode() == ISD::SHL && + N0.getOperand(0).getOpcode() == ISD::SUB) + if (ConstantSDNode *C = + dyn_cast<ConstantSDNode>(N0.getOperand(0).getOperand(0))) + if (C->getAPIntValue() == 0) + return DAG.getNode(ISD::SUB, N->getDebugLoc(), VT, N1, + DAG.getNode(ISD::SHL, N->getDebugLoc(), VT, + N0.getOperand(0).getOperand(1), + N0.getOperand(1))); + return SDValue(); } @@ -1176,6 +1196,9 @@ SDValue DAGCombiner::visitSUB(SDNode *N) { if (N1C) return DAG.getNode(ISD::ADD, N->getDebugLoc(), VT, N0, DAG.getConstant(-N1C->getAPIntValue(), VT)); + // Canonicalize (sub -1, x) -> ~x, i.e. (xor x, -1) + if (N0C && N0C->isAllOnesValue()) + return DAG.getNode(ISD::XOR, N->getDebugLoc(), VT, N1, N0); // fold (A+B)-A -> B if (N0.getOpcode() == ISD::ADD && N0.getOperand(0) == N1) return N0.getOperand(1); diff --git a/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp b/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp index 4868c9e..dc7d82d 100644 --- a/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp +++ b/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp @@ -35,7 +35,6 @@ #include "llvm/Target/TargetLowering.h" #include "llvm/Target/TargetOptions.h" #include "llvm/Support/Compiler.h" -#include "llvm/Support/CommandLine.h" #include "llvm/Support/Debug.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/MathExtras.h" diff --git a/lib/CodeGen/SelectionDAG/InstrEmitter.cpp b/lib/CodeGen/SelectionDAG/InstrEmitter.cpp index 669d414..9c50936 100644 --- a/lib/CodeGen/SelectionDAG/InstrEmitter.cpp +++ b/lib/CodeGen/SelectionDAG/InstrEmitter.cpp @@ -24,7 +24,6 @@ #include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetLowering.h" #include "llvm/ADT/Statistic.h" -#include "llvm/Support/CommandLine.h" #include "llvm/Support/Debug.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/MathExtras.h" diff --git a/lib/CodeGen/SelectionDAG/Makefile b/lib/CodeGen/SelectionDAG/Makefile index 73f0b5d..4706e68 100644 --- a/lib/CodeGen/SelectionDAG/Makefile +++ b/lib/CodeGen/SelectionDAG/Makefile @@ -6,8 +6,9 @@ # License. See LICENSE.TXT for details. # ##===----------------------------------------------------------------------===## + LEVEL = ../../.. LIBRARYNAME = LLVMSelectionDAG -PARALLEL_DIRS = +CXXFLAGS = -fno-rtti include $(LEVEL)/Makefile.common diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp index 0c3c974c..ad8630a 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp @@ -22,7 +22,6 @@ #include "llvm/ADT/SmallSet.h" #include "llvm/ADT/Statistic.h" #include "llvm/ADT/STLExtras.h" -#include "llvm/Support/CommandLine.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/raw_ostream.h" using namespace llvm; diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp index 1ad7919..dea5993 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp @@ -46,6 +46,11 @@ static RegisterScheduler tdrListrDAGScheduler("list-tdrr", "Top-down register reduction list scheduling", createTDRRListDAGScheduler); +static RegisterScheduler + sourceListDAGScheduler("source", + "Similar to list-burr but schedules in source " + "order when possible", + createSourceListDAGScheduler); namespace { //===----------------------------------------------------------------------===// @@ -931,6 +936,16 @@ namespace { bool operator()(const SUnit* left, const SUnit* right) const; }; + + struct src_ls_rr_sort : public std::binary_function<SUnit*, SUnit*, bool> { + RegReductionPriorityQueue<src_ls_rr_sort> *SPQ; + src_ls_rr_sort(RegReductionPriorityQueue<src_ls_rr_sort> *spq) + : SPQ(spq) {} + src_ls_rr_sort(const src_ls_rr_sort &RHS) + : SPQ(RHS.SPQ) {} + + bool operator()(const SUnit* left, const SUnit* right) const; + }; } // end anonymous namespace /// CalcNodeSethiUllmanNumber - Compute Sethi Ullman number. @@ -981,9 +996,9 @@ namespace { public: RegReductionPriorityQueue(const TargetInstrInfo *tii, - const TargetRegisterInfo *tri) : - Queue(SF(this)), currentQueueId(0), - TII(tii), TRI(tri), scheduleDAG(NULL) {} + const TargetRegisterInfo *tri) + : Queue(SF(this)), currentQueueId(0), + TII(tii), TRI(tri), scheduleDAG(NULL) {} void initNodes(std::vector<SUnit> &sunits) { SUnits = &sunits; @@ -1089,6 +1104,9 @@ namespace { typedef RegReductionPriorityQueue<td_ls_rr_sort> TDRegReductionPriorityQueue; + + typedef RegReductionPriorityQueue<src_ls_rr_sort> + SrcRegReductionPriorityQueue; } /// closestSucc - Returns the scheduled cycle of the successor which is @@ -1122,16 +1140,9 @@ static unsigned calcMaxScratches(const SUnit *SU) { return Scratches; } -// Bottom up -bool bu_ls_rr_sort::operator()(const SUnit *left, const SUnit *right) const { - unsigned LOrder = SPQ->getNodeOrdering(left); - unsigned ROrder = SPQ->getNodeOrdering(right); - - // Prefer an ordering where the lower the non-zero order number, the higher - // the preference. - if ((LOrder || ROrder) && LOrder != ROrder) - return LOrder != 0 && (LOrder < ROrder || ROrder == 0); - +template <typename RRSort> +static bool BURRSort(const SUnit *left, const SUnit *right, + const RegReductionPriorityQueue<RRSort> *SPQ) { unsigned LPriority = SPQ->getNodePriority(left); unsigned RPriority = SPQ->getNodePriority(right); if (LPriority != RPriority) @@ -1176,6 +1187,24 @@ bool bu_ls_rr_sort::operator()(const SUnit *left, const SUnit *right) const { return (left->NodeQueueId > right->NodeQueueId); } +// Bottom up +bool bu_ls_rr_sort::operator()(const SUnit *left, const SUnit *right) const { + return BURRSort(left, right, SPQ); +} + +// Source order, otherwise bottom up. +bool src_ls_rr_sort::operator()(const SUnit *left, const SUnit *right) const{ + unsigned LOrder = SPQ->getNodeOrdering(left); + unsigned ROrder = SPQ->getNodeOrdering(right); + + // Prefer an ordering where the lower the non-zero order number, the higher + // the preference. + if ((LOrder || ROrder) && LOrder != ROrder) + return LOrder != 0 && (LOrder < ROrder || ROrder == 0); + + return BURRSort(left, right, SPQ); +} + template<class SF> bool RegReductionPriorityQueue<SF>::canClobber(const SUnit *SU, const SUnit *Op) { @@ -1196,7 +1225,6 @@ RegReductionPriorityQueue<SF>::canClobber(const SUnit *SU, const SUnit *Op) { return false; } - /// hasCopyToRegUse - Return true if SU has a value successor that is a /// CopyToReg node. static bool hasCopyToRegUse(const SUnit *SU) { @@ -1544,3 +1572,17 @@ llvm::createTDRRListDAGScheduler(SelectionDAGISel *IS, CodeGenOpt::Level) { PQ->setScheduleDAG(SD); return SD; } + +llvm::ScheduleDAGSDNodes * +llvm::createSourceListDAGScheduler(SelectionDAGISel *IS, CodeGenOpt::Level) { + const TargetMachine &TM = IS->TM; + const TargetInstrInfo *TII = TM.getInstrInfo(); + const TargetRegisterInfo *TRI = TM.getRegisterInfo(); + + SrcRegReductionPriorityQueue *PQ = new SrcRegReductionPriorityQueue(TII, TRI); + + ScheduleDAGRRList *SD = + new ScheduleDAGRRList(*IS->MF, true, PQ); + PQ->setScheduleDAG(SD); + return SD; +} diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp index aaaa2b3..b51c61b 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp @@ -20,10 +20,16 @@ #include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetRegisterInfo.h" #include "llvm/Target/TargetSubtarget.h" +#include "llvm/ADT/DenseMap.h" +#include "llvm/ADT/SmallPtrSet.h" +#include "llvm/ADT/SmallVector.h" +#include "llvm/ADT/Statistic.h" #include "llvm/Support/Debug.h" #include "llvm/Support/raw_ostream.h" using namespace llvm; +STATISTIC(LoadsClustered, "Number of loads clustered together"); + ScheduleDAGSDNodes::ScheduleDAGSDNodes(MachineFunction &mf) : ScheduleDAG(mf) { } @@ -75,6 +81,122 @@ static void CheckForPhysRegDependency(SDNode *Def, SDNode *User, unsigned Op, } } +static void AddFlags(SDNode *N, SDValue Flag, bool AddFlag, + SelectionDAG *DAG) { + SmallVector<EVT, 4> VTs; + for (unsigned i = 0, e = N->getNumValues(); i != e; ++i) + VTs.push_back(N->getValueType(i)); + if (AddFlag) + VTs.push_back(MVT::Flag); + SmallVector<SDValue, 4> Ops; + for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) + Ops.push_back(N->getOperand(i)); + if (Flag.getNode()) + Ops.push_back(Flag); + SDVTList VTList = DAG->getVTList(&VTs[0], VTs.size()); + DAG->MorphNodeTo(N, N->getOpcode(), VTList, &Ops[0], Ops.size()); +} + +/// ClusterNeighboringLoads - Force nearby loads together by "flagging" them. +/// This function finds loads of the same base and different offsets. If the +/// offsets are not far apart (target specific), it add MVT::Flag inputs and +/// outputs to ensure they are scheduled together and in order. This +/// optimization may benefit some targets by improving cache locality. +void ScheduleDAGSDNodes::ClusterNeighboringLoads() { + SmallPtrSet<SDNode*, 16> Visited; + SmallVector<int64_t, 4> Offsets; + DenseMap<long long, SDNode*> O2SMap; // Map from offset to SDNode. + for (SelectionDAG::allnodes_iterator NI = DAG->allnodes_begin(), + E = DAG->allnodes_end(); NI != E; ++NI) { + SDNode *Node = &*NI; + if (!Node || !Node->isMachineOpcode()) + continue; + + unsigned Opc = Node->getMachineOpcode(); + const TargetInstrDesc &TID = TII->get(Opc); + if (!TID.mayLoad()) + continue; + + SDNode *Chain = 0; + unsigned NumOps = Node->getNumOperands(); + if (Node->getOperand(NumOps-1).getValueType() == MVT::Other) + Chain = Node->getOperand(NumOps-1).getNode(); + if (!Chain) + continue; + + // Look for other loads of the same chain. Find loads that are loading from + // the same base pointer and different offsets. + Visited.clear(); + Offsets.clear(); + O2SMap.clear(); + bool Cluster = false; + SDNode *Base = Node; + int64_t BaseOffset; + for (SDNode::use_iterator I = Chain->use_begin(), E = Chain->use_end(); + I != E; ++I) { + SDNode *User = *I; + if (User == Node || !Visited.insert(User)) + continue; + int64_t Offset1, Offset2; + if (!TII->areLoadsFromSameBasePtr(Base, User, Offset1, Offset2) || + Offset1 == Offset2) + // FIXME: Should be ok if they addresses are identical. But earlier + // optimizations really should have eliminated one of the loads. + continue; + if (O2SMap.insert(std::make_pair(Offset1, Base)).second) + Offsets.push_back(Offset1); + O2SMap.insert(std::make_pair(Offset2, User)); + Offsets.push_back(Offset2); + if (Offset2 < Offset1) { + Base = User; + BaseOffset = Offset2; + } else { + BaseOffset = Offset1; + } + Cluster = true; + } + + if (!Cluster) + continue; + + // Sort them in increasing order. + std::sort(Offsets.begin(), Offsets.end()); + + // Check if the loads are close enough. + SmallVector<SDNode*, 4> Loads; + unsigned NumLoads = 0; + int64_t BaseOff = Offsets[0]; + SDNode *BaseLoad = O2SMap[BaseOff]; + Loads.push_back(BaseLoad); + for (unsigned i = 1, e = Offsets.size(); i != e; ++i) { + int64_t Offset = Offsets[i]; + SDNode *Load = O2SMap[Offset]; + if (!TII->shouldScheduleLoadsNear(BaseLoad, Load, BaseOff, Offset, + NumLoads)) + break; // Stop right here. Ignore loads that are further away. + Loads.push_back(Load); + ++NumLoads; + } + + if (NumLoads == 0) + continue; + + // Cluster loads by adding MVT::Flag outputs and inputs. This also + // ensure they are scheduled in order of increasing addresses. + SDNode *Lead = Loads[0]; + AddFlags(Lead, SDValue(0,0), true, DAG); + SDValue InFlag = SDValue(Lead, Lead->getNumValues()-1); + for (unsigned i = 1, e = Loads.size(); i != e; ++i) { + bool OutFlag = i < e-1; + SDNode *Load = Loads[i]; + AddFlags(Load, InFlag, OutFlag, DAG); + if (OutFlag) + InFlag = SDValue(Load, Load->getNumValues()-1); + ++LoadsClustered; + } + } +} + void ScheduleDAGSDNodes::BuildSchedUnits() { // During scheduling, the NodeId field of SDNode is used to map SDNodes // to their associated SUnits by holding SUnits table indices. A value @@ -232,6 +354,8 @@ void ScheduleDAGSDNodes::AddSchedEdges() { /// excludes nodes that aren't interesting to scheduling, and represents /// flagged together nodes with a single SUnit. void ScheduleDAGSDNodes::BuildSchedGraph(AliasAnalysis *AA) { + // Cluster loads from "near" addresses into combined SUnits. + ClusterNeighboringLoads(); // Populate the SUnits array. BuildSchedUnits(); // Compute all the scheduling dependencies between nodes. diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h index ebb31ac..6b829b6 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h @@ -108,6 +108,10 @@ namespace llvm { virtual void getCustomGraphFeatures(GraphWriter<ScheduleDAG*> &GW) const; private: + /// ClusterNeighboringLoads - Cluster loads from "near" addresses into + /// combined SUnits. + void ClusterNeighboringLoads(); + /// BuildSchedUnits, AddSchedEdges - Helper functions for BuildSchedGraph. void BuildSchedUnits(); void AddSchedEdges(); diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index cb1a0d6..f1b6f1e 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -593,7 +593,7 @@ void SelectionDAG::DeallocateNode(SDNode *N) { NodeAllocator.Deallocate(AllNodes.remove(N)); // Remove the ordering of this node. - if (Ordering) Ordering->remove(N); + Ordering->remove(N); } /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that @@ -790,8 +790,7 @@ SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli) getVTList(MVT::Other)), Root(getEntryNode()), Ordering(0) { AllNodes.push_back(&EntryNode); - if (DisableScheduling) - Ordering = new SDNodeOrdering(); + Ordering = new SDNodeOrdering(); } void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi, @@ -830,8 +829,7 @@ void SelectionDAG::clear() { EntryNode.UseList = 0; AllNodes.push_back(&EntryNode); Root = getEntryNode(); - if (DisableScheduling) - Ordering = new SDNodeOrdering(); + Ordering = new SDNodeOrdering(); } SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { @@ -5172,6 +5170,7 @@ unsigned SelectionDAG::AssignTopologicalOrder() { // count of outstanding operands. for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { SDNode *N = I++; + checkForCycles(N); unsigned Degree = N->getNumOperands(); if (Degree == 0) { // A node with no uses, add it to the result array immediately. @@ -5179,6 +5178,7 @@ unsigned SelectionDAG::AssignTopologicalOrder() { allnodes_iterator Q = N; if (Q != SortedPos) SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); + assert(SortedPos != AllNodes.end() && "Overran node list"); ++SortedPos; } else { // Temporarily use the Node Id as scratch space for the degree count. @@ -5190,22 +5190,34 @@ unsigned SelectionDAG::AssignTopologicalOrder() { // such that by the time the end is reached all nodes will be sorted. for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { SDNode *N = I; + checkForCycles(N); + // N is in sorted position, so all its uses have one less operand + // that needs to be sorted. for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); UI != UE; ++UI) { SDNode *P = *UI; unsigned Degree = P->getNodeId(); + assert(Degree != 0 && "Invalid node degree"); --Degree; if (Degree == 0) { // All of P's operands are sorted, so P may sorted now. P->setNodeId(DAGSize++); if (P != SortedPos) SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); + assert(SortedPos != AllNodes.end() && "Overran node list"); ++SortedPos; } else { // Update P's outstanding operand count. P->setNodeId(Degree); } } + if (I == SortedPos) { + allnodes_iterator J = I; + SDNode *S = ++J; + dbgs() << "Offending node:\n"; + S->dumprFull(); + assert(0 && "Overran sorted position"); + } } assert(SortedPos == AllNodes.end() && @@ -5227,14 +5239,13 @@ unsigned SelectionDAG::AssignTopologicalOrder() { /// AssignOrdering - Assign an order to the SDNode. void SelectionDAG::AssignOrdering(SDNode *SD, unsigned Order) { assert(SD && "Trying to assign an order to a null node!"); - if (Ordering) - Ordering->add(SD, Order); + Ordering->add(SD, Order); } /// GetOrdering - Get the order for the SDNode. unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { assert(SD && "Trying to get the order of a null node!"); - return Ordering ? Ordering->getOrder(SD) : 0; + return Ordering->getOrder(SD); } @@ -5893,6 +5904,45 @@ void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { print_details(OS, G); } +static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, + const SelectionDAG *G, unsigned depth, + unsigned indent) +{ + if (depth == 0) + return; + + OS.indent(indent); + + N->print(OS, G); + + if (depth < 1) + return; + + for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { + OS << '\n'; + printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2); + } +} + +void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, + unsigned depth) const { + printrWithDepthHelper(OS, this, G, depth, 0); +} + +void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { + // Don't print impossibly deep things. + printrWithDepth(OS, G, 100); +} + +void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { + printrWithDepth(dbgs(), G, depth); +} + +void SDNode::dumprFull(const SelectionDAG *G) const { + // Don't print impossibly deep things. + dumprWithDepth(G, 100); +} + static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) if (N->getOperand(i).getNode()->hasOneUse()) @@ -6228,3 +6278,35 @@ bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { return false; return true; } + +static void checkForCyclesHelper(const SDNode *N, + std::set<const SDNode *> &visited) { + if (visited.find(N) != visited.end()) { + dbgs() << "Offending node:\n"; + N->dumprFull(); + assert(0 && "Detected cycle in SelectionDAG"); + } + + std::set<const SDNode*>::iterator i; + bool inserted; + + tie(i, inserted) = visited.insert(N); + assert(inserted && "Missed cycle"); + + for(unsigned i = 0; i < N->getNumOperands(); ++i) { + checkForCyclesHelper(N->getOperand(i).getNode(), visited); + } + visited.erase(i); +} + +void llvm::checkForCycles(const llvm::SDNode *N) { +#ifdef XDEBUG + assert(N && "Checking nonexistant SDNode"); + std::set<const SDNode *> visited; + checkForCyclesHelper(N, visited); +#endif +} + +void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { + checkForCycles(DAG->getRoot().getNode()); +} diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 5e3a3b5..23c7059 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -176,7 +176,7 @@ static SDValue getCopyFromParts(SelectionDAG &DAG, DebugLoc dl, unsigned Order, assert(NumParts > 0 && "No parts to assemble!"); const TargetLowering &TLI = DAG.getTargetLoweringInfo(); SDValue Val = Parts[0]; - if (DisableScheduling) DAG.AssignOrdering(Val.getNode(), Order); + DAG.AssignOrdering(Val.getNode(), Order); if (NumParts > 1) { // Assemble the value from multiple parts. @@ -209,11 +209,9 @@ static SDValue getCopyFromParts(SelectionDAG &DAG, DebugLoc dl, unsigned Order, Val = DAG.getNode(ISD::BUILD_PAIR, dl, RoundVT, Lo, Hi); - if (DisableScheduling) { - DAG.AssignOrdering(Lo.getNode(), Order); - DAG.AssignOrdering(Hi.getNode(), Order); - DAG.AssignOrdering(Val.getNode(), Order); - } + DAG.AssignOrdering(Lo.getNode(), Order); + DAG.AssignOrdering(Hi.getNode(), Order); + DAG.AssignOrdering(Val.getNode(), Order); if (RoundParts < NumParts) { // Assemble the trailing non-power-of-2 part. @@ -228,15 +226,15 @@ static SDValue getCopyFromParts(SelectionDAG &DAG, DebugLoc dl, unsigned Order, std::swap(Lo, Hi); EVT TotalVT = EVT::getIntegerVT(*DAG.getContext(), NumParts * PartBits); Hi = DAG.getNode(ISD::ANY_EXTEND, dl, TotalVT, Hi); - if (DisableScheduling) DAG.AssignOrdering(Hi.getNode(), Order); + DAG.AssignOrdering(Hi.getNode(), Order); Hi = DAG.getNode(ISD::SHL, dl, TotalVT, Hi, DAG.getConstant(Lo.getValueType().getSizeInBits(), TLI.getPointerTy())); - if (DisableScheduling) DAG.AssignOrdering(Hi.getNode(), Order); + DAG.AssignOrdering(Hi.getNode(), Order); Lo = DAG.getNode(ISD::ZERO_EXTEND, dl, TotalVT, Lo); - if (DisableScheduling) DAG.AssignOrdering(Lo.getNode(), Order); + DAG.AssignOrdering(Lo.getNode(), Order); Val = DAG.getNode(ISD::OR, dl, TotalVT, Lo, Hi); - if (DisableScheduling) DAG.AssignOrdering(Val.getNode(), Order); + DAG.AssignOrdering(Val.getNode(), Order); } } else if (ValueVT.isVector()) { // Handle a multi-element vector. @@ -277,7 +275,7 @@ static SDValue getCopyFromParts(SelectionDAG &DAG, DebugLoc dl, unsigned Order, Val = DAG.getNode(IntermediateVT.isVector() ? ISD::CONCAT_VECTORS : ISD::BUILD_VECTOR, dl, ValueVT, &Ops[0], NumIntermediates); - if (DisableScheduling) DAG.AssignOrdering(Val.getNode(), Order); + DAG.AssignOrdering(Val.getNode(), Order); } else if (PartVT.isFloatingPoint()) { // FP split into multiple FP parts (for ppcf128) assert(ValueVT == EVT(MVT::ppcf128) && PartVT == EVT(MVT::f64) && @@ -289,11 +287,9 @@ static SDValue getCopyFromParts(SelectionDAG &DAG, DebugLoc dl, unsigned Order, std::swap(Lo, Hi); Val = DAG.getNode(ISD::BUILD_PAIR, dl, ValueVT, Lo, Hi); - if (DisableScheduling) { - DAG.AssignOrdering(Hi.getNode(), Order); - DAG.AssignOrdering(Lo.getNode(), Order); - DAG.AssignOrdering(Val.getNode(), Order); - } + DAG.AssignOrdering(Hi.getNode(), Order); + DAG.AssignOrdering(Lo.getNode(), Order); + DAG.AssignOrdering(Val.getNode(), Order); } else { // FP split into integer parts (soft fp) assert(ValueVT.isFloatingPoint() && PartVT.isInteger() && @@ -312,8 +308,7 @@ static SDValue getCopyFromParts(SelectionDAG &DAG, DebugLoc dl, unsigned Order, if (PartVT.isVector()) { assert(ValueVT.isVector() && "Unknown vector conversion!"); SDValue Res = DAG.getNode(ISD::BIT_CONVERT, dl, ValueVT, Val); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), Order); + DAG.AssignOrdering(Res.getNode(), Order); return Res; } @@ -322,8 +317,7 @@ static SDValue getCopyFromParts(SelectionDAG &DAG, DebugLoc dl, unsigned Order, ValueVT.getVectorNumElements() == 1 && "Only trivial scalar-to-vector conversions should get here!"); SDValue Res = DAG.getNode(ISD::BUILD_VECTOR, dl, ValueVT, Val); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), Order); + DAG.AssignOrdering(Res.getNode(), Order); return Res; } @@ -336,13 +330,13 @@ static SDValue getCopyFromParts(SelectionDAG &DAG, DebugLoc dl, unsigned Order, if (AssertOp != ISD::DELETED_NODE) Val = DAG.getNode(AssertOp, dl, PartVT, Val, DAG.getValueType(ValueVT)); - if (DisableScheduling) DAG.AssignOrdering(Val.getNode(), Order); + DAG.AssignOrdering(Val.getNode(), Order); Val = DAG.getNode(ISD::TRUNCATE, dl, ValueVT, Val); - if (DisableScheduling) DAG.AssignOrdering(Val.getNode(), Order); + DAG.AssignOrdering(Val.getNode(), Order); return Val; } else { Val = DAG.getNode(ISD::ANY_EXTEND, dl, ValueVT, Val); - if (DisableScheduling) DAG.AssignOrdering(Val.getNode(), Order); + DAG.AssignOrdering(Val.getNode(), Order); return Val; } } @@ -352,18 +346,18 @@ static SDValue getCopyFromParts(SelectionDAG &DAG, DebugLoc dl, unsigned Order, // FP_ROUND's are always exact here. Val = DAG.getNode(ISD::FP_ROUND, dl, ValueVT, Val, DAG.getIntPtrConstant(1)); - if (DisableScheduling) DAG.AssignOrdering(Val.getNode(), Order); + DAG.AssignOrdering(Val.getNode(), Order); return Val; } Val = DAG.getNode(ISD::FP_EXTEND, dl, ValueVT, Val); - if (DisableScheduling) DAG.AssignOrdering(Val.getNode(), Order); + DAG.AssignOrdering(Val.getNode(), Order); return Val; } if (PartVT.getSizeInBits() == ValueVT.getSizeInBits()) { Val = DAG.getNode(ISD::BIT_CONVERT, dl, ValueVT, Val); - if (DisableScheduling) DAG.AssignOrdering(Val.getNode(), Order); + DAG.AssignOrdering(Val.getNode(), Order); return Val; } @@ -420,7 +414,7 @@ static void getCopyToParts(SelectionDAG &DAG, DebugLoc dl, unsigned Order, } } - if (DisableScheduling) DAG.AssignOrdering(Val.getNode(), Order); + DAG.AssignOrdering(Val.getNode(), Order); // The value may have changed - recompute ValueVT. ValueVT = Val.getValueType(); @@ -455,10 +449,8 @@ static void getCopyToParts(SelectionDAG &DAG, DebugLoc dl, unsigned Order, ValueVT = EVT::getIntegerVT(*DAG.getContext(), NumParts * PartBits); Val = DAG.getNode(ISD::TRUNCATE, dl, ValueVT, Val); - if (DisableScheduling) { - DAG.AssignOrdering(OddVal.getNode(), Order); - DAG.AssignOrdering(Val.getNode(), Order); - } + DAG.AssignOrdering(OddVal.getNode(), Order); + DAG.AssignOrdering(Val.getNode(), Order); } // The number of parts is a power of 2. Repeatedly bisect the value using @@ -468,8 +460,7 @@ static void getCopyToParts(SelectionDAG &DAG, DebugLoc dl, unsigned Order, ValueVT.getSizeInBits()), Val); - if (DisableScheduling) - DAG.AssignOrdering(Parts[0].getNode(), Order); + DAG.AssignOrdering(Parts[0].getNode(), Order); for (unsigned StepSize = NumParts; StepSize > 1; StepSize /= 2) { for (unsigned i = 0; i < NumParts; i += StepSize) { @@ -485,20 +476,16 @@ static void getCopyToParts(SelectionDAG &DAG, DebugLoc dl, unsigned Order, ThisVT, Part0, DAG.getConstant(0, PtrVT)); - if (DisableScheduling) { - DAG.AssignOrdering(Part0.getNode(), Order); - DAG.AssignOrdering(Part1.getNode(), Order); - } + DAG.AssignOrdering(Part0.getNode(), Order); + DAG.AssignOrdering(Part1.getNode(), Order); if (ThisBits == PartBits && ThisVT != PartVT) { Part0 = DAG.getNode(ISD::BIT_CONVERT, dl, PartVT, Part0); Part1 = DAG.getNode(ISD::BIT_CONVERT, dl, PartVT, Part1); - if (DisableScheduling) { - DAG.AssignOrdering(Part0.getNode(), Order); - DAG.AssignOrdering(Part1.getNode(), Order); - } + DAG.AssignOrdering(Part0.getNode(), Order); + DAG.AssignOrdering(Part1.getNode(), Order); } } } @@ -524,9 +511,7 @@ static void getCopyToParts(SelectionDAG &DAG, DebugLoc dl, unsigned Order, } } - if (DisableScheduling) - DAG.AssignOrdering(Val.getNode(), Order); - + DAG.AssignOrdering(Val.getNode(), Order); Parts[0] = Val; return; } @@ -555,8 +540,7 @@ static void getCopyToParts(SelectionDAG &DAG, DebugLoc dl, unsigned Order, IntermediateVT, Val, DAG.getConstant(i, PtrVT)); - if (DisableScheduling) - DAG.AssignOrdering(Ops[i].getNode(), Order); + DAG.AssignOrdering(Ops[i].getNode(), Order); } // Split the intermediate operands into legal parts. @@ -717,8 +701,7 @@ SDValue SelectionDAGBuilder::getValue(const Value *V) { SDValue Res = DAG.getMergeValues(&Constants[0], Constants.size(), getCurDebugLoc()); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return Res; } @@ -744,8 +727,7 @@ SDValue SelectionDAGBuilder::getValue(const Value *V) { SDValue Res = DAG.getMergeValues(&Constants[0], NumElts, getCurDebugLoc()); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return Res; } @@ -776,9 +758,7 @@ SDValue SelectionDAGBuilder::getValue(const Value *V) { // Create a BUILD_VECTOR node. SDValue Res = DAG.getNode(ISD::BUILD_VECTOR, getCurDebugLoc(), VT, &Ops[0], Ops.size()); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); - + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return NodeMap[V] = Res; } @@ -800,18 +780,19 @@ SDValue SelectionDAGBuilder::getValue(const Value *V) { SDNodeOrder, Chain, NULL); } -/// Get the EVTs and ArgFlags collections that represent the return type -/// of the given function. This does not require a DAG or a return value, and -/// is suitable for use before any DAGs for the function are constructed. +/// Get the EVTs and ArgFlags collections that represent the legalized return +/// type of the given function. This does not require a DAG or a return value, +/// and is suitable for use before any DAGs for the function are constructed. static void getReturnInfo(const Type* ReturnType, Attributes attr, SmallVectorImpl<EVT> &OutVTs, SmallVectorImpl<ISD::ArgFlagsTy> &OutFlags, TargetLowering &TLI, SmallVectorImpl<uint64_t> *Offsets = 0) { SmallVector<EVT, 4> ValueVTs; - ComputeValueVTs(TLI, ReturnType, ValueVTs, Offsets); + ComputeValueVTs(TLI, ReturnType, ValueVTs); unsigned NumValues = ValueVTs.size(); - if ( NumValues == 0 ) return; + if (NumValues == 0) return; + unsigned Offset = 0; for (unsigned j = 0, f = NumValues; j != f; ++j) { EVT VT = ValueVTs[j]; @@ -834,6 +815,9 @@ static void getReturnInfo(const Type* ReturnType, unsigned NumParts = TLI.getNumRegisters(ReturnType->getContext(), VT); EVT PartVT = TLI.getRegisterType(ReturnType->getContext(), VT); + unsigned PartSize = TLI.getTargetData()->getTypeAllocSize( + PartVT.getTypeForEVT(ReturnType->getContext())); + // 'inreg' on function refers to return value ISD::ArgFlagsTy Flags = ISD::ArgFlagsTy(); if (attr & Attribute::InReg) @@ -848,6 +832,11 @@ static void getReturnInfo(const Type* ReturnType, for (unsigned i = 0; i < NumParts; ++i) { OutVTs.push_back(PartVT); OutFlags.push_back(Flags); + if (Offsets) + { + Offsets->push_back(Offset); + Offset += PartSize; + } } } } @@ -886,17 +875,14 @@ void SelectionDAGBuilder::visitRet(ReturnInst &I) { SDValue(RetOp.getNode(), RetOp.getResNo() + i), Add, NULL, Offsets[i], false, 0); - if (DisableScheduling) { - DAG.AssignOrdering(Add.getNode(), SDNodeOrder); - DAG.AssignOrdering(Chains[i].getNode(), SDNodeOrder); - } + DAG.AssignOrdering(Add.getNode(), SDNodeOrder); + DAG.AssignOrdering(Chains[i].getNode(), SDNodeOrder); } Chain = DAG.getNode(ISD::TokenFactor, getCurDebugLoc(), MVT::Other, &Chains[0], NumValues); - if (DisableScheduling) - DAG.AssignOrdering(Chain.getNode(), SDNodeOrder); + DAG.AssignOrdering(Chain.getNode(), SDNodeOrder); } else { for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) { SmallVector<EVT, 4> ValueVTs; @@ -962,9 +948,7 @@ void SelectionDAGBuilder::visitRet(ReturnInst &I) { // Update the DAG with the new chain value resulting from return lowering. DAG.setRoot(Chain); - - if (DisableScheduling) - DAG.AssignOrdering(Chain.getNode(), SDNodeOrder); + DAG.AssignOrdering(Chain.getNode(), SDNodeOrder); } /// CopyToExportRegsIfNeeded - If the given value has virtual registers @@ -1230,9 +1214,7 @@ void SelectionDAGBuilder::visitBr(BranchInst &I) { MVT::Other, getControlRoot(), DAG.getBasicBlock(Succ0MBB)); DAG.setRoot(V); - - if (DisableScheduling) - DAG.AssignOrdering(V.getNode(), SDNodeOrder); + DAG.AssignOrdering(V.getNode(), SDNodeOrder); } return; @@ -1339,8 +1321,7 @@ void SelectionDAGBuilder::visitSwitchCase(CaseBlock &CB) { } } - if (DisableScheduling) - DAG.AssignOrdering(Cond.getNode(), SDNodeOrder); + DAG.AssignOrdering(Cond.getNode(), SDNodeOrder); // Update successor info CurMBB->addSuccessor(CB.TrueBB); @@ -1359,17 +1340,13 @@ void SelectionDAGBuilder::visitSwitchCase(CaseBlock &CB) { std::swap(CB.TrueBB, CB.FalseBB); SDValue True = DAG.getConstant(1, Cond.getValueType()); Cond = DAG.getNode(ISD::XOR, dl, Cond.getValueType(), Cond, True); - - if (DisableScheduling) - DAG.AssignOrdering(Cond.getNode(), SDNodeOrder); + DAG.AssignOrdering(Cond.getNode(), SDNodeOrder); } SDValue BrCond = DAG.getNode(ISD::BRCOND, dl, MVT::Other, getControlRoot(), Cond, DAG.getBasicBlock(CB.TrueBB)); - - if (DisableScheduling) - DAG.AssignOrdering(BrCond.getNode(), SDNodeOrder); + DAG.AssignOrdering(BrCond.getNode(), SDNodeOrder); // If the branch was constant folded, fix up the CFG. if (BrCond.getOpcode() == ISD::BR) { @@ -1383,8 +1360,7 @@ void SelectionDAGBuilder::visitSwitchCase(CaseBlock &CB) { BrCond = DAG.getNode(ISD::BR, dl, MVT::Other, BrCond, DAG.getBasicBlock(CB.FalseBB)); - if (DisableScheduling) - DAG.AssignOrdering(BrCond.getNode(), SDNodeOrder); + DAG.AssignOrdering(BrCond.getNode(), SDNodeOrder); } } @@ -1404,11 +1380,9 @@ void SelectionDAGBuilder::visitJumpTable(JumpTable &JT) { Table, Index); DAG.setRoot(BrJumpTable); - if (DisableScheduling) { - DAG.AssignOrdering(Index.getNode(), SDNodeOrder); - DAG.AssignOrdering(Table.getNode(), SDNodeOrder); - DAG.AssignOrdering(BrJumpTable.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(Index.getNode(), SDNodeOrder); + DAG.AssignOrdering(Table.getNode(), SDNodeOrder); + DAG.AssignOrdering(BrJumpTable.getNode(), SDNodeOrder); } /// visitJumpTableHeader - This function emits necessary code to produce index @@ -1443,12 +1417,10 @@ void SelectionDAGBuilder::visitJumpTableHeader(JumpTable &JT, DAG.getConstant(JTH.Last-JTH.First,VT), ISD::SETUGT); - if (DisableScheduling) { - DAG.AssignOrdering(Sub.getNode(), SDNodeOrder); - DAG.AssignOrdering(SwitchOp.getNode(), SDNodeOrder); - DAG.AssignOrdering(CopyTo.getNode(), SDNodeOrder); - DAG.AssignOrdering(CMP.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(Sub.getNode(), SDNodeOrder); + DAG.AssignOrdering(SwitchOp.getNode(), SDNodeOrder); + DAG.AssignOrdering(CopyTo.getNode(), SDNodeOrder); + DAG.AssignOrdering(CMP.getNode(), SDNodeOrder); // Set NextBlock to be the MBB immediately after the current one, if any. // This is used to avoid emitting unnecessary branches to the next block. @@ -1462,15 +1434,12 @@ void SelectionDAGBuilder::visitJumpTableHeader(JumpTable &JT, MVT::Other, CopyTo, CMP, DAG.getBasicBlock(JT.Default)); - if (DisableScheduling) - DAG.AssignOrdering(BrCond.getNode(), SDNodeOrder); + DAG.AssignOrdering(BrCond.getNode(), SDNodeOrder); if (JT.MBB != NextBlock) { BrCond = DAG.getNode(ISD::BR, getCurDebugLoc(), MVT::Other, BrCond, DAG.getBasicBlock(JT.MBB)); - - if (DisableScheduling) - DAG.AssignOrdering(BrCond.getNode(), SDNodeOrder); + DAG.AssignOrdering(BrCond.getNode(), SDNodeOrder); } DAG.setRoot(BrCond); @@ -1498,12 +1467,10 @@ void SelectionDAGBuilder::visitBitTestHeader(BitTestBlock &B) { SDValue CopyTo = DAG.getCopyToReg(getControlRoot(), getCurDebugLoc(), B.Reg, ShiftOp); - if (DisableScheduling) { - DAG.AssignOrdering(Sub.getNode(), SDNodeOrder); - DAG.AssignOrdering(RangeCmp.getNode(), SDNodeOrder); - DAG.AssignOrdering(ShiftOp.getNode(), SDNodeOrder); - DAG.AssignOrdering(CopyTo.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(Sub.getNode(), SDNodeOrder); + DAG.AssignOrdering(RangeCmp.getNode(), SDNodeOrder); + DAG.AssignOrdering(ShiftOp.getNode(), SDNodeOrder); + DAG.AssignOrdering(CopyTo.getNode(), SDNodeOrder); // Set NextBlock to be the MBB immediately after the current one, if any. // This is used to avoid emitting unnecessary branches to the next block. @@ -1521,15 +1488,12 @@ void SelectionDAGBuilder::visitBitTestHeader(BitTestBlock &B) { MVT::Other, CopyTo, RangeCmp, DAG.getBasicBlock(B.Default)); - if (DisableScheduling) - DAG.AssignOrdering(BrRange.getNode(), SDNodeOrder); + DAG.AssignOrdering(BrRange.getNode(), SDNodeOrder); if (MBB != NextBlock) { BrRange = DAG.getNode(ISD::BR, getCurDebugLoc(), MVT::Other, CopyTo, DAG.getBasicBlock(MBB)); - - if (DisableScheduling) - DAG.AssignOrdering(BrRange.getNode(), SDNodeOrder); + DAG.AssignOrdering(BrRange.getNode(), SDNodeOrder); } DAG.setRoot(BrRange); @@ -1556,12 +1520,10 @@ void SelectionDAGBuilder::visitBitTestCase(MachineBasicBlock* NextMBB, AndOp, DAG.getConstant(0, TLI.getPointerTy()), ISD::SETNE); - if (DisableScheduling) { - DAG.AssignOrdering(ShiftOp.getNode(), SDNodeOrder); - DAG.AssignOrdering(SwitchVal.getNode(), SDNodeOrder); - DAG.AssignOrdering(AndOp.getNode(), SDNodeOrder); - DAG.AssignOrdering(AndCmp.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(ShiftOp.getNode(), SDNodeOrder); + DAG.AssignOrdering(SwitchVal.getNode(), SDNodeOrder); + DAG.AssignOrdering(AndOp.getNode(), SDNodeOrder); + DAG.AssignOrdering(AndCmp.getNode(), SDNodeOrder); CurMBB->addSuccessor(B.TargetBB); CurMBB->addSuccessor(NextMBB); @@ -1570,8 +1532,7 @@ void SelectionDAGBuilder::visitBitTestCase(MachineBasicBlock* NextMBB, MVT::Other, getControlRoot(), AndCmp, DAG.getBasicBlock(B.TargetBB)); - if (DisableScheduling) - DAG.AssignOrdering(BrAnd.getNode(), SDNodeOrder); + DAG.AssignOrdering(BrAnd.getNode(), SDNodeOrder); // Set NextBlock to be the MBB immediately after the current one, if any. // This is used to avoid emitting unnecessary branches to the next block. @@ -1583,9 +1544,7 @@ void SelectionDAGBuilder::visitBitTestCase(MachineBasicBlock* NextMBB, if (NextMBB != NextBlock) { BrAnd = DAG.getNode(ISD::BR, getCurDebugLoc(), MVT::Other, BrAnd, DAG.getBasicBlock(NextMBB)); - - if (DisableScheduling) - DAG.AssignOrdering(BrAnd.getNode(), SDNodeOrder); + DAG.AssignOrdering(BrAnd.getNode(), SDNodeOrder); } DAG.setRoot(BrAnd); @@ -1615,9 +1574,7 @@ void SelectionDAGBuilder::visitInvoke(InvokeInst &I) { MVT::Other, getControlRoot(), DAG.getBasicBlock(Return)); DAG.setRoot(Branch); - - if (DisableScheduling) - DAG.AssignOrdering(Branch.getNode(), SDNodeOrder); + DAG.AssignOrdering(Branch.getNode(), SDNodeOrder); } void SelectionDAGBuilder::visitUnwind(UnwindInst &I) { @@ -2134,9 +2091,7 @@ void SelectionDAGBuilder::visitSwitch(SwitchInst &SI) { MVT::Other, getControlRoot(), DAG.getBasicBlock(Default)); DAG.setRoot(Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); } return; @@ -2194,9 +2149,7 @@ void SelectionDAGBuilder::visitIndirectBr(IndirectBrInst &I) { MVT::Other, getControlRoot(), getValue(I.getAddress())); DAG.setRoot(Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); } void SelectionDAGBuilder::visitFSub(User &I) { @@ -2214,10 +2167,7 @@ void SelectionDAGBuilder::visitFSub(User &I) { SDValue Res = DAG.getNode(ISD::FNEG, getCurDebugLoc(), Op2.getValueType(), Op2); setValue(&I, Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); - + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return; } } @@ -2229,10 +2179,7 @@ void SelectionDAGBuilder::visitFSub(User &I) { SDValue Res = DAG.getNode(ISD::FNEG, getCurDebugLoc(), Op2.getValueType(), Op2); setValue(&I, Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); - + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return; } @@ -2245,9 +2192,7 @@ void SelectionDAGBuilder::visitBinary(User &I, unsigned OpCode) { SDValue Res = DAG.getNode(OpCode, getCurDebugLoc(), Op1.getValueType(), Op1, Op2); setValue(&I, Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); } void SelectionDAGBuilder::visitShift(User &I, unsigned Opcode) { @@ -2283,12 +2228,9 @@ void SelectionDAGBuilder::visitShift(User &I, unsigned Opcode) { SDValue Res = DAG.getNode(Opcode, getCurDebugLoc(), Op1.getValueType(), Op1, Op2); setValue(&I, Res); - - if (DisableScheduling) { - DAG.AssignOrdering(Op1.getNode(), SDNodeOrder); - DAG.AssignOrdering(Op2.getNode(), SDNodeOrder); - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(Op1.getNode(), SDNodeOrder); + DAG.AssignOrdering(Op2.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); } void SelectionDAGBuilder::visitICmp(User &I) { @@ -2304,9 +2246,7 @@ void SelectionDAGBuilder::visitICmp(User &I) { EVT DestVT = TLI.getValueType(I.getType()); SDValue Res = DAG.getSetCC(getCurDebugLoc(), DestVT, Op1, Op2, Opcode); setValue(&I, Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); } void SelectionDAGBuilder::visitFCmp(User &I) { @@ -2321,9 +2261,7 @@ void SelectionDAGBuilder::visitFCmp(User &I) { EVT DestVT = TLI.getValueType(I.getType()); SDValue Res = DAG.getSetCC(getCurDebugLoc(), DestVT, Op1, Op2, Condition); setValue(&I, Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); } void SelectionDAGBuilder::visitSelect(User &I) { @@ -2345,17 +2283,14 @@ void SelectionDAGBuilder::visitSelect(User &I) { SDValue(FalseVal.getNode(), FalseVal.getResNo() + i)); - if (DisableScheduling) - DAG.AssignOrdering(Values[i].getNode(), SDNodeOrder); + DAG.AssignOrdering(Values[i].getNode(), SDNodeOrder); } SDValue Res = DAG.getNode(ISD::MERGE_VALUES, getCurDebugLoc(), DAG.getVTList(&ValueVTs[0], NumValues), &Values[0], NumValues); setValue(&I, Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); } void SelectionDAGBuilder::visitTrunc(User &I) { @@ -2364,9 +2299,7 @@ void SelectionDAGBuilder::visitTrunc(User &I) { EVT DestVT = TLI.getValueType(I.getType()); SDValue Res = DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(), DestVT, N); setValue(&I, Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); } void SelectionDAGBuilder::visitZExt(User &I) { @@ -2376,9 +2309,7 @@ void SelectionDAGBuilder::visitZExt(User &I) { EVT DestVT = TLI.getValueType(I.getType()); SDValue Res = DAG.getNode(ISD::ZERO_EXTEND, getCurDebugLoc(), DestVT, N); setValue(&I, Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); } void SelectionDAGBuilder::visitSExt(User &I) { @@ -2388,9 +2319,7 @@ void SelectionDAGBuilder::visitSExt(User &I) { EVT DestVT = TLI.getValueType(I.getType()); SDValue Res = DAG.getNode(ISD::SIGN_EXTEND, getCurDebugLoc(), DestVT, N); setValue(&I, Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); } void SelectionDAGBuilder::visitFPTrunc(User &I) { @@ -2400,9 +2329,7 @@ void SelectionDAGBuilder::visitFPTrunc(User &I) { SDValue Res = DAG.getNode(ISD::FP_ROUND, getCurDebugLoc(), DestVT, N, DAG.getIntPtrConstant(0)); setValue(&I, Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); } void SelectionDAGBuilder::visitFPExt(User &I){ @@ -2411,9 +2338,7 @@ void SelectionDAGBuilder::visitFPExt(User &I){ EVT DestVT = TLI.getValueType(I.getType()); SDValue Res = DAG.getNode(ISD::FP_EXTEND, getCurDebugLoc(), DestVT, N); setValue(&I, Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); } void SelectionDAGBuilder::visitFPToUI(User &I) { @@ -2422,9 +2347,7 @@ void SelectionDAGBuilder::visitFPToUI(User &I) { EVT DestVT = TLI.getValueType(I.getType()); SDValue Res = DAG.getNode(ISD::FP_TO_UINT, getCurDebugLoc(), DestVT, N); setValue(&I, Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); } void SelectionDAGBuilder::visitFPToSI(User &I) { @@ -2433,9 +2356,7 @@ void SelectionDAGBuilder::visitFPToSI(User &I) { EVT DestVT = TLI.getValueType(I.getType()); SDValue Res = DAG.getNode(ISD::FP_TO_SINT, getCurDebugLoc(), DestVT, N); setValue(&I, Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); } void SelectionDAGBuilder::visitUIToFP(User &I) { @@ -2444,9 +2365,7 @@ void SelectionDAGBuilder::visitUIToFP(User &I) { EVT DestVT = TLI.getValueType(I.getType()); SDValue Res = DAG.getNode(ISD::UINT_TO_FP, getCurDebugLoc(), DestVT, N); setValue(&I, Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); } void SelectionDAGBuilder::visitSIToFP(User &I){ @@ -2455,9 +2374,7 @@ void SelectionDAGBuilder::visitSIToFP(User &I){ EVT DestVT = TLI.getValueType(I.getType()); SDValue Res = DAG.getNode(ISD::SINT_TO_FP, getCurDebugLoc(), DestVT, N); setValue(&I, Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); } void SelectionDAGBuilder::visitPtrToInt(User &I) { @@ -2468,9 +2385,7 @@ void SelectionDAGBuilder::visitPtrToInt(User &I) { EVT DestVT = TLI.getValueType(I.getType()); SDValue Res = DAG.getZExtOrTrunc(N, getCurDebugLoc(), DestVT); setValue(&I, Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); } void SelectionDAGBuilder::visitIntToPtr(User &I) { @@ -2481,9 +2396,7 @@ void SelectionDAGBuilder::visitIntToPtr(User &I) { EVT DestVT = TLI.getValueType(I.getType()); SDValue Res = DAG.getZExtOrTrunc(N, getCurDebugLoc(), DestVT); setValue(&I, Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); } void SelectionDAGBuilder::visitBitCast(User &I) { @@ -2496,9 +2409,7 @@ void SelectionDAGBuilder::visitBitCast(User &I) { SDValue Res = DAG.getNode(ISD::BIT_CONVERT, getCurDebugLoc(), DestVT, N); // convert types. setValue(&I, Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); } else { setValue(&I, N); // noop cast. } @@ -2515,10 +2426,8 @@ void SelectionDAGBuilder::visitInsertElement(User &I) { InVec, InVal, InIdx); setValue(&I, Res); - if (DisableScheduling) { - DAG.AssignOrdering(InIdx.getNode(), SDNodeOrder); - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(InIdx.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); } void SelectionDAGBuilder::visitExtractElement(User &I) { @@ -2530,10 +2439,8 @@ void SelectionDAGBuilder::visitExtractElement(User &I) { TLI.getValueType(I.getType()), InVec, InIdx); setValue(&I, Res); - if (DisableScheduling) { - DAG.AssignOrdering(InIdx.getNode(), SDNodeOrder); - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(InIdx.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); } @@ -2573,10 +2480,7 @@ void SelectionDAGBuilder::visitShuffleVector(User &I) { SDValue Res = DAG.getVectorShuffle(VT, getCurDebugLoc(), Src1, Src2, &Mask[0]); setValue(&I, Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); - + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return; } @@ -2590,10 +2494,7 @@ void SelectionDAGBuilder::visitShuffleVector(User &I) { SDValue Res = DAG.getNode(ISD::CONCAT_VECTORS, getCurDebugLoc(), VT, Src1, Src2); setValue(&I, Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); - + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return; } @@ -2628,13 +2529,9 @@ void SelectionDAGBuilder::visitShuffleVector(User &I) { SDValue Res = DAG.getVectorShuffle(VT, getCurDebugLoc(), Src1, Src2, &MappedOps[0]); setValue(&I, Res); - - if (DisableScheduling) { - DAG.AssignOrdering(Src1.getNode(), SDNodeOrder); - DAG.AssignOrdering(Src2.getNode(), SDNodeOrder); - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); - } - + DAG.AssignOrdering(Src1.getNode(), SDNodeOrder); + DAG.AssignOrdering(Src2.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return; } @@ -2688,10 +2585,7 @@ void SelectionDAGBuilder::visitShuffleVector(User &I) { if (RangeUse[0] == 0 && RangeUse[1] == 0) { SDValue Res = DAG.getUNDEF(VT); setValue(&I, Res); // Vectors are not used. - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); - + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return; } else if (RangeUse[0] < 2 && RangeUse[1] < 2) { @@ -2704,8 +2598,7 @@ void SelectionDAGBuilder::visitShuffleVector(User &I) { Src = DAG.getNode(ISD::EXTRACT_SUBVECTOR, getCurDebugLoc(), VT, Src, DAG.getIntPtrConstant(StartIdx[Input])); - if (DisableScheduling) - DAG.AssignOrdering(Src.getNode(), SDNodeOrder); + DAG.AssignOrdering(Src.getNode(), SDNodeOrder); } // Calculate new mask. @@ -2723,10 +2616,7 @@ void SelectionDAGBuilder::visitShuffleVector(User &I) { SDValue Res = DAG.getVectorShuffle(VT, getCurDebugLoc(), Src1, Src2, &MappedOps[0]); setValue(&I, Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); - + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return; } } @@ -2753,18 +2643,14 @@ void SelectionDAGBuilder::visitShuffleVector(User &I) { DAG.getConstant(Idx - SrcNumElts, PtrVT)); Ops.push_back(Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); } } SDValue Res = DAG.getNode(ISD::BUILD_VECTOR, getCurDebugLoc(), VT, &Ops[0], Ops.size()); setValue(&I, Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); } void SelectionDAGBuilder::visitInsertValue(InsertValueInst &I) { @@ -2807,9 +2693,7 @@ void SelectionDAGBuilder::visitInsertValue(InsertValueInst &I) { DAG.getVTList(&AggValueVTs[0], NumAggValues), &Values[0], NumAggValues); setValue(&I, Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); } void SelectionDAGBuilder::visitExtractValue(ExtractValueInst &I) { @@ -2839,9 +2723,7 @@ void SelectionDAGBuilder::visitExtractValue(ExtractValueInst &I) { DAG.getVTList(&ValValueVTs[0], NumValValues), &Values[0], NumValValues); setValue(&I, Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); } void SelectionDAGBuilder::visitGetElementPtr(User &I) { @@ -2858,9 +2740,7 @@ void SelectionDAGBuilder::visitGetElementPtr(User &I) { uint64_t Offset = TD->getStructLayout(StTy)->getElementOffset(Field); N = DAG.getNode(ISD::ADD, getCurDebugLoc(), N.getValueType(), N, DAG.getIntPtrConstant(Offset)); - - if (DisableScheduling) - DAG.AssignOrdering(N.getNode(), SDNodeOrder); + DAG.AssignOrdering(N.getNode(), SDNodeOrder); } Ty = StTy->getElementType(Field); @@ -2885,11 +2765,8 @@ void SelectionDAGBuilder::visitGetElementPtr(User &I) { N = DAG.getNode(ISD::ADD, getCurDebugLoc(), N.getValueType(), N, OffsVal); - if (DisableScheduling) { - DAG.AssignOrdering(OffsVal.getNode(), SDNodeOrder); - DAG.AssignOrdering(N.getNode(), SDNodeOrder); - } - + DAG.AssignOrdering(OffsVal.getNode(), SDNodeOrder); + DAG.AssignOrdering(N.getNode(), SDNodeOrder); continue; } @@ -2916,15 +2793,12 @@ void SelectionDAGBuilder::visitGetElementPtr(User &I) { N.getValueType(), IdxN, Scale); } - if (DisableScheduling) - DAG.AssignOrdering(IdxN.getNode(), SDNodeOrder); + DAG.AssignOrdering(IdxN.getNode(), SDNodeOrder); } N = DAG.getNode(ISD::ADD, getCurDebugLoc(), N.getValueType(), N, IdxN); - - if (DisableScheduling) - DAG.AssignOrdering(N.getNode(), SDNodeOrder); + DAG.AssignOrdering(N.getNode(), SDNodeOrder); } } @@ -2949,14 +2823,11 @@ void SelectionDAGBuilder::visitAlloca(AllocaInst &I) { AllocSize, DAG.getConstant(TySize, AllocSize.getValueType())); - if (DisableScheduling) - DAG.AssignOrdering(AllocSize.getNode(), SDNodeOrder); + DAG.AssignOrdering(AllocSize.getNode(), SDNodeOrder); EVT IntPtr = TLI.getPointerTy(); AllocSize = DAG.getZExtOrTrunc(AllocSize, getCurDebugLoc(), IntPtr); - - if (DisableScheduling) - DAG.AssignOrdering(AllocSize.getNode(), SDNodeOrder); + DAG.AssignOrdering(AllocSize.getNode(), SDNodeOrder); // Handle alignment. If the requested alignment is less than or equal to // the stack alignment, ignore it. If the size is greater than or equal to @@ -2971,15 +2842,13 @@ void SelectionDAGBuilder::visitAlloca(AllocaInst &I) { AllocSize = DAG.getNode(ISD::ADD, getCurDebugLoc(), AllocSize.getValueType(), AllocSize, DAG.getIntPtrConstant(StackAlign-1)); - if (DisableScheduling) - DAG.AssignOrdering(AllocSize.getNode(), SDNodeOrder); + DAG.AssignOrdering(AllocSize.getNode(), SDNodeOrder); // Mask out the low bits for alignment purposes. AllocSize = DAG.getNode(ISD::AND, getCurDebugLoc(), AllocSize.getValueType(), AllocSize, DAG.getIntPtrConstant(~(uint64_t)(StackAlign-1))); - if (DisableScheduling) - DAG.AssignOrdering(AllocSize.getNode(), SDNodeOrder); + DAG.AssignOrdering(AllocSize.getNode(), SDNodeOrder); SDValue Ops[] = { getRoot(), AllocSize, DAG.getIntPtrConstant(Align) }; SDVTList VTs = DAG.getVTList(AllocSize.getValueType(), MVT::Other); @@ -2987,9 +2856,7 @@ void SelectionDAGBuilder::visitAlloca(AllocaInst &I) { VTs, Ops, 3); setValue(&I, DSA); DAG.setRoot(DSA.getValue(1)); - - if (DisableScheduling) - DAG.AssignOrdering(DSA.getNode(), SDNodeOrder); + DAG.AssignOrdering(DSA.getNode(), SDNodeOrder); // Inform the Frame Information that we have just allocated a variable-sized // object. @@ -3038,10 +2905,8 @@ void SelectionDAGBuilder::visitLoad(LoadInst &I) { Values[i] = L; Chains[i] = L.getValue(1); - if (DisableScheduling) { - DAG.AssignOrdering(A.getNode(), SDNodeOrder); - DAG.AssignOrdering(L.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(A.getNode(), SDNodeOrder); + DAG.AssignOrdering(L.getNode(), SDNodeOrder); } if (!ConstantMemory) { @@ -3052,17 +2917,14 @@ void SelectionDAGBuilder::visitLoad(LoadInst &I) { else PendingLoads.push_back(Chain); - if (DisableScheduling) - DAG.AssignOrdering(Chain.getNode(), SDNodeOrder); + DAG.AssignOrdering(Chain.getNode(), SDNodeOrder); } SDValue Res = DAG.getNode(ISD::MERGE_VALUES, getCurDebugLoc(), DAG.getVTList(&ValueVTs[0], NumValues), &Values[0], NumValues); setValue(&I, Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); } void SelectionDAGBuilder::visitStore(StoreInst &I) { @@ -3095,18 +2957,14 @@ void SelectionDAGBuilder::visitStore(StoreInst &I) { SDValue(Src.getNode(), Src.getResNo() + i), Add, PtrV, Offsets[i], isVolatile, Alignment); - if (DisableScheduling) { - DAG.AssignOrdering(Add.getNode(), SDNodeOrder); - DAG.AssignOrdering(Chains[i].getNode(), SDNodeOrder); - } + DAG.AssignOrdering(Add.getNode(), SDNodeOrder); + DAG.AssignOrdering(Chains[i].getNode(), SDNodeOrder); } SDValue Res = DAG.getNode(ISD::TokenFactor, getCurDebugLoc(), MVT::Other, &Chains[0], NumValues); DAG.setRoot(Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); } /// visitTargetIntrinsic - Lower a call of a target intrinsic to an INTRINSIC @@ -3177,8 +3035,7 @@ void SelectionDAGBuilder::visitTargetIntrinsic(CallInst &I, VTs, &Ops[0], Ops.size()); } - if (DisableScheduling) - DAG.AssignOrdering(Result.getNode(), SDNodeOrder); + DAG.AssignOrdering(Result.getNode(), SDNodeOrder); if (HasChain) { SDValue Chain = Result.getValue(Result.getNode()->getNumValues()-1); @@ -3192,9 +3049,7 @@ void SelectionDAGBuilder::visitTargetIntrinsic(CallInst &I, if (const VectorType *PTy = dyn_cast<VectorType>(I.getType())) { EVT VT = TLI.getValueType(PTy); Result = DAG.getNode(ISD::BIT_CONVERT, getCurDebugLoc(), VT, Result); - - if (DisableScheduling) - DAG.AssignOrdering(Result.getNode(), SDNodeOrder); + DAG.AssignOrdering(Result.getNode(), SDNodeOrder); } setValue(&I, Result); @@ -3215,12 +3070,9 @@ GetSignificand(SelectionDAG &DAG, SDValue Op, DebugLoc dl, unsigned Order) { DAG.getConstant(0x3f800000, MVT::i32)); SDValue Res = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f32, t2); - if (DisableScheduling) { - DAG.AssignOrdering(t1.getNode(), Order); - DAG.AssignOrdering(t2.getNode(), Order); - DAG.AssignOrdering(Res.getNode(), Order); - } - + DAG.AssignOrdering(t1.getNode(), Order); + DAG.AssignOrdering(t2.getNode(), Order); + DAG.AssignOrdering(Res.getNode(), Order); return Res; } @@ -3240,13 +3092,10 @@ GetExponent(SelectionDAG &DAG, SDValue Op, const TargetLowering &TLI, DAG.getConstant(127, MVT::i32)); SDValue Res = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, t2); - if (DisableScheduling) { - DAG.AssignOrdering(t0.getNode(), Order); - DAG.AssignOrdering(t1.getNode(), Order); - DAG.AssignOrdering(t2.getNode(), Order); - DAG.AssignOrdering(Res.getNode(), Order); - } - + DAG.AssignOrdering(t0.getNode(), Order); + DAG.AssignOrdering(t1.getNode(), Order); + DAG.AssignOrdering(t2.getNode(), Order); + DAG.AssignOrdering(Res.getNode(), Order); return Res; } @@ -3271,10 +3120,7 @@ SelectionDAGBuilder::implVisitBinaryAtomic(CallInst& I, ISD::NodeType Op) { I.getOperand(1)); setValue(&I, L); DAG.setRoot(L.getValue(1)); - - if (DisableScheduling) - DAG.AssignOrdering(L.getNode(), SDNodeOrder); - + DAG.AssignOrdering(L.getNode(), SDNodeOrder); return 0; } @@ -3288,10 +3134,7 @@ SelectionDAGBuilder::implVisitAluOverflow(CallInst &I, ISD::NodeType Op) { SDValue Result = DAG.getNode(Op, getCurDebugLoc(), VTs, Op1, Op2); setValue(&I, Result); - - if (DisableScheduling) - DAG.AssignOrdering(Result.getNode(), SDNodeOrder); - + DAG.AssignOrdering(Result.getNode(), SDNodeOrder); return 0; } @@ -3319,19 +3162,15 @@ SelectionDAGBuilder::visitExp(CallInst &I) { SDValue t1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, IntegerPartOfX); SDValue X = DAG.getNode(ISD::FSUB, dl, MVT::f32, t0, t1); - if (DisableScheduling) { - DAG.AssignOrdering(t0.getNode(), SDNodeOrder); - DAG.AssignOrdering(IntegerPartOfX.getNode(), SDNodeOrder); - DAG.AssignOrdering(t1.getNode(), SDNodeOrder); - DAG.AssignOrdering(X.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(t0.getNode(), SDNodeOrder); + DAG.AssignOrdering(IntegerPartOfX.getNode(), SDNodeOrder); + DAG.AssignOrdering(t1.getNode(), SDNodeOrder); + DAG.AssignOrdering(X.getNode(), SDNodeOrder); // IntegerPartOfX <<= 23; IntegerPartOfX = DAG.getNode(ISD::SHL, dl, MVT::i32, IntegerPartOfX, DAG.getConstant(23, TLI.getPointerTy())); - - if (DisableScheduling) - DAG.AssignOrdering(IntegerPartOfX.getNode(), SDNodeOrder); + DAG.AssignOrdering(IntegerPartOfX.getNode(), SDNodeOrder); if (LimitFloatPrecision <= 6) { // For floating-point precision of 6: @@ -3356,15 +3195,13 @@ SelectionDAGBuilder::visitExp(CallInst &I) { result = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f32, t6); - if (DisableScheduling) { - DAG.AssignOrdering(t2.getNode(), SDNodeOrder); - DAG.AssignOrdering(t3.getNode(), SDNodeOrder); - DAG.AssignOrdering(t4.getNode(), SDNodeOrder); - DAG.AssignOrdering(t5.getNode(), SDNodeOrder); - DAG.AssignOrdering(t6.getNode(), SDNodeOrder); - DAG.AssignOrdering(TwoToFracPartOfX.getNode(), SDNodeOrder); - DAG.AssignOrdering(result.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(t2.getNode(), SDNodeOrder); + DAG.AssignOrdering(t3.getNode(), SDNodeOrder); + DAG.AssignOrdering(t4.getNode(), SDNodeOrder); + DAG.AssignOrdering(t5.getNode(), SDNodeOrder); + DAG.AssignOrdering(t6.getNode(), SDNodeOrder); + DAG.AssignOrdering(TwoToFracPartOfX.getNode(), SDNodeOrder); + DAG.AssignOrdering(result.getNode(), SDNodeOrder); } else if (LimitFloatPrecision > 6 && LimitFloatPrecision <= 12) { // For floating-point precision of 12: // @@ -3392,17 +3229,15 @@ SelectionDAGBuilder::visitExp(CallInst &I) { result = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f32, t8); - if (DisableScheduling) { - DAG.AssignOrdering(t2.getNode(), SDNodeOrder); - DAG.AssignOrdering(t3.getNode(), SDNodeOrder); - DAG.AssignOrdering(t4.getNode(), SDNodeOrder); - DAG.AssignOrdering(t5.getNode(), SDNodeOrder); - DAG.AssignOrdering(t6.getNode(), SDNodeOrder); - DAG.AssignOrdering(t7.getNode(), SDNodeOrder); - DAG.AssignOrdering(t8.getNode(), SDNodeOrder); - DAG.AssignOrdering(TwoToFracPartOfX.getNode(), SDNodeOrder); - DAG.AssignOrdering(result.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(t2.getNode(), SDNodeOrder); + DAG.AssignOrdering(t3.getNode(), SDNodeOrder); + DAG.AssignOrdering(t4.getNode(), SDNodeOrder); + DAG.AssignOrdering(t5.getNode(), SDNodeOrder); + DAG.AssignOrdering(t6.getNode(), SDNodeOrder); + DAG.AssignOrdering(t7.getNode(), SDNodeOrder); + DAG.AssignOrdering(t8.getNode(), SDNodeOrder); + DAG.AssignOrdering(TwoToFracPartOfX.getNode(), SDNodeOrder); + DAG.AssignOrdering(result.getNode(), SDNodeOrder); } else { // LimitFloatPrecision > 12 && LimitFloatPrecision <= 18 // For floating-point precision of 18: // @@ -3443,31 +3278,28 @@ SelectionDAGBuilder::visitExp(CallInst &I) { result = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f32, t14); - if (DisableScheduling) { - DAG.AssignOrdering(t2.getNode(), SDNodeOrder); - DAG.AssignOrdering(t3.getNode(), SDNodeOrder); - DAG.AssignOrdering(t4.getNode(), SDNodeOrder); - DAG.AssignOrdering(t5.getNode(), SDNodeOrder); - DAG.AssignOrdering(t6.getNode(), SDNodeOrder); - DAG.AssignOrdering(t7.getNode(), SDNodeOrder); - DAG.AssignOrdering(t8.getNode(), SDNodeOrder); - DAG.AssignOrdering(t9.getNode(), SDNodeOrder); - DAG.AssignOrdering(t10.getNode(), SDNodeOrder); - DAG.AssignOrdering(t11.getNode(), SDNodeOrder); - DAG.AssignOrdering(t12.getNode(), SDNodeOrder); - DAG.AssignOrdering(t13.getNode(), SDNodeOrder); - DAG.AssignOrdering(t14.getNode(), SDNodeOrder); - DAG.AssignOrdering(TwoToFracPartOfX.getNode(), SDNodeOrder); - DAG.AssignOrdering(result.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(t2.getNode(), SDNodeOrder); + DAG.AssignOrdering(t3.getNode(), SDNodeOrder); + DAG.AssignOrdering(t4.getNode(), SDNodeOrder); + DAG.AssignOrdering(t5.getNode(), SDNodeOrder); + DAG.AssignOrdering(t6.getNode(), SDNodeOrder); + DAG.AssignOrdering(t7.getNode(), SDNodeOrder); + DAG.AssignOrdering(t8.getNode(), SDNodeOrder); + DAG.AssignOrdering(t9.getNode(), SDNodeOrder); + DAG.AssignOrdering(t10.getNode(), SDNodeOrder); + DAG.AssignOrdering(t11.getNode(), SDNodeOrder); + DAG.AssignOrdering(t12.getNode(), SDNodeOrder); + DAG.AssignOrdering(t13.getNode(), SDNodeOrder); + DAG.AssignOrdering(t14.getNode(), SDNodeOrder); + DAG.AssignOrdering(TwoToFracPartOfX.getNode(), SDNodeOrder); + DAG.AssignOrdering(result.getNode(), SDNodeOrder); } } else { // No special expansion. result = DAG.getNode(ISD::FEXP, dl, getValue(I.getOperand(1)).getValueType(), getValue(I.getOperand(1))); - if (DisableScheduling) - DAG.AssignOrdering(result.getNode(), SDNodeOrder); + DAG.AssignOrdering(result.getNode(), SDNodeOrder); } setValue(&I, result); @@ -3485,16 +3317,14 @@ SelectionDAGBuilder::visitLog(CallInst &I) { SDValue Op = getValue(I.getOperand(1)); SDValue Op1 = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32, Op); - if (DisableScheduling) - DAG.AssignOrdering(Op1.getNode(), SDNodeOrder); + DAG.AssignOrdering(Op1.getNode(), SDNodeOrder); // Scale the exponent by log(2) [0.69314718f]. SDValue Exp = GetExponent(DAG, Op1, TLI, dl, SDNodeOrder); SDValue LogOfExponent = DAG.getNode(ISD::FMUL, dl, MVT::f32, Exp, getF32Constant(DAG, 0x3f317218)); - if (DisableScheduling) - DAG.AssignOrdering(LogOfExponent.getNode(), SDNodeOrder); + DAG.AssignOrdering(LogOfExponent.getNode(), SDNodeOrder); // Get the significand and build it into a floating-point number with // exponent of 1. @@ -3519,13 +3349,11 @@ SelectionDAGBuilder::visitLog(CallInst &I) { result = DAG.getNode(ISD::FADD, dl, MVT::f32, LogOfExponent, LogOfMantissa); - if (DisableScheduling) { - DAG.AssignOrdering(t0.getNode(), SDNodeOrder); - DAG.AssignOrdering(t1.getNode(), SDNodeOrder); - DAG.AssignOrdering(t2.getNode(), SDNodeOrder); - DAG.AssignOrdering(LogOfMantissa.getNode(), SDNodeOrder); - DAG.AssignOrdering(result.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(t0.getNode(), SDNodeOrder); + DAG.AssignOrdering(t1.getNode(), SDNodeOrder); + DAG.AssignOrdering(t2.getNode(), SDNodeOrder); + DAG.AssignOrdering(LogOfMantissa.getNode(), SDNodeOrder); + DAG.AssignOrdering(result.getNode(), SDNodeOrder); } else if (LimitFloatPrecision > 6 && LimitFloatPrecision <= 12) { // For floating-point precision of 12: // @@ -3553,17 +3381,15 @@ SelectionDAGBuilder::visitLog(CallInst &I) { result = DAG.getNode(ISD::FADD, dl, MVT::f32, LogOfExponent, LogOfMantissa); - if (DisableScheduling) { - DAG.AssignOrdering(t0.getNode(), SDNodeOrder); - DAG.AssignOrdering(t1.getNode(), SDNodeOrder); - DAG.AssignOrdering(t2.getNode(), SDNodeOrder); - DAG.AssignOrdering(t3.getNode(), SDNodeOrder); - DAG.AssignOrdering(t4.getNode(), SDNodeOrder); - DAG.AssignOrdering(t5.getNode(), SDNodeOrder); - DAG.AssignOrdering(t6.getNode(), SDNodeOrder); - DAG.AssignOrdering(LogOfMantissa.getNode(), SDNodeOrder); - DAG.AssignOrdering(result.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(t0.getNode(), SDNodeOrder); + DAG.AssignOrdering(t1.getNode(), SDNodeOrder); + DAG.AssignOrdering(t2.getNode(), SDNodeOrder); + DAG.AssignOrdering(t3.getNode(), SDNodeOrder); + DAG.AssignOrdering(t4.getNode(), SDNodeOrder); + DAG.AssignOrdering(t5.getNode(), SDNodeOrder); + DAG.AssignOrdering(t6.getNode(), SDNodeOrder); + DAG.AssignOrdering(LogOfMantissa.getNode(), SDNodeOrder); + DAG.AssignOrdering(result.getNode(), SDNodeOrder); } else { // LimitFloatPrecision > 12 && LimitFloatPrecision <= 18 // For floating-point precision of 18: // @@ -3599,30 +3425,26 @@ SelectionDAGBuilder::visitLog(CallInst &I) { result = DAG.getNode(ISD::FADD, dl, MVT::f32, LogOfExponent, LogOfMantissa); - if (DisableScheduling) { - DAG.AssignOrdering(t0.getNode(), SDNodeOrder); - DAG.AssignOrdering(t1.getNode(), SDNodeOrder); - DAG.AssignOrdering(t2.getNode(), SDNodeOrder); - DAG.AssignOrdering(t3.getNode(), SDNodeOrder); - DAG.AssignOrdering(t4.getNode(), SDNodeOrder); - DAG.AssignOrdering(t5.getNode(), SDNodeOrder); - DAG.AssignOrdering(t6.getNode(), SDNodeOrder); - DAG.AssignOrdering(t7.getNode(), SDNodeOrder); - DAG.AssignOrdering(t8.getNode(), SDNodeOrder); - DAG.AssignOrdering(t9.getNode(), SDNodeOrder); - DAG.AssignOrdering(t10.getNode(), SDNodeOrder); - DAG.AssignOrdering(LogOfMantissa.getNode(), SDNodeOrder); - DAG.AssignOrdering(result.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(t0.getNode(), SDNodeOrder); + DAG.AssignOrdering(t1.getNode(), SDNodeOrder); + DAG.AssignOrdering(t2.getNode(), SDNodeOrder); + DAG.AssignOrdering(t3.getNode(), SDNodeOrder); + DAG.AssignOrdering(t4.getNode(), SDNodeOrder); + DAG.AssignOrdering(t5.getNode(), SDNodeOrder); + DAG.AssignOrdering(t6.getNode(), SDNodeOrder); + DAG.AssignOrdering(t7.getNode(), SDNodeOrder); + DAG.AssignOrdering(t8.getNode(), SDNodeOrder); + DAG.AssignOrdering(t9.getNode(), SDNodeOrder); + DAG.AssignOrdering(t10.getNode(), SDNodeOrder); + DAG.AssignOrdering(LogOfMantissa.getNode(), SDNodeOrder); + DAG.AssignOrdering(result.getNode(), SDNodeOrder); } } else { // No special expansion. result = DAG.getNode(ISD::FLOG, dl, getValue(I.getOperand(1)).getValueType(), getValue(I.getOperand(1))); - - if (DisableScheduling) - DAG.AssignOrdering(result.getNode(), SDNodeOrder); + DAG.AssignOrdering(result.getNode(), SDNodeOrder); } setValue(&I, result); @@ -3640,14 +3462,12 @@ SelectionDAGBuilder::visitLog2(CallInst &I) { SDValue Op = getValue(I.getOperand(1)); SDValue Op1 = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32, Op); - if (DisableScheduling) - DAG.AssignOrdering(Op1.getNode(), SDNodeOrder); + DAG.AssignOrdering(Op1.getNode(), SDNodeOrder); // Get the exponent. SDValue LogOfExponent = GetExponent(DAG, Op1, TLI, dl, SDNodeOrder); - if (DisableScheduling) - DAG.AssignOrdering(LogOfExponent.getNode(), SDNodeOrder); + DAG.AssignOrdering(LogOfExponent.getNode(), SDNodeOrder); // Get the significand and build it into a floating-point number with // exponent of 1. @@ -3672,13 +3492,11 @@ SelectionDAGBuilder::visitLog2(CallInst &I) { result = DAG.getNode(ISD::FADD, dl, MVT::f32, LogOfExponent, Log2ofMantissa); - if (DisableScheduling) { - DAG.AssignOrdering(t0.getNode(), SDNodeOrder); - DAG.AssignOrdering(t1.getNode(), SDNodeOrder); - DAG.AssignOrdering(t2.getNode(), SDNodeOrder); - DAG.AssignOrdering(Log2ofMantissa.getNode(), SDNodeOrder); - DAG.AssignOrdering(result.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(t0.getNode(), SDNodeOrder); + DAG.AssignOrdering(t1.getNode(), SDNodeOrder); + DAG.AssignOrdering(t2.getNode(), SDNodeOrder); + DAG.AssignOrdering(Log2ofMantissa.getNode(), SDNodeOrder); + DAG.AssignOrdering(result.getNode(), SDNodeOrder); } else if (LimitFloatPrecision > 6 && LimitFloatPrecision <= 12) { // For floating-point precision of 12: // @@ -3706,17 +3524,15 @@ SelectionDAGBuilder::visitLog2(CallInst &I) { result = DAG.getNode(ISD::FADD, dl, MVT::f32, LogOfExponent, Log2ofMantissa); - if (DisableScheduling) { - DAG.AssignOrdering(t0.getNode(), SDNodeOrder); - DAG.AssignOrdering(t1.getNode(), SDNodeOrder); - DAG.AssignOrdering(t2.getNode(), SDNodeOrder); - DAG.AssignOrdering(t3.getNode(), SDNodeOrder); - DAG.AssignOrdering(t4.getNode(), SDNodeOrder); - DAG.AssignOrdering(t5.getNode(), SDNodeOrder); - DAG.AssignOrdering(t6.getNode(), SDNodeOrder); - DAG.AssignOrdering(Log2ofMantissa.getNode(), SDNodeOrder); - DAG.AssignOrdering(result.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(t0.getNode(), SDNodeOrder); + DAG.AssignOrdering(t1.getNode(), SDNodeOrder); + DAG.AssignOrdering(t2.getNode(), SDNodeOrder); + DAG.AssignOrdering(t3.getNode(), SDNodeOrder); + DAG.AssignOrdering(t4.getNode(), SDNodeOrder); + DAG.AssignOrdering(t5.getNode(), SDNodeOrder); + DAG.AssignOrdering(t6.getNode(), SDNodeOrder); + DAG.AssignOrdering(Log2ofMantissa.getNode(), SDNodeOrder); + DAG.AssignOrdering(result.getNode(), SDNodeOrder); } else { // LimitFloatPrecision > 12 && LimitFloatPrecision <= 18 // For floating-point precision of 18: // @@ -3753,30 +3569,26 @@ SelectionDAGBuilder::visitLog2(CallInst &I) { result = DAG.getNode(ISD::FADD, dl, MVT::f32, LogOfExponent, Log2ofMantissa); - if (DisableScheduling) { - DAG.AssignOrdering(t0.getNode(), SDNodeOrder); - DAG.AssignOrdering(t1.getNode(), SDNodeOrder); - DAG.AssignOrdering(t2.getNode(), SDNodeOrder); - DAG.AssignOrdering(t3.getNode(), SDNodeOrder); - DAG.AssignOrdering(t4.getNode(), SDNodeOrder); - DAG.AssignOrdering(t5.getNode(), SDNodeOrder); - DAG.AssignOrdering(t6.getNode(), SDNodeOrder); - DAG.AssignOrdering(t7.getNode(), SDNodeOrder); - DAG.AssignOrdering(t8.getNode(), SDNodeOrder); - DAG.AssignOrdering(t9.getNode(), SDNodeOrder); - DAG.AssignOrdering(t10.getNode(), SDNodeOrder); - DAG.AssignOrdering(Log2ofMantissa.getNode(), SDNodeOrder); - DAG.AssignOrdering(result.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(t0.getNode(), SDNodeOrder); + DAG.AssignOrdering(t1.getNode(), SDNodeOrder); + DAG.AssignOrdering(t2.getNode(), SDNodeOrder); + DAG.AssignOrdering(t3.getNode(), SDNodeOrder); + DAG.AssignOrdering(t4.getNode(), SDNodeOrder); + DAG.AssignOrdering(t5.getNode(), SDNodeOrder); + DAG.AssignOrdering(t6.getNode(), SDNodeOrder); + DAG.AssignOrdering(t7.getNode(), SDNodeOrder); + DAG.AssignOrdering(t8.getNode(), SDNodeOrder); + DAG.AssignOrdering(t9.getNode(), SDNodeOrder); + DAG.AssignOrdering(t10.getNode(), SDNodeOrder); + DAG.AssignOrdering(Log2ofMantissa.getNode(), SDNodeOrder); + DAG.AssignOrdering(result.getNode(), SDNodeOrder); } } else { // No special expansion. result = DAG.getNode(ISD::FLOG2, dl, getValue(I.getOperand(1)).getValueType(), getValue(I.getOperand(1))); - - if (DisableScheduling) - DAG.AssignOrdering(result.getNode(), SDNodeOrder); + DAG.AssignOrdering(result.getNode(), SDNodeOrder); } setValue(&I, result); @@ -3794,16 +3606,14 @@ SelectionDAGBuilder::visitLog10(CallInst &I) { SDValue Op = getValue(I.getOperand(1)); SDValue Op1 = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32, Op); - if (DisableScheduling) - DAG.AssignOrdering(Op1.getNode(), SDNodeOrder); + DAG.AssignOrdering(Op1.getNode(), SDNodeOrder); // Scale the exponent by log10(2) [0.30102999f]. SDValue Exp = GetExponent(DAG, Op1, TLI, dl, SDNodeOrder); SDValue LogOfExponent = DAG.getNode(ISD::FMUL, dl, MVT::f32, Exp, getF32Constant(DAG, 0x3e9a209a)); - if (DisableScheduling) - DAG.AssignOrdering(LogOfExponent.getNode(), SDNodeOrder); + DAG.AssignOrdering(LogOfExponent.getNode(), SDNodeOrder); // Get the significand and build it into a floating-point number with // exponent of 1. @@ -3828,13 +3638,11 @@ SelectionDAGBuilder::visitLog10(CallInst &I) { result = DAG.getNode(ISD::FADD, dl, MVT::f32, LogOfExponent, Log10ofMantissa); - if (DisableScheduling) { - DAG.AssignOrdering(t0.getNode(), SDNodeOrder); - DAG.AssignOrdering(t1.getNode(), SDNodeOrder); - DAG.AssignOrdering(t2.getNode(), SDNodeOrder); - DAG.AssignOrdering(Log10ofMantissa.getNode(), SDNodeOrder); - DAG.AssignOrdering(result.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(t0.getNode(), SDNodeOrder); + DAG.AssignOrdering(t1.getNode(), SDNodeOrder); + DAG.AssignOrdering(t2.getNode(), SDNodeOrder); + DAG.AssignOrdering(Log10ofMantissa.getNode(), SDNodeOrder); + DAG.AssignOrdering(result.getNode(), SDNodeOrder); } else if (LimitFloatPrecision > 6 && LimitFloatPrecision <= 12) { // For floating-point precision of 12: // @@ -3858,15 +3666,13 @@ SelectionDAGBuilder::visitLog10(CallInst &I) { result = DAG.getNode(ISD::FADD, dl, MVT::f32, LogOfExponent, Log10ofMantissa); - if (DisableScheduling) { - DAG.AssignOrdering(t0.getNode(), SDNodeOrder); - DAG.AssignOrdering(t1.getNode(), SDNodeOrder); - DAG.AssignOrdering(t2.getNode(), SDNodeOrder); - DAG.AssignOrdering(t3.getNode(), SDNodeOrder); - DAG.AssignOrdering(t4.getNode(), SDNodeOrder); - DAG.AssignOrdering(Log10ofMantissa.getNode(), SDNodeOrder); - DAG.AssignOrdering(result.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(t0.getNode(), SDNodeOrder); + DAG.AssignOrdering(t1.getNode(), SDNodeOrder); + DAG.AssignOrdering(t2.getNode(), SDNodeOrder); + DAG.AssignOrdering(t3.getNode(), SDNodeOrder); + DAG.AssignOrdering(t4.getNode(), SDNodeOrder); + DAG.AssignOrdering(Log10ofMantissa.getNode(), SDNodeOrder); + DAG.AssignOrdering(result.getNode(), SDNodeOrder); } else { // LimitFloatPrecision > 12 && LimitFloatPrecision <= 18 // For floating-point precision of 18: // @@ -3898,28 +3704,24 @@ SelectionDAGBuilder::visitLog10(CallInst &I) { result = DAG.getNode(ISD::FADD, dl, MVT::f32, LogOfExponent, Log10ofMantissa); - if (DisableScheduling) { - DAG.AssignOrdering(t0.getNode(), SDNodeOrder); - DAG.AssignOrdering(t1.getNode(), SDNodeOrder); - DAG.AssignOrdering(t2.getNode(), SDNodeOrder); - DAG.AssignOrdering(t3.getNode(), SDNodeOrder); - DAG.AssignOrdering(t4.getNode(), SDNodeOrder); - DAG.AssignOrdering(t5.getNode(), SDNodeOrder); - DAG.AssignOrdering(t6.getNode(), SDNodeOrder); - DAG.AssignOrdering(t7.getNode(), SDNodeOrder); - DAG.AssignOrdering(t8.getNode(), SDNodeOrder); - DAG.AssignOrdering(Log10ofMantissa.getNode(), SDNodeOrder); - DAG.AssignOrdering(result.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(t0.getNode(), SDNodeOrder); + DAG.AssignOrdering(t1.getNode(), SDNodeOrder); + DAG.AssignOrdering(t2.getNode(), SDNodeOrder); + DAG.AssignOrdering(t3.getNode(), SDNodeOrder); + DAG.AssignOrdering(t4.getNode(), SDNodeOrder); + DAG.AssignOrdering(t5.getNode(), SDNodeOrder); + DAG.AssignOrdering(t6.getNode(), SDNodeOrder); + DAG.AssignOrdering(t7.getNode(), SDNodeOrder); + DAG.AssignOrdering(t8.getNode(), SDNodeOrder); + DAG.AssignOrdering(Log10ofMantissa.getNode(), SDNodeOrder); + DAG.AssignOrdering(result.getNode(), SDNodeOrder); } } else { // No special expansion. result = DAG.getNode(ISD::FLOG10, dl, getValue(I.getOperand(1)).getValueType(), getValue(I.getOperand(1))); - - if (DisableScheduling) - DAG.AssignOrdering(result.getNode(), SDNodeOrder); + DAG.AssignOrdering(result.getNode(), SDNodeOrder); } setValue(&I, result); @@ -3938,8 +3740,7 @@ SelectionDAGBuilder::visitExp2(CallInst &I) { SDValue IntegerPartOfX = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::i32, Op); - if (DisableScheduling) - DAG.AssignOrdering(IntegerPartOfX.getNode(), SDNodeOrder); + DAG.AssignOrdering(IntegerPartOfX.getNode(), SDNodeOrder); // FractionalPartOfX = x - (float)IntegerPartOfX; SDValue t1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, IntegerPartOfX); @@ -3949,11 +3750,9 @@ SelectionDAGBuilder::visitExp2(CallInst &I) { IntegerPartOfX = DAG.getNode(ISD::SHL, dl, MVT::i32, IntegerPartOfX, DAG.getConstant(23, TLI.getPointerTy())); - if (DisableScheduling) { - DAG.AssignOrdering(t1.getNode(), SDNodeOrder); - DAG.AssignOrdering(X.getNode(), SDNodeOrder); - DAG.AssignOrdering(IntegerPartOfX.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(t1.getNode(), SDNodeOrder); + DAG.AssignOrdering(X.getNode(), SDNodeOrder); + DAG.AssignOrdering(IntegerPartOfX.getNode(), SDNodeOrder); if (LimitFloatPrecision <= 6) { // For floating-point precision of 6: @@ -3977,15 +3776,13 @@ SelectionDAGBuilder::visitExp2(CallInst &I) { result = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f32, TwoToFractionalPartOfX); - if (DisableScheduling) { - DAG.AssignOrdering(t2.getNode(), SDNodeOrder); - DAG.AssignOrdering(t3.getNode(), SDNodeOrder); - DAG.AssignOrdering(t4.getNode(), SDNodeOrder); - DAG.AssignOrdering(t5.getNode(), SDNodeOrder); - DAG.AssignOrdering(t6.getNode(), SDNodeOrder); - DAG.AssignOrdering(TwoToFractionalPartOfX.getNode(), SDNodeOrder); - DAG.AssignOrdering(result.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(t2.getNode(), SDNodeOrder); + DAG.AssignOrdering(t3.getNode(), SDNodeOrder); + DAG.AssignOrdering(t4.getNode(), SDNodeOrder); + DAG.AssignOrdering(t5.getNode(), SDNodeOrder); + DAG.AssignOrdering(t6.getNode(), SDNodeOrder); + DAG.AssignOrdering(TwoToFractionalPartOfX.getNode(), SDNodeOrder); + DAG.AssignOrdering(result.getNode(), SDNodeOrder); } else if (LimitFloatPrecision > 6 && LimitFloatPrecision <= 12) { // For floating-point precision of 12: // @@ -4012,17 +3809,15 @@ SelectionDAGBuilder::visitExp2(CallInst &I) { result = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f32, TwoToFractionalPartOfX); - if (DisableScheduling) { - DAG.AssignOrdering(t2.getNode(), SDNodeOrder); - DAG.AssignOrdering(t3.getNode(), SDNodeOrder); - DAG.AssignOrdering(t4.getNode(), SDNodeOrder); - DAG.AssignOrdering(t5.getNode(), SDNodeOrder); - DAG.AssignOrdering(t6.getNode(), SDNodeOrder); - DAG.AssignOrdering(t7.getNode(), SDNodeOrder); - DAG.AssignOrdering(t8.getNode(), SDNodeOrder); - DAG.AssignOrdering(TwoToFractionalPartOfX.getNode(), SDNodeOrder); - DAG.AssignOrdering(result.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(t2.getNode(), SDNodeOrder); + DAG.AssignOrdering(t3.getNode(), SDNodeOrder); + DAG.AssignOrdering(t4.getNode(), SDNodeOrder); + DAG.AssignOrdering(t5.getNode(), SDNodeOrder); + DAG.AssignOrdering(t6.getNode(), SDNodeOrder); + DAG.AssignOrdering(t7.getNode(), SDNodeOrder); + DAG.AssignOrdering(t8.getNode(), SDNodeOrder); + DAG.AssignOrdering(TwoToFractionalPartOfX.getNode(), SDNodeOrder); + DAG.AssignOrdering(result.getNode(), SDNodeOrder); } else { // LimitFloatPrecision > 12 && LimitFloatPrecision <= 18 // For floating-point precision of 18: // @@ -4060,32 +3855,28 @@ SelectionDAGBuilder::visitExp2(CallInst &I) { result = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f32, TwoToFractionalPartOfX); - if (DisableScheduling) { - DAG.AssignOrdering(t2.getNode(), SDNodeOrder); - DAG.AssignOrdering(t3.getNode(), SDNodeOrder); - DAG.AssignOrdering(t4.getNode(), SDNodeOrder); - DAG.AssignOrdering(t5.getNode(), SDNodeOrder); - DAG.AssignOrdering(t6.getNode(), SDNodeOrder); - DAG.AssignOrdering(t7.getNode(), SDNodeOrder); - DAG.AssignOrdering(t8.getNode(), SDNodeOrder); - DAG.AssignOrdering(t9.getNode(), SDNodeOrder); - DAG.AssignOrdering(t10.getNode(), SDNodeOrder); - DAG.AssignOrdering(t11.getNode(), SDNodeOrder); - DAG.AssignOrdering(t12.getNode(), SDNodeOrder); - DAG.AssignOrdering(t13.getNode(), SDNodeOrder); - DAG.AssignOrdering(t14.getNode(), SDNodeOrder); - DAG.AssignOrdering(TwoToFractionalPartOfX.getNode(), SDNodeOrder); - DAG.AssignOrdering(result.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(t2.getNode(), SDNodeOrder); + DAG.AssignOrdering(t3.getNode(), SDNodeOrder); + DAG.AssignOrdering(t4.getNode(), SDNodeOrder); + DAG.AssignOrdering(t5.getNode(), SDNodeOrder); + DAG.AssignOrdering(t6.getNode(), SDNodeOrder); + DAG.AssignOrdering(t7.getNode(), SDNodeOrder); + DAG.AssignOrdering(t8.getNode(), SDNodeOrder); + DAG.AssignOrdering(t9.getNode(), SDNodeOrder); + DAG.AssignOrdering(t10.getNode(), SDNodeOrder); + DAG.AssignOrdering(t11.getNode(), SDNodeOrder); + DAG.AssignOrdering(t12.getNode(), SDNodeOrder); + DAG.AssignOrdering(t13.getNode(), SDNodeOrder); + DAG.AssignOrdering(t14.getNode(), SDNodeOrder); + DAG.AssignOrdering(TwoToFractionalPartOfX.getNode(), SDNodeOrder); + DAG.AssignOrdering(result.getNode(), SDNodeOrder); } } else { // No special expansion. result = DAG.getNode(ISD::FEXP2, dl, getValue(I.getOperand(1)).getValueType(), getValue(I.getOperand(1))); - - if (DisableScheduling) - DAG.AssignOrdering(result.getNode(), SDNodeOrder); + DAG.AssignOrdering(result.getNode(), SDNodeOrder); } setValue(&I, result); @@ -4127,19 +3918,16 @@ SelectionDAGBuilder::visitPow(CallInst &I) { SDValue t1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, IntegerPartOfX); SDValue X = DAG.getNode(ISD::FSUB, dl, MVT::f32, t0, t1); - if (DisableScheduling) { - DAG.AssignOrdering(t0.getNode(), SDNodeOrder); - DAG.AssignOrdering(t1.getNode(), SDNodeOrder); - DAG.AssignOrdering(IntegerPartOfX.getNode(), SDNodeOrder); - DAG.AssignOrdering(X.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(t0.getNode(), SDNodeOrder); + DAG.AssignOrdering(t1.getNode(), SDNodeOrder); + DAG.AssignOrdering(IntegerPartOfX.getNode(), SDNodeOrder); + DAG.AssignOrdering(X.getNode(), SDNodeOrder); // IntegerPartOfX <<= 23; IntegerPartOfX = DAG.getNode(ISD::SHL, dl, MVT::i32, IntegerPartOfX, DAG.getConstant(23, TLI.getPointerTy())); - if (DisableScheduling) - DAG.AssignOrdering(IntegerPartOfX.getNode(), SDNodeOrder); + DAG.AssignOrdering(IntegerPartOfX.getNode(), SDNodeOrder); if (LimitFloatPrecision <= 6) { // For floating-point precision of 6: @@ -4163,15 +3951,13 @@ SelectionDAGBuilder::visitPow(CallInst &I) { result = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f32, TwoToFractionalPartOfX); - if (DisableScheduling) { - DAG.AssignOrdering(t2.getNode(), SDNodeOrder); - DAG.AssignOrdering(t3.getNode(), SDNodeOrder); - DAG.AssignOrdering(t4.getNode(), SDNodeOrder); - DAG.AssignOrdering(t5.getNode(), SDNodeOrder); - DAG.AssignOrdering(t6.getNode(), SDNodeOrder); - DAG.AssignOrdering(TwoToFractionalPartOfX.getNode(), SDNodeOrder); - DAG.AssignOrdering(result.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(t2.getNode(), SDNodeOrder); + DAG.AssignOrdering(t3.getNode(), SDNodeOrder); + DAG.AssignOrdering(t4.getNode(), SDNodeOrder); + DAG.AssignOrdering(t5.getNode(), SDNodeOrder); + DAG.AssignOrdering(t6.getNode(), SDNodeOrder); + DAG.AssignOrdering(TwoToFractionalPartOfX.getNode(), SDNodeOrder); + DAG.AssignOrdering(result.getNode(), SDNodeOrder); } else if (LimitFloatPrecision > 6 && LimitFloatPrecision <= 12) { // For floating-point precision of 12: // @@ -4198,17 +3984,15 @@ SelectionDAGBuilder::visitPow(CallInst &I) { result = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f32, TwoToFractionalPartOfX); - if (DisableScheduling) { - DAG.AssignOrdering(t2.getNode(), SDNodeOrder); - DAG.AssignOrdering(t3.getNode(), SDNodeOrder); - DAG.AssignOrdering(t4.getNode(), SDNodeOrder); - DAG.AssignOrdering(t5.getNode(), SDNodeOrder); - DAG.AssignOrdering(t6.getNode(), SDNodeOrder); - DAG.AssignOrdering(t7.getNode(), SDNodeOrder); - DAG.AssignOrdering(t8.getNode(), SDNodeOrder); - DAG.AssignOrdering(TwoToFractionalPartOfX.getNode(), SDNodeOrder); - DAG.AssignOrdering(result.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(t2.getNode(), SDNodeOrder); + DAG.AssignOrdering(t3.getNode(), SDNodeOrder); + DAG.AssignOrdering(t4.getNode(), SDNodeOrder); + DAG.AssignOrdering(t5.getNode(), SDNodeOrder); + DAG.AssignOrdering(t6.getNode(), SDNodeOrder); + DAG.AssignOrdering(t7.getNode(), SDNodeOrder); + DAG.AssignOrdering(t8.getNode(), SDNodeOrder); + DAG.AssignOrdering(TwoToFractionalPartOfX.getNode(), SDNodeOrder); + DAG.AssignOrdering(result.getNode(), SDNodeOrder); } else { // LimitFloatPrecision > 12 && LimitFloatPrecision <= 18 // For floating-point precision of 18: // @@ -4246,23 +4030,21 @@ SelectionDAGBuilder::visitPow(CallInst &I) { result = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f32, TwoToFractionalPartOfX); - if (DisableScheduling) { - DAG.AssignOrdering(t2.getNode(), SDNodeOrder); - DAG.AssignOrdering(t3.getNode(), SDNodeOrder); - DAG.AssignOrdering(t4.getNode(), SDNodeOrder); - DAG.AssignOrdering(t5.getNode(), SDNodeOrder); - DAG.AssignOrdering(t6.getNode(), SDNodeOrder); - DAG.AssignOrdering(t7.getNode(), SDNodeOrder); - DAG.AssignOrdering(t8.getNode(), SDNodeOrder); - DAG.AssignOrdering(t9.getNode(), SDNodeOrder); - DAG.AssignOrdering(t10.getNode(), SDNodeOrder); - DAG.AssignOrdering(t11.getNode(), SDNodeOrder); - DAG.AssignOrdering(t12.getNode(), SDNodeOrder); - DAG.AssignOrdering(t13.getNode(), SDNodeOrder); - DAG.AssignOrdering(t14.getNode(), SDNodeOrder); - DAG.AssignOrdering(TwoToFractionalPartOfX.getNode(), SDNodeOrder); - DAG.AssignOrdering(result.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(t2.getNode(), SDNodeOrder); + DAG.AssignOrdering(t3.getNode(), SDNodeOrder); + DAG.AssignOrdering(t4.getNode(), SDNodeOrder); + DAG.AssignOrdering(t5.getNode(), SDNodeOrder); + DAG.AssignOrdering(t6.getNode(), SDNodeOrder); + DAG.AssignOrdering(t7.getNode(), SDNodeOrder); + DAG.AssignOrdering(t8.getNode(), SDNodeOrder); + DAG.AssignOrdering(t9.getNode(), SDNodeOrder); + DAG.AssignOrdering(t10.getNode(), SDNodeOrder); + DAG.AssignOrdering(t11.getNode(), SDNodeOrder); + DAG.AssignOrdering(t12.getNode(), SDNodeOrder); + DAG.AssignOrdering(t13.getNode(), SDNodeOrder); + DAG.AssignOrdering(t14.getNode(), SDNodeOrder); + DAG.AssignOrdering(TwoToFractionalPartOfX.getNode(), SDNodeOrder); + DAG.AssignOrdering(result.getNode(), SDNodeOrder); } } else { // No special expansion. @@ -4270,9 +4052,7 @@ SelectionDAGBuilder::visitPow(CallInst &I) { getValue(I.getOperand(1)).getValueType(), getValue(I.getOperand(1)), getValue(I.getOperand(2))); - - if (DisableScheduling) - DAG.AssignOrdering(result.getNode(), SDNodeOrder); + DAG.AssignOrdering(result.getNode(), SDNodeOrder); } setValue(&I, result); @@ -4352,15 +4132,13 @@ SelectionDAGBuilder::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { Res = DAG.getNode(ISD::RETURNADDR, dl, TLI.getPointerTy(), getValue(I.getOperand(1))); setValue(&I, Res); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; case Intrinsic::frameaddress: Res = DAG.getNode(ISD::FRAMEADDR, dl, TLI.getPointerTy(), getValue(I.getOperand(1))); setValue(&I, Res); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; case Intrinsic::setjmp: return "_setjmp"+!TLI.usesUnderscoreSetJmp(); @@ -4374,8 +4152,7 @@ SelectionDAGBuilder::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { Res = DAG.getMemcpy(getRoot(), dl, Op1, Op2, Op3, Align, false, I.getOperand(1), 0, I.getOperand(2), 0); DAG.setRoot(Res); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; } case Intrinsic::memset: { @@ -4386,8 +4163,7 @@ SelectionDAGBuilder::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { Res = DAG.getMemset(getRoot(), dl, Op1, Op2, Op3, Align, I.getOperand(1), 0); DAG.setRoot(Res); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; } case Intrinsic::memmove: { @@ -4406,16 +4182,14 @@ SelectionDAGBuilder::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { Res = DAG.getMemcpy(getRoot(), dl, Op1, Op2, Op3, Align, false, I.getOperand(1), 0, I.getOperand(2), 0); DAG.setRoot(Res); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; } Res = DAG.getMemmove(getRoot(), dl, Op1, Op2, Op3, Align, I.getOperand(1), 0, I.getOperand(2), 0); DAG.setRoot(Res); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; } case Intrinsic::dbg_declare: { @@ -4457,8 +4231,7 @@ SelectionDAGBuilder::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { SDValue Op = DAG.getNode(ISD::EXCEPTIONADDR, dl, VTs, Ops, 1); setValue(&I, Op); DAG.setRoot(Op.getValue(1)); - if (DisableScheduling) - DAG.AssignOrdering(Op.getNode(), SDNodeOrder); + DAG.AssignOrdering(Op.getNode(), SDNodeOrder); return 0; } @@ -4487,10 +4260,8 @@ SelectionDAGBuilder::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { Res = DAG.getSExtOrTrunc(Op, dl, MVT::i32); setValue(&I, Res); - if (DisableScheduling) { - DAG.AssignOrdering(Op.getNode(), SDNodeOrder); - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(Op.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; } @@ -4508,8 +4279,7 @@ SelectionDAGBuilder::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { } setValue(&I, Res); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; } @@ -4523,8 +4293,7 @@ SelectionDAGBuilder::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { getValue(I.getOperand(1)), getValue(I.getOperand(2))); DAG.setRoot(Res); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); } else { setValue(&I, DAG.getConstant(0, TLI.getPointerTy())); } @@ -4550,12 +4319,10 @@ SelectionDAGBuilder::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { Res = DAG.getNode(ISD::ADD, dl, TLI.getPointerTy(), FA, Offset); setValue(&I, Res); - if (DisableScheduling) { - DAG.AssignOrdering(CfaArg.getNode(), SDNodeOrder); - DAG.AssignOrdering(Offset.getNode(), SDNodeOrder); - DAG.AssignOrdering(FA.getNode(), SDNodeOrder); - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(CfaArg.getNode(), SDNodeOrder); + DAG.AssignOrdering(Offset.getNode(), SDNodeOrder); + DAG.AssignOrdering(FA.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; } case Intrinsic::convertff: @@ -4588,8 +4355,7 @@ SelectionDAGBuilder::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { getValue(I.getOperand(3)), Code); setValue(&I, Res); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; } case Intrinsic::sqrt: @@ -4597,31 +4363,27 @@ SelectionDAGBuilder::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { getValue(I.getOperand(1)).getValueType(), getValue(I.getOperand(1))); setValue(&I, Res); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; case Intrinsic::powi: Res = ExpandPowI(dl, getValue(I.getOperand(1)), getValue(I.getOperand(2)), DAG); setValue(&I, Res); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; case Intrinsic::sin: Res = DAG.getNode(ISD::FSIN, dl, getValue(I.getOperand(1)).getValueType(), getValue(I.getOperand(1))); setValue(&I, Res); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; case Intrinsic::cos: Res = DAG.getNode(ISD::FCOS, dl, getValue(I.getOperand(1)).getValueType(), getValue(I.getOperand(1))); setValue(&I, Res); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; case Intrinsic::log: visitLog(I); @@ -4645,8 +4407,7 @@ SelectionDAGBuilder::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { SDValue Tmp = getValue(I.getOperand(1)); Res = DAG.getNode(ISD::PCMARKER, dl, MVT::Other, getRoot(), Tmp); DAG.setRoot(Res); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; } case Intrinsic::readcyclecounter: { @@ -4656,8 +4417,7 @@ SelectionDAGBuilder::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { &Op, 1); setValue(&I, Res); DAG.setRoot(Res.getValue(1)); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; } case Intrinsic::bswap: @@ -4665,16 +4425,14 @@ SelectionDAGBuilder::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { getValue(I.getOperand(1)).getValueType(), getValue(I.getOperand(1))); setValue(&I, Res); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; case Intrinsic::cttz: { SDValue Arg = getValue(I.getOperand(1)); EVT Ty = Arg.getValueType(); Res = DAG.getNode(ISD::CTTZ, dl, Ty, Arg); setValue(&I, Res); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; } case Intrinsic::ctlz: { @@ -4682,8 +4440,7 @@ SelectionDAGBuilder::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { EVT Ty = Arg.getValueType(); Res = DAG.getNode(ISD::CTLZ, dl, Ty, Arg); setValue(&I, Res); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; } case Intrinsic::ctpop: { @@ -4691,8 +4448,7 @@ SelectionDAGBuilder::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { EVT Ty = Arg.getValueType(); Res = DAG.getNode(ISD::CTPOP, dl, Ty, Arg); setValue(&I, Res); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; } case Intrinsic::stacksave: { @@ -4701,16 +4457,14 @@ SelectionDAGBuilder::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { DAG.getVTList(TLI.getPointerTy(), MVT::Other), &Op, 1); setValue(&I, Res); DAG.setRoot(Res.getValue(1)); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; } case Intrinsic::stackrestore: { Res = getValue(I.getOperand(1)); Res = DAG.getNode(ISD::STACKRESTORE, dl, MVT::Other, getRoot(), Res); DAG.setRoot(Res); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; } case Intrinsic::stackprotector: { @@ -4733,8 +4487,7 @@ SelectionDAGBuilder::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { 0, true); setValue(&I, Res); DAG.setRoot(Res); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; } case Intrinsic::objectsize: { @@ -4752,8 +4505,7 @@ SelectionDAGBuilder::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { Res = DAG.getConstant(0, Ty); setValue(&I, Res); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; } case Intrinsic::var_annotation: @@ -4777,8 +4529,7 @@ SelectionDAGBuilder::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { setValue(&I, Res); DAG.setRoot(Res.getValue(1)); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; } case Intrinsic::gcroot: @@ -4797,14 +4548,12 @@ SelectionDAGBuilder::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { case Intrinsic::flt_rounds: Res = DAG.getNode(ISD::FLT_ROUNDS_, dl, MVT::i32); setValue(&I, Res); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; case Intrinsic::trap: Res = DAG.getNode(ISD::TRAP, dl,MVT::Other, getRoot()); DAG.setRoot(Res); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; case Intrinsic::uadd_with_overflow: return implVisitAluOverflow(I, ISD::UADDO); @@ -4827,8 +4576,7 @@ SelectionDAGBuilder::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { Ops[3] = getValue(I.getOperand(3)); Res = DAG.getNode(ISD::PREFETCH, dl, MVT::Other, &Ops[0], 4); DAG.setRoot(Res); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; } @@ -4840,8 +4588,7 @@ SelectionDAGBuilder::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { Res = DAG.getNode(ISD::MEMBARRIER, dl, MVT::Other, &Ops[0], 6); DAG.setRoot(Res); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; } case Intrinsic::atomic_cmp_swap: { @@ -4856,8 +4603,7 @@ SelectionDAGBuilder::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { I.getOperand(1)); setValue(&I, L); DAG.setRoot(L.getValue(1)); - if (DisableScheduling) - DAG.AssignOrdering(L.getNode(), SDNodeOrder); + DAG.AssignOrdering(L.getNode(), SDNodeOrder); return 0; } case Intrinsic::atomic_load_add: @@ -4888,8 +4634,7 @@ SelectionDAGBuilder::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { // Discard region information. Res = DAG.getUNDEF(TLI.getPointerTy()); setValue(&I, Res); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); return 0; case Intrinsic::invariant_end: case Intrinsic::lifetime_end: @@ -5070,8 +4815,7 @@ void SelectionDAGBuilder::LowerCallTo(CallSite CS, SDValue Callee, "Null value expected with tail call!"); if (Result.first.getNode()) { setValue(CS.getInstruction(), Result.first); - if (DisableScheduling) - DAG.AssignOrdering(Result.first.getNode(), SDNodeOrder); + DAG.AssignOrdering(Result.first.getNode(), SDNodeOrder); } else if (!CanLowerReturn && Result.second.getNode()) { // The instruction result is the result of loading from the // hidden sret parameter. @@ -5098,25 +4842,42 @@ void SelectionDAGBuilder::LowerCallTo(CallSite CS, SDValue Callee, SDValue Chain = DAG.getNode(ISD::TokenFactor, getCurDebugLoc(), MVT::Other, &Chains[0], NumValues); PendingLoads.push_back(Chain); + + // Collect the legal value parts into potentially illegal values + // that correspond to the original function's return values. + SmallVector<EVT, 4> RetTys; + RetTy = FTy->getReturnType(); + ComputeValueVTs(TLI, RetTy, RetTys); + ISD::NodeType AssertOp = ISD::DELETED_NODE; + SmallVector<SDValue, 4> ReturnValues; + unsigned CurReg = 0; + for (unsigned I = 0, E = RetTys.size(); I != E; ++I) { + EVT VT = RetTys[I]; + EVT RegisterVT = TLI.getRegisterType(RetTy->getContext(), VT); + unsigned NumRegs = TLI.getNumRegisters(RetTy->getContext(), VT); + + SDValue ReturnValue = + getCopyFromParts(DAG, getCurDebugLoc(), SDNodeOrder, &Values[CurReg], NumRegs, + RegisterVT, VT, AssertOp); + ReturnValues.push_back(ReturnValue); + DAG.AssignOrdering(ReturnValue.getNode(), SDNodeOrder); + CurReg += NumRegs; + } + SDValue Res = DAG.getNode(ISD::MERGE_VALUES, getCurDebugLoc(), + DAG.getVTList(&RetTys[0], RetTys.size()), + &ReturnValues[0], ReturnValues.size()); - SDValue MV = DAG.getNode(ISD::MERGE_VALUES, - getCurDebugLoc(), - DAG.getVTList(&OutVTs[0], NumValues), - &Values[0], NumValues); - setValue(CS.getInstruction(), MV); + setValue(CS.getInstruction(), Res); - if (DisableScheduling) { - DAG.AssignOrdering(Chain.getNode(), SDNodeOrder); - DAG.AssignOrdering(MV.getNode(), SDNodeOrder); - } + DAG.AssignOrdering(Chain.getNode(), SDNodeOrder); + DAG.AssignOrdering(Res.getNode(), SDNodeOrder); } // As a special case, a null chain means that a tail call has been emitted and // the DAG root is already updated. if (Result.second.getNode()) { DAG.setRoot(Result.second); - if (DisableScheduling) - DAG.AssignOrdering(Result.second.getNode(), SDNodeOrder); + DAG.AssignOrdering(Result.second.getNode(), SDNodeOrder); } else { HasTailCall = true; } @@ -5391,9 +5152,7 @@ SDValue RegsForValue::getCopyFromRegs(SelectionDAG &DAG, DebugLoc dl, } Chain = P.getValue(1); - - if (DisableScheduling) - DAG.AssignOrdering(P.getNode(), Order); + DAG.AssignOrdering(P.getNode(), Order); // If the source register was virtual and if we know something about it, // add an assert node. @@ -5432,9 +5191,7 @@ SDValue RegsForValue::getCopyFromRegs(SelectionDAG &DAG, DebugLoc dl, if (FromVT != MVT::Other) { P = DAG.getNode(isSExt ? ISD::AssertSext : ISD::AssertZext, dl, RegisterVT, P, DAG.getValueType(FromVT)); - - if (DisableScheduling) - DAG.AssignOrdering(P.getNode(), Order); + DAG.AssignOrdering(P.getNode(), Order); } } } @@ -5444,8 +5201,7 @@ SDValue RegsForValue::getCopyFromRegs(SelectionDAG &DAG, DebugLoc dl, Values[Value] = getCopyFromParts(DAG, dl, Order, Parts.begin(), NumRegs, RegisterVT, ValueVT); - if (DisableScheduling) - DAG.AssignOrdering(Values[Value].getNode(), Order); + DAG.AssignOrdering(Values[Value].getNode(), Order); Part += NumRegs; Parts.clear(); } @@ -5453,8 +5209,7 @@ SDValue RegsForValue::getCopyFromRegs(SelectionDAG &DAG, DebugLoc dl, SDValue Res = DAG.getNode(ISD::MERGE_VALUES, dl, DAG.getVTList(&ValueVTs[0], ValueVTs.size()), &Values[0], ValueVTs.size()); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), Order); + DAG.AssignOrdering(Res.getNode(), Order); return Res; } @@ -5491,9 +5246,7 @@ void RegsForValue::getCopyToRegs(SDValue Val, SelectionDAG &DAG, DebugLoc dl, } Chains[i] = Part.getValue(0); - - if (DisableScheduling) - DAG.AssignOrdering(Part.getNode(), Order); + DAG.AssignOrdering(Part.getNode(), Order); } if (NumRegs == 1 || Flag) @@ -5511,8 +5264,7 @@ void RegsForValue::getCopyToRegs(SDValue Val, SelectionDAG &DAG, DebugLoc dl, else Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &Chains[0], NumRegs); - if (DisableScheduling) - DAG.AssignOrdering(Chain.getNode(), Order); + DAG.AssignOrdering(Chain.getNode(), Order); } /// AddInlineAsmOperands - Add this value to the specified inlineasm node @@ -5529,8 +5281,7 @@ void RegsForValue::AddInlineAsmOperands(unsigned Code, SDValue Res = DAG.getTargetConstant(Flag, MVT::i32); Ops.push_back(Res); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), Order); + DAG.AssignOrdering(Res.getNode(), Order); for (unsigned Value = 0, Reg = 0, e = ValueVTs.size(); Value != e; ++Value) { unsigned NumRegs = TLI->getNumRegisters(*DAG.getContext(), ValueVTs[Value]); @@ -5539,9 +5290,7 @@ void RegsForValue::AddInlineAsmOperands(unsigned Code, assert(Reg < Regs.size() && "Mismatch in # registers expected"); SDValue Res = DAG.getRegister(Regs[Reg++], RegisterVT); Ops.push_back(Res); - - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), Order); + DAG.AssignOrdering(Res.getNode(), Order); } } } @@ -5761,8 +5510,7 @@ GetRegistersForValue(SDISelAsmOperandInfo &OpInfo, OpInfo.ConstraintVT = RegVT; } - if (DisableScheduling) - DAG.AssignOrdering(OpInfo.CallOperand.getNode(), SDNodeOrder); + DAG.AssignOrdering(OpInfo.CallOperand.getNode(), SDNodeOrder); } NumRegs = TLI.getNumRegisters(Context, OpInfo.ConstraintVT); @@ -6483,8 +6231,7 @@ TargetLowering::LowerCallTo(SDValue Chain, const Type *RetTy, "LowerCall emitted a value with the wrong type!"); }); - if (DisableScheduling) - DAG.AssignOrdering(Chain.getNode(), Order); + DAG.AssignOrdering(Chain.getNode(), Order); // For a tail call, the return value is merely live-out and there aren't // any nodes in the DAG representing it. Return a special value to @@ -6513,8 +6260,7 @@ TargetLowering::LowerCallTo(SDValue Chain, const Type *RetTy, getCopyFromParts(DAG, dl, Order, &InVals[CurReg], NumRegs, RegisterVT, VT, AssertOp); ReturnValues.push_back(ReturnValue); - if (DisableScheduling) - DAG.AssignOrdering(ReturnValue.getNode(), Order); + DAG.AssignOrdering(ReturnValue.getNode(), Order); CurReg += NumRegs; } @@ -6527,8 +6273,7 @@ TargetLowering::LowerCallTo(SDValue Chain, const Type *RetTy, SDValue Res = DAG.getNode(ISD::MERGE_VALUES, dl, DAG.getVTList(&RetTys[0], RetTys.size()), &ReturnValues[0], ReturnValues.size()); - if (DisableScheduling) - DAG.AssignOrdering(Res.getNode(), Order); + DAG.AssignOrdering(Res.getNode(), Order); return std::make_pair(Res, Chain); } diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 9ac8f83..2bec964 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -144,7 +144,7 @@ namespace llvm { if (TLI.getSchedulingPreference() == TargetLowering::SchedulingForLatency) return createTDListDAGScheduler(IS, OptLevel); assert(TLI.getSchedulingPreference() == - TargetLowering::SchedulingForRegPressure && "Unknown sched type!"); + TargetLowering::SchedulingForRegPressure && "Unknown sched type!"); return createBURRListDAGScheduler(IS, OptLevel); } } @@ -1426,7 +1426,7 @@ void SelectionDAGISel::CannotYetSelect(SDNode *N) { std::string msg; raw_string_ostream Msg(msg); Msg << "Cannot yet select: "; - N->print(Msg, CurDAG); + N->printrFull(Msg, CurDAG); llvm_report_error(Msg.str()); } diff --git a/lib/CodeGen/SlotIndexes.cpp b/lib/CodeGen/SlotIndexes.cpp index b8f529b..a23efb2 100644 --- a/lib/CodeGen/SlotIndexes.cpp +++ b/lib/CodeGen/SlotIndexes.cpp @@ -14,6 +14,7 @@ #include "llvm/Support/Debug.h" #include "llvm/Support/raw_ostream.h" #include "llvm/Support/ManagedStatic.h" +#include "llvm/Target/TargetInstrInfo.h" using namespace llvm; @@ -107,6 +108,8 @@ bool SlotIndexes::runOnMachineFunction(MachineFunction &fn) { for (MachineBasicBlock::iterator miItr = mbb->begin(), miEnd = mbb->end(); miItr != miEnd; ++miItr) { MachineInstr *mi = &*miItr; + if (mi->getOpcode()==TargetInstrInfo::DEBUG_VALUE) + continue; if (miItr == mbb->getFirstTerminator()) { push_back(createEntry(0, index)); diff --git a/lib/CodeGen/TailDuplication.cpp b/lib/CodeGen/TailDuplication.cpp index f51f74d..d6860bc 100644 --- a/lib/CodeGen/TailDuplication.cpp +++ b/lib/CodeGen/TailDuplication.cpp @@ -108,12 +108,8 @@ bool TailDuplicatePass::runOnMachineFunction(MachineFunction &MF) { MMI = getAnalysisIfAvailable<MachineModuleInfo>(); bool MadeChange = false; - bool MadeChangeThisIteration = true; - while (MadeChangeThisIteration) { - MadeChangeThisIteration = false; - MadeChangeThisIteration |= TailDuplicateBlocks(MF); - MadeChange |= MadeChangeThisIteration; - } + while (TailDuplicateBlocks(MF)) + MadeChange = true; return MadeChange; } @@ -437,28 +433,28 @@ bool TailDuplicatePass::TailDuplicate(MachineBasicBlock *TailBB, MachineFunction &MF, SmallVector<MachineBasicBlock*, 8> &TDBBs, SmallVector<MachineInstr*, 16> &Copies) { - // Pre-regalloc tail duplication hurts compile time and doesn't help - // much except for indirect branches. - bool hasIndirectBranch = (!TailBB->empty() && - TailBB->back().getDesc().isIndirectBranch()); - if (PreRegAlloc && !hasIndirectBranch) - return false; - // Set the limit on the number of instructions to duplicate, with a default // of one less than the tail-merge threshold. When optimizing for size, // duplicate only one, because one branch instruction can be eliminated to // compensate for the duplication. unsigned MaxDuplicateCount; - if (hasIndirectBranch) + if (MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize)) + MaxDuplicateCount = 1; + else + MaxDuplicateCount = TailDuplicateSize; + + if (PreRegAlloc) { + // Pre-regalloc tail duplication hurts compile time and doesn't help + // much except for indirect branches. + if (TailBB->empty() || !TailBB->back().getDesc().isIndirectBranch()) + return false; // If the target has hardware branch prediction that can handle indirect // branches, duplicating them can often make them predictable when there // are common paths through the code. The limit needs to be high enough - // to allow undoing the effects of tail merging. + // to allow undoing the effects of tail merging and other optimizations + // that rearrange the predecessors of the indirect branch. MaxDuplicateCount = 20; - else if (MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize)) - MaxDuplicateCount = 1; - else - MaxDuplicateCount = TailDuplicateSize; + } // Don't try to tail-duplicate single-block loops. if (TailBB->isSuccessor(TailBB)) |
