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-rw-r--r--lib/Basic/Targets.cpp588
1 files changed, 436 insertions, 152 deletions
diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp
index dd2a89a..883864f 100644
--- a/lib/Basic/Targets.cpp
+++ b/lib/Basic/Targets.cpp
@@ -316,6 +316,8 @@ protected:
DefineStd(Builder, "linux", Opts);
Builder.defineMacro("__gnu_linux__");
Builder.defineMacro("__ELF__");
+ if (Triple.getEnvironment() == llvm::Triple::ANDROIDEABI)
+ Builder.defineMacro("__ANDROID__", "1");
if (Opts.POSIXThreads)
Builder.defineMacro("_REENTRANT");
if (Opts.CPlusPlus)
@@ -371,6 +373,7 @@ public:
OpenBSDTargetInfo(const std::string &triple)
: OSTargetInfo<Target>(triple) {
this->UserLabelPrefix = "";
+ this->TLSSupported = false;
llvm::Triple Triple(triple);
switch (Triple.getArch()) {
@@ -391,6 +394,29 @@ public:
}
};
+// Bitrig Target
+template<typename Target>
+class BitrigTargetInfo : public OSTargetInfo<Target> {
+protected:
+ virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
+ MacroBuilder &Builder) const {
+ // Bitrig defines; list based off of gcc output
+
+ Builder.defineMacro("__Bitrig__");
+ DefineStd(Builder, "unix", Opts);
+ Builder.defineMacro("__ELF__");
+ if (Opts.POSIXThreads)
+ Builder.defineMacro("_REENTRANT");
+ }
+public:
+ BitrigTargetInfo(const std::string &triple)
+ : OSTargetInfo<Target>(triple) {
+ this->UserLabelPrefix = "";
+ this->TLSSupported = false;
+ this->MCountName = "__mcount";
+ }
+};
+
// PSP Target
template<typename Target>
class PSPTargetInfo : public OSTargetInfo<Target> {
@@ -573,12 +599,60 @@ class PPCTargetInfo : public TargetInfo {
static const Builtin::Info BuiltinInfo[];
static const char * const GCCRegNames[];
static const TargetInfo::GCCRegAlias GCCRegAliases[];
+ std::string CPU;
public:
PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {
LongDoubleWidth = LongDoubleAlign = 128;
LongDoubleFormat = &llvm::APFloat::PPCDoubleDouble;
}
+ /// \brief Flags for architecture specific defines.
+ typedef enum {
+ ArchDefineNone = 0,
+ ArchDefineName = 1 << 0, // <name> is substituted for arch name.
+ ArchDefinePpcgr = 1 << 1,
+ ArchDefinePpcsq = 1 << 2,
+ ArchDefine440 = 1 << 3,
+ ArchDefine603 = 1 << 4,
+ ArchDefine604 = 1 << 5,
+ ArchDefinePwr4 = 1 << 6,
+ ArchDefinePwr6 = 1 << 7
+ } ArchDefineTypes;
+
+ virtual bool setCPU(const std::string &Name) {
+ bool CPUKnown = llvm::StringSwitch<bool>(Name)
+ .Case("generic", true)
+ .Case("440", true)
+ .Case("450", true)
+ .Case("601", true)
+ .Case("602", true)
+ .Case("603", true)
+ .Case("603e", true)
+ .Case("603ev", true)
+ .Case("604", true)
+ .Case("604e", true)
+ .Case("620", true)
+ .Case("g3", true)
+ .Case("7400", true)
+ .Case("g4", true)
+ .Case("7450", true)
+ .Case("g4+", true)
+ .Case("750", true)
+ .Case("970", true)
+ .Case("g5", true)
+ .Case("a2", true)
+ .Case("pwr6", true)
+ .Case("pwr7", true)
+ .Case("ppc", true)
+ .Case("ppc64", true)
+ .Default(false);
+
+ if (CPUKnown)
+ CPU = Name;
+
+ return CPUKnown;
+ }
+
virtual void getTargetBuiltins(const Builtin::Info *&Records,
unsigned &NumRecords) const {
Records = BuiltinInfo;
@@ -718,8 +792,6 @@ void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
Builder.defineMacro("__POWERPC__");
if (PointerWidth == 64) {
Builder.defineMacro("_ARCH_PPC64");
- Builder.defineMacro("_LP64");
- Builder.defineMacro("__LP64__");
Builder.defineMacro("__powerpc64__");
Builder.defineMacro("__ppc64__");
} else {
@@ -727,7 +799,8 @@ void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
}
// Target properties.
- if (getTriple().getOS() != llvm::Triple::NetBSD)
+ if (getTriple().getOS() != llvm::Triple::NetBSD &&
+ getTriple().getOS() != llvm::Triple::OpenBSD)
Builder.defineMacro("_BIG_ENDIAN");
Builder.defineMacro("__BIG_ENDIAN__");
@@ -742,6 +815,47 @@ void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
Builder.defineMacro("__VEC__", "10206");
Builder.defineMacro("__ALTIVEC__");
}
+
+ // CPU identification.
+ ArchDefineTypes defs = (ArchDefineTypes)llvm::StringSwitch<int>(CPU)
+ .Case("440", ArchDefineName)
+ .Case("450", ArchDefineName | ArchDefine440)
+ .Case("601", ArchDefineName)
+ .Case("602", ArchDefineName | ArchDefinePpcgr)
+ .Case("603", ArchDefineName | ArchDefinePpcgr)
+ .Case("603e", ArchDefineName | ArchDefine603 | ArchDefinePpcgr)
+ .Case("603ev", ArchDefineName | ArchDefine603 | ArchDefinePpcgr)
+ .Case("604", ArchDefineName | ArchDefinePpcgr)
+ .Case("604e", ArchDefineName | ArchDefine604 | ArchDefinePpcgr)
+ .Case("620", ArchDefineName | ArchDefinePpcgr)
+ .Case("7400", ArchDefineName | ArchDefinePpcgr)
+ .Case("7450", ArchDefineName | ArchDefinePpcgr)
+ .Case("750", ArchDefineName | ArchDefinePpcgr)
+ .Case("970", ArchDefineName | ArchDefinePwr4 | ArchDefinePpcgr
+ | ArchDefinePpcsq)
+ .Case("pwr6", ArchDefinePwr6 | ArchDefinePpcgr | ArchDefinePpcsq)
+ .Case("pwr7", ArchDefineName | ArchDefinePwr6 | ArchDefinePpcgr
+ | ArchDefinePpcsq)
+ .Default(ArchDefineNone);
+
+ if (defs & ArchDefineName)
+ Builder.defineMacro(Twine("_ARCH_", StringRef(CPU).upper()));
+ if (defs & ArchDefinePpcgr)
+ Builder.defineMacro("_ARCH_PPCGR");
+ if (defs & ArchDefinePpcsq)
+ Builder.defineMacro("_ARCH_PPCSQ");
+ if (defs & ArchDefine440)
+ Builder.defineMacro("_ARCH_440");
+ if (defs & ArchDefine603)
+ Builder.defineMacro("_ARCH_603");
+ if (defs & ArchDefine604)
+ Builder.defineMacro("_ARCH_604");
+ if (defs & (ArchDefinePwr4 | ArchDefinePwr6))
+ Builder.defineMacro("_ARCH_PWR4");
+ if (defs & ArchDefinePwr6) {
+ Builder.defineMacro("_ARCH_PWR5");
+ Builder.defineMacro("_ARCH_PWR6");
+ }
}
bool PPCTargetInfo::hasFeature(StringRef Feature) const {
@@ -878,15 +992,9 @@ public:
}
}
- virtual const char *getVAListDeclaration() const {
+ virtual BuiltinVaListKind getBuiltinVaListKind() const {
// This is the ELF definition, and is overridden by the Darwin sub-target
- return "typedef struct __va_list_tag {"
- " unsigned char gpr;"
- " unsigned char fpr;"
- " unsigned short reserved;"
- " void* overflow_arg_area;"
- " void* reg_save_area;"
- "} __builtin_va_list[1];";
+ return TargetInfo::PowerABIBuiltinVaList;
}
};
} // end anonymous namespace.
@@ -907,8 +1015,8 @@ public:
LongDoubleFormat = &llvm::APFloat::IEEEdouble;
}
}
- virtual const char *getVAListDeclaration() const {
- return "typedef char* __builtin_va_list;";
+ virtual BuiltinVaListKind getBuiltinVaListKind() const {
+ return TargetInfo::CharPtrBuiltinVaList;
}
};
} // end anonymous namespace.
@@ -927,8 +1035,8 @@ public:
DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
"i64:32:64-f32:32:32-f64:64:64-v128:128:128-n32";
}
- virtual const char *getVAListDeclaration() const {
- return "typedef char* __builtin_va_list;";
+ virtual BuiltinVaListKind getBuiltinVaListKind() const {
+ return TargetInfo::CharPtrBuiltinVaList;
}
};
@@ -944,54 +1052,40 @@ public:
} // end anonymous namespace.
namespace {
- static const unsigned PTXAddrSpaceMap[] = {
- 0, // opencl_global
- 4, // opencl_local
- 1 // opencl_constant
+ static const unsigned NVPTXAddrSpaceMap[] = {
+ 1, // opencl_global
+ 3, // opencl_local
+ 4, // opencl_constant
+ 1, // cuda_device
+ 4, // cuda_constant
+ 3, // cuda_shared
};
- class PTXTargetInfo : public TargetInfo {
+ class NVPTXTargetInfo : public TargetInfo {
static const char * const GCCRegNames[];
static const Builtin::Info BuiltinInfo[];
std::vector<llvm::StringRef> AvailableFeatures;
public:
- PTXTargetInfo(const std::string& triple) : TargetInfo(triple) {
+ NVPTXTargetInfo(const std::string& triple) : TargetInfo(triple) {
BigEndian = false;
TLSSupported = false;
LongWidth = LongAlign = 64;
- AddrSpaceMap = &PTXAddrSpaceMap;
+ AddrSpaceMap = &NVPTXAddrSpaceMap;
// Define available target features
- // These must be defined in sorted order!
- AvailableFeatures.push_back("compute10");
- AvailableFeatures.push_back("compute11");
- AvailableFeatures.push_back("compute12");
- AvailableFeatures.push_back("compute13");
- AvailableFeatures.push_back("compute20");
- AvailableFeatures.push_back("double");
- AvailableFeatures.push_back("no-fma");
- AvailableFeatures.push_back("ptx20");
- AvailableFeatures.push_back("ptx21");
- AvailableFeatures.push_back("ptx22");
- AvailableFeatures.push_back("ptx23");
- AvailableFeatures.push_back("sm10");
- AvailableFeatures.push_back("sm11");
- AvailableFeatures.push_back("sm12");
- AvailableFeatures.push_back("sm13");
- AvailableFeatures.push_back("sm20");
- AvailableFeatures.push_back("sm21");
- AvailableFeatures.push_back("sm22");
- AvailableFeatures.push_back("sm23");
+ // These must be defined in sorted order!
+ NoAsmVariants = true;
}
virtual void getTargetDefines(const LangOptions &Opts,
MacroBuilder &Builder) const {
Builder.defineMacro("__PTX__");
+ Builder.defineMacro("__NVPTX__");
}
virtual void getTargetBuiltins(const Builtin::Info *&Records,
unsigned &NumRecords) const {
Records = BuiltinInfo;
- NumRecords = clang::PTX::LastTSBuiltin-Builtin::FirstTSBuiltin;
+ NumRecords = clang::NVPTX::LastTSBuiltin-Builtin::FirstTSBuiltin;
}
virtual bool hasFeature(StringRef Feature) const {
- return Feature == "ptx";
+ return Feature == "ptx" || Feature == "nvptx";
}
virtual void getGCCRegNames(const char * const *&Names,
@@ -1011,36 +1105,38 @@ namespace {
// FIXME: Is this really right?
return "";
}
- virtual const char *getVAListDeclaration() const {
+ virtual BuiltinVaListKind getBuiltinVaListKind() const {
// FIXME: implement
- return "typedef char* __builtin_va_list;";
+ return TargetInfo::CharPtrBuiltinVaList;
+ }
+ virtual bool setCPU(const std::string &Name) {
+ return Name == "sm_10" || Name == "sm_13" || Name == "sm_20";
}
-
virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
StringRef Name,
bool Enabled) const;
};
- const Builtin::Info PTXTargetInfo::BuiltinInfo[] = {
+ const Builtin::Info NVPTXTargetInfo::BuiltinInfo[] = {
#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
ALL_LANGUAGES },
-#include "clang/Basic/BuiltinsPTX.def"
+#include "clang/Basic/BuiltinsNVPTX.def"
};
- const char * const PTXTargetInfo::GCCRegNames[] = {
+ const char * const NVPTXTargetInfo::GCCRegNames[] = {
"r0"
};
- void PTXTargetInfo::getGCCRegNames(const char * const *&Names,
+ void NVPTXTargetInfo::getGCCRegNames(const char * const *&Names,
unsigned &NumNames) const {
Names = GCCRegNames;
NumNames = llvm::array_lengthof(GCCRegNames);
}
- bool PTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
- StringRef Name,
- bool Enabled) const {
+ bool NVPTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
+ StringRef Name,
+ bool Enabled) const {
if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(),
Name)) {
Features[Name] = Enabled;
@@ -1050,24 +1146,28 @@ namespace {
}
}
- class PTX32TargetInfo : public PTXTargetInfo {
+ class NVPTX32TargetInfo : public NVPTXTargetInfo {
public:
- PTX32TargetInfo(const std::string& triple) : PTXTargetInfo(triple) {
+ NVPTX32TargetInfo(const std::string& triple) : NVPTXTargetInfo(triple) {
PointerWidth = PointerAlign = 32;
- SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt;
+ SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt;
DescriptionString
- = "e-p:32:32-i64:64:64-f64:64:64-n1:8:16:32:64";
- }
+ = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
+ "f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-"
+ "n16:32:64";
+ }
};
- class PTX64TargetInfo : public PTXTargetInfo {
+ class NVPTX64TargetInfo : public NVPTXTargetInfo {
public:
- PTX64TargetInfo(const std::string& triple) : PTXTargetInfo(triple) {
+ NVPTX64TargetInfo(const std::string& triple) : NVPTXTargetInfo(triple) {
PointerWidth = PointerAlign = 64;
- SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong;
+ SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong;
DescriptionString
- = "e-p:64:64-i64:64:64-f64:64:64-n1:8:16:32:64";
- }
+ = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
+ "f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-"
+ "n16:32:64";
+ }
};
}
@@ -1096,8 +1196,8 @@ public:
return Feature == "mblaze";
}
- virtual const char *getVAListDeclaration() const {
- return "typedef char* __builtin_va_list;";
+ virtual BuiltinVaListKind getBuiltinVaListKind() const {
+ return TargetInfo::CharPtrBuiltinVaList;
}
virtual const char *getTargetPrefix() const {
return "mblaze";
@@ -1245,11 +1345,16 @@ class X86TargetInfo : public TargetInfo {
} MMX3DNowLevel;
bool HasAES;
+ bool HasPCLMUL;
bool HasLZCNT;
+ bool HasRDRND;
bool HasBMI;
bool HasBMI2;
bool HasPOPCNT;
+ bool HasSSE4a;
bool HasFMA4;
+ bool HasFMA;
+ bool HasXOP;
/// \brief Enumeration of all of the X86 CPUs supported by Clang.
///
@@ -1394,8 +1499,9 @@ class X86TargetInfo : public TargetInfo {
public:
X86TargetInfo(const std::string& triple)
: TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow),
- HasAES(false), HasLZCNT(false), HasBMI(false), HasBMI2(false),
- HasPOPCNT(false), HasFMA4(false), CPU(CK_Generic) {
+ HasAES(false), HasPCLMUL(false), HasLZCNT(false), HasRDRND(false),
+ HasBMI(false), HasBMI2(false), HasPOPCNT(false), HasSSE4a(false),
+ HasFMA4(false), HasFMA(false), HasXOP(false), CPU(CK_Generic) {
BigEndian = false;
LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
}
@@ -1577,13 +1683,17 @@ void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const {
Features["sse42"] = false;
Features["sse4a"] = false;
Features["aes"] = false;
+ Features["pclmul"] = false;
Features["avx"] = false;
Features["avx2"] = false;
Features["lzcnt"] = false;
+ Features["rdrand"] = false;
Features["bmi"] = false;
Features["bmi2"] = false;
Features["popcnt"] = false;
Features["fma4"] = false;
+ Features["fma"] = false;
+ Features["xop"] = false;
// FIXME: This *really* should not be here.
@@ -1637,23 +1747,30 @@ void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const {
case CK_Corei7:
setFeatureEnabled(Features, "mmx", true);
setFeatureEnabled(Features, "sse4", true);
- setFeatureEnabled(Features, "aes", true);
break;
case CK_Corei7AVX:
+ setFeatureEnabled(Features, "mmx", true);
+ setFeatureEnabled(Features, "avx", true);
+ setFeatureEnabled(Features, "aes", true);
+ setFeatureEnabled(Features, "pclmul", true);
+ break;
case CK_CoreAVXi:
setFeatureEnabled(Features, "mmx", true);
- setFeatureEnabled(Features, "sse4", true);
+ setFeatureEnabled(Features, "avx", true);
setFeatureEnabled(Features, "aes", true);
- //setFeatureEnabled(Features, "avx", true);
+ setFeatureEnabled(Features, "pclmul", true);
+ setFeatureEnabled(Features, "rdrnd", true);
break;
case CK_CoreAVX2:
setFeatureEnabled(Features, "mmx", true);
- setFeatureEnabled(Features, "sse4", true);
+ setFeatureEnabled(Features, "avx2", true);
setFeatureEnabled(Features, "aes", true);
+ setFeatureEnabled(Features, "pclmul", true);
setFeatureEnabled(Features, "lzcnt", true);
+ setFeatureEnabled(Features, "rdrnd", true);
setFeatureEnabled(Features, "bmi", true);
setFeatureEnabled(Features, "bmi2", true);
- //setFeatureEnabled(Features, "avx2", true);
+ setFeatureEnabled(Features, "fma", true);
break;
case CK_K6:
case CK_WinChipC6:
@@ -1697,11 +1814,13 @@ void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const {
case CK_BTVER1:
setFeatureEnabled(Features, "ssse3", true);
setFeatureEnabled(Features, "sse4a", true);
+ break;
case CK_BDVER1:
case CK_BDVER2:
- setFeatureEnabled(Features, "sse4", true);
- setFeatureEnabled(Features, "sse4a", true);
+ setFeatureEnabled(Features, "avx", true);
+ setFeatureEnabled(Features, "xop", true);
setFeatureEnabled(Features, "aes", true);
+ setFeatureEnabled(Features, "pclmul", true);
break;
case CK_C3_2:
setFeatureEnabled(Features, "mmx", true);
@@ -1716,7 +1835,8 @@ bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
// FIXME: This *really* should not be here. We need some way of translating
// options into llvm subtarget features.
if (!Features.count(Name) &&
- (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1"))
+ (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1" &&
+ Name != "rdrnd"))
return false;
// FIXME: this should probably use a switch with fall through.
@@ -1746,7 +1866,9 @@ bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
else if (Name == "3dnowa")
Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true;
else if (Name == "aes")
- Features["aes"] = true;
+ Features["sse"] = Features["sse2"] = Features["aes"] = true;
+ else if (Name == "pclmul")
+ Features["sse"] = Features["sse2"] = Features["pclmul"] = true;
else if (Name == "avx")
Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
Features["ssse3"] = Features["sse41"] = Features["sse42"] =
@@ -1755,15 +1877,27 @@ bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
Features["ssse3"] = Features["sse41"] = Features["sse42"] =
Features["popcnt"] = Features["avx"] = Features["avx2"] = true;
+ else if (Name == "fma")
+ Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
+ Features["ssse3"] = Features["sse41"] = Features["sse42"] =
+ Features["popcnt"] = Features["avx"] = Features["fma"] = true;
else if (Name == "fma4")
Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
Features["ssse3"] = Features["sse41"] = Features["sse42"] =
- Features["popcnt"] = Features["avx"] = Features["fma4"] = true;
+ Features["popcnt"] = Features["avx"] = Features["sse4a"] =
+ Features["fma4"] = true;
+ else if (Name == "xop")
+ Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
+ Features["ssse3"] = Features["sse41"] = Features["sse42"] =
+ Features["popcnt"] = Features["avx"] = Features["sse4a"] =
+ Features["fma4"] = Features["xop"] = true;
else if (Name == "sse4a")
Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
- Features["lzcnt"] = Features["popcnt"] = Features["sse4a"] = true;
+ Features["sse4a"] = true;
else if (Name == "lzcnt")
Features["lzcnt"] = true;
+ else if (Name == "rdrnd")
+ Features["rdrand"] = true;
else if (Name == "bmi")
Features["bmi"] = true;
else if (Name == "bmi2")
@@ -1776,33 +1910,50 @@ bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
else if (Name == "sse")
Features["sse"] = Features["sse2"] = Features["sse3"] =
Features["ssse3"] = Features["sse41"] = Features["sse42"] =
- Features["sse4a"] = false;
+ Features["sse4a"] = Features["avx"] = Features["avx2"] =
+ Features["fma"] = Features["fma4"] = Features["aes"] =
+ Features["pclmul"] = Features["xop"] = false;
else if (Name == "sse2")
Features["sse2"] = Features["sse3"] = Features["ssse3"] =
- Features["sse41"] = Features["sse42"] = Features["sse4a"] = false;
+ Features["sse41"] = Features["sse42"] = Features["sse4a"] =
+ Features["avx"] = Features["avx2"] = Features["fma"] =
+ Features["fma4"] = Features["aes"] = Features["pclmul"] =
+ Features["xop"] = false;
else if (Name == "sse3")
Features["sse3"] = Features["ssse3"] = Features["sse41"] =
- Features["sse42"] = Features["sse4a"] = false;
+ Features["sse42"] = Features["sse4a"] = Features["avx"] =
+ Features["avx2"] = Features["fma"] = Features["fma4"] =
+ Features["xop"] = false;
else if (Name == "ssse3")
- Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
+ Features["ssse3"] = Features["sse41"] = Features["sse42"] =
+ Features["avx"] = Features["avx2"] = Features["fma"] = false;
else if (Name == "sse4" || Name == "sse4.1")
- Features["sse41"] = Features["sse42"] = false;
+ Features["sse41"] = Features["sse42"] = Features["avx"] =
+ Features["avx2"] = Features["fma"] = false;
else if (Name == "sse4.2")
- Features["sse42"] = false;
+ Features["sse42"] = Features["avx"] = Features["avx2"] =
+ Features["fma"] = false;
else if (Name == "3dnow")
Features["3dnow"] = Features["3dnowa"] = false;
else if (Name == "3dnowa")
Features["3dnowa"] = false;
else if (Name == "aes")
Features["aes"] = false;
+ else if (Name == "pclmul")
+ Features["pclmul"] = false;
else if (Name == "avx")
- Features["avx"] = Features["avx2"] = Features["fma4"] = false;
+ Features["avx"] = Features["avx2"] = Features["fma"] =
+ Features["fma4"] = Features["xop"] = false;
else if (Name == "avx2")
Features["avx2"] = false;
+ else if (Name == "fma")
+ Features["fma"] = false;
else if (Name == "sse4a")
- Features["sse4a"] = false;
+ Features["sse4a"] = Features["fma4"] = Features["xop"] = false;
else if (Name == "lzcnt")
Features["lzcnt"] = false;
+ else if (Name == "rdrnd")
+ Features["rdrand"] = false;
else if (Name == "bmi")
Features["bmi"] = false;
else if (Name == "bmi2")
@@ -1810,7 +1961,9 @@ bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
else if (Name == "popcnt")
Features["popcnt"] = false;
else if (Name == "fma4")
- Features["fma4"] = false;
+ Features["fma4"] = Features["xop"] = false;
+ else if (Name == "xop")
+ Features["xop"] = false;
}
return true;
@@ -1832,11 +1985,21 @@ void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) {
continue;
}
+ if (Feature == "pclmul") {
+ HasPCLMUL = true;
+ continue;
+ }
+
if (Feature == "lzcnt") {
HasLZCNT = true;
continue;
}
+ if (Feature == "rdrand") {
+ HasRDRND = true;
+ continue;
+ }
+
if (Feature == "bmi") {
HasBMI = true;
continue;
@@ -1852,11 +2015,26 @@ void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) {
continue;
}
+ if (Feature == "sse4a") {
+ HasSSE4a = true;
+ continue;
+ }
+
if (Feature == "fma4") {
HasFMA4 = true;
continue;
}
+ if (Feature == "fma") {
+ HasFMA = true;
+ continue;
+ }
+
+ if (Feature == "xop") {
+ HasXOP = true;
+ continue;
+ }
+
assert(Features[i][0] == '+' && "Invalid target feature!");
X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature)
.Case("avx2", AVX2)
@@ -1894,10 +2072,6 @@ void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
MacroBuilder &Builder) const {
// Target identification.
if (PointerWidth == 64) {
- if (getLongWidth() == 64) {
- Builder.defineMacro("_LP64");
- Builder.defineMacro("__LP64__");
- }
Builder.defineMacro("__amd64__");
Builder.defineMacro("__amd64");
Builder.defineMacro("__x86_64");
@@ -2039,9 +2213,15 @@ void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
if (HasAES)
Builder.defineMacro("__AES__");
+ if (HasPCLMUL)
+ Builder.defineMacro("__PCLMUL__");
+
if (HasLZCNT)
Builder.defineMacro("__LZCNT__");
+ if (HasRDRND)
+ Builder.defineMacro("__RDRND__");
+
if (HasBMI)
Builder.defineMacro("__BMI__");
@@ -2051,9 +2231,18 @@ void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
if (HasPOPCNT)
Builder.defineMacro("__POPCNT__");
+ if (HasSSE4a)
+ Builder.defineMacro("__SSE4A__");
+
if (HasFMA4)
Builder.defineMacro("__FMA4__");
+ if (HasFMA)
+ Builder.defineMacro("__FMA__");
+
+ if (HasXOP)
+ Builder.defineMacro("__XOP__");
+
// Each case falls through to the previous one here.
switch (SSELevel) {
case AVX2:
@@ -2117,11 +2306,14 @@ bool X86TargetInfo::hasFeature(StringRef Feature) const {
.Case("avx2", SSELevel >= AVX2)
.Case("bmi", HasBMI)
.Case("bmi2", HasBMI2)
+ .Case("fma", HasFMA)
.Case("fma4", HasFMA4)
.Case("lzcnt", HasLZCNT)
+ .Case("rdrnd", HasRDRND)
.Case("mm3dnow", MMX3DNowLevel >= AMD3DNow)
.Case("mm3dnowa", MMX3DNowLevel >= AMD3DNowAthlon)
.Case("mmx", MMX3DNowLevel >= MMX)
+ .Case("pclmul", HasPCLMUL)
.Case("popcnt", HasPOPCNT)
.Case("sse", SSELevel >= SSE1)
.Case("sse2", SSELevel >= SSE2)
@@ -2129,9 +2321,11 @@ bool X86TargetInfo::hasFeature(StringRef Feature) const {
.Case("ssse3", SSELevel >= SSSE3)
.Case("sse41", SSELevel >= SSE41)
.Case("sse42", SSELevel >= SSE42)
+ .Case("sse4a", HasSSE4a)
.Case("x86", true)
.Case("x86_32", PointerWidth == 32)
.Case("x86_64", PointerWidth == 64)
+ .Case("xop", HasXOP)
.Default(false);
}
@@ -2227,8 +2421,8 @@ public:
// MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.)
MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
}
- virtual const char *getVAListDeclaration() const {
- return "typedef char* __builtin_va_list;";
+ virtual BuiltinVaListKind getBuiltinVaListKind() const {
+ return TargetInfo::CharPtrBuiltinVaList;
}
int getEHDataRegisterNumber(unsigned RegNo) const {
@@ -2266,6 +2460,18 @@ public:
} // end anonymous namespace
namespace {
+class BitrigI386TargetInfo : public BitrigTargetInfo<X86_32TargetInfo> {
+public:
+ BitrigI386TargetInfo(const std::string& triple) :
+ BitrigTargetInfo<X86_32TargetInfo>(triple) {
+ SizeType = UnsignedLong;
+ IntPtrType = SignedLong;
+ PtrDiffType = SignedLong;
+ }
+};
+} // end anonymous namespace
+
+namespace {
class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> {
public:
DarwinI386TargetInfo(const std::string& triple) :
@@ -2273,6 +2479,7 @@ public:
LongDoubleWidth = 128;
LongDoubleAlign = 128;
SuitableAlign = 128;
+ MaxVectorAlign = 256;
SizeType = UnsignedLong;
IntPtrType = SignedLong;
DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
@@ -2487,14 +2694,8 @@ public:
MaxAtomicPromoteWidth = 128;
MaxAtomicInlineWidth = 64;
}
- virtual const char *getVAListDeclaration() const {
- return "typedef struct __va_list_tag {"
- " unsigned gp_offset;"
- " unsigned fp_offset;"
- " void* overflow_arg_area;"
- " void* reg_save_area;"
- "} __va_list_tag;"
- "typedef __va_list_tag __builtin_va_list[1];";
+ virtual BuiltinVaListKind getBuiltinVaListKind() const {
+ return TargetInfo::X86_64ABIBuiltinVaList;
}
int getEHDataRegisterNumber(unsigned RegNo) const {
@@ -2528,8 +2729,8 @@ public:
WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder);
Builder.defineMacro("_WIN64");
}
- virtual const char *getVAListDeclaration() const {
- return "typedef char* __builtin_va_list;";
+ virtual BuiltinVaListKind getBuiltinVaListKind() const {
+ return TargetInfo::CharPtrBuiltinVaList;
}
};
} // end anonymous namespace
@@ -2586,6 +2787,7 @@ public:
DarwinX86_64TargetInfo(const std::string& triple)
: DarwinTargetInfo<X86_64TargetInfo>(triple) {
Int64Type = SignedLongLong;
+ MaxVectorAlign = 256;
}
};
} // end anonymous namespace
@@ -2603,6 +2805,18 @@ public:
} // end anonymous namespace
namespace {
+class BitrigX86_64TargetInfo : public BitrigTargetInfo<X86_64TargetInfo> {
+public:
+ BitrigX86_64TargetInfo(const std::string& triple)
+ : BitrigTargetInfo<X86_64TargetInfo>(triple) {
+ IntMaxType = SignedLongLong;
+ UIntMaxType = UnsignedLongLong;
+ Int64Type = SignedLongLong;
+ }
+};
+} // end anonymous namespace
+
+namespace {
class ARMTargetInfo : public TargetInfo {
// Possible FPU choices.
enum FPUMode {
@@ -2860,8 +3074,8 @@ public:
NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin;
}
virtual bool isCLZForZeroUndef() const { return false; }
- virtual const char *getVAListDeclaration() const {
- return "typedef void* __builtin_va_list;";
+ virtual BuiltinVaListKind getBuiltinVaListKind() const {
+ return TargetInfo::VoidPtrBuiltinVaList;
}
virtual void getGCCRegNames(const char * const *&Names,
unsigned &NumNames) const;
@@ -3015,8 +3229,8 @@ public:
HexagonTargetInfo(const std::string& triple) : TargetInfo(triple) {
BigEndian = false;
DescriptionString = ("e-p:32:32:32-"
- "i64:64:64-i32:32:32-"
- "i16:16:16-i1:32:32-a:0:0");
+ "i64:64:64-i32:32:32-i16:16:16-i1:32:32"
+ "f64:64:64-f32:32:32-a0:0-n32");
// {} in inline assembly are packet specifiers, not assembly variant
// specifiers.
@@ -3041,8 +3255,8 @@ public:
return Feature == "hexagon";
}
- virtual const char *getVAListDeclaration() const {
- return "typedef char* __builtin_va_list;";
+ virtual BuiltinVaListKind getBuiltinVaListKind() const {
+ return TargetInfo::CharPtrBuiltinVaList;
}
virtual void getGCCRegNames(const char * const *&Names,
unsigned &NumNames) const;
@@ -3057,6 +3271,7 @@ public:
.Case("hexagonv2", "2")
.Case("hexagonv3", "3")
.Case("hexagonv4", "4")
+ .Case("hexagonv5", "5")
.Default(0);
}
@@ -3111,6 +3326,14 @@ void HexagonTargetInfo::getTargetDefines(const LangOptions &Opts,
Builder.defineMacro("__QDSP6_ARCH__", "4");
}
}
+ else if(CPU == "hexagonv5") {
+ Builder.defineMacro("__HEXAGON_V5__");
+ Builder.defineMacro("__HEXAGON_ARCH__", "5");
+ if(Opts.HexagonQdsp6Compat) {
+ Builder.defineMacro("__QDSP6_V5__");
+ Builder.defineMacro("__QDSP6_ARCH__", "5");
+ }
+ }
}
const char * const HexagonTargetInfo::GCCRegNames[] = {
@@ -3159,7 +3382,6 @@ class SparcV8TargetInfo : public TargetInfo {
public:
SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) {
// FIXME: Support Sparc quad-precision long double?
- BigEndian = false;
DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
"i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
}
@@ -3200,8 +3422,8 @@ public:
unsigned &NumRecords) const {
// FIXME: Implement!
}
- virtual const char *getVAListDeclaration() const {
- return "typedef void* __builtin_va_list;";
+ virtual BuiltinVaListKind getBuiltinVaListKind() const {
+ return TargetInfo::VoidPtrBuiltinVaList;
}
virtual void getGCCRegNames(const char * const *&Names,
unsigned &NumNames) const;
@@ -3344,9 +3566,9 @@ namespace {
// FIXME: Is this really right?
return "";
}
- virtual const char *getVAListDeclaration() const {
+ virtual BuiltinVaListKind getBuiltinVaListKind() const {
// FIXME: implement
- return "typedef char* __builtin_va_list;";
+ return TargetInfo::CharPtrBuiltinVaList;
}
};
@@ -3375,7 +3597,10 @@ namespace {
static const unsigned TCEOpenCLAddrSpaceMap[] = {
3, // opencl_global
4, // opencl_local
- 5 // opencl_constant
+ 5, // opencl_constant
+ 0, // cuda_device
+ 0, // cuda_constant
+ 0 // cuda_shared
};
class TCETargetInfo : public TargetInfo{
@@ -3425,8 +3650,8 @@ namespace {
virtual const char *getClobbers() const {
return "";
}
- virtual const char *getVAListDeclaration() const {
- return "typedef void* __builtin_va_list;";
+ virtual BuiltinVaListKind getBuiltinVaListKind() const {
+ return TargetInfo::VoidPtrBuiltinVaList;
}
virtual void getGCCRegNames(const char * const *&Names,
unsigned &NumNames) const {}
@@ -3441,9 +3666,15 @@ namespace {
namespace {
class MipsTargetInfoBase : public TargetInfo {
+ static const Builtin::Info BuiltinInfo[];
std::string CPU;
- bool SoftFloat;
- bool SingleFloat;
+ bool IsMips16;
+ enum MipsFloatABI {
+ HardFloat, SingleFloat, SoftFloat
+ } FloatABI;
+ enum DspRevEnum {
+ NoDSP, DSP1, DSP2
+ } DspRev;
protected:
std::string ABI;
@@ -3454,7 +3685,9 @@ public:
const std::string& CPUStr)
: TargetInfo(triple),
CPU(CPUStr),
- SoftFloat(false), SingleFloat(false),
+ IsMips16(false),
+ FloatABI(HardFloat),
+ DspRev(NoDSP),
ABI(ABIStr)
{}
@@ -3471,14 +3704,35 @@ public:
virtual void getArchDefines(const LangOptions &Opts,
MacroBuilder &Builder) const {
- if (SoftFloat)
- Builder.defineMacro("__mips_soft_float", Twine(1));
- else if (SingleFloat)
- Builder.defineMacro("__mips_single_float", Twine(1));
- else if (!SoftFloat && !SingleFloat)
+ switch (FloatABI) {
+ case HardFloat:
Builder.defineMacro("__mips_hard_float", Twine(1));
- else
- llvm_unreachable("Invalid float ABI for Mips.");
+ break;
+ case SingleFloat:
+ Builder.defineMacro("__mips_hard_float", Twine(1));
+ Builder.defineMacro("__mips_single_float", Twine(1));
+ break;
+ case SoftFloat:
+ Builder.defineMacro("__mips_soft_float", Twine(1));
+ break;
+ }
+
+ if (IsMips16)
+ Builder.defineMacro("__mips16", Twine(1));
+
+ switch (DspRev) {
+ default:
+ break;
+ case DSP1:
+ Builder.defineMacro("__mips_dsp_rev", Twine(1));
+ Builder.defineMacro("__mips_dsp", Twine(1));
+ break;
+ case DSP2:
+ Builder.defineMacro("__mips_dsp_rev", Twine(2));
+ Builder.defineMacro("__mips_dspr2", Twine(1));
+ Builder.defineMacro("__mips_dsp", Twine(1));
+ break;
+ }
Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0)));
Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth()));
@@ -3489,13 +3743,14 @@ public:
MacroBuilder &Builder) const = 0;
virtual void getTargetBuiltins(const Builtin::Info *&Records,
unsigned &NumRecords) const {
- // FIXME: Implement!
+ Records = BuiltinInfo;
+ NumRecords = clang::Mips::LastTSBuiltin - Builtin::FirstTSBuiltin;
}
virtual bool hasFeature(StringRef Feature) const {
return Feature == "mips";
}
- virtual const char *getVAListDeclaration() const {
- return "typedef void* __builtin_va_list;";
+ virtual BuiltinVaListKind getBuiltinVaListKind() const {
+ return TargetInfo::VoidPtrBuiltinVaList;
}
virtual void getGCCRegNames(const char * const *&Names,
unsigned &NumNames) const {
@@ -3549,7 +3804,8 @@ public:
if (Name == "soft-float" || Name == "single-float" ||
Name == "o32" || Name == "n32" || Name == "n64" || Name == "eabi" ||
Name == "mips32" || Name == "mips32r2" ||
- Name == "mips64" || Name == "mips64r2") {
+ Name == "mips64" || Name == "mips64r2" ||
+ Name == "mips16" || Name == "dsp" || Name == "dspr2") {
Features[Name] = Enabled;
return true;
}
@@ -3557,27 +3813,39 @@ public:
}
virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
- SoftFloat = false;
- SingleFloat = false;
+ IsMips16 = false;
+ FloatABI = HardFloat;
+ DspRev = NoDSP;
for (std::vector<std::string>::iterator it = Features.begin(),
ie = Features.end(); it != ie; ++it) {
- if (*it == "+single-float") {
- SingleFloat = true;
- break;
- }
-
- if (*it == "+soft-float") {
- SoftFloat = true;
- // This option is front-end specific.
- // Do not need to pass it to the backend.
- Features.erase(it);
- break;
- }
+ if (*it == "+single-float")
+ FloatABI = SingleFloat;
+ else if (*it == "+soft-float")
+ FloatABI = SoftFloat;
+ else if (*it == "+mips16")
+ IsMips16 = true;
+ else if (*it == "+dsp")
+ DspRev = std::max(DspRev, DSP1);
+ else if (*it == "+dspr2")
+ DspRev = std::max(DspRev, DSP2);
}
+
+ // Remove front-end specific option.
+ std::vector<std::string>::iterator it =
+ std::find(Features.begin(), Features.end(), "+soft-float");
+ if (it != Features.end())
+ Features.erase(it);
}
};
+const Builtin::Info MipsTargetInfoBase::BuiltinInfo[] = {
+#define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
+#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
+ ALL_LANGUAGES },
+#include "clang/Basic/BuiltinsMips.def"
+};
+
class Mips32TargetInfoBase : public MipsTargetInfoBase {
public:
Mips32TargetInfoBase(const std::string& triple) :
@@ -3868,8 +4136,8 @@ public:
virtual void getTargetBuiltins(const Builtin::Info *&Records,
unsigned &NumRecords) const {
}
- virtual const char *getVAListDeclaration() const {
- return "typedef int __builtin_va_list[4];";
+ virtual BuiltinVaListKind getBuiltinVaListKind() const {
+ return TargetInfo::PNaClABIBuiltinVaList;
}
virtual void getGCCRegNames(const char * const *&Names,
unsigned &NumNames) const;
@@ -3926,6 +4194,10 @@ static TargetInfo *AllocateTarget(const std::string &T) {
return new FreeBSDTargetInfo<ARMTargetInfo>(T);
case llvm::Triple::NetBSD:
return new NetBSDTargetInfo<ARMTargetInfo>(T);
+ case llvm::Triple::OpenBSD:
+ return new OpenBSDTargetInfo<ARMTargetInfo>(T);
+ case llvm::Triple::Bitrig:
+ return new BitrigTargetInfo<ARMTargetInfo>(T);
case llvm::Triple::RTEMS:
return new RTEMSTargetInfo<ARMTargetInfo>(T);
default:
@@ -3973,6 +4245,8 @@ static TargetInfo *AllocateTarget(const std::string &T) {
return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T);
case llvm::Triple::NetBSD:
return new NetBSDTargetInfo<Mips64EBTargetInfo>(T);
+ case llvm::Triple::OpenBSD:
+ return new OpenBSDTargetInfo<Mips64EBTargetInfo>(T);
default:
return new Mips64EBTargetInfo(T);
}
@@ -3987,6 +4261,8 @@ static TargetInfo *AllocateTarget(const std::string &T) {
return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T);
case llvm::Triple::NetBSD:
return new NetBSDTargetInfo<Mips64ELTargetInfo>(T);
+ case llvm::Triple::OpenBSD:
+ return new OpenBSDTargetInfo<Mips64ELTargetInfo>(T);
default:
return new Mips64ELTargetInfo(T);
}
@@ -4009,6 +4285,8 @@ static TargetInfo *AllocateTarget(const std::string &T) {
return new FreeBSDTargetInfo<PPC32TargetInfo>(T);
case llvm::Triple::NetBSD:
return new NetBSDTargetInfo<PPC32TargetInfo>(T);
+ case llvm::Triple::OpenBSD:
+ return new OpenBSDTargetInfo<PPC32TargetInfo>(T);
case llvm::Triple::RTEMS:
return new RTEMSTargetInfo<PPC32TargetInfo>(T);
default:
@@ -4031,10 +4309,10 @@ static TargetInfo *AllocateTarget(const std::string &T) {
return new PPC64TargetInfo(T);
}
- case llvm::Triple::ptx32:
- return new PTX32TargetInfo(T);
- case llvm::Triple::ptx64:
- return new PTX64TargetInfo(T);
+ case llvm::Triple::nvptx:
+ return new NVPTX32TargetInfo(T);
+ case llvm::Triple::nvptx64:
+ return new NVPTX64TargetInfo(T);
case llvm::Triple::mblaze:
return new MBlazeTargetInfo(T);
@@ -4049,6 +4327,8 @@ static TargetInfo *AllocateTarget(const std::string &T) {
return new SolarisSparcV8TargetInfo(T);
case llvm::Triple::NetBSD:
return new NetBSDTargetInfo<SparcV8TargetInfo>(T);
+ case llvm::Triple::OpenBSD:
+ return new OpenBSDTargetInfo<SparcV8TargetInfo>(T);
case llvm::Triple::RTEMS:
return new RTEMSTargetInfo<SparcV8TargetInfo>(T);
default:
@@ -4077,6 +4357,8 @@ static TargetInfo *AllocateTarget(const std::string &T) {
return new NetBSDI386TargetInfo(T);
case llvm::Triple::OpenBSD:
return new OpenBSDI386TargetInfo(T);
+ case llvm::Triple::Bitrig:
+ return new BitrigI386TargetInfo(T);
case llvm::Triple::FreeBSD:
return new FreeBSDTargetInfo<X86_32TargetInfo>(T);
case llvm::Triple::Minix:
@@ -4112,6 +4394,8 @@ static TargetInfo *AllocateTarget(const std::string &T) {
return new NetBSDTargetInfo<X86_64TargetInfo>(T);
case llvm::Triple::OpenBSD:
return new OpenBSDX86_64TargetInfo(T);
+ case llvm::Triple::Bitrig:
+ return new BitrigX86_64TargetInfo(T);
case llvm::Triple::FreeBSD:
return new FreeBSDTargetInfo<X86_64TargetInfo>(T);
case llvm::Triple::Solaris:
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