diff options
Diffstat (limited to 'include/llvm/Target/TargetSubtargetInfo.h')
| -rw-r--r-- | include/llvm/Target/TargetSubtargetInfo.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/include/llvm/Target/TargetSubtargetInfo.h b/include/llvm/Target/TargetSubtargetInfo.h index 6db96d9..b2d405d 100644 --- a/include/llvm/Target/TargetSubtargetInfo.h +++ b/include/llvm/Target/TargetSubtargetInfo.h @@ -19,6 +19,7 @@ namespace llvm { +class MachineFunction; class MachineInstr; class SDep; class SUnit; @@ -54,6 +55,13 @@ public: return 0; } + /// \brief True if the subtarget should run MachineScheduler after aggressive + /// coalescing. + /// + /// This currently replaces the SelectionDAG scheduler with the "source" order + /// scheduler. It does not yet disable the postRA scheduler. + virtual bool enableMachineScheduler() const; + // enablePostRAScheduler - If the target can benefit from post-regalloc // scheduling and the specified optimization level meets the requirement // return true to enable post-register-allocation scheduling. In @@ -66,6 +74,9 @@ public: // the latency of a schedule dependency. virtual void adjustSchedDependency(SUnit *def, SUnit *use, SDep& dep) const { } + + /// \brief Reset the features for the subtarget. + virtual void resetSubtargetFeatures(const MachineFunction *MF) { } }; } // End llvm namespace |
