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-rw-r--r--include/llvm/CodeGen/AsmPrinter.h18
-rw-r--r--include/llvm/CodeGen/CallingConvLower.h18
-rw-r--r--include/llvm/CodeGen/FastISel.h13
-rw-r--r--include/llvm/CodeGen/ISDOpcodes.h8
-rw-r--r--include/llvm/CodeGen/LiveInterval.h5
-rw-r--r--include/llvm/CodeGen/MachineInstr.h1
-rw-r--r--include/llvm/CodeGen/MachineInstrBuilder.h2
-rw-r--r--include/llvm/CodeGen/MachineModuleInfo.h31
-rw-r--r--include/llvm/CodeGen/MachineOperand.h6
-rw-r--r--include/llvm/CodeGen/PseudoSourceValue.h2
-rw-r--r--include/llvm/CodeGen/RegAllocPBQP.h2
-rw-r--r--include/llvm/CodeGen/ScheduleDAG.h1
-rw-r--r--include/llvm/CodeGen/SelectionDAG.h6
-rw-r--r--include/llvm/CodeGen/TargetLoweringObjectFileImpl.h12
14 files changed, 77 insertions, 48 deletions
diff --git a/include/llvm/CodeGen/AsmPrinter.h b/include/llvm/CodeGen/AsmPrinter.h
index 58395ba..5eea099 100644
--- a/include/llvm/CodeGen/AsmPrinter.h
+++ b/include/llvm/CodeGen/AsmPrinter.h
@@ -185,7 +185,14 @@ namespace llvm {
void emitPrologLabel(const MachineInstr &MI);
- bool needsCFIMoves();
+ enum CFIMoveType {
+ CFI_M_None,
+ CFI_M_EH,
+ CFI_M_Debug
+ };
+ CFIMoveType needsCFIMoves();
+
+ bool needsSEHMoves();
/// EmitConstantPool - Print to the current output stream assembly
/// representations of the constants in the constant pool MCP. This is
@@ -381,10 +388,6 @@ namespace llvm {
/// operands.
virtual MachineLocation getDebugValueLocation(const MachineInstr *MI) const;
- /// getDwarfRegOpSize - get size required to emit given machine location
- /// using dwarf encoding.
- virtual unsigned getDwarfRegOpSize(const MachineLocation &MLoc) const;
-
/// getISAEncoding - Get the value for DW_AT_APPLE_isa. Zero if no isa
/// encoding specified.
virtual unsigned getISAEncoding() { return 0; }
@@ -396,12 +399,9 @@ namespace llvm {
// Dwarf Lowering Routines
//===------------------------------------------------------------------===//
- /// EmitFrameMoves - Emit frame instructions to describe the layout of the
+ /// EmitCFIFrameMove - Emit frame instruction to describe the layout of the
/// frame.
- void EmitFrameMoves(const std::vector<MachineMove> &Moves,
- MCSymbol *BaseLabel, bool isEH) const;
void EmitCFIFrameMove(const MachineMove &Move) const;
- void EmitCFIFrameMoves(const std::vector<MachineMove> &Moves) const;
//===------------------------------------------------------------------===//
// Inline Asm Support
diff --git a/include/llvm/CodeGen/CallingConvLower.h b/include/llvm/CodeGen/CallingConvLower.h
index 9018ea3..77dc644 100644
--- a/include/llvm/CodeGen/CallingConvLower.h
+++ b/include/llvm/CodeGen/CallingConvLower.h
@@ -16,6 +16,7 @@
#define LLVM_CODEGEN_CALLINGCONVLOWER_H
#include "llvm/ADT/SmallVector.h"
+#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/Target/TargetCallingConv.h"
#include "llvm/CallingConv.h"
@@ -141,14 +142,19 @@ typedef bool CCCustomFn(unsigned &ValNo, MVT &ValVT,
MVT &LocVT, CCValAssign::LocInfo &LocInfo,
ISD::ArgFlagsTy &ArgFlags, CCState &State);
-typedef enum { Invalid, Prologue, Call } ParmContext;
+/// ParmContext - This enum tracks whether calling convention lowering is in
+/// the context of prologue or call generation. Not all backends make use of
+/// this information.
+typedef enum { Unknown, Prologue, Call } ParmContext;
/// CCState - This class holds information needed while lowering arguments and
/// return values. It captures which registers are already assigned and which
/// stack slots are used. It provides accessors to allocate these values.
class CCState {
+private:
CallingConv::ID CallingConv;
bool IsVarArg;
+ MachineFunction &MF;
const TargetMachine &TM;
const TargetRegisterInfo &TRI;
SmallVector<CCValAssign, 16> &Locs;
@@ -158,10 +164,14 @@ class CCState {
SmallVector<uint32_t, 16> UsedRegs;
unsigned FirstByValReg;
bool FirstByValRegValid;
+
+protected:
ParmContext CallOrPrologue;
+
public:
- CCState(CallingConv::ID CC, bool isVarArg, const TargetMachine &TM,
- SmallVector<CCValAssign, 16> &locs, LLVMContext &C);
+ CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF,
+ const TargetMachine &TM, SmallVector<CCValAssign, 16> &locs,
+ LLVMContext &C);
void addLoc(const CCValAssign &V) {
Locs.push_back(V);
@@ -169,6 +179,7 @@ public:
LLVMContext &getContext() const { return Context; }
const TargetMachine &getTarget() const { return TM; }
+ MachineFunction &getMachineFunction() const { return MF; }
CallingConv::ID getCallingConv() const { return CallingConv; }
bool isVarArg() const { return IsVarArg; }
@@ -301,7 +312,6 @@ public:
bool isFirstByValRegValid() { return FirstByValRegValid; }
ParmContext getCallOrPrologue() { return CallOrPrologue; }
- void setCallOrPrologue(ParmContext pc) { CallOrPrologue = pc; }
private:
/// MarkAllocated - Mark a register and all of its aliases as allocated.
diff --git a/include/llvm/CodeGen/FastISel.h b/include/llvm/CodeGen/FastISel.h
index 10c4c33d..962a4e2 100644
--- a/include/llvm/CodeGen/FastISel.h
+++ b/include/llvm/CodeGen/FastISel.h
@@ -241,6 +241,15 @@ protected:
unsigned Op0, bool Op0IsKill,
unsigned Op1, bool Op1IsKill);
+ /// FastEmitInst_rrr - Emit a MachineInstr with three register operands
+ /// and a result register in the given register class.
+ ///
+ unsigned FastEmitInst_rrr(unsigned MachineInstOpcode,
+ const TargetRegisterClass *RC,
+ unsigned Op0, bool Op0IsKill,
+ unsigned Op1, bool Op1IsKill,
+ unsigned Op2, bool Op2IsKill);
+
/// FastEmitInst_ri - Emit a MachineInstr with a register operand,
/// an immediate, and a result register in the given register class.
///
@@ -301,7 +310,7 @@ protected:
/// the CFG.
void FastEmitBranch(MachineBasicBlock *MBB, DebugLoc DL);
- unsigned UpdateValueMap(const Value* I, unsigned Reg);
+ void UpdateValueMap(const Value* I, unsigned Reg, unsigned NumRegs = 1);
unsigned createResultReg(const TargetRegisterClass *RC);
@@ -334,6 +343,8 @@ private:
bool SelectCast(const User *I, unsigned Opcode);
+ bool SelectExtractValue(const User *I);
+
/// HandlePHINodesInSuccessorBlocks - Handle PHI nodes in successor blocks.
/// Emit code to ensure constants are copied into registers when needed.
/// Remember the virtual registers that need to be added to the Machine PHI
diff --git a/include/llvm/CodeGen/ISDOpcodes.h b/include/llvm/CodeGen/ISDOpcodes.h
index f0de936..e765cad 100644
--- a/include/llvm/CodeGen/ISDOpcodes.h
+++ b/include/llvm/CodeGen/ISDOpcodes.h
@@ -107,11 +107,11 @@ namespace ISD {
// and returns an outchain.
EH_SJLJ_LONGJMP,
- // OUTCHAIN = EH_SJLJ_DISPATCHSETUP(INCHAIN, context)
+ // OUTCHAIN = EH_SJLJ_DISPATCHSETUP(INCHAIN, setjmpval)
// This corresponds to the eh.sjlj.dispatchsetup intrinsic. It takes an
- // input chain and a pointer to the sjlj function context as inputs and
- // returns an outchain. By default, this does nothing. Targets can lower
- // this to unwind setup code if needed.
+ // input chain and the value returning from setjmp as inputs and returns an
+ // outchain. By default, this does nothing. Targets can lower this to unwind
+ // setup code if needed.
EH_SJLJ_DISPATCHSETUP,
// TargetConstant* - Like Constant*, but the DAG does not do any folding,
diff --git a/include/llvm/CodeGen/LiveInterval.h b/include/llvm/CodeGen/LiveInterval.h
index c5285ce..5fd4d3d 100644
--- a/include/llvm/CodeGen/LiveInterval.h
+++ b/include/llvm/CodeGen/LiveInterval.h
@@ -492,9 +492,10 @@ namespace llvm {
/// Returns true if the live interval is zero length, i.e. no live ranges
/// span instructions. It doesn't pay to spill such an interval.
- bool isZeroLength() const {
+ bool isZeroLength(SlotIndexes *Indexes) const {
for (const_iterator i = begin(), e = end(); i != e; ++i)
- if (i->end.getPrevIndex() > i->start)
+ if (Indexes->getNextNonNullIndex(i->start).getBaseIndex() <
+ i->end.getBaseIndex())
return false;
return true;
}
diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h
index 2724689..c36dd69 100644
--- a/include/llvm/CodeGen/MachineInstr.h
+++ b/include/llvm/CodeGen/MachineInstr.h
@@ -229,6 +229,7 @@ public:
enum MICheckType {
CheckDefs, // Check all operands for equality
+ CheckKillDead, // Check all operands including kill / dead markers
IgnoreDefs, // Ignore all definitions
IgnoreVRegDefs // Ignore virtual register definitions
};
diff --git a/include/llvm/CodeGen/MachineInstrBuilder.h b/include/llvm/CodeGen/MachineInstrBuilder.h
index 967e019..c8183a3 100644
--- a/include/llvm/CodeGen/MachineInstrBuilder.h
+++ b/include/llvm/CodeGen/MachineInstrBuilder.h
@@ -88,7 +88,7 @@ public:
return *this;
}
- const MachineInstrBuilder &addFrameIndex(unsigned Idx) const {
+ const MachineInstrBuilder &addFrameIndex(int Idx) const {
MI->addOperand(MachineOperand::CreateFI(Idx));
return *this;
}
diff --git a/include/llvm/CodeGen/MachineModuleInfo.h b/include/llvm/CodeGen/MachineModuleInfo.h
index 6bc80b0..fa185c4 100644
--- a/include/llvm/CodeGen/MachineModuleInfo.h
+++ b/include/llvm/CodeGen/MachineModuleInfo.h
@@ -52,27 +52,13 @@ namespace llvm {
class Constant;
class GlobalVariable;
class MDNode;
+class MMIAddrLabelMap;
class MachineBasicBlock;
class MachineFunction;
class Module;
class PointerType;
class StructType;
-/// MachineModuleInfoImpl - This class can be derived from and used by targets
-/// to hold private target-specific information for each Module. Objects of
-/// type are accessed/created with MMI::getInfo and destroyed when the
-/// MachineModuleInfo is destroyed.
-class MachineModuleInfoImpl {
-public:
- typedef PointerIntPair<MCSymbol*, 1, bool> StubValueTy;
- virtual ~MachineModuleInfoImpl();
- typedef std::vector<std::pair<MCSymbol*, StubValueTy> > SymbolListTy;
-protected:
- static SymbolListTy GetSortedStubs(const DenseMap<MCSymbol*, StubValueTy>&);
-};
-
-
-
//===----------------------------------------------------------------------===//
/// LandingPadInfo - This structure is used to retain landing pad info for
/// the current function.
@@ -89,7 +75,20 @@ struct LandingPadInfo {
: LandingPadBlock(MBB), LandingPadLabel(0), Personality(0) {}
};
-class MMIAddrLabelMap;
+//===----------------------------------------------------------------------===//
+/// MachineModuleInfoImpl - This class can be derived from and used by targets
+/// to hold private target-specific information for each Module. Objects of
+/// type are accessed/created with MMI::getInfo and destroyed when the
+/// MachineModuleInfo is destroyed.
+///
+class MachineModuleInfoImpl {
+public:
+ typedef PointerIntPair<MCSymbol*, 1, bool> StubValueTy;
+ virtual ~MachineModuleInfoImpl();
+ typedef std::vector<std::pair<MCSymbol*, StubValueTy> > SymbolListTy;
+protected:
+ static SymbolListTy GetSortedStubs(const DenseMap<MCSymbol*, StubValueTy>&);
+};
//===----------------------------------------------------------------------===//
/// MachineModuleInfo - This class contains meta information specific to a
diff --git a/include/llvm/CodeGen/MachineOperand.h b/include/llvm/CodeGen/MachineOperand.h
index 8acc949..140c6e8 100644
--- a/include/llvm/CodeGen/MachineOperand.h
+++ b/include/llvm/CodeGen/MachineOperand.h
@@ -94,8 +94,8 @@ private:
/// not a real instruction. Such uses should be ignored during codegen.
bool IsDebug : 1;
- /// SmallContents - Thisreally should be part of the Contents union, but lives
- /// out here so we can get a better packed struct.
+ /// SmallContents - This really should be part of the Contents union, but
+ /// lives out here so we can get a better packed struct.
/// MO_Register: Register number.
/// OffsetedInfo: Low bits of offset.
union {
@@ -473,7 +473,7 @@ public:
Op.setTargetFlags(TargetFlags);
return Op;
}
- static MachineOperand CreateFI(unsigned Idx) {
+ static MachineOperand CreateFI(int Idx) {
MachineOperand Op(MachineOperand::MO_FrameIndex);
Op.setIndex(Idx);
return Op;
diff --git a/include/llvm/CodeGen/PseudoSourceValue.h b/include/llvm/CodeGen/PseudoSourceValue.h
index bace631..7dab4f9 100644
--- a/include/llvm/CodeGen/PseudoSourceValue.h
+++ b/include/llvm/CodeGen/PseudoSourceValue.h
@@ -21,7 +21,7 @@ namespace llvm {
class raw_ostream;
/// PseudoSourceValue - Special value supplied for machine level alias
- /// analysis. It indicates that the a memory access references the functions
+ /// analysis. It indicates that a memory access references the functions
/// stack frame (e.g., a spill slot), below the stack frame (e.g., argument
/// space), or constant pool.
class PseudoSourceValue : public Value {
diff --git a/include/llvm/CodeGen/RegAllocPBQP.h b/include/llvm/CodeGen/RegAllocPBQP.h
index 7e8745e..8139c65 100644
--- a/include/llvm/CodeGen/RegAllocPBQP.h
+++ b/include/llvm/CodeGen/RegAllocPBQP.h
@@ -94,7 +94,7 @@ namespace llvm {
typedef std::map<PBQP::Graph::ConstNodeItr, unsigned,
PBQP::NodeItrComparator> Node2VReg;
typedef DenseMap<unsigned, PBQP::Graph::NodeItr> VReg2Node;
- typedef std::map<unsigned, AllowedSet> AllowedSetMap;
+ typedef DenseMap<unsigned, AllowedSet> AllowedSetMap;
PBQP::Graph graph;
Node2VReg node2VReg;
diff --git a/include/llvm/CodeGen/ScheduleDAG.h b/include/llvm/CodeGen/ScheduleDAG.h
index 2eb3db3..2f01948 100644
--- a/include/llvm/CodeGen/ScheduleDAG.h
+++ b/include/llvm/CodeGen/ScheduleDAG.h
@@ -265,7 +265,6 @@ namespace llvm {
bool isCloned : 1; // True if this node has been cloned.
Sched::Preference SchedulingPref; // Scheduling preference.
- SmallVector<MachineInstr*, 4> DbgInstrList; // dbg_values referencing this.
private:
bool isDepthCurrent : 1; // True if Depth is current.
bool isHeightCurrent : 1; // True if Height is current.
diff --git a/include/llvm/CodeGen/SelectionDAG.h b/include/llvm/CodeGen/SelectionDAG.h
index 92fd0c9..1c42bef 100644
--- a/include/llvm/CodeGen/SelectionDAG.h
+++ b/include/llvm/CodeGen/SelectionDAG.h
@@ -284,7 +284,7 @@ public:
///
/// Note that this is an involved process that may invalidate pointers into
/// the graph.
- void Legalize(CodeGenOpt::Level OptLevel);
+ void Legalize();
/// LegalizeVectors - This transforms the SelectionDAG into a SelectionDAG
/// that only uses vector math operations supported by the target. This is
@@ -985,10 +985,6 @@ public:
/// other positive zero.
bool isEqualTo(SDValue A, SDValue B) const;
- /// isVerifiedDebugInfoDesc - Returns true if the specified SDValue has
- /// been verified as a debug information descriptor.
- bool isVerifiedDebugInfoDesc(SDValue Op) const;
-
/// UnrollVectorOp - Utility function used by legalize and lowering to
/// "unroll" a vector operation by splitting out the scalars and operating
/// on each element individually. If the ResNE is 0, fully unroll the vector
diff --git a/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h b/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
index 829f580..54e5751 100644
--- a/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
+++ b/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
@@ -58,6 +58,10 @@ public:
virtual void Initialize(MCContext &Ctx, const TargetMachine &TM);
virtual const MCSection *getEHFrameSection() const;
+ virtual const MCSection *getWin64EHFuncTableSection(StringRef) const {
+ return NULL;
+ }
+ virtual const MCSection *getWin64EHTableSection(StringRef) const{return NULL;}
virtual void emitPersonalityValue(MCStreamer &Streamer,
const TargetMachine &TM,
@@ -133,6 +137,10 @@ public:
virtual void Initialize(MCContext &Ctx, const TargetMachine &TM);
virtual const MCSection *getEHFrameSection() const;
+ virtual const MCSection *getWin64EHFuncTableSection(StringRef) const {
+ return NULL;
+ }
+ virtual const MCSection *getWin64EHTableSection(StringRef) const{return NULL;}
virtual const MCSection *
SelectSectionForGlobal(const GlobalValue *GV, SectionKind Kind,
@@ -196,6 +204,8 @@ public:
class TargetLoweringObjectFileCOFF : public TargetLoweringObjectFile {
const MCSection *DrectveSection;
+ const MCSection *PDataSection;
+ const MCSection *XDataSection;
public:
TargetLoweringObjectFileCOFF() {}
~TargetLoweringObjectFileCOFF() {}
@@ -203,6 +213,8 @@ public:
virtual void Initialize(MCContext &Ctx, const TargetMachine &TM);
virtual const MCSection *getEHFrameSection() const;
+ virtual const MCSection *getWin64EHFuncTableSection(StringRef) const;
+ virtual const MCSection *getWin64EHTableSection(StringRef) const;
virtual const MCSection *getDrectveSection() const { return DrectveSection; }
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