diff options
Diffstat (limited to 'include/llvm/CodeGen/MachineOperand.h')
-rw-r--r-- | include/llvm/CodeGen/MachineOperand.h | 45 |
1 files changed, 33 insertions, 12 deletions
diff --git a/include/llvm/CodeGen/MachineOperand.h b/include/llvm/CodeGen/MachineOperand.h index ba538d7..5a7f76b 100644 --- a/include/llvm/CodeGen/MachineOperand.h +++ b/include/llvm/CodeGen/MachineOperand.h @@ -47,7 +47,14 @@ public: private: /// OpKind - Specify what kind of operand this is. This discriminates the /// union. - MachineOperandType OpKind : 8; + unsigned char OpKind; // MachineOperandType + + /// SubReg - Subregister number, only valid for MO_Register. A value of 0 + /// indicates the MO_Register has no subReg. + unsigned char SubReg; + + /// TargetFlags - This is a set of target-specific operand flags. + unsigned char TargetFlags; /// IsDef/IsImp/IsKill/IsDead flags - These are only valid for MO_Register /// operands. @@ -73,10 +80,6 @@ private: /// model the GCC inline asm '&' constraint modifier. bool IsEarlyClobber : 1; - /// SubReg - Subregister number, only valid for MO_Register. A value of 0 - /// indicates the MO_Register has no subReg. - unsigned char SubReg; - /// ParentMI - This is the instruction that this operand is embedded into. /// This is valid for all operand types, when the operand is in an instr. MachineInstr *ParentMI; @@ -105,7 +108,9 @@ private: } OffsetedInfo; } Contents; - explicit MachineOperand(MachineOperandType K) : OpKind(K), ParentMI(0) {} + explicit MachineOperand(MachineOperandType K) : OpKind(K), ParentMI(0) { + TargetFlags = 0; + } public: MachineOperand(const MachineOperand &M) { *this = M; @@ -115,7 +120,12 @@ public: /// getType - Returns the MachineOperandType for this operand. /// - MachineOperandType getType() const { return OpKind; } + MachineOperandType getType() const { return (MachineOperandType)OpKind; } + + unsigned char getTargetFlags() const { return TargetFlags; } + void setTargetFlags(unsigned char F) { TargetFlags = F; } + void addTargetFlag(unsigned char F) { TargetFlags |= F; } + /// getParent - Return the instruction that this operand belongs to. /// @@ -361,9 +371,11 @@ public: Op.SubReg = SubReg; return Op; } - static MachineOperand CreateMBB(MachineBasicBlock *MBB) { + static MachineOperand CreateMBB(MachineBasicBlock *MBB, + unsigned char TargetFlags = 0) { MachineOperand Op(MachineOperand::MO_MachineBasicBlock); Op.setMBB(MBB); + Op.setTargetFlags(TargetFlags); return Op; } static MachineOperand CreateFI(unsigned Idx) { @@ -371,27 +383,35 @@ public: Op.setIndex(Idx); return Op; } - static MachineOperand CreateCPI(unsigned Idx, int Offset) { + static MachineOperand CreateCPI(unsigned Idx, int Offset, + unsigned char TargetFlags = 0) { MachineOperand Op(MachineOperand::MO_ConstantPoolIndex); Op.setIndex(Idx); Op.setOffset(Offset); + Op.setTargetFlags(TargetFlags); return Op; } - static MachineOperand CreateJTI(unsigned Idx) { + static MachineOperand CreateJTI(unsigned Idx, + unsigned char TargetFlags = 0) { MachineOperand Op(MachineOperand::MO_JumpTableIndex); Op.setIndex(Idx); + Op.setTargetFlags(TargetFlags); return Op; } - static MachineOperand CreateGA(GlobalValue *GV, int64_t Offset) { + static MachineOperand CreateGA(GlobalValue *GV, int64_t Offset, + unsigned char TargetFlags = 0) { MachineOperand Op(MachineOperand::MO_GlobalAddress); Op.Contents.OffsetedInfo.Val.GV = GV; Op.setOffset(Offset); + Op.setTargetFlags(TargetFlags); return Op; } - static MachineOperand CreateES(const char *SymName, int64_t Offset = 0) { + static MachineOperand CreateES(const char *SymName, int64_t Offset = 0, + unsigned char TargetFlags = 0) { MachineOperand Op(MachineOperand::MO_ExternalSymbol); Op.Contents.OffsetedInfo.Val.SymbolName = SymName; Op.setOffset(Offset); + Op.setTargetFlags(TargetFlags); return Op; } const MachineOperand &operator=(const MachineOperand &MO) { @@ -404,6 +424,7 @@ public: SubReg = MO.SubReg; ParentMI = MO.ParentMI; Contents = MO.Contents; + TargetFlags = MO.TargetFlags; return *this; } |