diff options
Diffstat (limited to 'contrib/llvm')
3 files changed, 85 insertions, 6 deletions
diff --git a/contrib/llvm/patches/patch-20-enable-armv6-clrex.diff b/contrib/llvm/patches/patch-20-enable-armv6-clrex.diff index 0375f08..fd77f45 100644 --- a/contrib/llvm/patches/patch-20-enable-armv6-clrex.diff +++ b/contrib/llvm/patches/patch-20-enable-armv6-clrex.diff @@ -7,8 +7,8 @@ Introduced here: http://svnweb.freebsd.org/changeset/base/275362 Index: lib/Target/ARM/ARMInstrInfo.td =================================================================== ---- lib/Target/ARM/ARMInstrInfo.td (revision 20) -+++ lib/Target/ARM/ARMInstrInfo.td (revision 21) +--- lib/Target/ARM/ARMInstrInfo.td ++++ lib/Target/ARM/ARMInstrInfo.td @@ -4615,7 +4615,7 @@ def STLEXD : AIstlex<0b01, (outs GPR:$Rd), def CLREX : AXI<(outs), (ins), MiscFrm, NoItinerary, "clrex", diff --git a/contrib/llvm/patches/patch-21-llvm-r223171-fix-vectorizer.diff b/contrib/llvm/patches/patch-21-llvm-r223171-fix-vectorizer.diff index 749588d..c0e8dac 100644 --- a/contrib/llvm/patches/patch-21-llvm-r223171-fix-vectorizer.diff +++ b/contrib/llvm/patches/patch-21-llvm-r223171-fix-vectorizer.diff @@ -19,8 +19,8 @@ Introduced here: http://svnweb.freebsd.org/changeset/base/275635 Index: lib/Transforms/Vectorize/LoopVectorize.cpp =================================================================== ---- lib/Transforms/Vectorize/LoopVectorize.cpp (revision 21) -+++ lib/Transforms/Vectorize/LoopVectorize.cpp (revision 22) +--- lib/Transforms/Vectorize/LoopVectorize.cpp ++++ lib/Transforms/Vectorize/LoopVectorize.cpp @@ -3466,6 +3466,15 @@ bool LoopVectorizationLegality::canVectorize() { return false; } @@ -39,8 +39,8 @@ Index: lib/Transforms/Vectorize/LoopVectorize.cpp TheLoop->getHeader()->getName() << '\n'); Index: test/Transforms/LoopVectorize/loop-form.ll =================================================================== ---- test/Transforms/LoopVectorize/loop-form.ll (revision 0) -+++ test/Transforms/LoopVectorize/loop-form.ll (revision 22) +--- test/Transforms/LoopVectorize/loop-form.ll ++++ test/Transforms/LoopVectorize/loop-form.ll @@ -0,0 +1,31 @@ +; RUN: opt -S -loop-vectorize < %s | FileCheck %s +target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" diff --git a/contrib/llvm/patches/patch-22-llvm-r223147-arm-cpu-directive.diff b/contrib/llvm/patches/patch-22-llvm-r223147-arm-cpu-directive.diff new file mode 100644 index 0000000..e97dc2e --- /dev/null +++ b/contrib/llvm/patches/patch-22-llvm-r223147-arm-cpu-directive.diff @@ -0,0 +1,79 @@ +Pull in r223147, r223255 and r223390 from upstream llvm trunk (by Roman +Divacky): + + Introduce CPUStringIsValid() into MCSubtargetInfo and use it for ARM + .cpu parsing. + + Previously .cpu directive in ARM assembler didnt switch to the new + CPU and therefore acted as a nop. This implemented real action for + .cpu and eg. allows to assembler FreeBSD kernel with -integrated-as. + + Change the name to be in style. + + Add a FIXME as requested by Renato Golin. + +Introduced here: http://svnweb.freebsd.org/changeset/base/275654 + +Index: include/llvm/MC/MCSubtargetInfo.h +=================================================================== +--- include/llvm/MC/MCSubtargetInfo.h ++++ include/llvm/MC/MCSubtargetInfo.h +@@ -132,6 +132,15 @@ class MCSubtargetInfo { + + /// Initialize an InstrItineraryData instance. + void initInstrItins(InstrItineraryData &InstrItins) const; ++ ++ /// Check whether the CPU string is valid. ++ bool isCPUStringValid(StringRef CPU) { ++ auto Found = std::find_if(ProcDesc.begin(), ProcDesc.end(), ++ [=](const SubtargetFeatureKV &KV) { ++ return CPU == KV.Key; ++ }); ++ return Found != ProcDesc.end(); ++ } + }; + + } // End llvm namespace +Index: lib/Target/ARM/AsmParser/ARMAsmParser.cpp +=================================================================== +--- lib/Target/ARM/AsmParser/ARMAsmParser.cpp ++++ lib/Target/ARM/AsmParser/ARMAsmParser.cpp +@@ -8618,6 +8618,20 @@ bool ARMAsmParser::parseDirectiveEabiAttr(SMLoc L) + bool ARMAsmParser::parseDirectiveCPU(SMLoc L) { + StringRef CPU = getParser().parseStringToEndOfStatement().trim(); + getTargetStreamer().emitTextAttribute(ARMBuildAttrs::CPU_name, CPU); ++ ++ if (!STI.isCPUStringValid(CPU)) { ++ Error(L, "Unknown CPU name"); ++ return false; ++ } ++ ++ // FIXME: This switches the CPU features globally, therefore it might ++ // happen that code you would not expect to assemble will. For details ++ // see: http://llvm.org/bugs/show_bug.cgi?id=20757 ++ STI.InitMCProcessorInfo(CPU, ""); ++ STI.InitCPUSchedModel(CPU); ++ unsigned FB = ComputeAvailableFeatures(STI.getFeatureBits()); ++ setAvailableFeatures(FB); ++ + return false; + } + +Index: test/MC/ARM/cpu-test.s +=================================================================== +--- test/MC/ARM/cpu-test.s ++++ test/MC/ARM/cpu-test.s +@@ -0,0 +1,13 @@ ++// RUN: not llvm-mc -o - -triple arm-gnueabi-freebsd11.0 < %s > %t 2> %t2 ++// RUN: FileCheck %s < %t ++// RUN: FileCheck %s --check-prefix=CHECK-ERROR < %t2 ++ ++// CHECK: .cpu cortex-a8 ++.cpu cortex-a8 ++// CHECK: dsb sy ++dsb ++.cpu arm9 ++// CHECK-ERROR: error: instruction requires: data-barriers ++dsb ++// CHECK-ERROR: error: Unknown CPU name ++.cpu foobar |
