diff options
Diffstat (limited to 'contrib/llvm/utils/TableGen/InstrInfoEmitter.cpp')
-rw-r--r-- | contrib/llvm/utils/TableGen/InstrInfoEmitter.cpp | 103 |
1 files changed, 52 insertions, 51 deletions
diff --git a/contrib/llvm/utils/TableGen/InstrInfoEmitter.cpp b/contrib/llvm/utils/TableGen/InstrInfoEmitter.cpp index fe30d60..e242a96 100644 --- a/contrib/llvm/utils/TableGen/InstrInfoEmitter.cpp +++ b/contrib/llvm/utils/TableGen/InstrInfoEmitter.cpp @@ -248,7 +248,7 @@ void InstrInfoEmitter::emitOperandNameMappings(raw_ostream &OS, OS << "#ifdef GET_INSTRINFO_OPERAND_ENUM\n"; OS << "#undef GET_INSTRINFO_OPERAND_ENUM\n"; - OS << "namespace llvm {"; + OS << "namespace llvm {\n"; OS << "namespace " << Namespace << " {\n"; OS << "namespace " << OpNameNS << " { \n"; OS << "enum {\n"; @@ -264,7 +264,7 @@ void InstrInfoEmitter::emitOperandNameMappings(raw_ostream &OS, OS << "#ifdef GET_INSTRINFO_NAMED_OPS\n"; OS << "#undef GET_INSTRINFO_NAMED_OPS\n"; - OS << "namespace llvm {"; + OS << "namespace llvm {\n"; OS << "namespace " << Namespace << " {\n"; OS << "LLVM_READONLY\n"; OS << "int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIdx) {\n"; @@ -315,7 +315,7 @@ void InstrInfoEmitter::emitOperandTypesEnum(raw_ostream &OS, OS << "\n#ifdef GET_INSTRINFO_OPERAND_TYPES_ENUM\n"; OS << "#undef GET_INSTRINFO_OPERAND_TYPES_ENUM\n"; - OS << "namespace llvm {"; + OS << "namespace llvm {\n"; OS << "namespace " << Namespace << " {\n"; OS << "namespace OpTypes { \n"; OS << "enum OperandType {\n"; @@ -430,7 +430,8 @@ void InstrInfoEmitter::run(raw_ostream &OS) { std::string ClassName = TargetName + "GenInstrInfo"; OS << "namespace llvm {\n"; OS << "struct " << ClassName << " : public TargetInstrInfo {\n" - << " explicit " << ClassName << "(int SO = -1, int DO = -1);\n" + << " explicit " << ClassName + << "(int CFSetupOpcode = -1, int CFDestroyOpcode = -1);\n" << " virtual ~" << ClassName << "();\n" << "};\n"; OS << "} // End llvm namespace \n"; @@ -444,10 +445,11 @@ void InstrInfoEmitter::run(raw_ostream &OS) { OS << "extern const MCInstrDesc " << TargetName << "Insts[];\n"; OS << "extern const unsigned " << TargetName << "InstrNameIndices[];\n"; OS << "extern const char " << TargetName << "InstrNameData[];\n"; - OS << ClassName << "::" << ClassName << "(int SO, int DO)\n" - << " : TargetInstrInfo(SO, DO) {\n" - << " InitMCInstrInfo(" << TargetName << "Insts, " - << TargetName << "InstrNameIndices, " << TargetName << "InstrNameData, " + OS << ClassName << "::" << ClassName + << "(int CFSetupOpcode, int CFDestroyOpcode)\n" + << " : TargetInstrInfo(CFSetupOpcode, CFDestroyOpcode) {\n" + << " InitMCInstrInfo(" << TargetName << "Insts, " << TargetName + << "InstrNameIndices, " << TargetName << "InstrNameData, " << NumberedInstructions.size() << ");\n}\n" << ClassName << "::~" << ClassName << "() {}\n"; OS << "} // End llvm namespace \n"; @@ -473,41 +475,42 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num, OS << " { "; OS << Num << ",\t" << MinOperands << ",\t" << Inst.Operands.NumDefs << ",\t" - << SchedModels.getSchedClassIdx(Inst) << ",\t" - << Inst.TheDef->getValueAsInt("Size") << ",\t0"; - - // Emit all of the target indepedent flags... - if (Inst.isPseudo) OS << "|(1<<MCID::Pseudo)"; - if (Inst.isReturn) OS << "|(1<<MCID::Return)"; - if (Inst.isBranch) OS << "|(1<<MCID::Branch)"; - if (Inst.isIndirectBranch) OS << "|(1<<MCID::IndirectBranch)"; - if (Inst.isCompare) OS << "|(1<<MCID::Compare)"; - if (Inst.isMoveImm) OS << "|(1<<MCID::MoveImm)"; - if (Inst.isBitcast) OS << "|(1<<MCID::Bitcast)"; - if (Inst.isSelect) OS << "|(1<<MCID::Select)"; - if (Inst.isBarrier) OS << "|(1<<MCID::Barrier)"; - if (Inst.hasDelaySlot) OS << "|(1<<MCID::DelaySlot)"; - if (Inst.isCall) OS << "|(1<<MCID::Call)"; - if (Inst.canFoldAsLoad) OS << "|(1<<MCID::FoldableAsLoad)"; - if (Inst.mayLoad) OS << "|(1<<MCID::MayLoad)"; - if (Inst.mayStore) OS << "|(1<<MCID::MayStore)"; - if (Inst.isPredicable) OS << "|(1<<MCID::Predicable)"; - if (Inst.isConvertibleToThreeAddress) OS << "|(1<<MCID::ConvertibleTo3Addr)"; - if (Inst.isCommutable) OS << "|(1<<MCID::Commutable)"; - if (Inst.isTerminator) OS << "|(1<<MCID::Terminator)"; - if (Inst.isReMaterializable) OS << "|(1<<MCID::Rematerializable)"; - if (Inst.isNotDuplicable) OS << "|(1<<MCID::NotDuplicable)"; - if (Inst.Operands.hasOptionalDef) OS << "|(1<<MCID::HasOptionalDef)"; - if (Inst.usesCustomInserter) OS << "|(1<<MCID::UsesCustomInserter)"; - if (Inst.hasPostISelHook) OS << "|(1<<MCID::HasPostISelHook)"; - if (Inst.Operands.isVariadic)OS << "|(1<<MCID::Variadic)"; - if (Inst.hasSideEffects) OS << "|(1<<MCID::UnmodeledSideEffects)"; - if (Inst.isAsCheapAsAMove) OS << "|(1<<MCID::CheapAsAMove)"; - if (Inst.hasExtraSrcRegAllocReq) OS << "|(1<<MCID::ExtraSrcRegAllocReq)"; - if (Inst.hasExtraDefRegAllocReq) OS << "|(1<<MCID::ExtraDefRegAllocReq)"; - if (Inst.isRegSequence) OS << "|(1<<MCID::RegSequence)"; - if (Inst.isExtractSubreg) OS << "|(1<<MCID::ExtractSubreg)"; - if (Inst.isInsertSubreg) OS << "|(1<<MCID::InsertSubreg)"; + << Inst.TheDef->getValueAsInt("Size") << ",\t" + << SchedModels.getSchedClassIdx(Inst) << ",\t0"; + + // Emit all of the target independent flags... + if (Inst.isPseudo) OS << "|(1ULL<<MCID::Pseudo)"; + if (Inst.isReturn) OS << "|(1ULL<<MCID::Return)"; + if (Inst.isBranch) OS << "|(1ULL<<MCID::Branch)"; + if (Inst.isIndirectBranch) OS << "|(1ULL<<MCID::IndirectBranch)"; + if (Inst.isCompare) OS << "|(1ULL<<MCID::Compare)"; + if (Inst.isMoveImm) OS << "|(1ULL<<MCID::MoveImm)"; + if (Inst.isBitcast) OS << "|(1ULL<<MCID::Bitcast)"; + if (Inst.isSelect) OS << "|(1ULL<<MCID::Select)"; + if (Inst.isBarrier) OS << "|(1ULL<<MCID::Barrier)"; + if (Inst.hasDelaySlot) OS << "|(1ULL<<MCID::DelaySlot)"; + if (Inst.isCall) OS << "|(1ULL<<MCID::Call)"; + if (Inst.canFoldAsLoad) OS << "|(1ULL<<MCID::FoldableAsLoad)"; + if (Inst.mayLoad) OS << "|(1ULL<<MCID::MayLoad)"; + if (Inst.mayStore) OS << "|(1ULL<<MCID::MayStore)"; + if (Inst.isPredicable) OS << "|(1ULL<<MCID::Predicable)"; + if (Inst.isConvertibleToThreeAddress) OS << "|(1ULL<<MCID::ConvertibleTo3Addr)"; + if (Inst.isCommutable) OS << "|(1ULL<<MCID::Commutable)"; + if (Inst.isTerminator) OS << "|(1ULL<<MCID::Terminator)"; + if (Inst.isReMaterializable) OS << "|(1ULL<<MCID::Rematerializable)"; + if (Inst.isNotDuplicable) OS << "|(1ULL<<MCID::NotDuplicable)"; + if (Inst.Operands.hasOptionalDef) OS << "|(1ULL<<MCID::HasOptionalDef)"; + if (Inst.usesCustomInserter) OS << "|(1ULL<<MCID::UsesCustomInserter)"; + if (Inst.hasPostISelHook) OS << "|(1ULL<<MCID::HasPostISelHook)"; + if (Inst.Operands.isVariadic)OS << "|(1ULL<<MCID::Variadic)"; + if (Inst.hasSideEffects) OS << "|(1ULL<<MCID::UnmodeledSideEffects)"; + if (Inst.isAsCheapAsAMove) OS << "|(1ULL<<MCID::CheapAsAMove)"; + if (Inst.hasExtraSrcRegAllocReq) OS << "|(1ULL<<MCID::ExtraSrcRegAllocReq)"; + if (Inst.hasExtraDefRegAllocReq) OS << "|(1ULL<<MCID::ExtraDefRegAllocReq)"; + if (Inst.isRegSequence) OS << "|(1ULL<<MCID::RegSequence)"; + if (Inst.isExtractSubreg) OS << "|(1ULL<<MCID::ExtractSubreg)"; + if (Inst.isInsertSubreg) OS << "|(1ULL<<MCID::InsertSubreg)"; + if (Inst.isConvergent) OS << "|(1ULL<<MCID::Convergent)"; // Emit all of the target-specific flags... BitsInit *TSF = Inst.TheDef->getValueAsBitsInit("TSFlags"); @@ -547,15 +550,15 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num, CodeGenTarget &Target = CDP.getTargetInfo(); if (Inst.HasComplexDeprecationPredicate) // Emit a function pointer to the complex predicate method. - OS << ",0" + OS << ", -1 " << ",&get" << Inst.DeprecatedReason << "DeprecationInfo"; else if (!Inst.DeprecatedReason.empty()) // Emit the Subtarget feature. - OS << "," << Target.getInstNamespace() << "::" << Inst.DeprecatedReason - << ",nullptr"; + OS << ", " << Target.getInstNamespace() << "::" << Inst.DeprecatedReason + << " ,nullptr"; else // Instruction isn't deprecated. - OS << ",0,nullptr"; + OS << ", -1 ,nullptr"; OS << " }, // Inst #" << Num << " = " << Inst.TheDef->getName() << "\n"; } @@ -573,10 +576,8 @@ void InstrInfoEmitter::emitEnums(raw_ostream &OS) { // We must emit the PHI opcode first... std::string Namespace = Target.getInstNamespace(); - if (Namespace.empty()) { - fprintf(stderr, "No instructions defined!\n"); - exit(1); - } + if (Namespace.empty()) + PrintFatalError("No instructions defined!"); const std::vector<const CodeGenInstruction*> &NumberedInstructions = Target.getInstructionsByEnumValue(); |