diff options
Diffstat (limited to 'contrib/llvm/utils/TableGen/CodeGenRegisters.h')
-rw-r--r-- | contrib/llvm/utils/TableGen/CodeGenRegisters.h | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/contrib/llvm/utils/TableGen/CodeGenRegisters.h b/contrib/llvm/utils/TableGen/CodeGenRegisters.h index bbd0cef..39b92c5 100644 --- a/contrib/llvm/utils/TableGen/CodeGenRegisters.h +++ b/contrib/llvm/utils/TableGen/CodeGenRegisters.h @@ -29,7 +29,8 @@ namespace llvm { struct CodeGenRegister { Record *TheDef; const std::string &getName() const; - unsigned DeclaredSpillSize, DeclaredSpillAlignment; + unsigned EnumValue; + unsigned CostPerUse; CodeGenRegister(Record *R); }; @@ -49,23 +50,23 @@ namespace llvm { const std::string &getName() const; const std::vector<MVT::SimpleValueType> &getValueTypes() const {return VTs;} unsigned getNumValueTypes() const { return VTs.size(); } - + MVT::SimpleValueType getValueTypeNum(unsigned VTNum) const { if (VTNum < VTs.size()) return VTs[VTNum]; assert(0 && "VTNum greater than number of ValueTypes in RegClass!"); abort(); } - + bool containsRegister(Record *R) const { for (unsigned i = 0, e = Elements.size(); i != e; ++i) if (Elements[i] == R) return true; return false; } - + // Returns true if RC is a strict subclass. // RC is a sub-class of this class if it is a valid replacement for any - // instruction operand where a register of this classis required. It must + // instruction operand where a register of this classis required. It must // satisfy these conditions: // // 1. All RC registers are also in this. |