diff options
Diffstat (limited to 'contrib/llvm/tools/clang/lib/Headers/mmintrin.h')
| -rw-r--r-- | contrib/llvm/tools/clang/lib/Headers/mmintrin.h | 174 |
1 files changed, 89 insertions, 85 deletions
diff --git a/contrib/llvm/tools/clang/lib/Headers/mmintrin.h b/contrib/llvm/tools/clang/lib/Headers/mmintrin.h index cefd605..e0c277a 100644 --- a/contrib/llvm/tools/clang/lib/Headers/mmintrin.h +++ b/contrib/llvm/tools/clang/lib/Headers/mmintrin.h @@ -39,7 +39,7 @@ typedef char __v8qi __attribute__((__vector_size__(8))); /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c EMMS instruction. +/// This intrinsic corresponds to the <c> EMMS </c> instruction. /// static __inline__ void __DEFAULT_FN_ATTRS _mm_empty(void) @@ -52,7 +52,7 @@ _mm_empty(void) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c VMOVD / MOVD instruction. +/// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction. /// /// \param __i /// A 32-bit integer value. @@ -69,7 +69,7 @@ _mm_cvtsi32_si64(int __i) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c VMOVD / MOVD instruction. +/// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction. /// /// \param __m /// A 64-bit integer vector. @@ -85,7 +85,7 @@ _mm_cvtsi64_si32(__m64 __m) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c VMOVQ / MOVD instruction. +/// This intrinsic corresponds to the <c> VMOVQ / MOVD </c> instruction. /// /// \param __i /// A 64-bit signed integer. @@ -101,7 +101,7 @@ _mm_cvtsi64_m64(long long __i) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c VMOVQ / MOVD instruction. +/// This intrinsic corresponds to the <c> VMOVQ / MOVD </c> instruction. /// /// \param __m /// A 64-bit integer vector. @@ -121,7 +121,7 @@ _mm_cvtm64_si64(__m64 __m) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PACKSSWB instruction. +/// This intrinsic corresponds to the <c> PACKSSWB </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [4 x i16]. Each 16-bit element is treated as a @@ -151,7 +151,7 @@ _mm_packs_pi16(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PACKSSDW instruction. +/// This intrinsic corresponds to the <c> PACKSSDW </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [2 x i32]. Each 32-bit element is treated as a @@ -181,7 +181,7 @@ _mm_packs_pi32(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PACKUSWB instruction. +/// This intrinsic corresponds to the <c> PACKUSWB </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [4 x i16]. Each 16-bit element is treated as a @@ -208,19 +208,19 @@ _mm_packs_pu16(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PUNPCKHBW instruction. +/// This intrinsic corresponds to the <c> PUNPCKHBW </c> instruction. /// /// \param __m1 -/// A 64-bit integer vector of [8 x i8]. -/// Bits [39:32] are written to bits [7:0] of the result. -/// Bits [47:40] are written to bits [23:16] of the result. -/// Bits [55:48] are written to bits [39:32] of the result. +/// A 64-bit integer vector of [8 x i8]. \n +/// Bits [39:32] are written to bits [7:0] of the result. \n +/// Bits [47:40] are written to bits [23:16] of the result. \n +/// Bits [55:48] are written to bits [39:32] of the result. \n /// Bits [63:56] are written to bits [55:48] of the result. /// \param __m2 /// A 64-bit integer vector of [8 x i8]. -/// Bits [39:32] are written to bits [15:8] of the result. -/// Bits [47:40] are written to bits [31:24] of the result. -/// Bits [55:48] are written to bits [47:40] of the result. +/// Bits [39:32] are written to bits [15:8] of the result. \n +/// Bits [47:40] are written to bits [31:24] of the result. \n +/// Bits [55:48] are written to bits [47:40] of the result. \n /// Bits [63:56] are written to bits [63:56] of the result. /// \returns A 64-bit integer vector of [8 x i8] containing the interleaved /// values. @@ -235,15 +235,15 @@ _mm_unpackhi_pi8(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PUNPCKHWD instruction. +/// This intrinsic corresponds to the <c> PUNPCKHWD </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [4 x i16]. -/// Bits [47:32] are written to bits [15:0] of the result. +/// Bits [47:32] are written to bits [15:0] of the result. \n /// Bits [63:48] are written to bits [47:32] of the result. /// \param __m2 /// A 64-bit integer vector of [4 x i16]. -/// Bits [47:32] are written to bits [31:16] of the result. +/// Bits [47:32] are written to bits [31:16] of the result. \n /// Bits [63:48] are written to bits [63:48] of the result. /// \returns A 64-bit integer vector of [4 x i16] containing the interleaved /// values. @@ -258,7 +258,7 @@ _mm_unpackhi_pi16(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PUNPCKHDQ instruction. +/// This intrinsic corresponds to the <c> PUNPCKHDQ </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [2 x i32]. The upper 32 bits are written to @@ -279,19 +279,19 @@ _mm_unpackhi_pi32(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PUNPCKLBW instruction. +/// This intrinsic corresponds to the <c> PUNPCKLBW </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [8 x i8]. -/// Bits [7:0] are written to bits [7:0] of the result. -/// Bits [15:8] are written to bits [23:16] of the result. -/// Bits [23:16] are written to bits [39:32] of the result. +/// Bits [7:0] are written to bits [7:0] of the result. \n +/// Bits [15:8] are written to bits [23:16] of the result. \n +/// Bits [23:16] are written to bits [39:32] of the result. \n /// Bits [31:24] are written to bits [55:48] of the result. /// \param __m2 /// A 64-bit integer vector of [8 x i8]. -/// Bits [7:0] are written to bits [15:8] of the result. -/// Bits [15:8] are written to bits [31:24] of the result. -/// Bits [23:16] are written to bits [47:40] of the result. +/// Bits [7:0] are written to bits [15:8] of the result. \n +/// Bits [15:8] are written to bits [31:24] of the result. \n +/// Bits [23:16] are written to bits [47:40] of the result. \n /// Bits [31:24] are written to bits [63:56] of the result. /// \returns A 64-bit integer vector of [8 x i8] containing the interleaved /// values. @@ -306,15 +306,15 @@ _mm_unpacklo_pi8(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PUNPCKLWD instruction. +/// This intrinsic corresponds to the <c> PUNPCKLWD </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [4 x i16]. -/// Bits [15:0] are written to bits [15:0] of the result. +/// Bits [15:0] are written to bits [15:0] of the result. \n /// Bits [31:16] are written to bits [47:32] of the result. /// \param __m2 /// A 64-bit integer vector of [4 x i16]. -/// Bits [15:0] are written to bits [31:16] of the result. +/// Bits [15:0] are written to bits [31:16] of the result. \n /// Bits [31:16] are written to bits [63:48] of the result. /// \returns A 64-bit integer vector of [4 x i16] containing the interleaved /// values. @@ -329,7 +329,7 @@ _mm_unpacklo_pi16(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PUNPCKLDQ instruction. +/// This intrinsic corresponds to the <c> PUNPCKLDQ </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [2 x i32]. The lower 32 bits are written to @@ -352,7 +352,7 @@ _mm_unpacklo_pi32(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PADDB instruction. +/// This intrinsic corresponds to the <c> PADDB </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [8 x i8]. @@ -373,7 +373,7 @@ _mm_add_pi8(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PADDW instruction. +/// This intrinsic corresponds to the <c> PADDW </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [4 x i16]. @@ -394,7 +394,7 @@ _mm_add_pi16(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PADDD instruction. +/// This intrinsic corresponds to the <c> PADDD </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [2 x i32]. @@ -416,7 +416,7 @@ _mm_add_pi32(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PADDSB instruction. +/// This intrinsic corresponds to the <c> PADDSB </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [8 x i8]. @@ -439,7 +439,7 @@ _mm_adds_pi8(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PADDSW instruction. +/// This intrinsic corresponds to the <c> PADDSW </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [4 x i16]. @@ -461,7 +461,7 @@ _mm_adds_pi16(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PADDUSB instruction. +/// This intrinsic corresponds to the <c> PADDUSB </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [8 x i8]. @@ -483,7 +483,7 @@ _mm_adds_pu8(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PADDUSW instruction. +/// This intrinsic corresponds to the <c> PADDUSW </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [4 x i16]. @@ -504,7 +504,7 @@ _mm_adds_pu16(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PSUBB instruction. +/// This intrinsic corresponds to the <c> PSUBB </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [8 x i8] containing the minuends. @@ -525,7 +525,7 @@ _mm_sub_pi8(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PSUBW instruction. +/// This intrinsic corresponds to the <c> PSUBW </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [4 x i16] containing the minuends. @@ -546,7 +546,7 @@ _mm_sub_pi16(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PSUBD instruction. +/// This intrinsic corresponds to the <c> PSUBD </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [2 x i32] containing the minuends. @@ -569,7 +569,7 @@ _mm_sub_pi32(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PSUBSB instruction. +/// This intrinsic corresponds to the <c> PSUBSB </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [8 x i8] containing the minuends. @@ -592,7 +592,7 @@ _mm_subs_pi8(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PSUBSW instruction. +/// This intrinsic corresponds to the <c> PSUBSW </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [4 x i16] containing the minuends. @@ -615,7 +615,7 @@ _mm_subs_pi16(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PSUBUSB instruction. +/// This intrinsic corresponds to the <c> PSUBUSB </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [8 x i8] containing the minuends. @@ -638,7 +638,7 @@ _mm_subs_pu8(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PSUBUSW instruction. +/// This intrinsic corresponds to the <c> PSUBUSW </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [4 x i16] containing the minuends. @@ -663,7 +663,7 @@ _mm_subs_pu16(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PMADDWD instruction. +/// This intrinsic corresponds to the <c> PMADDWD </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [4 x i16]. @@ -684,7 +684,7 @@ _mm_madd_pi16(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PMULHW instruction. +/// This intrinsic corresponds to the <c> PMULHW </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [4 x i16]. @@ -705,7 +705,7 @@ _mm_mulhi_pi16(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PMULLW instruction. +/// This intrinsic corresponds to the <c> PMULLW </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [4 x i16]. @@ -727,14 +727,15 @@ _mm_mullo_pi16(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PSLLW instruction. +/// This intrinsic corresponds to the <c> PSLLW </c> instruction. /// /// \param __m /// A 64-bit integer vector of [4 x i16]. /// \param __count /// A 64-bit integer vector interpreted as a single 64-bit integer. /// \returns A 64-bit integer vector of [4 x i16] containing the left-shifted -/// values. If __count is greater or equal to 16, the result is set to all 0. +/// values. If \a __count is greater or equal to 16, the result is set to all +/// 0. static __inline__ __m64 __DEFAULT_FN_ATTRS _mm_sll_pi16(__m64 __m, __m64 __count) { @@ -748,14 +749,15 @@ _mm_sll_pi16(__m64 __m, __m64 __count) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PSLLW instruction. +/// This intrinsic corresponds to the <c> PSLLW </c> instruction. /// /// \param __m /// A 64-bit integer vector of [4 x i16]. /// \param __count /// A 32-bit integer value. /// \returns A 64-bit integer vector of [4 x i16] containing the left-shifted -/// values. If __count is greater or equal to 16, the result is set to all 0. +/// values. If \a __count is greater or equal to 16, the result is set to all +/// 0. static __inline__ __m64 __DEFAULT_FN_ATTRS _mm_slli_pi16(__m64 __m, int __count) { @@ -770,14 +772,15 @@ _mm_slli_pi16(__m64 __m, int __count) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PSLLD instruction. +/// This intrinsic corresponds to the <c> PSLLD </c> instruction. /// /// \param __m /// A 64-bit integer vector of [2 x i32]. /// \param __count /// A 64-bit integer vector interpreted as a single 64-bit integer. /// \returns A 64-bit integer vector of [2 x i32] containing the left-shifted -/// values. If __count is greater or equal to 32, the result is set to all 0. +/// values. If \a __count is greater or equal to 32, the result is set to all +/// 0. static __inline__ __m64 __DEFAULT_FN_ATTRS _mm_sll_pi32(__m64 __m, __m64 __count) { @@ -791,14 +794,15 @@ _mm_sll_pi32(__m64 __m, __m64 __count) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PSLLD instruction. +/// This intrinsic corresponds to the <c> PSLLD </c> instruction. /// /// \param __m /// A 64-bit integer vector of [2 x i32]. /// \param __count /// A 32-bit integer value. /// \returns A 64-bit integer vector of [2 x i32] containing the left-shifted -/// values. If __count is greater or equal to 32, the result is set to all 0. +/// values. If \a __count is greater or equal to 32, the result is set to all +/// 0. static __inline__ __m64 __DEFAULT_FN_ATTRS _mm_slli_pi32(__m64 __m, int __count) { @@ -811,14 +815,14 @@ _mm_slli_pi32(__m64 __m, int __count) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PSLLQ instruction. +/// This intrinsic corresponds to the <c> PSLLQ </c> instruction. /// /// \param __m /// A 64-bit integer vector interpreted as a single 64-bit integer. /// \param __count /// A 64-bit integer vector interpreted as a single 64-bit integer. /// \returns A 64-bit integer vector containing the left-shifted value. If -/// __count is greater or equal to 64, the result is set to 0. +/// \a __count is greater or equal to 64, the result is set to 0. static __inline__ __m64 __DEFAULT_FN_ATTRS _mm_sll_si64(__m64 __m, __m64 __count) { @@ -831,14 +835,14 @@ _mm_sll_si64(__m64 __m, __m64 __count) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PSLLQ instruction. +/// This intrinsic corresponds to the <c> PSLLQ </c> instruction. /// /// \param __m /// A 64-bit integer vector interpreted as a single 64-bit integer. /// \param __count /// A 32-bit integer value. /// \returns A 64-bit integer vector containing the left-shifted value. If -/// __count is greater or equal to 64, the result is set to 0. +/// \a __count is greater or equal to 64, the result is set to 0. static __inline__ __m64 __DEFAULT_FN_ATTRS _mm_slli_si64(__m64 __m, int __count) { @@ -854,7 +858,7 @@ _mm_slli_si64(__m64 __m, int __count) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PSRAW instruction. +/// This intrinsic corresponds to the <c> PSRAW </c> instruction. /// /// \param __m /// A 64-bit integer vector of [4 x i16]. @@ -876,7 +880,7 @@ _mm_sra_pi16(__m64 __m, __m64 __count) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PSRAW instruction. +/// This intrinsic corresponds to the <c> PSRAW </c> instruction. /// /// \param __m /// A 64-bit integer vector of [4 x i16]. @@ -899,7 +903,7 @@ _mm_srai_pi16(__m64 __m, int __count) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PSRAD instruction. +/// This intrinsic corresponds to the <c> PSRAD </c> instruction. /// /// \param __m /// A 64-bit integer vector of [2 x i32]. @@ -921,7 +925,7 @@ _mm_sra_pi32(__m64 __m, __m64 __count) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PSRAD instruction. +/// This intrinsic corresponds to the <c> PSRAD </c> instruction. /// /// \param __m /// A 64-bit integer vector of [2 x i32]. @@ -943,7 +947,7 @@ _mm_srai_pi32(__m64 __m, int __count) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PSRLW instruction. +/// This intrinsic corresponds to the <c> PSRLW </c> instruction. /// /// \param __m /// A 64-bit integer vector of [4 x i16]. @@ -964,7 +968,7 @@ _mm_srl_pi16(__m64 __m, __m64 __count) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PSRLW instruction. +/// This intrinsic corresponds to the <c> PSRLW </c> instruction. /// /// \param __m /// A 64-bit integer vector of [4 x i16]. @@ -986,7 +990,7 @@ _mm_srli_pi16(__m64 __m, int __count) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PSRLD instruction. +/// This intrinsic corresponds to the <c> PSRLD </c> instruction. /// /// \param __m /// A 64-bit integer vector of [2 x i32]. @@ -1007,7 +1011,7 @@ _mm_srl_pi32(__m64 __m, __m64 __count) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PSRLD instruction. +/// This intrinsic corresponds to the <c> PSRLD </c> instruction. /// /// \param __m /// A 64-bit integer vector of [2 x i32]. @@ -1027,7 +1031,7 @@ _mm_srli_pi32(__m64 __m, int __count) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PSRLQ instruction. +/// This intrinsic corresponds to the <c> PSRLQ </c> instruction. /// /// \param __m /// A 64-bit integer vector interpreted as a single 64-bit integer. @@ -1046,7 +1050,7 @@ _mm_srl_si64(__m64 __m, __m64 __count) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PSRLQ instruction. +/// This intrinsic corresponds to the <c> PSRLQ </c> instruction. /// /// \param __m /// A 64-bit integer vector interpreted as a single 64-bit integer. @@ -1063,7 +1067,7 @@ _mm_srli_si64(__m64 __m, int __count) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PAND instruction. +/// This intrinsic corresponds to the <c> PAND </c> instruction. /// /// \param __m1 /// A 64-bit integer vector. @@ -1083,7 +1087,7 @@ _mm_and_si64(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PANDN instruction. +/// This intrinsic corresponds to the <c> PANDN </c> instruction. /// /// \param __m1 /// A 64-bit integer vector. The one's complement of this parameter is used @@ -1102,7 +1106,7 @@ _mm_andnot_si64(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c POR instruction. +/// This intrinsic corresponds to the <c> POR </c> instruction. /// /// \param __m1 /// A 64-bit integer vector. @@ -1120,7 +1124,7 @@ _mm_or_si64(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PXOR instruction. +/// This intrinsic corresponds to the <c> PXOR </c> instruction. /// /// \param __m1 /// A 64-bit integer vector. @@ -1141,7 +1145,7 @@ _mm_xor_si64(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PCMPEQB instruction. +/// This intrinsic corresponds to the <c> PCMPEQB </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [8 x i8]. @@ -1162,7 +1166,7 @@ _mm_cmpeq_pi8(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PCMPEQW instruction. +/// This intrinsic corresponds to the <c> PCMPEQW </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [4 x i16]. @@ -1183,7 +1187,7 @@ _mm_cmpeq_pi16(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PCMPEQD instruction. +/// This intrinsic corresponds to the <c> PCMPEQD </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [2 x i32]. @@ -1204,7 +1208,7 @@ _mm_cmpeq_pi32(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PCMPGTB instruction. +/// This intrinsic corresponds to the <c> PCMPGTB </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [8 x i8]. @@ -1225,7 +1229,7 @@ _mm_cmpgt_pi8(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PCMPGTW instruction. +/// This intrinsic corresponds to the <c> PCMPGTW </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [4 x i16]. @@ -1246,7 +1250,7 @@ _mm_cmpgt_pi16(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c PCMPGTD instruction. +/// This intrinsic corresponds to the <c> PCMPGTD </c> instruction. /// /// \param __m1 /// A 64-bit integer vector of [2 x i32]. @@ -1264,7 +1268,7 @@ _mm_cmpgt_pi32(__m64 __m1, __m64 __m2) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the the \c VXORPS / XORPS instruction. +/// This intrinsic corresponds to the the <c> VXORPS / XORPS </c> instruction. /// /// \returns An initialized 64-bit integer vector with all elements set to zero. static __inline__ __m64 __DEFAULT_FN_ATTRS @@ -1356,7 +1360,7 @@ _mm_set_pi8(char __b7, char __b6, char __b5, char __b4, char __b3, char __b2, /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c VPSHUFD / PSHUFD instruction. +/// This intrinsic corresponds to the <c> VPSHUFD / PSHUFD </c> instruction. /// /// \param __i /// A 32-bit integer value used to initialize each vector element of the @@ -1374,7 +1378,7 @@ _mm_set1_pi32(int __i) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c VPSHUFLW / PSHUFLW instruction. +/// This intrinsic corresponds to the <c> VPSHUFLW / PSHUFLW </c> instruction. /// /// \param __w /// A 16-bit integer value used to initialize each vector element of the @@ -1391,8 +1395,8 @@ _mm_set1_pi16(short __w) /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the \c VPUNPCKLBW + VPSHUFLW / \c PUNPCKLBW + -/// PSHUFLW instruction. +/// This intrinsic corresponds to the <c> VPUNPCKLBW + VPSHUFLW / PUNPCKLBW + +/// PSHUFLW </c> instruction. /// /// \param __b /// An 8-bit integer value used to initialize each vector element of the |
