diff options
Diffstat (limited to 'contrib/llvm/tools/clang/lib/Headers/immintrin.h')
-rw-r--r-- | contrib/llvm/tools/clang/lib/Headers/immintrin.h | 95 |
1 files changed, 32 insertions, 63 deletions
diff --git a/contrib/llvm/tools/clang/lib/Headers/immintrin.h b/contrib/llvm/tools/clang/lib/Headers/immintrin.h index 21ad328..f3c6d19 100644 --- a/contrib/llvm/tools/clang/lib/Headers/immintrin.h +++ b/contrib/llvm/tools/clang/lib/Headers/immintrin.h @@ -24,178 +24,147 @@ #ifndef __IMMINTRIN_H #define __IMMINTRIN_H -#ifdef __MMX__ #include <mmintrin.h> -#endif -#ifdef __SSE__ #include <xmmintrin.h> -#endif -#ifdef __SSE2__ #include <emmintrin.h> -#endif -#ifdef __SSE3__ #include <pmmintrin.h> -#endif -#ifdef __SSSE3__ #include <tmmintrin.h> -#endif -#if defined (__SSE4_2__) || defined (__SSE4_1__) #include <smmintrin.h> -#endif -#if defined (__AES__) || defined (__PCLMUL__) #include <wmmintrin.h> -#endif -#ifdef __AVX__ #include <avxintrin.h> -#endif -#ifdef __AVX2__ #include <avx2intrin.h> -#endif -#ifdef __BMI__ +/* The 256-bit versions of functions in f16cintrin.h. + Intel documents these as being in immintrin.h, and + they depend on typedefs from avxintrin.h. */ + +#define _mm256_cvtps_ph(a, imm) __extension__ ({ \ + (__m128i)__builtin_ia32_vcvtps2ph256((__v8sf)(__m256)(a), (imm)); }) + +static __inline __m256 __attribute__((__always_inline__, __nodebug__, __target__("f16c"))) +_mm256_cvtph_ps(__m128i __a) +{ + return (__m256)__builtin_ia32_vcvtph2ps256((__v8hi)__a); +} + #include <bmiintrin.h> -#endif -#ifdef __BMI2__ #include <bmi2intrin.h> -#endif -#ifdef __LZCNT__ #include <lzcntintrin.h> -#endif -#ifdef __FMA__ #include <fmaintrin.h> -#endif -#ifdef __AVX512F__ #include <avx512fintrin.h> -#endif -#ifdef __AVX512VL__ #include <avx512vlintrin.h> -#endif -#ifdef __AVX512BW__ #include <avx512bwintrin.h> -#endif -#ifdef __AVX512CD__ #include <avx512cdintrin.h> -#endif -#ifdef __AVX512DQ__ #include <avx512dqintrin.h> -#endif -#if defined (__AVX512VL__) && defined (__AVX512BW__) #include <avx512vlbwintrin.h> -#endif -#if defined (__AVX512VL__) && defined (__AVX512DQ__) #include <avx512vldqintrin.h> -#endif -#ifdef __AVX512ER__ #include <avx512erintrin.h> -#endif -#ifdef __RDRND__ -static __inline__ int __attribute__((__always_inline__, __nodebug__)) +static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd"))) _rdrand16_step(unsigned short *__p) { return __builtin_ia32_rdrand16_step(__p); } -static __inline__ int __attribute__((__always_inline__, __nodebug__)) +static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd"))) _rdrand32_step(unsigned int *__p) { return __builtin_ia32_rdrand32_step(__p); } #ifdef __x86_64__ -static __inline__ int __attribute__((__always_inline__, __nodebug__)) +static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd"))) _rdrand64_step(unsigned long long *__p) { return __builtin_ia32_rdrand64_step(__p); } #endif -#endif /* __RDRND__ */ -#ifdef __FSGSBASE__ #ifdef __x86_64__ -static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__)) +static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) _readfsbase_u32(void) { return __builtin_ia32_rdfsbase32(); } -static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__)) +static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) _readfsbase_u64(void) { return __builtin_ia32_rdfsbase64(); } -static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__)) +static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) _readgsbase_u32(void) { return __builtin_ia32_rdgsbase32(); } -static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__)) +static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) _readgsbase_u64(void) { return __builtin_ia32_rdgsbase64(); } -static __inline__ void __attribute__((__always_inline__, __nodebug__)) +static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) _writefsbase_u32(unsigned int __V) { return __builtin_ia32_wrfsbase32(__V); } -static __inline__ void __attribute__((__always_inline__, __nodebug__)) +static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) _writefsbase_u64(unsigned long long __V) { return __builtin_ia32_wrfsbase64(__V); } -static __inline__ void __attribute__((__always_inline__, __nodebug__)) +static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) _writegsbase_u32(unsigned int __V) { return __builtin_ia32_wrgsbase32(__V); } -static __inline__ void __attribute__((__always_inline__, __nodebug__)) +static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) _writegsbase_u64(unsigned long long __V) { return __builtin_ia32_wrgsbase64(__V); } #endif -#endif /* __FSGSBASE__ */ -#ifdef __RTM__ #include <rtmintrin.h> -#endif -#ifdef __RTM__ #include <xtestintrin.h> -#endif -#ifdef __SHA__ #include <shaintrin.h> -#endif #include <fxsrintrin.h> +#include <xsaveintrin.h> + +#include <xsaveoptintrin.h> + +#include <xsavecintrin.h> + +#include <xsavesintrin.h> + /* Some intrinsics inside adxintrin.h are available only on processors with ADX, * whereas others are also available at all times. */ #include <adxintrin.h> |