diff options
Diffstat (limited to 'contrib/llvm/patches/patch-r262261-llvm-r200617-sparc.diff')
| -rw-r--r-- | contrib/llvm/patches/patch-r262261-llvm-r200617-sparc.diff | 97 |
1 files changed, 97 insertions, 0 deletions
diff --git a/contrib/llvm/patches/patch-r262261-llvm-r200617-sparc.diff b/contrib/llvm/patches/patch-r262261-llvm-r200617-sparc.diff new file mode 100644 index 0000000..831cd98 --- /dev/null +++ b/contrib/llvm/patches/patch-r262261-llvm-r200617-sparc.diff @@ -0,0 +1,97 @@ +Pull in r200617 from upstream llvm trunk (by Venkatraman Govindaraju): + + [Sparc] Set %o7 as the return address register instead of %i7 in MCRegisterInfo. Also, add CFI instructions to initialize the frame correctly. + +Introduced here: http://svn.freebsd.org/changeset/base/262261 + +Index: lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp +=================================================================== +--- lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp ++++ lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp +@@ -33,6 +33,25 @@ + + using namespace llvm; + ++ ++static MCAsmInfo *createSparcMCAsmInfo(const MCRegisterInfo &MRI, ++ StringRef TT) { ++ MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT); ++ unsigned Reg = MRI.getDwarfRegNum(SP::O6, true); ++ MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(0, Reg, 0); ++ MAI->addInitialFrameState(Inst); ++ return MAI; ++} ++ ++static MCAsmInfo *createSparcV9MCAsmInfo(const MCRegisterInfo &MRI, ++ StringRef TT) { ++ MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT); ++ unsigned Reg = MRI.getDwarfRegNum(SP::O6, true); ++ MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(0, Reg, 2047); ++ MAI->addInitialFrameState(Inst); ++ return MAI; ++} ++ + static MCInstrInfo *createSparcMCInstrInfo() { + MCInstrInfo *X = new MCInstrInfo(); + InitSparcMCInstrInfo(X); +@@ -41,7 +60,7 @@ static MCInstrInfo *createSparcMCInstrInfo() { + + static MCRegisterInfo *createSparcMCRegisterInfo(StringRef TT) { + MCRegisterInfo *X = new MCRegisterInfo(); +- InitSparcMCRegisterInfo(X, SP::I7); ++ InitSparcMCRegisterInfo(X, SP::O7); + return X; + } + +@@ -132,8 +151,8 @@ static MCInstPrinter *createSparcMCInstPrinter(con + + extern "C" void LLVMInitializeSparcTargetMC() { + // Register the MC asm info. +- RegisterMCAsmInfo<SparcELFMCAsmInfo> X(TheSparcTarget); +- RegisterMCAsmInfo<SparcELFMCAsmInfo> Y(TheSparcV9Target); ++ RegisterMCAsmInfoFn X(TheSparcTarget, createSparcMCAsmInfo); ++ RegisterMCAsmInfoFn Y(TheSparcV9Target, createSparcV9MCAsmInfo); + + // Register the MC codegen info. + TargetRegistry::RegisterMCCodeGenInfo(TheSparcTarget, +Index: lib/Target/Sparc/SparcRegisterInfo.cpp +=================================================================== +--- lib/Target/Sparc/SparcRegisterInfo.cpp ++++ lib/Target/Sparc/SparcRegisterInfo.cpp +@@ -35,7 +35,7 @@ ReserveAppRegisters("sparc-reserve-app-registers", + cl::desc("Reserve application registers (%g2-%g4)")); + + SparcRegisterInfo::SparcRegisterInfo(SparcSubtarget &st) +- : SparcGenRegisterInfo(SP::I7), Subtarget(st) { ++ : SparcGenRegisterInfo(SP::O7), Subtarget(st) { + } + + const uint16_t* SparcRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) +Index: test/CodeGen/SPARC/exception.ll +=================================================================== +--- test/CodeGen/SPARC/exception.ll ++++ test/CodeGen/SPARC/exception.ll +@@ -56,7 +56,11 @@ + ; V8PIC_NOCFI-NEXT: .word _ZTIi + ; V8PIC_NOCFI: .section .eh_frame + ; V8PIC_NOCFI-NOT: .section ++; V8PIC_NOCFI: .byte 15 ! CIE Return Address Column + ; V8PIC_NOCFI: .word %r_disp32(DW.ref.__gxx_personality_v0) ++; V8PIC_NOCFI: .byte 12 ! DW_CFA_def_cfa ++; V8PIC_NOCFI: .byte 14 ! Reg 14 ++; V8PIC_NOCFI-NEXT: .byte 0 ! Offset 0 + ; V8PIC_NOCFI: .word %r_disp32(.Ltmp{{.+}}) ! FDE initial location + + +@@ -94,7 +98,11 @@ + ; V9PIC_NOCFI-NEXT: .xword _ZTIi + ; V9PIC_NOCFI: .section .eh_frame + ; V9PIC_NOCFI-NOT: .section ++; V9PIC_NOCFI: .byte 15 ! CIE Return Address Column + ; V9PIC_NOCFI: .word %r_disp32(DW.ref.__gxx_personality_v0) ++; V9PIC_NOCFI: .byte 12 ! DW_CFA_def_cfa ++; V9PIC_NOCFI-NEXT: .byte 14 ! Reg 14 ++; V9PIC_NOCFI: .ascii "\377\017" ! Offset 2047 + ; V9PIC_NOCFI: .word %r_disp32(.Ltmp{{.+}}) ! FDE initial location + + define i32 @main(i32 %argc, i8** nocapture readnone %argv) unnamed_addr #0 { |
