1 files changed, 45 insertions, 0 deletions
diff --git a/contrib/llvm/patches/patch-r262261-llvm-r200130-sparc.diff b/contrib/llvm/patches/patch-r262261-llvm-r200130-sparc.diff
new file mode 100644
index 0000000..aad6ae9
--- /dev/null
+++ b/contrib/llvm/patches/patch-r262261-llvm-r200130-sparc.diff
@@ -0,0 +1,45 @@
+Pull in r200130 from upstream llvm trunk (by Jakob Stoklund Olesen):
+
+  Fix swapped CASA operands.
+
+  Found by SingleSource/UnitTests/AtomicOps.c
+
+Introduced here: http://svn.freebsd.org/changeset/base/262261
+
+Index: lib/Target/Sparc/SparcISelLowering.cpp
+===================================================================
+--- lib/Target/Sparc/SparcISelLowering.cpp
++++ lib/Target/Sparc/SparcISelLowering.cpp
+@@ -2972,7 +2972,7 @@ SparcTargetLowering::expandAtomicRMW(MachineInstr
+   // loop:
+   //   %val = phi %val0, %dest
+   //   %upd = op %val, %rs2
+-  //   %dest = cas %addr, %upd, %val
++  //   %dest = cas %addr, %val, %upd
+   //   cmp %val, %dest
+   //   bne loop
+   // done:
+@@ -3031,7 +3031,7 @@ SparcTargetLowering::expandAtomicRMW(MachineInstr
+   }
+ 
+   BuildMI(LoopMBB, DL, TII.get(is64Bit ? SP::CASXrr : SP::CASrr), DestReg)
+-    .addReg(AddrReg).addReg(UpdReg).addReg(ValReg)
++    .addReg(AddrReg).addReg(ValReg).addReg(UpdReg)
+     .setMemRefs(MI->memoperands_begin(), MI->memoperands_end());
+   BuildMI(LoopMBB, DL, TII.get(SP::CMPrr)).addReg(ValReg).addReg(DestReg);
+   BuildMI(LoopMBB, DL, TII.get(is64Bit ? SP::BPXCC : SP::BCOND))
+Index: test/CodeGen/SPARC/atomics.ll
+===================================================================
+--- test/CodeGen/SPARC/atomics.ll
++++ test/CodeGen/SPARC/atomics.ll
+@@ -64,8 +64,8 @@ entry:
+ 
+ ; CHECK-LABEL: test_load_add_32
+ ; CHECK: membar
+-; CHECK: add
+-; CHECK: cas [%o0]
++; CHECK: add [[V:%[gilo][0-7]]], %o1, [[U:%[gilo][0-7]]]
++; CHECK: cas [%o0], [[V]], [[U]]
+ ; CHECK: membar
+ define zeroext i32 @test_load_add_32(i32* %p, i32 zeroext %v) {
+ entry: