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-rw-r--r--contrib/llvm/patches/patch-r262261-llvm-r199974-sparc.diff54
1 files changed, 54 insertions, 0 deletions
diff --git a/contrib/llvm/patches/patch-r262261-llvm-r199974-sparc.diff b/contrib/llvm/patches/patch-r262261-llvm-r199974-sparc.diff
new file mode 100644
index 0000000..0951995
--- /dev/null
+++ b/contrib/llvm/patches/patch-r262261-llvm-r199974-sparc.diff
@@ -0,0 +1,54 @@
+Pull in r199974 from upstream llvm trunk (by Venkatraman Govindaraju):
+
+ [Sparc] Correct quad register list in the asm parser.
+ Add test cases to check parsing of v9 double registers and their aliased quad registers.
+
+Introduced here: http://svn.freebsd.org/changeset/base/262261
+
+Index: test/MC/Disassembler/Sparc/sparc-fp.txt
+===================================================================
+--- test/MC/Disassembler/Sparc/sparc-fp.txt
++++ test/MC/Disassembler/Sparc/sparc-fp.txt
+@@ -81,6 +81,12 @@
+ # CHECK: faddq %f0, %f4, %f8
+ 0x91 0xa0 0x08 0x64
+
++# CHECK: faddd %f32, %f34, %f62
++0xbf 0xa0 0x48 0x43
++
++# CHECK: faddq %f32, %f36, %f60
++0xbb 0xa0 0x48 0x65
++
+ # CHECK: fsubs %f0, %f4, %f8
+ 0x91 0xa0 0x08 0xa4
+
+Index: test/MC/Sparc/sparc-fp-instructions.s
+===================================================================
+--- test/MC/Sparc/sparc-fp-instructions.s
++++ test/MC/Sparc/sparc-fp-instructions.s
+@@ -64,6 +64,12 @@
+ faddd %f0, %f4, %f8
+ faddq %f0, %f4, %f8
+
++ ! make sure we can handle V9 double registers and their aliased quad registers.
++ ! CHECK: faddd %f32, %f34, %f62 ! encoding: [0xbf,0xa0,0x48,0x43]
++ ! CHECK: faddq %f32, %f36, %f60 ! encoding: [0xbb,0xa0,0x48,0x65]
++ faddd %f32, %f34, %f62
++ faddq %f32, %f36, %f60
++
+ ! CHECK: fsubs %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x08,0xa4]
+ ! CHECK: fsubd %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x08,0xc4]
+ ! CHECK: fsubq %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x08,0xe4]
+Index: lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
+===================================================================
+--- lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
++++ lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
+@@ -117,7 +117,7 @@ class SparcAsmParser : public MCTargetAsmParser {
+ static unsigned QuadFPRegs[32] = {
+ Sparc::Q0, Sparc::Q1, Sparc::Q2, Sparc::Q3,
+ Sparc::Q4, Sparc::Q5, Sparc::Q6, Sparc::Q7,
+- Sparc::Q8, Sparc::Q7, Sparc::Q8, Sparc::Q9,
++ Sparc::Q8, Sparc::Q9, Sparc::Q10, Sparc::Q11,
+ Sparc::Q12, Sparc::Q13, Sparc::Q14, Sparc::Q15 };
+
+
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