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-rw-r--r--contrib/llvm/patches/patch-r262261-llvm-r199024-sparc.diff69
1 files changed, 69 insertions, 0 deletions
diff --git a/contrib/llvm/patches/patch-r262261-llvm-r199024-sparc.diff b/contrib/llvm/patches/patch-r262261-llvm-r199024-sparc.diff
new file mode 100644
index 0000000..82cf123
--- /dev/null
+++ b/contrib/llvm/patches/patch-r262261-llvm-r199024-sparc.diff
@@ -0,0 +1,69 @@
+Pull in r199024 from upstream llvm trunk (by Venkatraman Govindaraju):
+
+ [Sparc] Add missing processor types: v7 and niagara
+
+Introduced here: http://svnweb.freebsd.org/changeset/base/262261
+
+Index: lib/Target/Sparc/Sparc.td
+===================================================================
+--- lib/Target/Sparc/Sparc.td
++++ lib/Target/Sparc/Sparc.td
+@@ -56,6 +56,7 @@ class Proc<string Name, list<SubtargetFeature> Fea
+ : Processor<Name, NoItineraries, Features>;
+
+ def : Proc<"generic", []>;
++def : Proc<"v7", []>;
+ def : Proc<"v8", []>;
+ def : Proc<"supersparc", []>;
+ def : Proc<"sparclite", []>;
+@@ -67,7 +68,10 @@ def : Proc<"tsc701", []>;
+ def : Proc<"v9", [FeatureV9]>;
+ def : Proc<"ultrasparc", [FeatureV9, FeatureV8Deprecated]>;
+ def : Proc<"ultrasparc3", [FeatureV9, FeatureV8Deprecated]>;
+-def : Proc<"ultrasparc3-vis", [FeatureV9, FeatureV8Deprecated, FeatureVIS]>;
++def : Proc<"niagara", [FeatureV9, FeatureV8Deprecated]>;
++def : Proc<"niagara2", [FeatureV9, FeatureV8Deprecated]>;
++def : Proc<"niagara3", [FeatureV9, FeatureV8Deprecated]>;
++def : Proc<"niagara4", [FeatureV9, FeatureV8Deprecated]>;
+
+ def SparcAsmWriter : AsmWriter {
+ string AsmWriterClassName = "InstPrinter";
+Index: lib/Target/Sparc/SparcSubtarget.cpp
+===================================================================
+--- lib/Target/Sparc/SparcSubtarget.cpp
++++ lib/Target/Sparc/SparcSubtarget.cpp
+@@ -35,13 +35,8 @@ SparcSubtarget::SparcSubtarget(const std::string &
+
+ // Determine default and user specified characteristics
+ std::string CPUName = CPU;
+- if (CPUName.empty()) {
+- if (is64Bit)
+- CPUName = "v9";
+- else
+- CPUName = "v8";
+- }
+- IsV9 = CPUName == "v9";
++ if (CPUName.empty())
++ CPUName = (is64Bit) ? "v9" : "v8";
+
+ // Parse features string.
+ ParseSubtargetFeatures(CPUName, FS);
+Index: test/CodeGen/SPARC/ctpop.ll
+===================================================================
+--- test/CodeGen/SPARC/ctpop.ll
++++ test/CodeGen/SPARC/ctpop.ll
+@@ -1,6 +1,13 @@
+ ; RUN: llc < %s -march=sparc -mattr=-v9 | FileCheck %s -check-prefix=V8
+ ; RUN: llc < %s -march=sparc -mattr=+v9 | FileCheck %s -check-prefix=V9
+-; RUN: llc < %s -march=sparcv9 | FileCheck %s -check-prefix=SPARC64
++; RUN: llc < %s -march=sparc -mcpu=v9 | FileCheck %s -check-prefix=V9
++; RUN: llc < %s -march=sparc -mcpu=ultrasparc | FileCheck %s -check-prefix=V9
++; RUN: llc < %s -march=sparc -mcpu=ultrasparc3 | FileCheck %s -check-prefix=V9
++; RUN: llc < %s -march=sparc -mcpu=niagara | FileCheck %s -check-prefix=V9
++; RUN: llc < %s -march=sparc -mcpu=niagara2 | FileCheck %s -check-prefix=V9
++; RUN: llc < %s -march=sparc -mcpu=niagara3 | FileCheck %s -check-prefix=V9
++; RUN: llc < %s -march=sparc -mcpu=niagara4 | FileCheck %s -check-prefix=V9
++; RUN: llc < %s -march=sparcv9 | FileCheck %s -check-prefix=SPARC64
+
+ declare i32 @llvm.ctpop.i32(i32)
+
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